intel_lvds.c 18 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <linux/dmi.h>
  30. #include <linux/i2c.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #define I915_LVDS "i915_lvds"
  39. /**
  40. * Sets the backlight level.
  41. *
  42. * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  43. */
  44. static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  45. {
  46. struct drm_i915_private *dev_priv = dev->dev_private;
  47. u32 blc_pwm_ctl, reg;
  48. if (IS_IGDNG(dev))
  49. reg = BLC_PWM_CPU_CTL;
  50. else
  51. reg = BLC_PWM_CTL;
  52. blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  53. I915_WRITE(reg, (blc_pwm_ctl |
  54. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  55. }
  56. /**
  57. * Returns the maximum level of the backlight duty cycle field.
  58. */
  59. static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  60. {
  61. struct drm_i915_private *dev_priv = dev->dev_private;
  62. u32 reg;
  63. if (IS_IGDNG(dev))
  64. reg = BLC_PWM_PCH_CTL2;
  65. else
  66. reg = BLC_PWM_CTL;
  67. return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  68. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  69. }
  70. /**
  71. * Sets the power state for the panel.
  72. */
  73. static void intel_lvds_set_power(struct drm_device *dev, bool on)
  74. {
  75. struct drm_i915_private *dev_priv = dev->dev_private;
  76. u32 pp_status, ctl_reg, status_reg;
  77. if (IS_IGDNG(dev)) {
  78. ctl_reg = PCH_PP_CONTROL;
  79. status_reg = PCH_PP_STATUS;
  80. } else {
  81. ctl_reg = PP_CONTROL;
  82. status_reg = PP_STATUS;
  83. }
  84. if (on) {
  85. I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  86. POWER_TARGET_ON);
  87. do {
  88. pp_status = I915_READ(status_reg);
  89. } while ((pp_status & PP_ON) == 0);
  90. intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
  91. } else {
  92. intel_lvds_set_backlight(dev, 0);
  93. I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  94. ~POWER_TARGET_ON);
  95. do {
  96. pp_status = I915_READ(status_reg);
  97. } while (pp_status & PP_ON);
  98. }
  99. }
  100. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  101. {
  102. struct drm_device *dev = encoder->dev;
  103. if (mode == DRM_MODE_DPMS_ON)
  104. intel_lvds_set_power(dev, true);
  105. else
  106. intel_lvds_set_power(dev, false);
  107. /* XXX: We never power down the LVDS pairs. */
  108. }
  109. static void intel_lvds_save(struct drm_connector *connector)
  110. {
  111. struct drm_device *dev = connector->dev;
  112. struct drm_i915_private *dev_priv = dev->dev_private;
  113. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  114. u32 pwm_ctl_reg;
  115. if (IS_IGDNG(dev)) {
  116. pp_on_reg = PCH_PP_ON_DELAYS;
  117. pp_off_reg = PCH_PP_OFF_DELAYS;
  118. pp_ctl_reg = PCH_PP_CONTROL;
  119. pp_div_reg = PCH_PP_DIVISOR;
  120. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  121. } else {
  122. pp_on_reg = PP_ON_DELAYS;
  123. pp_off_reg = PP_OFF_DELAYS;
  124. pp_ctl_reg = PP_CONTROL;
  125. pp_div_reg = PP_DIVISOR;
  126. pwm_ctl_reg = BLC_PWM_CTL;
  127. }
  128. dev_priv->savePP_ON = I915_READ(pp_on_reg);
  129. dev_priv->savePP_OFF = I915_READ(pp_off_reg);
  130. dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
  131. dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
  132. dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
  133. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  134. BACKLIGHT_DUTY_CYCLE_MASK);
  135. /*
  136. * If the light is off at server startup, just make it full brightness
  137. */
  138. if (dev_priv->backlight_duty_cycle == 0)
  139. dev_priv->backlight_duty_cycle =
  140. intel_lvds_get_max_backlight(dev);
  141. }
  142. static void intel_lvds_restore(struct drm_connector *connector)
  143. {
  144. struct drm_device *dev = connector->dev;
  145. struct drm_i915_private *dev_priv = dev->dev_private;
  146. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  147. u32 pwm_ctl_reg;
  148. if (IS_IGDNG(dev)) {
  149. pp_on_reg = PCH_PP_ON_DELAYS;
  150. pp_off_reg = PCH_PP_OFF_DELAYS;
  151. pp_ctl_reg = PCH_PP_CONTROL;
  152. pp_div_reg = PCH_PP_DIVISOR;
  153. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  154. } else {
  155. pp_on_reg = PP_ON_DELAYS;
  156. pp_off_reg = PP_OFF_DELAYS;
  157. pp_ctl_reg = PP_CONTROL;
  158. pp_div_reg = PP_DIVISOR;
  159. pwm_ctl_reg = BLC_PWM_CTL;
  160. }
  161. I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
  162. I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
  163. I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
  164. I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
  165. I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
  166. if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
  167. intel_lvds_set_power(dev, true);
  168. else
  169. intel_lvds_set_power(dev, false);
  170. }
  171. static int intel_lvds_mode_valid(struct drm_connector *connector,
  172. struct drm_display_mode *mode)
  173. {
  174. struct drm_device *dev = connector->dev;
  175. struct drm_i915_private *dev_priv = dev->dev_private;
  176. struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
  177. if (fixed_mode) {
  178. if (mode->hdisplay > fixed_mode->hdisplay)
  179. return MODE_PANEL;
  180. if (mode->vdisplay > fixed_mode->vdisplay)
  181. return MODE_PANEL;
  182. }
  183. return MODE_OK;
  184. }
  185. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  186. struct drm_display_mode *mode,
  187. struct drm_display_mode *adjusted_mode)
  188. {
  189. struct drm_device *dev = encoder->dev;
  190. struct drm_i915_private *dev_priv = dev->dev_private;
  191. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  192. struct drm_encoder *tmp_encoder;
  193. /* Should never happen!! */
  194. if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
  195. printk(KERN_ERR "Can't support LVDS on pipe A\n");
  196. return false;
  197. }
  198. /* Should never happen!! */
  199. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  200. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  201. printk(KERN_ERR "Can't enable LVDS and another "
  202. "encoder on the same pipe\n");
  203. return false;
  204. }
  205. }
  206. /*
  207. * If we have timings from the BIOS for the panel, put them in
  208. * to the adjusted mode. The CRTC will be set up for this mode,
  209. * with the panel scaling set up to source from the H/VDisplay
  210. * of the original mode.
  211. */
  212. if (dev_priv->panel_fixed_mode != NULL) {
  213. adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
  214. adjusted_mode->hsync_start =
  215. dev_priv->panel_fixed_mode->hsync_start;
  216. adjusted_mode->hsync_end =
  217. dev_priv->panel_fixed_mode->hsync_end;
  218. adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
  219. adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
  220. adjusted_mode->vsync_start =
  221. dev_priv->panel_fixed_mode->vsync_start;
  222. adjusted_mode->vsync_end =
  223. dev_priv->panel_fixed_mode->vsync_end;
  224. adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
  225. adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
  226. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  227. }
  228. /*
  229. * XXX: It would be nice to support lower refresh rates on the
  230. * panels to reduce power consumption, and perhaps match the
  231. * user's requested refresh rate.
  232. */
  233. return true;
  234. }
  235. static void intel_lvds_prepare(struct drm_encoder *encoder)
  236. {
  237. struct drm_device *dev = encoder->dev;
  238. struct drm_i915_private *dev_priv = dev->dev_private;
  239. u32 reg;
  240. if (IS_IGDNG(dev))
  241. reg = BLC_PWM_CPU_CTL;
  242. else
  243. reg = BLC_PWM_CTL;
  244. dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
  245. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  246. BACKLIGHT_DUTY_CYCLE_MASK);
  247. intel_lvds_set_power(dev, false);
  248. }
  249. static void intel_lvds_commit( struct drm_encoder *encoder)
  250. {
  251. struct drm_device *dev = encoder->dev;
  252. struct drm_i915_private *dev_priv = dev->dev_private;
  253. if (dev_priv->backlight_duty_cycle == 0)
  254. dev_priv->backlight_duty_cycle =
  255. intel_lvds_get_max_backlight(dev);
  256. intel_lvds_set_power(dev, true);
  257. }
  258. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  259. struct drm_display_mode *mode,
  260. struct drm_display_mode *adjusted_mode)
  261. {
  262. struct drm_device *dev = encoder->dev;
  263. struct drm_i915_private *dev_priv = dev->dev_private;
  264. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  265. u32 pfit_control;
  266. /*
  267. * The LVDS pin pair will already have been turned on in the
  268. * intel_crtc_mode_set since it has a large impact on the DPLL
  269. * settings.
  270. */
  271. /* No panel fitting yet, fixme */
  272. if (IS_IGDNG(dev))
  273. return;
  274. /*
  275. * Enable automatic panel scaling so that non-native modes fill the
  276. * screen. Should be enabled before the pipe is enabled, according to
  277. * register description and PRM.
  278. */
  279. if (mode->hdisplay != adjusted_mode->hdisplay ||
  280. mode->vdisplay != adjusted_mode->vdisplay)
  281. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  282. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  283. HORIZ_INTERP_BILINEAR);
  284. else
  285. pfit_control = 0;
  286. if (!IS_I965G(dev)) {
  287. if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
  288. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  289. }
  290. else
  291. pfit_control |= intel_crtc->pipe << PFIT_PIPE_SHIFT;
  292. I915_WRITE(PFIT_CONTROL, pfit_control);
  293. }
  294. /**
  295. * Detect the LVDS connection.
  296. *
  297. * This always returns CONNECTOR_STATUS_CONNECTED. This connector should only have
  298. * been set up if the LVDS was actually connected anyway.
  299. */
  300. static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
  301. {
  302. return connector_status_connected;
  303. }
  304. /**
  305. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  306. */
  307. static int intel_lvds_get_modes(struct drm_connector *connector)
  308. {
  309. struct drm_device *dev = connector->dev;
  310. struct intel_output *intel_output = to_intel_output(connector);
  311. struct drm_i915_private *dev_priv = dev->dev_private;
  312. int ret = 0;
  313. ret = intel_ddc_get_modes(intel_output);
  314. if (ret)
  315. return ret;
  316. /* Didn't get an EDID, so
  317. * Set wide sync ranges so we get all modes
  318. * handed to valid_mode for checking
  319. */
  320. connector->display_info.min_vfreq = 0;
  321. connector->display_info.max_vfreq = 200;
  322. connector->display_info.min_hfreq = 0;
  323. connector->display_info.max_hfreq = 200;
  324. if (dev_priv->panel_fixed_mode != NULL) {
  325. struct drm_display_mode *mode;
  326. mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
  327. drm_mode_probed_add(connector, mode);
  328. return 1;
  329. }
  330. return 0;
  331. }
  332. /**
  333. * intel_lvds_destroy - unregister and free LVDS structures
  334. * @connector: connector to free
  335. *
  336. * Unregister the DDC bus for this connector then free the driver private
  337. * structure.
  338. */
  339. static void intel_lvds_destroy(struct drm_connector *connector)
  340. {
  341. struct intel_output *intel_output = to_intel_output(connector);
  342. if (intel_output->ddc_bus)
  343. intel_i2c_destroy(intel_output->ddc_bus);
  344. drm_sysfs_connector_remove(connector);
  345. drm_connector_cleanup(connector);
  346. kfree(connector);
  347. }
  348. static int intel_lvds_set_property(struct drm_connector *connector,
  349. struct drm_property *property,
  350. uint64_t value)
  351. {
  352. return 0;
  353. }
  354. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  355. .dpms = intel_lvds_dpms,
  356. .mode_fixup = intel_lvds_mode_fixup,
  357. .prepare = intel_lvds_prepare,
  358. .mode_set = intel_lvds_mode_set,
  359. .commit = intel_lvds_commit,
  360. };
  361. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  362. .get_modes = intel_lvds_get_modes,
  363. .mode_valid = intel_lvds_mode_valid,
  364. .best_encoder = intel_best_encoder,
  365. };
  366. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  367. .dpms = drm_helper_connector_dpms,
  368. .save = intel_lvds_save,
  369. .restore = intel_lvds_restore,
  370. .detect = intel_lvds_detect,
  371. .fill_modes = drm_helper_probe_single_connector_modes,
  372. .set_property = intel_lvds_set_property,
  373. .destroy = intel_lvds_destroy,
  374. };
  375. static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
  376. {
  377. drm_encoder_cleanup(encoder);
  378. }
  379. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  380. .destroy = intel_lvds_enc_destroy,
  381. };
  382. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  383. {
  384. DRM_DEBUG_KMS(I915_LVDS,
  385. "Skipping LVDS initialization for %s\n", id->ident);
  386. return 1;
  387. }
  388. /* These systems claim to have LVDS, but really don't */
  389. static const struct dmi_system_id intel_no_lvds[] = {
  390. {
  391. .callback = intel_no_lvds_dmi_callback,
  392. .ident = "Apple Mac Mini (Core series)",
  393. .matches = {
  394. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  395. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  396. },
  397. },
  398. {
  399. .callback = intel_no_lvds_dmi_callback,
  400. .ident = "Apple Mac Mini (Core 2 series)",
  401. .matches = {
  402. DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
  403. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  404. },
  405. },
  406. {
  407. .callback = intel_no_lvds_dmi_callback,
  408. .ident = "MSI IM-945GSE-A",
  409. .matches = {
  410. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  411. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  412. },
  413. },
  414. {
  415. .callback = intel_no_lvds_dmi_callback,
  416. .ident = "Dell Studio Hybrid",
  417. .matches = {
  418. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  419. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  420. },
  421. },
  422. {
  423. .callback = intel_no_lvds_dmi_callback,
  424. .ident = "AOpen Mini PC",
  425. .matches = {
  426. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  427. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  428. },
  429. },
  430. {
  431. .callback = intel_no_lvds_dmi_callback,
  432. .ident = "Aopen i945GTt-VFA",
  433. .matches = {
  434. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  435. },
  436. },
  437. { } /* terminating entry */
  438. };
  439. /**
  440. * intel_lvds_init - setup LVDS connectors on this device
  441. * @dev: drm device
  442. *
  443. * Create the connector, register the LVDS DDC bus, and try to figure out what
  444. * modes we can display on the LVDS panel (if present).
  445. */
  446. void intel_lvds_init(struct drm_device *dev)
  447. {
  448. struct drm_i915_private *dev_priv = dev->dev_private;
  449. struct intel_output *intel_output;
  450. struct drm_connector *connector;
  451. struct drm_encoder *encoder;
  452. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  453. struct drm_crtc *crtc;
  454. u32 lvds;
  455. int pipe, gpio = GPIOC;
  456. /* Skip init on machines we know falsely report LVDS */
  457. if (dmi_check_system(intel_no_lvds))
  458. return;
  459. if (IS_IGDNG(dev)) {
  460. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  461. return;
  462. gpio = PCH_GPIOC;
  463. }
  464. intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
  465. if (!intel_output) {
  466. return;
  467. }
  468. connector = &intel_output->base;
  469. encoder = &intel_output->enc;
  470. drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
  471. DRM_MODE_CONNECTOR_LVDS);
  472. drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
  473. DRM_MODE_ENCODER_LVDS);
  474. drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
  475. intel_output->type = INTEL_OUTPUT_LVDS;
  476. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  477. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  478. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  479. connector->interlace_allowed = false;
  480. connector->doublescan_allowed = false;
  481. /*
  482. * LVDS discovery:
  483. * 1) check for EDID on DDC
  484. * 2) check for VBT data
  485. * 3) check to see if LVDS is already on
  486. * if none of the above, no panel
  487. * 4) make sure lid is open
  488. * if closed, act like it's not there for now
  489. */
  490. /* Set up the DDC bus. */
  491. intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
  492. if (!intel_output->ddc_bus) {
  493. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  494. "failed.\n");
  495. goto failed;
  496. }
  497. /*
  498. * Attempt to get the fixed panel mode from DDC. Assume that the
  499. * preferred mode is the right one.
  500. */
  501. intel_ddc_get_modes(intel_output);
  502. list_for_each_entry(scan, &connector->probed_modes, head) {
  503. mutex_lock(&dev->mode_config.mutex);
  504. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  505. dev_priv->panel_fixed_mode =
  506. drm_mode_duplicate(dev, scan);
  507. mutex_unlock(&dev->mode_config.mutex);
  508. goto out;
  509. }
  510. mutex_unlock(&dev->mode_config.mutex);
  511. }
  512. /* Failed to get EDID, what about VBT? */
  513. if (dev_priv->lfp_lvds_vbt_mode) {
  514. mutex_lock(&dev->mode_config.mutex);
  515. dev_priv->panel_fixed_mode =
  516. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  517. mutex_unlock(&dev->mode_config.mutex);
  518. if (dev_priv->panel_fixed_mode) {
  519. dev_priv->panel_fixed_mode->type |=
  520. DRM_MODE_TYPE_PREFERRED;
  521. goto out;
  522. }
  523. }
  524. /*
  525. * If we didn't get EDID, try checking if the panel is already turned
  526. * on. If so, assume that whatever is currently programmed is the
  527. * correct mode.
  528. */
  529. /* IGDNG: FIXME if still fail, not try pipe mode now */
  530. if (IS_IGDNG(dev))
  531. goto failed;
  532. lvds = I915_READ(LVDS);
  533. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  534. crtc = intel_get_crtc_from_pipe(dev, pipe);
  535. if (crtc && (lvds & LVDS_PORT_EN)) {
  536. dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
  537. if (dev_priv->panel_fixed_mode) {
  538. dev_priv->panel_fixed_mode->type |=
  539. DRM_MODE_TYPE_PREFERRED;
  540. goto out;
  541. }
  542. }
  543. /* If we still don't have a mode after all that, give up. */
  544. if (!dev_priv->panel_fixed_mode)
  545. goto failed;
  546. out:
  547. if (IS_IGDNG(dev)) {
  548. u32 pwm;
  549. /* make sure PWM is enabled */
  550. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  551. pwm |= (PWM_ENABLE | PWM_PIPE_B);
  552. I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
  553. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  554. pwm |= PWM_PCH_ENABLE;
  555. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  556. }
  557. drm_sysfs_connector_add(connector);
  558. return;
  559. failed:
  560. DRM_DEBUG_KMS(I915_LVDS, "No LVDS modes found, disabling.\n");
  561. if (intel_output->ddc_bus)
  562. intel_i2c_destroy(intel_output->ddc_bus);
  563. drm_connector_cleanup(connector);
  564. kfree(connector);
  565. }