time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/bootmem.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/delay.h>
  40. #include <asm/s390_ext.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/timer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. /* change this if you have some constant time drift */
  49. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  50. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  51. /*
  52. * Create a small time difference between the timer interrupts
  53. * on the different cpus to avoid lock contention.
  54. */
  55. #define CPU_DEVIATION (smp_processor_id() << 12)
  56. #define TICK_SIZE tick
  57. u64 sched_clock_base_cc = -1; /* Force to data section. */
  58. static ext_int_info_t ext_int_info_cc;
  59. static ext_int_info_t ext_int_etr_cc;
  60. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  61. /*
  62. * Scheduler clock - returns current time in nanosec units.
  63. */
  64. unsigned long long notrace sched_clock(void)
  65. {
  66. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  67. }
  68. /*
  69. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  70. */
  71. unsigned long long monotonic_clock(void)
  72. {
  73. return sched_clock();
  74. }
  75. EXPORT_SYMBOL(monotonic_clock);
  76. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  77. {
  78. unsigned long long sec;
  79. sec = todval >> 12;
  80. do_div(sec, 1000000);
  81. xtime->tv_sec = sec;
  82. todval -= (sec * 1000000) << 12;
  83. xtime->tv_nsec = ((todval * 1000) >> 12);
  84. }
  85. void clock_comparator_work(void)
  86. {
  87. struct clock_event_device *cd;
  88. S390_lowcore.clock_comparator = -1ULL;
  89. set_clock_comparator(S390_lowcore.clock_comparator);
  90. cd = &__get_cpu_var(comparators);
  91. cd->event_handler(cd);
  92. }
  93. /*
  94. * Fixup the clock comparator.
  95. */
  96. static void fixup_clock_comparator(unsigned long long delta)
  97. {
  98. /* If nobody is waiting there's nothing to fix. */
  99. if (S390_lowcore.clock_comparator == -1ULL)
  100. return;
  101. S390_lowcore.clock_comparator += delta;
  102. set_clock_comparator(S390_lowcore.clock_comparator);
  103. }
  104. static int s390_next_event(unsigned long delta,
  105. struct clock_event_device *evt)
  106. {
  107. S390_lowcore.clock_comparator = get_clock() + delta;
  108. set_clock_comparator(S390_lowcore.clock_comparator);
  109. return 0;
  110. }
  111. static void s390_set_mode(enum clock_event_mode mode,
  112. struct clock_event_device *evt)
  113. {
  114. }
  115. /*
  116. * Set up lowcore and control register of the current cpu to
  117. * enable TOD clock and clock comparator interrupts.
  118. */
  119. void init_cpu_timer(void)
  120. {
  121. struct clock_event_device *cd;
  122. int cpu;
  123. S390_lowcore.clock_comparator = -1ULL;
  124. set_clock_comparator(S390_lowcore.clock_comparator);
  125. cpu = smp_processor_id();
  126. cd = &per_cpu(comparators, cpu);
  127. cd->name = "comparator";
  128. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  129. cd->mult = 16777;
  130. cd->shift = 12;
  131. cd->min_delta_ns = 1;
  132. cd->max_delta_ns = LONG_MAX;
  133. cd->rating = 400;
  134. cd->cpumask = cpumask_of(cpu);
  135. cd->set_next_event = s390_next_event;
  136. cd->set_mode = s390_set_mode;
  137. clockevents_register_device(cd);
  138. /* Enable clock comparator timer interrupt. */
  139. __ctl_set_bit(0,11);
  140. /* Always allow the timing alert external interrupt. */
  141. __ctl_set_bit(0, 4);
  142. }
  143. static void clock_comparator_interrupt(__u16 code)
  144. {
  145. if (S390_lowcore.clock_comparator == -1ULL)
  146. set_clock_comparator(S390_lowcore.clock_comparator);
  147. }
  148. static void etr_timing_alert(struct etr_irq_parm *);
  149. static void stp_timing_alert(struct stp_irq_parm *);
  150. static void timing_alert_interrupt(__u16 code)
  151. {
  152. if (S390_lowcore.ext_params & 0x00c40000)
  153. etr_timing_alert((struct etr_irq_parm *)
  154. &S390_lowcore.ext_params);
  155. if (S390_lowcore.ext_params & 0x00038000)
  156. stp_timing_alert((struct stp_irq_parm *)
  157. &S390_lowcore.ext_params);
  158. }
  159. static void etr_reset(void);
  160. static void stp_reset(void);
  161. unsigned long read_persistent_clock(void)
  162. {
  163. struct timespec ts;
  164. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
  165. return ts.tv_sec;
  166. }
  167. static cycle_t read_tod_clock(struct clocksource *cs)
  168. {
  169. return get_clock();
  170. }
  171. static struct clocksource clocksource_tod = {
  172. .name = "tod",
  173. .rating = 400,
  174. .read = read_tod_clock,
  175. .mask = -1ULL,
  176. .mult = 1000,
  177. .shift = 12,
  178. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  179. };
  180. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  181. {
  182. if (clock != &clocksource_tod)
  183. return;
  184. /* Make userspace gettimeofday spin until we're done. */
  185. ++vdso_data->tb_update_count;
  186. smp_wmb();
  187. vdso_data->xtime_tod_stamp = clock->cycle_last;
  188. vdso_data->xtime_clock_sec = xtime.tv_sec;
  189. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  190. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  191. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  192. smp_wmb();
  193. ++vdso_data->tb_update_count;
  194. }
  195. extern struct timezone sys_tz;
  196. void update_vsyscall_tz(void)
  197. {
  198. /* Make userspace gettimeofday spin until we're done. */
  199. ++vdso_data->tb_update_count;
  200. smp_wmb();
  201. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  202. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  203. smp_wmb();
  204. ++vdso_data->tb_update_count;
  205. }
  206. /*
  207. * Initialize the TOD clock and the CPU timer of
  208. * the boot cpu.
  209. */
  210. void __init time_init(void)
  211. {
  212. struct timespec ts;
  213. unsigned long flags;
  214. cycle_t now;
  215. /* Reset time synchronization interfaces. */
  216. etr_reset();
  217. stp_reset();
  218. /* request the clock comparator external interrupt */
  219. if (register_early_external_interrupt(0x1004,
  220. clock_comparator_interrupt,
  221. &ext_int_info_cc) != 0)
  222. panic("Couldn't request external interrupt 0x1004");
  223. /* request the timing alert external interrupt */
  224. if (register_early_external_interrupt(0x1406,
  225. timing_alert_interrupt,
  226. &ext_int_etr_cc) != 0)
  227. panic("Couldn't request external interrupt 0x1406");
  228. if (clocksource_register(&clocksource_tod) != 0)
  229. panic("Could not register TOD clock source");
  230. /*
  231. * The TOD clock is an accurate clock. The xtime should be
  232. * initialized in a way that the difference between TOD and
  233. * xtime is reasonably small. Too bad that timekeeping_init
  234. * sets xtime.tv_nsec to zero. In addition the clock source
  235. * change from the jiffies clock source to the TOD clock
  236. * source add another error of up to 1/HZ second. The same
  237. * function sets wall_to_monotonic to a value that is too
  238. * small for /proc/uptime to be accurate.
  239. * Reset xtime and wall_to_monotonic to sane values.
  240. */
  241. write_seqlock_irqsave(&xtime_lock, flags);
  242. now = get_clock();
  243. tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
  244. clocksource_tod.cycle_last = now;
  245. clocksource_tod.raw_time = xtime;
  246. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
  247. set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
  248. write_sequnlock_irqrestore(&xtime_lock, flags);
  249. /* Enable TOD clock interrupts on the boot cpu. */
  250. init_cpu_timer();
  251. /* Enable cpu timer interrupts on the boot cpu. */
  252. vtime_init();
  253. }
  254. /*
  255. * The time is "clock". old is what we think the time is.
  256. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  257. * "delay" is an approximation how long the synchronization took. If
  258. * the time correction is positive, then "delay" is subtracted from
  259. * the time difference and only the remaining part is passed to ntp.
  260. */
  261. static unsigned long long adjust_time(unsigned long long old,
  262. unsigned long long clock,
  263. unsigned long long delay)
  264. {
  265. unsigned long long delta, ticks;
  266. struct timex adjust;
  267. if (clock > old) {
  268. /* It is later than we thought. */
  269. delta = ticks = clock - old;
  270. delta = ticks = (delta < delay) ? 0 : delta - delay;
  271. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  272. adjust.offset = ticks * (1000000 / HZ);
  273. } else {
  274. /* It is earlier than we thought. */
  275. delta = ticks = old - clock;
  276. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  277. delta = -delta;
  278. adjust.offset = -ticks * (1000000 / HZ);
  279. }
  280. sched_clock_base_cc += delta;
  281. if (adjust.offset != 0) {
  282. pr_notice("The ETR interface has adjusted the clock "
  283. "by %li microseconds\n", adjust.offset);
  284. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  285. do_adjtimex(&adjust);
  286. }
  287. return delta;
  288. }
  289. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  290. static DEFINE_MUTEX(clock_sync_mutex);
  291. static unsigned long clock_sync_flags;
  292. #define CLOCK_SYNC_HAS_ETR 0
  293. #define CLOCK_SYNC_HAS_STP 1
  294. #define CLOCK_SYNC_ETR 2
  295. #define CLOCK_SYNC_STP 3
  296. /*
  297. * The synchronous get_clock function. It will write the current clock
  298. * value to the clock pointer and return 0 if the clock is in sync with
  299. * the external time source. If the clock mode is local it will return
  300. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  301. * reference.
  302. */
  303. int get_sync_clock(unsigned long long *clock)
  304. {
  305. atomic_t *sw_ptr;
  306. unsigned int sw0, sw1;
  307. sw_ptr = &get_cpu_var(clock_sync_word);
  308. sw0 = atomic_read(sw_ptr);
  309. *clock = get_clock();
  310. sw1 = atomic_read(sw_ptr);
  311. put_cpu_var(clock_sync_sync);
  312. if (sw0 == sw1 && (sw0 & 0x80000000U))
  313. /* Success: time is in sync. */
  314. return 0;
  315. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  316. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  317. return -ENOSYS;
  318. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  319. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  320. return -EACCES;
  321. return -EAGAIN;
  322. }
  323. EXPORT_SYMBOL(get_sync_clock);
  324. /*
  325. * Make get_sync_clock return -EAGAIN.
  326. */
  327. static void disable_sync_clock(void *dummy)
  328. {
  329. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  330. /*
  331. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  332. * fail until the sync bit is turned back on. In addition
  333. * increase the "sequence" counter to avoid the race of an
  334. * etr event and the complete recovery against get_sync_clock.
  335. */
  336. atomic_clear_mask(0x80000000, sw_ptr);
  337. atomic_inc(sw_ptr);
  338. }
  339. /*
  340. * Make get_sync_clock return 0 again.
  341. * Needs to be called from a context disabled for preemption.
  342. */
  343. static void enable_sync_clock(void)
  344. {
  345. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  346. atomic_set_mask(0x80000000, sw_ptr);
  347. }
  348. /*
  349. * Function to check if the clock is in sync.
  350. */
  351. static inline int check_sync_clock(void)
  352. {
  353. atomic_t *sw_ptr;
  354. int rc;
  355. sw_ptr = &get_cpu_var(clock_sync_word);
  356. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  357. put_cpu_var(clock_sync_sync);
  358. return rc;
  359. }
  360. /* Single threaded workqueue used for etr and stp sync events */
  361. static struct workqueue_struct *time_sync_wq;
  362. static void __init time_init_wq(void)
  363. {
  364. if (time_sync_wq)
  365. return;
  366. time_sync_wq = create_singlethread_workqueue("timesync");
  367. stop_machine_create();
  368. }
  369. /*
  370. * External Time Reference (ETR) code.
  371. */
  372. static int etr_port0_online;
  373. static int etr_port1_online;
  374. static int etr_steai_available;
  375. static int __init early_parse_etr(char *p)
  376. {
  377. if (strncmp(p, "off", 3) == 0)
  378. etr_port0_online = etr_port1_online = 0;
  379. else if (strncmp(p, "port0", 5) == 0)
  380. etr_port0_online = 1;
  381. else if (strncmp(p, "port1", 5) == 0)
  382. etr_port1_online = 1;
  383. else if (strncmp(p, "on", 2) == 0)
  384. etr_port0_online = etr_port1_online = 1;
  385. return 0;
  386. }
  387. early_param("etr", early_parse_etr);
  388. enum etr_event {
  389. ETR_EVENT_PORT0_CHANGE,
  390. ETR_EVENT_PORT1_CHANGE,
  391. ETR_EVENT_PORT_ALERT,
  392. ETR_EVENT_SYNC_CHECK,
  393. ETR_EVENT_SWITCH_LOCAL,
  394. ETR_EVENT_UPDATE,
  395. };
  396. /*
  397. * Valid bit combinations of the eacr register are (x = don't care):
  398. * e0 e1 dp p0 p1 ea es sl
  399. * 0 0 x 0 0 0 0 0 initial, disabled state
  400. * 0 0 x 0 1 1 0 0 port 1 online
  401. * 0 0 x 1 0 1 0 0 port 0 online
  402. * 0 0 x 1 1 1 0 0 both ports online
  403. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  404. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  405. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  406. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  407. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  408. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  409. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  410. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  411. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  412. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  413. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  414. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  415. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  416. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  417. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  418. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  419. */
  420. static struct etr_eacr etr_eacr;
  421. static u64 etr_tolec; /* time of last eacr update */
  422. static struct etr_aib etr_port0;
  423. static int etr_port0_uptodate;
  424. static struct etr_aib etr_port1;
  425. static int etr_port1_uptodate;
  426. static unsigned long etr_events;
  427. static struct timer_list etr_timer;
  428. static void etr_timeout(unsigned long dummy);
  429. static void etr_work_fn(struct work_struct *work);
  430. static DEFINE_MUTEX(etr_work_mutex);
  431. static DECLARE_WORK(etr_work, etr_work_fn);
  432. /*
  433. * Reset ETR attachment.
  434. */
  435. static void etr_reset(void)
  436. {
  437. etr_eacr = (struct etr_eacr) {
  438. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  439. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  440. .es = 0, .sl = 0 };
  441. if (etr_setr(&etr_eacr) == 0) {
  442. etr_tolec = get_clock();
  443. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  444. if (etr_port0_online && etr_port1_online)
  445. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  446. } else if (etr_port0_online || etr_port1_online) {
  447. pr_warning("The real or virtual hardware system does "
  448. "not provide an ETR interface\n");
  449. etr_port0_online = etr_port1_online = 0;
  450. }
  451. }
  452. static int __init etr_init(void)
  453. {
  454. struct etr_aib aib;
  455. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  456. return 0;
  457. time_init_wq();
  458. /* Check if this machine has the steai instruction. */
  459. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  460. etr_steai_available = 1;
  461. setup_timer(&etr_timer, etr_timeout, 0UL);
  462. if (etr_port0_online) {
  463. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  464. queue_work(time_sync_wq, &etr_work);
  465. }
  466. if (etr_port1_online) {
  467. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  468. queue_work(time_sync_wq, &etr_work);
  469. }
  470. return 0;
  471. }
  472. arch_initcall(etr_init);
  473. /*
  474. * Two sorts of ETR machine checks. The architecture reads:
  475. * "When a machine-check niterruption occurs and if a switch-to-local or
  476. * ETR-sync-check interrupt request is pending but disabled, this pending
  477. * disabled interruption request is indicated and is cleared".
  478. * Which means that we can get etr_switch_to_local events from the machine
  479. * check handler although the interruption condition is disabled. Lovely..
  480. */
  481. /*
  482. * Switch to local machine check. This is called when the last usable
  483. * ETR port goes inactive. After switch to local the clock is not in sync.
  484. */
  485. void etr_switch_to_local(void)
  486. {
  487. if (!etr_eacr.sl)
  488. return;
  489. disable_sync_clock(NULL);
  490. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  491. queue_work(time_sync_wq, &etr_work);
  492. }
  493. /*
  494. * ETR sync check machine check. This is called when the ETR OTE and the
  495. * local clock OTE are farther apart than the ETR sync check tolerance.
  496. * After a ETR sync check the clock is not in sync. The machine check
  497. * is broadcasted to all cpus at the same time.
  498. */
  499. void etr_sync_check(void)
  500. {
  501. if (!etr_eacr.es)
  502. return;
  503. disable_sync_clock(NULL);
  504. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  505. queue_work(time_sync_wq, &etr_work);
  506. }
  507. /*
  508. * ETR timing alert. There are two causes:
  509. * 1) port state change, check the usability of the port
  510. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  511. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  512. * or ETR-data word 4 (edf4) has changed.
  513. */
  514. static void etr_timing_alert(struct etr_irq_parm *intparm)
  515. {
  516. if (intparm->pc0)
  517. /* ETR port 0 state change. */
  518. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  519. if (intparm->pc1)
  520. /* ETR port 1 state change. */
  521. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  522. if (intparm->eai)
  523. /*
  524. * ETR port alert on either port 0, 1 or both.
  525. * Both ports are not up-to-date now.
  526. */
  527. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  528. queue_work(time_sync_wq, &etr_work);
  529. }
  530. static void etr_timeout(unsigned long dummy)
  531. {
  532. set_bit(ETR_EVENT_UPDATE, &etr_events);
  533. queue_work(time_sync_wq, &etr_work);
  534. }
  535. /*
  536. * Check if the etr mode is pss.
  537. */
  538. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  539. {
  540. return eacr.es && !eacr.sl;
  541. }
  542. /*
  543. * Check if the etr mode is etr.
  544. */
  545. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  546. {
  547. return eacr.es && eacr.sl;
  548. }
  549. /*
  550. * Check if the port can be used for TOD synchronization.
  551. * For PPS mode the port has to receive OTEs. For ETR mode
  552. * the port has to receive OTEs, the ETR stepping bit has to
  553. * be zero and the validity bits for data frame 1, 2, and 3
  554. * have to be 1.
  555. */
  556. static int etr_port_valid(struct etr_aib *aib, int port)
  557. {
  558. unsigned int psc;
  559. /* Check that this port is receiving OTEs. */
  560. if (aib->tsp == 0)
  561. return 0;
  562. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  563. if (psc == etr_lpsc_pps_mode)
  564. return 1;
  565. if (psc == etr_lpsc_operational_step)
  566. return !aib->esw.y && aib->slsw.v1 &&
  567. aib->slsw.v2 && aib->slsw.v3;
  568. return 0;
  569. }
  570. /*
  571. * Check if two ports are on the same network.
  572. */
  573. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  574. {
  575. // FIXME: any other fields we have to compare?
  576. return aib1->edf1.net_id == aib2->edf1.net_id;
  577. }
  578. /*
  579. * Wrapper for etr_stei that converts physical port states
  580. * to logical port states to be consistent with the output
  581. * of stetr (see etr_psc vs. etr_lpsc).
  582. */
  583. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  584. {
  585. BUG_ON(etr_steai(aib, func) != 0);
  586. /* Convert port state to logical port state. */
  587. if (aib->esw.psc0 == 1)
  588. aib->esw.psc0 = 2;
  589. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  590. aib->esw.psc0 = 1;
  591. if (aib->esw.psc1 == 1)
  592. aib->esw.psc1 = 2;
  593. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  594. aib->esw.psc1 = 1;
  595. }
  596. /*
  597. * Check if the aib a2 is still connected to the same attachment as
  598. * aib a1, the etv values differ by one and a2 is valid.
  599. */
  600. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  601. {
  602. int state_a1, state_a2;
  603. /* Paranoia check: e0/e1 should better be the same. */
  604. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  605. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  606. return 0;
  607. /* Still connected to the same etr ? */
  608. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  609. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  610. if (state_a1 == etr_lpsc_operational_step) {
  611. if (state_a2 != etr_lpsc_operational_step ||
  612. a1->edf1.net_id != a2->edf1.net_id ||
  613. a1->edf1.etr_id != a2->edf1.etr_id ||
  614. a1->edf1.etr_pn != a2->edf1.etr_pn)
  615. return 0;
  616. } else if (state_a2 != etr_lpsc_pps_mode)
  617. return 0;
  618. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  619. if (a1->edf2.etv + 1 != a2->edf2.etv)
  620. return 0;
  621. if (!etr_port_valid(a2, p))
  622. return 0;
  623. return 1;
  624. }
  625. struct clock_sync_data {
  626. atomic_t cpus;
  627. int in_sync;
  628. unsigned long long fixup_cc;
  629. int etr_port;
  630. struct etr_aib *etr_aib;
  631. };
  632. static void clock_sync_cpu(struct clock_sync_data *sync)
  633. {
  634. atomic_dec(&sync->cpus);
  635. enable_sync_clock();
  636. /*
  637. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  638. * is called on all other cpus while the TOD clocks is stopped.
  639. * __udelay will stop the cpu on an enabled wait psw until the
  640. * TOD is running again.
  641. */
  642. while (sync->in_sync == 0) {
  643. __udelay(1);
  644. /*
  645. * A different cpu changes *in_sync. Therefore use
  646. * barrier() to force memory access.
  647. */
  648. barrier();
  649. }
  650. if (sync->in_sync != 1)
  651. /* Didn't work. Clear per-cpu in sync bit again. */
  652. disable_sync_clock(NULL);
  653. /*
  654. * This round of TOD syncing is done. Set the clock comparator
  655. * to the next tick and let the processor continue.
  656. */
  657. fixup_clock_comparator(sync->fixup_cc);
  658. }
  659. /*
  660. * Sync the TOD clock using the port refered to by aibp. This port
  661. * has to be enabled and the other port has to be disabled. The
  662. * last eacr update has to be more than 1.6 seconds in the past.
  663. */
  664. static int etr_sync_clock(void *data)
  665. {
  666. static int first;
  667. unsigned long long clock, old_clock, delay, delta;
  668. struct clock_sync_data *etr_sync;
  669. struct etr_aib *sync_port, *aib;
  670. int port;
  671. int rc;
  672. etr_sync = data;
  673. if (xchg(&first, 1) == 1) {
  674. /* Slave */
  675. clock_sync_cpu(etr_sync);
  676. return 0;
  677. }
  678. /* Wait until all other cpus entered the sync function. */
  679. while (atomic_read(&etr_sync->cpus) != 0)
  680. cpu_relax();
  681. port = etr_sync->etr_port;
  682. aib = etr_sync->etr_aib;
  683. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  684. enable_sync_clock();
  685. /* Set clock to next OTE. */
  686. __ctl_set_bit(14, 21);
  687. __ctl_set_bit(0, 29);
  688. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  689. old_clock = get_clock();
  690. if (set_clock(clock) == 0) {
  691. __udelay(1); /* Wait for the clock to start. */
  692. __ctl_clear_bit(0, 29);
  693. __ctl_clear_bit(14, 21);
  694. etr_stetr(aib);
  695. /* Adjust Linux timing variables. */
  696. delay = (unsigned long long)
  697. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  698. delta = adjust_time(old_clock, clock, delay);
  699. etr_sync->fixup_cc = delta;
  700. fixup_clock_comparator(delta);
  701. /* Verify that the clock is properly set. */
  702. if (!etr_aib_follows(sync_port, aib, port)) {
  703. /* Didn't work. */
  704. disable_sync_clock(NULL);
  705. etr_sync->in_sync = -EAGAIN;
  706. rc = -EAGAIN;
  707. } else {
  708. etr_sync->in_sync = 1;
  709. rc = 0;
  710. }
  711. } else {
  712. /* Could not set the clock ?!? */
  713. __ctl_clear_bit(0, 29);
  714. __ctl_clear_bit(14, 21);
  715. disable_sync_clock(NULL);
  716. etr_sync->in_sync = -EAGAIN;
  717. rc = -EAGAIN;
  718. }
  719. xchg(&first, 0);
  720. return rc;
  721. }
  722. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  723. {
  724. struct clock_sync_data etr_sync;
  725. struct etr_aib *sync_port;
  726. int follows;
  727. int rc;
  728. /* Check if the current aib is adjacent to the sync port aib. */
  729. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  730. follows = etr_aib_follows(sync_port, aib, port);
  731. memcpy(sync_port, aib, sizeof(*aib));
  732. if (!follows)
  733. return -EAGAIN;
  734. memset(&etr_sync, 0, sizeof(etr_sync));
  735. etr_sync.etr_aib = aib;
  736. etr_sync.etr_port = port;
  737. get_online_cpus();
  738. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  739. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  740. put_online_cpus();
  741. return rc;
  742. }
  743. /*
  744. * Handle the immediate effects of the different events.
  745. * The port change event is used for online/offline changes.
  746. */
  747. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  748. {
  749. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  750. eacr.es = 0;
  751. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  752. eacr.es = eacr.sl = 0;
  753. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  754. etr_port0_uptodate = etr_port1_uptodate = 0;
  755. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  756. if (eacr.e0)
  757. /*
  758. * Port change of an enabled port. We have to
  759. * assume that this can have caused an stepping
  760. * port switch.
  761. */
  762. etr_tolec = get_clock();
  763. eacr.p0 = etr_port0_online;
  764. if (!eacr.p0)
  765. eacr.e0 = 0;
  766. etr_port0_uptodate = 0;
  767. }
  768. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  769. if (eacr.e1)
  770. /*
  771. * Port change of an enabled port. We have to
  772. * assume that this can have caused an stepping
  773. * port switch.
  774. */
  775. etr_tolec = get_clock();
  776. eacr.p1 = etr_port1_online;
  777. if (!eacr.p1)
  778. eacr.e1 = 0;
  779. etr_port1_uptodate = 0;
  780. }
  781. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  782. return eacr;
  783. }
  784. /*
  785. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  786. * one of the ports needs an update.
  787. */
  788. static void etr_set_tolec_timeout(unsigned long long now)
  789. {
  790. unsigned long micros;
  791. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  792. (!etr_eacr.p1 || etr_port1_uptodate))
  793. return;
  794. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  795. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  796. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  797. }
  798. /*
  799. * Set up a time that expires after 1/2 second.
  800. */
  801. static void etr_set_sync_timeout(void)
  802. {
  803. mod_timer(&etr_timer, jiffies + HZ/2);
  804. }
  805. /*
  806. * Update the aib information for one or both ports.
  807. */
  808. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  809. struct etr_eacr eacr)
  810. {
  811. /* With both ports disabled the aib information is useless. */
  812. if (!eacr.e0 && !eacr.e1)
  813. return eacr;
  814. /* Update port0 or port1 with aib stored in etr_work_fn. */
  815. if (aib->esw.q == 0) {
  816. /* Information for port 0 stored. */
  817. if (eacr.p0 && !etr_port0_uptodate) {
  818. etr_port0 = *aib;
  819. if (etr_port0_online)
  820. etr_port0_uptodate = 1;
  821. }
  822. } else {
  823. /* Information for port 1 stored. */
  824. if (eacr.p1 && !etr_port1_uptodate) {
  825. etr_port1 = *aib;
  826. if (etr_port0_online)
  827. etr_port1_uptodate = 1;
  828. }
  829. }
  830. /*
  831. * Do not try to get the alternate port aib if the clock
  832. * is not in sync yet.
  833. */
  834. if (!check_sync_clock())
  835. return eacr;
  836. /*
  837. * If steai is available we can get the information about
  838. * the other port immediately. If only stetr is available the
  839. * data-port bit toggle has to be used.
  840. */
  841. if (etr_steai_available) {
  842. if (eacr.p0 && !etr_port0_uptodate) {
  843. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  844. etr_port0_uptodate = 1;
  845. }
  846. if (eacr.p1 && !etr_port1_uptodate) {
  847. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  848. etr_port1_uptodate = 1;
  849. }
  850. } else {
  851. /*
  852. * One port was updated above, if the other
  853. * port is not uptodate toggle dp bit.
  854. */
  855. if ((eacr.p0 && !etr_port0_uptodate) ||
  856. (eacr.p1 && !etr_port1_uptodate))
  857. eacr.dp ^= 1;
  858. else
  859. eacr.dp = 0;
  860. }
  861. return eacr;
  862. }
  863. /*
  864. * Write new etr control register if it differs from the current one.
  865. * Return 1 if etr_tolec has been updated as well.
  866. */
  867. static void etr_update_eacr(struct etr_eacr eacr)
  868. {
  869. int dp_changed;
  870. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  871. /* No change, return. */
  872. return;
  873. /*
  874. * The disable of an active port of the change of the data port
  875. * bit can/will cause a change in the data port.
  876. */
  877. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  878. (etr_eacr.dp ^ eacr.dp) != 0;
  879. etr_eacr = eacr;
  880. etr_setr(&etr_eacr);
  881. if (dp_changed)
  882. etr_tolec = get_clock();
  883. }
  884. /*
  885. * ETR work. In this function you'll find the main logic. In
  886. * particular this is the only function that calls etr_update_eacr(),
  887. * it "controls" the etr control register.
  888. */
  889. static void etr_work_fn(struct work_struct *work)
  890. {
  891. unsigned long long now;
  892. struct etr_eacr eacr;
  893. struct etr_aib aib;
  894. int sync_port;
  895. /* prevent multiple execution. */
  896. mutex_lock(&etr_work_mutex);
  897. /* Create working copy of etr_eacr. */
  898. eacr = etr_eacr;
  899. /* Check for the different events and their immediate effects. */
  900. eacr = etr_handle_events(eacr);
  901. /* Check if ETR is supposed to be active. */
  902. eacr.ea = eacr.p0 || eacr.p1;
  903. if (!eacr.ea) {
  904. /* Both ports offline. Reset everything. */
  905. eacr.dp = eacr.es = eacr.sl = 0;
  906. on_each_cpu(disable_sync_clock, NULL, 1);
  907. del_timer_sync(&etr_timer);
  908. etr_update_eacr(eacr);
  909. goto out_unlock;
  910. }
  911. /* Store aib to get the current ETR status word. */
  912. BUG_ON(etr_stetr(&aib) != 0);
  913. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  914. now = get_clock();
  915. /*
  916. * Update the port information if the last stepping port change
  917. * or data port change is older than 1.6 seconds.
  918. */
  919. if (now >= etr_tolec + (1600000 << 12))
  920. eacr = etr_handle_update(&aib, eacr);
  921. /*
  922. * Select ports to enable. The prefered synchronization mode is PPS.
  923. * If a port can be enabled depends on a number of things:
  924. * 1) The port needs to be online and uptodate. A port is not
  925. * disabled just because it is not uptodate, but it is only
  926. * enabled if it is uptodate.
  927. * 2) The port needs to have the same mode (pps / etr).
  928. * 3) The port needs to be usable -> etr_port_valid() == 1
  929. * 4) To enable the second port the clock needs to be in sync.
  930. * 5) If both ports are useable and are ETR ports, the network id
  931. * has to be the same.
  932. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  933. */
  934. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  935. eacr.sl = 0;
  936. eacr.e0 = 1;
  937. if (!etr_mode_is_pps(etr_eacr))
  938. eacr.es = 0;
  939. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  940. eacr.e1 = 0;
  941. // FIXME: uptodate checks ?
  942. else if (etr_port0_uptodate && etr_port1_uptodate)
  943. eacr.e1 = 1;
  944. sync_port = (etr_port0_uptodate &&
  945. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  946. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  947. eacr.sl = 0;
  948. eacr.e0 = 0;
  949. eacr.e1 = 1;
  950. if (!etr_mode_is_pps(etr_eacr))
  951. eacr.es = 0;
  952. sync_port = (etr_port1_uptodate &&
  953. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  954. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  955. eacr.sl = 1;
  956. eacr.e0 = 1;
  957. if (!etr_mode_is_etr(etr_eacr))
  958. eacr.es = 0;
  959. if (!eacr.es || !eacr.p1 ||
  960. aib.esw.psc1 != etr_lpsc_operational_alt)
  961. eacr.e1 = 0;
  962. else if (etr_port0_uptodate && etr_port1_uptodate &&
  963. etr_compare_network(&etr_port0, &etr_port1))
  964. eacr.e1 = 1;
  965. sync_port = (etr_port0_uptodate &&
  966. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  967. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  968. eacr.sl = 1;
  969. eacr.e0 = 0;
  970. eacr.e1 = 1;
  971. if (!etr_mode_is_etr(etr_eacr))
  972. eacr.es = 0;
  973. sync_port = (etr_port1_uptodate &&
  974. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  975. } else {
  976. /* Both ports not usable. */
  977. eacr.es = eacr.sl = 0;
  978. sync_port = -1;
  979. }
  980. /*
  981. * If the clock is in sync just update the eacr and return.
  982. * If there is no valid sync port wait for a port update.
  983. */
  984. if (check_sync_clock() || sync_port < 0) {
  985. etr_update_eacr(eacr);
  986. etr_set_tolec_timeout(now);
  987. goto out_unlock;
  988. }
  989. /*
  990. * Prepare control register for clock syncing
  991. * (reset data port bit, set sync check control.
  992. */
  993. eacr.dp = 0;
  994. eacr.es = 1;
  995. /*
  996. * Update eacr and try to synchronize the clock. If the update
  997. * of eacr caused a stepping port switch (or if we have to
  998. * assume that a stepping port switch has occured) or the
  999. * clock syncing failed, reset the sync check control bit
  1000. * and set up a timer to try again after 0.5 seconds
  1001. */
  1002. etr_update_eacr(eacr);
  1003. if (now < etr_tolec + (1600000 << 12) ||
  1004. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1005. /* Sync failed. Try again in 1/2 second. */
  1006. eacr.es = 0;
  1007. etr_update_eacr(eacr);
  1008. etr_set_sync_timeout();
  1009. } else
  1010. etr_set_tolec_timeout(now);
  1011. out_unlock:
  1012. mutex_unlock(&etr_work_mutex);
  1013. }
  1014. /*
  1015. * Sysfs interface functions
  1016. */
  1017. static struct sysdev_class etr_sysclass = {
  1018. .name = "etr",
  1019. };
  1020. static struct sys_device etr_port0_dev = {
  1021. .id = 0,
  1022. .cls = &etr_sysclass,
  1023. };
  1024. static struct sys_device etr_port1_dev = {
  1025. .id = 1,
  1026. .cls = &etr_sysclass,
  1027. };
  1028. /*
  1029. * ETR class attributes
  1030. */
  1031. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1032. {
  1033. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1034. }
  1035. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1036. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1037. {
  1038. char *mode_str;
  1039. if (etr_mode_is_pps(etr_eacr))
  1040. mode_str = "pps";
  1041. else if (etr_mode_is_etr(etr_eacr))
  1042. mode_str = "etr";
  1043. else
  1044. mode_str = "local";
  1045. return sprintf(buf, "%s\n", mode_str);
  1046. }
  1047. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1048. /*
  1049. * ETR port attributes
  1050. */
  1051. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1052. {
  1053. if (dev == &etr_port0_dev)
  1054. return etr_port0_online ? &etr_port0 : NULL;
  1055. else
  1056. return etr_port1_online ? &etr_port1 : NULL;
  1057. }
  1058. static ssize_t etr_online_show(struct sys_device *dev,
  1059. struct sysdev_attribute *attr,
  1060. char *buf)
  1061. {
  1062. unsigned int online;
  1063. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1064. return sprintf(buf, "%i\n", online);
  1065. }
  1066. static ssize_t etr_online_store(struct sys_device *dev,
  1067. struct sysdev_attribute *attr,
  1068. const char *buf, size_t count)
  1069. {
  1070. unsigned int value;
  1071. value = simple_strtoul(buf, NULL, 0);
  1072. if (value != 0 && value != 1)
  1073. return -EINVAL;
  1074. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1075. return -EOPNOTSUPP;
  1076. mutex_lock(&clock_sync_mutex);
  1077. if (dev == &etr_port0_dev) {
  1078. if (etr_port0_online == value)
  1079. goto out; /* Nothing to do. */
  1080. etr_port0_online = value;
  1081. if (etr_port0_online && etr_port1_online)
  1082. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1083. else
  1084. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1085. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1086. queue_work(time_sync_wq, &etr_work);
  1087. } else {
  1088. if (etr_port1_online == value)
  1089. goto out; /* Nothing to do. */
  1090. etr_port1_online = value;
  1091. if (etr_port0_online && etr_port1_online)
  1092. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1093. else
  1094. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1095. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1096. queue_work(time_sync_wq, &etr_work);
  1097. }
  1098. out:
  1099. mutex_unlock(&clock_sync_mutex);
  1100. return count;
  1101. }
  1102. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1103. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1104. struct sysdev_attribute *attr,
  1105. char *buf)
  1106. {
  1107. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1108. etr_eacr.e0 : etr_eacr.e1);
  1109. }
  1110. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1111. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1112. struct sysdev_attribute *attr, char *buf)
  1113. {
  1114. if (!etr_port0_online && !etr_port1_online)
  1115. /* Status word is not uptodate if both ports are offline. */
  1116. return -ENODATA;
  1117. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1118. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1119. }
  1120. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1121. static ssize_t etr_untuned_show(struct sys_device *dev,
  1122. struct sysdev_attribute *attr, char *buf)
  1123. {
  1124. struct etr_aib *aib = etr_aib_from_dev(dev);
  1125. if (!aib || !aib->slsw.v1)
  1126. return -ENODATA;
  1127. return sprintf(buf, "%i\n", aib->edf1.u);
  1128. }
  1129. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1130. static ssize_t etr_network_id_show(struct sys_device *dev,
  1131. struct sysdev_attribute *attr, char *buf)
  1132. {
  1133. struct etr_aib *aib = etr_aib_from_dev(dev);
  1134. if (!aib || !aib->slsw.v1)
  1135. return -ENODATA;
  1136. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1137. }
  1138. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1139. static ssize_t etr_id_show(struct sys_device *dev,
  1140. struct sysdev_attribute *attr, char *buf)
  1141. {
  1142. struct etr_aib *aib = etr_aib_from_dev(dev);
  1143. if (!aib || !aib->slsw.v1)
  1144. return -ENODATA;
  1145. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1146. }
  1147. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1148. static ssize_t etr_port_number_show(struct sys_device *dev,
  1149. struct sysdev_attribute *attr, char *buf)
  1150. {
  1151. struct etr_aib *aib = etr_aib_from_dev(dev);
  1152. if (!aib || !aib->slsw.v1)
  1153. return -ENODATA;
  1154. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1155. }
  1156. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1157. static ssize_t etr_coupled_show(struct sys_device *dev,
  1158. struct sysdev_attribute *attr, char *buf)
  1159. {
  1160. struct etr_aib *aib = etr_aib_from_dev(dev);
  1161. if (!aib || !aib->slsw.v3)
  1162. return -ENODATA;
  1163. return sprintf(buf, "%i\n", aib->edf3.c);
  1164. }
  1165. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1166. static ssize_t etr_local_time_show(struct sys_device *dev,
  1167. struct sysdev_attribute *attr, char *buf)
  1168. {
  1169. struct etr_aib *aib = etr_aib_from_dev(dev);
  1170. if (!aib || !aib->slsw.v3)
  1171. return -ENODATA;
  1172. return sprintf(buf, "%i\n", aib->edf3.blto);
  1173. }
  1174. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1175. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1176. struct sysdev_attribute *attr, char *buf)
  1177. {
  1178. struct etr_aib *aib = etr_aib_from_dev(dev);
  1179. if (!aib || !aib->slsw.v3)
  1180. return -ENODATA;
  1181. return sprintf(buf, "%i\n", aib->edf3.buo);
  1182. }
  1183. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1184. static struct sysdev_attribute *etr_port_attributes[] = {
  1185. &attr_online,
  1186. &attr_stepping_control,
  1187. &attr_state_code,
  1188. &attr_untuned,
  1189. &attr_network,
  1190. &attr_id,
  1191. &attr_port,
  1192. &attr_coupled,
  1193. &attr_local_time,
  1194. &attr_utc_offset,
  1195. NULL
  1196. };
  1197. static int __init etr_register_port(struct sys_device *dev)
  1198. {
  1199. struct sysdev_attribute **attr;
  1200. int rc;
  1201. rc = sysdev_register(dev);
  1202. if (rc)
  1203. goto out;
  1204. for (attr = etr_port_attributes; *attr; attr++) {
  1205. rc = sysdev_create_file(dev, *attr);
  1206. if (rc)
  1207. goto out_unreg;
  1208. }
  1209. return 0;
  1210. out_unreg:
  1211. for (; attr >= etr_port_attributes; attr--)
  1212. sysdev_remove_file(dev, *attr);
  1213. sysdev_unregister(dev);
  1214. out:
  1215. return rc;
  1216. }
  1217. static void __init etr_unregister_port(struct sys_device *dev)
  1218. {
  1219. struct sysdev_attribute **attr;
  1220. for (attr = etr_port_attributes; *attr; attr++)
  1221. sysdev_remove_file(dev, *attr);
  1222. sysdev_unregister(dev);
  1223. }
  1224. static int __init etr_init_sysfs(void)
  1225. {
  1226. int rc;
  1227. rc = sysdev_class_register(&etr_sysclass);
  1228. if (rc)
  1229. goto out;
  1230. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1231. if (rc)
  1232. goto out_unreg_class;
  1233. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1234. if (rc)
  1235. goto out_remove_stepping_port;
  1236. rc = etr_register_port(&etr_port0_dev);
  1237. if (rc)
  1238. goto out_remove_stepping_mode;
  1239. rc = etr_register_port(&etr_port1_dev);
  1240. if (rc)
  1241. goto out_remove_port0;
  1242. return 0;
  1243. out_remove_port0:
  1244. etr_unregister_port(&etr_port0_dev);
  1245. out_remove_stepping_mode:
  1246. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1247. out_remove_stepping_port:
  1248. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1249. out_unreg_class:
  1250. sysdev_class_unregister(&etr_sysclass);
  1251. out:
  1252. return rc;
  1253. }
  1254. device_initcall(etr_init_sysfs);
  1255. /*
  1256. * Server Time Protocol (STP) code.
  1257. */
  1258. static int stp_online;
  1259. static struct stp_sstpi stp_info;
  1260. static void *stp_page;
  1261. static void stp_work_fn(struct work_struct *work);
  1262. static DEFINE_MUTEX(stp_work_mutex);
  1263. static DECLARE_WORK(stp_work, stp_work_fn);
  1264. static struct timer_list stp_timer;
  1265. static int __init early_parse_stp(char *p)
  1266. {
  1267. if (strncmp(p, "off", 3) == 0)
  1268. stp_online = 0;
  1269. else if (strncmp(p, "on", 2) == 0)
  1270. stp_online = 1;
  1271. return 0;
  1272. }
  1273. early_param("stp", early_parse_stp);
  1274. /*
  1275. * Reset STP attachment.
  1276. */
  1277. static void __init stp_reset(void)
  1278. {
  1279. int rc;
  1280. stp_page = alloc_bootmem_pages(PAGE_SIZE);
  1281. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1282. if (rc == 0)
  1283. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1284. else if (stp_online) {
  1285. pr_warning("The real or virtual hardware system does "
  1286. "not provide an STP interface\n");
  1287. free_bootmem((unsigned long) stp_page, PAGE_SIZE);
  1288. stp_page = NULL;
  1289. stp_online = 0;
  1290. }
  1291. }
  1292. static void stp_timeout(unsigned long dummy)
  1293. {
  1294. queue_work(time_sync_wq, &stp_work);
  1295. }
  1296. static int __init stp_init(void)
  1297. {
  1298. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1299. return 0;
  1300. setup_timer(&stp_timer, stp_timeout, 0UL);
  1301. time_init_wq();
  1302. if (!stp_online)
  1303. return 0;
  1304. queue_work(time_sync_wq, &stp_work);
  1305. return 0;
  1306. }
  1307. arch_initcall(stp_init);
  1308. /*
  1309. * STP timing alert. There are three causes:
  1310. * 1) timing status change
  1311. * 2) link availability change
  1312. * 3) time control parameter change
  1313. * In all three cases we are only interested in the clock source state.
  1314. * If a STP clock source is now available use it.
  1315. */
  1316. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1317. {
  1318. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1319. queue_work(time_sync_wq, &stp_work);
  1320. }
  1321. /*
  1322. * STP sync check machine check. This is called when the timing state
  1323. * changes from the synchronized state to the unsynchronized state.
  1324. * After a STP sync check the clock is not in sync. The machine check
  1325. * is broadcasted to all cpus at the same time.
  1326. */
  1327. void stp_sync_check(void)
  1328. {
  1329. disable_sync_clock(NULL);
  1330. queue_work(time_sync_wq, &stp_work);
  1331. }
  1332. /*
  1333. * STP island condition machine check. This is called when an attached
  1334. * server attempts to communicate over an STP link and the servers
  1335. * have matching CTN ids and have a valid stratum-1 configuration
  1336. * but the configurations do not match.
  1337. */
  1338. void stp_island_check(void)
  1339. {
  1340. disable_sync_clock(NULL);
  1341. queue_work(time_sync_wq, &stp_work);
  1342. }
  1343. static int stp_sync_clock(void *data)
  1344. {
  1345. static int first;
  1346. unsigned long long old_clock, delta;
  1347. struct clock_sync_data *stp_sync;
  1348. int rc;
  1349. stp_sync = data;
  1350. if (xchg(&first, 1) == 1) {
  1351. /* Slave */
  1352. clock_sync_cpu(stp_sync);
  1353. return 0;
  1354. }
  1355. /* Wait until all other cpus entered the sync function. */
  1356. while (atomic_read(&stp_sync->cpus) != 0)
  1357. cpu_relax();
  1358. enable_sync_clock();
  1359. rc = 0;
  1360. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1361. stp_info.todoff[2] || stp_info.todoff[3] ||
  1362. stp_info.tmd != 2) {
  1363. old_clock = get_clock();
  1364. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1365. if (rc == 0) {
  1366. delta = adjust_time(old_clock, get_clock(), 0);
  1367. fixup_clock_comparator(delta);
  1368. rc = chsc_sstpi(stp_page, &stp_info,
  1369. sizeof(struct stp_sstpi));
  1370. if (rc == 0 && stp_info.tmd != 2)
  1371. rc = -EAGAIN;
  1372. }
  1373. }
  1374. if (rc) {
  1375. disable_sync_clock(NULL);
  1376. stp_sync->in_sync = -EAGAIN;
  1377. } else
  1378. stp_sync->in_sync = 1;
  1379. xchg(&first, 0);
  1380. return 0;
  1381. }
  1382. /*
  1383. * STP work. Check for the STP state and take over the clock
  1384. * synchronization if the STP clock source is usable.
  1385. */
  1386. static void stp_work_fn(struct work_struct *work)
  1387. {
  1388. struct clock_sync_data stp_sync;
  1389. int rc;
  1390. /* prevent multiple execution. */
  1391. mutex_lock(&stp_work_mutex);
  1392. if (!stp_online) {
  1393. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1394. del_timer_sync(&stp_timer);
  1395. goto out_unlock;
  1396. }
  1397. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1398. if (rc)
  1399. goto out_unlock;
  1400. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1401. if (rc || stp_info.c == 0)
  1402. goto out_unlock;
  1403. /* Skip synchronization if the clock is already in sync. */
  1404. if (check_sync_clock())
  1405. goto out_unlock;
  1406. memset(&stp_sync, 0, sizeof(stp_sync));
  1407. get_online_cpus();
  1408. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1409. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1410. put_online_cpus();
  1411. if (!check_sync_clock())
  1412. /*
  1413. * There is a usable clock but the synchonization failed.
  1414. * Retry after a second.
  1415. */
  1416. mod_timer(&stp_timer, jiffies + HZ);
  1417. out_unlock:
  1418. mutex_unlock(&stp_work_mutex);
  1419. }
  1420. /*
  1421. * STP class sysfs interface functions
  1422. */
  1423. static struct sysdev_class stp_sysclass = {
  1424. .name = "stp",
  1425. };
  1426. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1427. {
  1428. if (!stp_online)
  1429. return -ENODATA;
  1430. return sprintf(buf, "%016llx\n",
  1431. *(unsigned long long *) stp_info.ctnid);
  1432. }
  1433. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1434. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1435. {
  1436. if (!stp_online)
  1437. return -ENODATA;
  1438. return sprintf(buf, "%i\n", stp_info.ctn);
  1439. }
  1440. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1441. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1442. {
  1443. if (!stp_online || !(stp_info.vbits & 0x2000))
  1444. return -ENODATA;
  1445. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1446. }
  1447. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1448. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1449. {
  1450. if (!stp_online || !(stp_info.vbits & 0x8000))
  1451. return -ENODATA;
  1452. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1453. }
  1454. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1455. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1456. {
  1457. if (!stp_online)
  1458. return -ENODATA;
  1459. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1460. }
  1461. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1462. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1463. {
  1464. if (!stp_online || !(stp_info.vbits & 0x0800))
  1465. return -ENODATA;
  1466. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1467. }
  1468. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1469. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1470. {
  1471. if (!stp_online || !(stp_info.vbits & 0x4000))
  1472. return -ENODATA;
  1473. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1474. }
  1475. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1476. stp_time_zone_offset_show, NULL);
  1477. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1478. {
  1479. if (!stp_online)
  1480. return -ENODATA;
  1481. return sprintf(buf, "%i\n", stp_info.tmd);
  1482. }
  1483. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1484. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1485. {
  1486. if (!stp_online)
  1487. return -ENODATA;
  1488. return sprintf(buf, "%i\n", stp_info.tst);
  1489. }
  1490. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1491. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1492. {
  1493. return sprintf(buf, "%i\n", stp_online);
  1494. }
  1495. static ssize_t stp_online_store(struct sysdev_class *class,
  1496. const char *buf, size_t count)
  1497. {
  1498. unsigned int value;
  1499. value = simple_strtoul(buf, NULL, 0);
  1500. if (value != 0 && value != 1)
  1501. return -EINVAL;
  1502. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1503. return -EOPNOTSUPP;
  1504. mutex_lock(&clock_sync_mutex);
  1505. stp_online = value;
  1506. if (stp_online)
  1507. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1508. else
  1509. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1510. queue_work(time_sync_wq, &stp_work);
  1511. mutex_unlock(&clock_sync_mutex);
  1512. return count;
  1513. }
  1514. /*
  1515. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1516. * stp/online but attr_online already exists in this file ..
  1517. */
  1518. static struct sysdev_class_attribute attr_stp_online = {
  1519. .attr = { .name = "online", .mode = 0600 },
  1520. .show = stp_online_show,
  1521. .store = stp_online_store,
  1522. };
  1523. static struct sysdev_class_attribute *stp_attributes[] = {
  1524. &attr_ctn_id,
  1525. &attr_ctn_type,
  1526. &attr_dst_offset,
  1527. &attr_leap_seconds,
  1528. &attr_stp_online,
  1529. &attr_stratum,
  1530. &attr_time_offset,
  1531. &attr_time_zone_offset,
  1532. &attr_timing_mode,
  1533. &attr_timing_state,
  1534. NULL
  1535. };
  1536. static int __init stp_init_sysfs(void)
  1537. {
  1538. struct sysdev_class_attribute **attr;
  1539. int rc;
  1540. rc = sysdev_class_register(&stp_sysclass);
  1541. if (rc)
  1542. goto out;
  1543. for (attr = stp_attributes; *attr; attr++) {
  1544. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1545. if (rc)
  1546. goto out_unreg;
  1547. }
  1548. return 0;
  1549. out_unreg:
  1550. for (; attr >= stp_attributes; attr--)
  1551. sysdev_class_remove_file(&stp_sysclass, *attr);
  1552. sysdev_class_unregister(&stp_sysclass);
  1553. out:
  1554. return rc;
  1555. }
  1556. device_initcall(stp_init_sysfs);