Kconfig 9.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401
  1. #
  2. # For a description of the syntax of this configuration file,
  3. # see Documentation/kbuild/kconfig-language.txt.
  4. #
  5. config FRV
  6. bool
  7. default y
  8. select HAVE_IDE
  9. select HAVE_ARCH_TRACEHOOK
  10. config ZONE_DMA
  11. bool
  12. default y
  13. config RWSEM_GENERIC_SPINLOCK
  14. bool
  15. default y
  16. config RWSEM_XCHGADD_ALGORITHM
  17. bool
  18. config GENERIC_FIND_NEXT_BIT
  19. bool
  20. default y
  21. config GENERIC_HWEIGHT
  22. bool
  23. default y
  24. config GENERIC_CALIBRATE_DELAY
  25. bool
  26. default n
  27. config GENERIC_HARDIRQS
  28. bool
  29. default y
  30. config GENERIC_HARDIRQS_NO__DO_IRQ
  31. bool
  32. default y
  33. config GENERIC_TIME
  34. bool
  35. default y
  36. config TIME_LOW_RES
  37. bool
  38. default y
  39. config QUICKLIST
  40. bool
  41. default y
  42. config ARCH_HAS_ILOG2_U32
  43. bool
  44. default y
  45. config ARCH_HAS_ILOG2_U64
  46. bool
  47. default y
  48. config HZ
  49. int
  50. default 1000
  51. mainmenu "Fujitsu FR-V Kernel Configuration"
  52. source "init/Kconfig"
  53. source "kernel/Kconfig.freezer"
  54. menu "Fujitsu FR-V system setup"
  55. config MMU
  56. bool "MMU support"
  57. help
  58. This options switches on and off support for the FR-V MMU
  59. (effectively switching between vmlinux and uClinux). Not all FR-V
  60. CPUs support this. Currently only the FR451 has a sufficiently
  61. featured MMU.
  62. config FRV_OUTOFLINE_ATOMIC_OPS
  63. bool "Out-of-line the FRV atomic operations"
  64. default n
  65. help
  66. Setting this option causes the FR-V atomic operations to be mostly
  67. implemented out-of-line.
  68. See Documentation/frv/atomic-ops.txt for more information.
  69. config HIGHMEM
  70. bool "High memory support"
  71. depends on MMU
  72. default y
  73. help
  74. If you wish to use more than 256MB of memory with your MMU based
  75. system, you will need to select this option. The kernel can only see
  76. the memory between 0xC0000000 and 0xD0000000 directly... everything
  77. else must be kmapped.
  78. The arch is, however, capable of supporting up to 3GB of SDRAM.
  79. config HIGHPTE
  80. bool "Allocate page tables in highmem"
  81. depends on HIGHMEM
  82. default y
  83. help
  84. The VM uses one page of memory for each page table. For systems
  85. with a lot of RAM, this can be wasteful of precious low memory.
  86. Setting this option will put user-space page tables in high memory.
  87. source "mm/Kconfig"
  88. choice
  89. prompt "uClinux kernel load address"
  90. depends on !MMU
  91. default UCPAGE_OFFSET_C0000000
  92. help
  93. This option sets the base address for the uClinux kernel. The kernel
  94. will rearrange the SDRAM layout to start at this address, and move
  95. itself to start there. It must be greater than 0, and it must be
  96. sufficiently less than 0xE0000000 that the SDRAM does not intersect
  97. the I/O region.
  98. The base address must also be aligned such that the SDRAM controller
  99. can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
  100. config UCPAGE_OFFSET_20000000
  101. bool "0x20000000"
  102. config UCPAGE_OFFSET_40000000
  103. bool "0x40000000"
  104. config UCPAGE_OFFSET_60000000
  105. bool "0x60000000"
  106. config UCPAGE_OFFSET_80000000
  107. bool "0x80000000"
  108. config UCPAGE_OFFSET_A0000000
  109. bool "0xA0000000"
  110. config UCPAGE_OFFSET_C0000000
  111. bool "0xC0000000 (Recommended)"
  112. endchoice
  113. config PAGE_OFFSET
  114. hex
  115. default 0x20000000 if UCPAGE_OFFSET_20000000
  116. default 0x40000000 if UCPAGE_OFFSET_40000000
  117. default 0x60000000 if UCPAGE_OFFSET_60000000
  118. default 0x80000000 if UCPAGE_OFFSET_80000000
  119. default 0xA0000000 if UCPAGE_OFFSET_A0000000
  120. default 0xC0000000
  121. config PROTECT_KERNEL
  122. bool "Protect core kernel against userspace"
  123. depends on !MMU
  124. default y
  125. help
  126. Selecting this option causes the uClinux kernel to change the
  127. permittivity of DAMPR register covering the core kernel image to
  128. prevent userspace accessing the underlying memory directly.
  129. choice
  130. prompt "CPU Caching mode"
  131. default FRV_DEFL_CACHE_WBACK
  132. help
  133. This option determines the default caching mode for the kernel.
  134. Write-Back caching mode involves the all reads and writes causing
  135. the affected cacheline to be read into the cache first before being
  136. operated upon. Memory is not then updated by a write until the cache
  137. is filled and a cacheline needs to be displaced from the cache to
  138. make room. Only at that point is it written back.
  139. Write-Behind caching is similar to Write-Back caching, except that a
  140. write won't fetch a cacheline into the cache if there isn't already
  141. one there; it will write directly to memory instead.
  142. Write-Through caching only fetches cachelines from memory on a
  143. read. Writes always get written directly to memory. If the affected
  144. cacheline is also in cache, it will be updated too.
  145. The final option is to turn of caching entirely.
  146. Note that not all CPUs support Write-Behind caching. If the CPU on
  147. which the kernel is running doesn't, it'll fall back to Write-Back
  148. caching.
  149. config FRV_DEFL_CACHE_WBACK
  150. bool "Write-Back"
  151. config FRV_DEFL_CACHE_WBEHIND
  152. bool "Write-Behind"
  153. config FRV_DEFL_CACHE_WTHRU
  154. bool "Write-Through"
  155. config FRV_DEFL_CACHE_DISABLED
  156. bool "Disabled"
  157. endchoice
  158. menu "CPU core support"
  159. config CPU_FR401
  160. bool "Include FR401 core support"
  161. depends on !MMU
  162. default y
  163. help
  164. This enables support for the FR401, FR401A and FR403 CPUs
  165. config CPU_FR405
  166. bool "Include FR405 core support"
  167. depends on !MMU
  168. default y
  169. help
  170. This enables support for the FR405 CPU
  171. config CPU_FR451
  172. bool "Include FR451 core support"
  173. default y
  174. help
  175. This enables support for the FR451 CPU
  176. config CPU_FR451_COMPILE
  177. bool "Specifically compile for FR451 core"
  178. depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
  179. default y
  180. help
  181. This causes appropriate flags to be passed to the compiler to
  182. optimise for the FR451 CPU
  183. config CPU_FR551
  184. bool "Include FR551 core support"
  185. depends on !MMU
  186. default y
  187. help
  188. This enables support for the FR555 CPU
  189. config CPU_FR551_COMPILE
  190. bool "Specifically compile for FR551 core"
  191. depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
  192. default y
  193. help
  194. This causes appropriate flags to be passed to the compiler to
  195. optimise for the FR555 CPU
  196. config FRV_L1_CACHE_SHIFT
  197. int
  198. default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
  199. default "6" if CPU_FR551
  200. endmenu
  201. choice
  202. prompt "System support"
  203. default MB93091_VDK
  204. config MB93091_VDK
  205. bool "MB93091 CPU board with or without motherboard"
  206. config MB93093_PDK
  207. bool "MB93093 PDK unit"
  208. endchoice
  209. if MB93091_VDK
  210. choice
  211. prompt "Motherboard support"
  212. default MB93090_MB00
  213. config MB93090_MB00
  214. bool "Use the MB93090-MB00 motherboard"
  215. help
  216. Select this option if the MB93091 CPU board is going to be used with
  217. a MB93090-MB00 VDK motherboard
  218. config MB93091_NO_MB
  219. bool "Use standalone"
  220. help
  221. Select this option if the MB93091 CPU board is going to be used
  222. without a motherboard
  223. endchoice
  224. endif
  225. config FUJITSU_MB93493
  226. bool "MB93493 Multimedia chip"
  227. help
  228. Select this option if the MB93493 multimedia chip is going to be
  229. used.
  230. choice
  231. prompt "GP-Relative data support"
  232. default GPREL_DATA_8
  233. help
  234. This option controls what data, if any, should be placed in the GP
  235. relative data sections. Using this means that the compiler can
  236. generate accesses to the data using GR16-relative addressing which
  237. is faster than absolute instructions and saves space (2 instructions
  238. per access).
  239. However, the GPREL region is limited in size because the immediate
  240. value used in the load and store instructions is limited to a 12-bit
  241. signed number.
  242. So if the linker starts complaining that accesses to GPREL data are
  243. out of range, try changing this option from the default.
  244. Note that modules will always be compiled with this feature disabled
  245. as the module data will not be in range of the GP base address.
  246. config GPREL_DATA_8
  247. bool "Put data objects of up to 8 bytes into GP-REL"
  248. config GPREL_DATA_4
  249. bool "Put data objects of up to 4 bytes into GP-REL"
  250. config GPREL_DATA_NONE
  251. bool "Don't use GP-REL"
  252. endchoice
  253. config FRV_ONCPU_SERIAL
  254. bool "Use on-CPU serial ports"
  255. select SERIAL_8250
  256. default y
  257. config PCI
  258. bool "Use PCI"
  259. depends on MB93090_MB00
  260. default y
  261. help
  262. Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
  263. onboard. If you have one of these boards and you wish to use the PCI
  264. facilities, say Y here.
  265. config RESERVE_DMA_COHERENT
  266. bool "Reserve DMA coherent memory"
  267. depends on PCI && !MMU
  268. default y
  269. help
  270. Many PCI drivers require access to uncached memory for DMA device
  271. communications (such as is done with some Ethernet buffer rings). If
  272. a fully featured MMU is available, this can be done through page
  273. table settings, but if not, a region has to be set aside and marked
  274. with a special DAMPR register.
  275. Setting this option causes uClinux to set aside a portion of the
  276. available memory for use in this manner. The memory will then be
  277. unavailable for normal kernel use.
  278. source "drivers/pci/Kconfig"
  279. source "drivers/pcmcia/Kconfig"
  280. #config MATH_EMULATION
  281. # bool "Math emulation support (EXPERIMENTAL)"
  282. # depends on EXPERIMENTAL
  283. # help
  284. # At some point in the future, this will cause floating-point math
  285. # instructions to be emulated by the kernel on machines that lack a
  286. # floating-point math coprocessor. Thrill-seekers and chronically
  287. # sleep-deprived psychotic hacker types can say Y now, everyone else
  288. # should probably wait a while.
  289. menu "Power management options"
  290. config ARCH_SUSPEND_POSSIBLE
  291. def_bool y
  292. depends on !SMP
  293. source kernel/power/Kconfig
  294. endmenu
  295. endmenu
  296. menu "Executable formats"
  297. source "fs/Kconfig.binfmt"
  298. endmenu
  299. source "net/Kconfig"
  300. source "drivers/Kconfig"
  301. source "fs/Kconfig"
  302. source "arch/frv/Kconfig.debug"
  303. source "security/Kconfig"
  304. source "crypto/Kconfig"
  305. source "lib/Kconfig"