platsmp.c 5.3 KB

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  1. /*
  2. * linux/arch/arm/mach-realview/platsmp.c
  3. *
  4. * Copyright (C) 2002 ARM Ltd.
  5. * All Rights Reserved
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/errno.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/smp.h>
  17. #include <linux/io.h>
  18. #include <asm/cacheflush.h>
  19. #include <mach/hardware.h>
  20. #include <asm/mach-types.h>
  21. #include <asm/localtimer.h>
  22. #include <mach/board-eb.h>
  23. #include <mach/board-pb11mp.h>
  24. #include <mach/board-pbx.h>
  25. #include <asm/smp_scu.h>
  26. #include "core.h"
  27. extern void realview_secondary_startup(void);
  28. /*
  29. * control for which core is the next to come out of the secondary
  30. * boot "holding pen"
  31. */
  32. volatile int __cpuinitdata pen_release = -1;
  33. static void __iomem *scu_base_addr(void)
  34. {
  35. if (machine_is_realview_eb_mp())
  36. return __io_address(REALVIEW_EB11MP_SCU_BASE);
  37. else if (machine_is_realview_pb11mp())
  38. return __io_address(REALVIEW_TC11MP_SCU_BASE);
  39. else if (machine_is_realview_pbx() &&
  40. (core_tile_pbx11mp() || core_tile_pbxa9mp()))
  41. return __io_address(REALVIEW_PBX_TILE_SCU_BASE);
  42. else
  43. return (void __iomem *)0;
  44. }
  45. static inline unsigned int get_core_count(void)
  46. {
  47. void __iomem *scu_base = scu_base_addr();
  48. if (scu_base)
  49. return scu_get_core_count(scu_base);
  50. return 1;
  51. }
  52. static DEFINE_SPINLOCK(boot_lock);
  53. void __cpuinit platform_secondary_init(unsigned int cpu)
  54. {
  55. trace_hardirqs_off();
  56. /*
  57. * if any interrupts are already enabled for the primary
  58. * core (e.g. timer irq), then they will not have been enabled
  59. * for us: do so
  60. */
  61. gic_cpu_init(0, gic_cpu_base_addr);
  62. /*
  63. * let the primary processor know we're out of the
  64. * pen, then head off into the C entry point
  65. */
  66. pen_release = -1;
  67. smp_wmb();
  68. /*
  69. * Synchronise with the boot thread.
  70. */
  71. spin_lock(&boot_lock);
  72. spin_unlock(&boot_lock);
  73. }
  74. int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
  75. {
  76. unsigned long timeout;
  77. /*
  78. * set synchronisation state between this boot processor
  79. * and the secondary one
  80. */
  81. spin_lock(&boot_lock);
  82. /*
  83. * The secondary processor is waiting to be released from
  84. * the holding pen - release it, then wait for it to flag
  85. * that it has been released by resetting pen_release.
  86. *
  87. * Note that "pen_release" is the hardware CPU ID, whereas
  88. * "cpu" is Linux's internal ID.
  89. */
  90. pen_release = cpu;
  91. flush_cache_all();
  92. /*
  93. * XXX
  94. *
  95. * This is a later addition to the booting protocol: the
  96. * bootMonitor now puts secondary cores into WFI, so
  97. * poke_milo() no longer gets the cores moving; we need
  98. * to send a soft interrupt to wake the secondary core.
  99. * Use smp_cross_call() for this, since there's little
  100. * point duplicating the code here
  101. */
  102. smp_cross_call(cpumask_of(cpu));
  103. timeout = jiffies + (1 * HZ);
  104. while (time_before(jiffies, timeout)) {
  105. smp_rmb();
  106. if (pen_release == -1)
  107. break;
  108. udelay(10);
  109. }
  110. /*
  111. * now the secondary core is starting up let it run its
  112. * calibrations, then wait for it to finish
  113. */
  114. spin_unlock(&boot_lock);
  115. return pen_release != -1 ? -ENOSYS : 0;
  116. }
  117. static void __init poke_milo(void)
  118. {
  119. extern void secondary_startup(void);
  120. /* nobody is to be released from the pen yet */
  121. pen_release = -1;
  122. /*
  123. * write the address of secondary startup into the system-wide
  124. * flags register, then clear the bottom two bits, which is what
  125. * BootMonitor is waiting for
  126. */
  127. #if 1
  128. #define REALVIEW_SYS_FLAGSS_OFFSET 0x30
  129. __raw_writel(virt_to_phys(realview_secondary_startup),
  130. __io_address(REALVIEW_SYS_BASE) +
  131. REALVIEW_SYS_FLAGSS_OFFSET);
  132. #define REALVIEW_SYS_FLAGSC_OFFSET 0x34
  133. __raw_writel(3,
  134. __io_address(REALVIEW_SYS_BASE) +
  135. REALVIEW_SYS_FLAGSC_OFFSET);
  136. #endif
  137. mb();
  138. }
  139. /*
  140. * Initialise the CPU possible map early - this describes the CPUs
  141. * which may be present or become present in the system.
  142. */
  143. void __init smp_init_cpus(void)
  144. {
  145. unsigned int i, ncores = get_core_count();
  146. for (i = 0; i < ncores; i++)
  147. set_cpu_possible(i, true);
  148. }
  149. void __init smp_prepare_cpus(unsigned int max_cpus)
  150. {
  151. unsigned int ncores = get_core_count();
  152. unsigned int cpu = smp_processor_id();
  153. int i;
  154. /* sanity check */
  155. if (ncores == 0) {
  156. printk(KERN_ERR
  157. "Realview: strange CM count of 0? Default to 1\n");
  158. ncores = 1;
  159. }
  160. if (ncores > NR_CPUS) {
  161. printk(KERN_WARNING
  162. "Realview: no. of cores (%d) greater than configured "
  163. "maximum of %d - clipping\n",
  164. ncores, NR_CPUS);
  165. ncores = NR_CPUS;
  166. }
  167. smp_store_cpu_info(cpu);
  168. /*
  169. * are we trying to boot more cores than exist?
  170. */
  171. if (max_cpus > ncores)
  172. max_cpus = ncores;
  173. /*
  174. * Initialise the present map, which describes the set of CPUs
  175. * actually populated at the present time.
  176. */
  177. for (i = 0; i < max_cpus; i++)
  178. set_cpu_present(i, true);
  179. /*
  180. * Initialise the SCU if there are more than one CPU and let
  181. * them know where to start. Note that, on modern versions of
  182. * MILO, the "poke" doesn't actually do anything until each
  183. * individual core is sent a soft interrupt to get it out of
  184. * WFI
  185. */
  186. if (max_cpus > 1) {
  187. /*
  188. * Enable the local timer or broadcast device for the
  189. * boot CPU, but only if we have more than one CPU.
  190. */
  191. percpu_timer_setup();
  192. scu_enable(scu_base_addr());
  193. poke_milo();
  194. }
  195. }