armadillo5x0.c 7.0 KB

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  1. /*
  2. * armadillo5x0.c
  3. *
  4. * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
  5. * updates in http://alberdroid.blogspot.com/
  6. *
  7. * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
  8. * Based on mx31ads.c and pcm037.c Great Work!
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  23. * MA 02110-1301, USA.
  24. */
  25. #include <linux/types.h>
  26. #include <linux/init.h>
  27. #include <linux/clk.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/gpio.h>
  30. #include <linux/smsc911x.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <mach/hardware.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/time.h>
  37. #include <asm/memory.h>
  38. #include <asm/mach/map.h>
  39. #include <mach/common.h>
  40. #include <mach/imx-uart.h>
  41. #include <mach/iomux-mx3.h>
  42. #include <mach/board-armadillo5x0.h>
  43. #include <mach/mmc.h>
  44. #include <mach/ipu.h>
  45. #include <mach/mx3fb.h>
  46. #include "devices.h"
  47. static int armadillo5x0_pins[] = {
  48. /* UART1 */
  49. MX31_PIN_CTS1__CTS1,
  50. MX31_PIN_RTS1__RTS1,
  51. MX31_PIN_TXD1__TXD1,
  52. MX31_PIN_RXD1__RXD1,
  53. /* UART2 */
  54. MX31_PIN_CTS2__CTS2,
  55. MX31_PIN_RTS2__RTS2,
  56. MX31_PIN_TXD2__TXD2,
  57. MX31_PIN_RXD2__RXD2,
  58. /* LAN9118_IRQ */
  59. IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
  60. /* SDHC1 */
  61. MX31_PIN_SD1_DATA3__SD1_DATA3,
  62. MX31_PIN_SD1_DATA2__SD1_DATA2,
  63. MX31_PIN_SD1_DATA1__SD1_DATA1,
  64. MX31_PIN_SD1_DATA0__SD1_DATA0,
  65. MX31_PIN_SD1_CLK__SD1_CLK,
  66. MX31_PIN_SD1_CMD__SD1_CMD,
  67. /* Framebuffer */
  68. MX31_PIN_LD0__LD0,
  69. MX31_PIN_LD1__LD1,
  70. MX31_PIN_LD2__LD2,
  71. MX31_PIN_LD3__LD3,
  72. MX31_PIN_LD4__LD4,
  73. MX31_PIN_LD5__LD5,
  74. MX31_PIN_LD6__LD6,
  75. MX31_PIN_LD7__LD7,
  76. MX31_PIN_LD8__LD8,
  77. MX31_PIN_LD9__LD9,
  78. MX31_PIN_LD10__LD10,
  79. MX31_PIN_LD11__LD11,
  80. MX31_PIN_LD12__LD12,
  81. MX31_PIN_LD13__LD13,
  82. MX31_PIN_LD14__LD14,
  83. MX31_PIN_LD15__LD15,
  84. MX31_PIN_LD16__LD16,
  85. MX31_PIN_LD17__LD17,
  86. MX31_PIN_VSYNC3__VSYNC3,
  87. MX31_PIN_HSYNC__HSYNC,
  88. MX31_PIN_FPSHIFT__FPSHIFT,
  89. MX31_PIN_DRDY0__DRDY0,
  90. IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
  91. };
  92. /*
  93. * FB support
  94. */
  95. static const struct fb_videomode fb_modedb[] = {
  96. { /* 640x480 @ 60 Hz */
  97. .name = "CRT-VGA",
  98. .refresh = 60,
  99. .xres = 640,
  100. .yres = 480,
  101. .pixclock = 39721,
  102. .left_margin = 35,
  103. .right_margin = 115,
  104. .upper_margin = 43,
  105. .lower_margin = 1,
  106. .hsync_len = 10,
  107. .vsync_len = 1,
  108. .sync = FB_SYNC_OE_ACT_HIGH,
  109. .vmode = FB_VMODE_NONINTERLACED,
  110. .flag = 0,
  111. }, {/* 800x600 @ 56 Hz */
  112. .name = "CRT-SVGA",
  113. .refresh = 56,
  114. .xres = 800,
  115. .yres = 600,
  116. .pixclock = 30000,
  117. .left_margin = 30,
  118. .right_margin = 108,
  119. .upper_margin = 13,
  120. .lower_margin = 10,
  121. .hsync_len = 10,
  122. .vsync_len = 1,
  123. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
  124. FB_SYNC_VERT_HIGH_ACT,
  125. .vmode = FB_VMODE_NONINTERLACED,
  126. .flag = 0,
  127. },
  128. };
  129. static struct ipu_platform_data mx3_ipu_data = {
  130. .irq_base = MXC_IPU_IRQ_START,
  131. };
  132. static struct mx3fb_platform_data mx3fb_pdata = {
  133. .dma_dev = &mx3_ipu.dev,
  134. .name = "CRT-VGA",
  135. .mode = fb_modedb,
  136. .num_modes = ARRAY_SIZE(fb_modedb),
  137. };
  138. /*
  139. * SDHC 1
  140. * MMC support
  141. */
  142. static int armadillo5x0_sdhc1_get_ro(struct device *dev)
  143. {
  144. return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  145. }
  146. static int armadillo5x0_sdhc1_init(struct device *dev,
  147. irq_handler_t detect_irq, void *data)
  148. {
  149. int ret;
  150. int gpio_det, gpio_wp;
  151. gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
  152. gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
  153. ret = gpio_request(gpio_det, "sdhc-card-detect");
  154. if (ret)
  155. return ret;
  156. gpio_direction_input(gpio_det);
  157. ret = gpio_request(gpio_wp, "sdhc-write-protect");
  158. if (ret)
  159. goto err_gpio_free;
  160. gpio_direction_input(gpio_wp);
  161. /* When supported the trigger type have to be BOTH */
  162. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq,
  163. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  164. "sdhc-detect", data);
  165. if (ret)
  166. goto err_gpio_free_2;
  167. return 0;
  168. err_gpio_free_2:
  169. gpio_free(gpio_wp);
  170. err_gpio_free:
  171. gpio_free(gpio_det);
  172. return ret;
  173. }
  174. static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
  175. {
  176. free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data);
  177. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
  178. gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
  179. }
  180. static struct imxmmc_platform_data sdhc_pdata = {
  181. .get_ro = armadillo5x0_sdhc1_get_ro,
  182. .init = armadillo5x0_sdhc1_init,
  183. .exit = armadillo5x0_sdhc1_exit,
  184. };
  185. /*
  186. * SMSC 9118
  187. * Network support
  188. */
  189. static struct resource armadillo5x0_smc911x_resources[] = {
  190. {
  191. .start = CS3_BASE_ADDR,
  192. .end = CS3_BASE_ADDR + SZ_32M - 1,
  193. .flags = IORESOURCE_MEM,
  194. }, {
  195. .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  196. .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
  197. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  198. },
  199. };
  200. static struct smsc911x_platform_config smsc911x_info = {
  201. .flags = SMSC911X_USE_32BIT,
  202. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  203. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  204. };
  205. static struct platform_device armadillo5x0_smc911x_device = {
  206. .name = "smsc911x",
  207. .id = -1,
  208. .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
  209. .resource = armadillo5x0_smc911x_resources,
  210. .dev = {
  211. .platform_data = &smsc911x_info,
  212. },
  213. };
  214. /* UART device data */
  215. static struct imxuart_platform_data uart_pdata = {
  216. .flags = IMXUART_HAVE_RTSCTS,
  217. };
  218. static struct platform_device *devices[] __initdata = {
  219. &armadillo5x0_smc911x_device,
  220. };
  221. /*
  222. * Perform board specific initializations
  223. */
  224. static void __init armadillo5x0_init(void)
  225. {
  226. mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
  227. ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
  228. platform_add_devices(devices, ARRAY_SIZE(devices));
  229. /* Register UART */
  230. mxc_register_device(&mxc_uart_device0, &uart_pdata);
  231. mxc_register_device(&mxc_uart_device1, &uart_pdata);
  232. /* SMSC9118 IRQ pin */
  233. gpio_direction_input(MX31_PIN_GPIO1_0);
  234. /* Register SDHC */
  235. mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
  236. /* Register FB */
  237. mxc_register_device(&mx3_ipu, &mx3_ipu_data);
  238. mxc_register_device(&mx3_fb, &mx3fb_pdata);
  239. }
  240. static void __init armadillo5x0_timer_init(void)
  241. {
  242. mx31_clocks_init(26000000);
  243. }
  244. static struct sys_timer armadillo5x0_timer = {
  245. .init = armadillo5x0_timer_init,
  246. };
  247. MACHINE_START(ARMADILLO5X0, "Armadillo-500")
  248. /* Maintainer: Alberto Panizzo */
  249. .phys_io = AIPS1_BASE_ADDR,
  250. .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  251. .boot_params = PHYS_OFFSET + 0x00000100,
  252. .map_io = mx31_map_io,
  253. .init_irq = mxc_init_irq,
  254. .timer = &armadillo5x0_timer,
  255. .init_machine = armadillo5x0_init,
  256. MACHINE_END