bitops.h 7.0 KB

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  1. #ifndef _M68KNOMMU_BITOPS_H
  2. #define _M68KNOMMU_BITOPS_H
  3. /*
  4. * Copyright 1992, Linus Torvalds.
  5. */
  6. #include <linux/compiler.h>
  7. #include <asm/byteorder.h> /* swab32 */
  8. #ifdef __KERNEL__
  9. #include <asm-generic/bitops/ffs.h>
  10. #include <asm-generic/bitops/__ffs.h>
  11. #include <asm-generic/bitops/sched.h>
  12. #include <asm-generic/bitops/ffz.h>
  13. static __inline__ void set_bit(int nr, volatile unsigned long * addr)
  14. {
  15. #ifdef CONFIG_COLDFIRE
  16. __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
  17. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  18. : "d" (nr)
  19. : "%a0", "cc");
  20. #else
  21. __asm__ __volatile__ ("bset %1,%0"
  22. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  23. : "di" (nr)
  24. : "cc");
  25. #endif
  26. }
  27. #define __set_bit(nr, addr) set_bit(nr, addr)
  28. /*
  29. * clear_bit() doesn't provide any barrier for the compiler.
  30. */
  31. #define smp_mb__before_clear_bit() barrier()
  32. #define smp_mb__after_clear_bit() barrier()
  33. static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
  34. {
  35. #ifdef CONFIG_COLDFIRE
  36. __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
  37. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  38. : "d" (nr)
  39. : "%a0", "cc");
  40. #else
  41. __asm__ __volatile__ ("bclr %1,%0"
  42. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  43. : "di" (nr)
  44. : "cc");
  45. #endif
  46. }
  47. #define __clear_bit(nr, addr) clear_bit(nr, addr)
  48. static __inline__ void change_bit(int nr, volatile unsigned long * addr)
  49. {
  50. #ifdef CONFIG_COLDFIRE
  51. __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
  52. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  53. : "d" (nr)
  54. : "%a0", "cc");
  55. #else
  56. __asm__ __volatile__ ("bchg %1,%0"
  57. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  58. : "di" (nr)
  59. : "cc");
  60. #endif
  61. }
  62. #define __change_bit(nr, addr) change_bit(nr, addr)
  63. static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
  64. {
  65. char retval;
  66. #ifdef CONFIG_COLDFIRE
  67. __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
  68. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  69. : "d" (nr)
  70. : "%a0");
  71. #else
  72. __asm__ __volatile__ ("bset %2,%1; sne %0"
  73. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  74. : "di" (nr)
  75. /* No clobber */);
  76. #endif
  77. return retval;
  78. }
  79. #define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
  80. static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
  81. {
  82. char retval;
  83. #ifdef CONFIG_COLDFIRE
  84. __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
  85. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  86. : "d" (nr)
  87. : "%a0");
  88. #else
  89. __asm__ __volatile__ ("bclr %2,%1; sne %0"
  90. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  91. : "di" (nr)
  92. /* No clobber */);
  93. #endif
  94. return retval;
  95. }
  96. #define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
  97. static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
  98. {
  99. char retval;
  100. #ifdef CONFIG_COLDFIRE
  101. __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
  102. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  103. : "d" (nr)
  104. : "%a0");
  105. #else
  106. __asm__ __volatile__ ("bchg %2,%1; sne %0"
  107. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  108. : "di" (nr)
  109. /* No clobber */);
  110. #endif
  111. return retval;
  112. }
  113. #define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
  114. /*
  115. * This routine doesn't need to be atomic.
  116. */
  117. static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
  118. {
  119. return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
  120. }
  121. static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
  122. {
  123. int * a = (int *) addr;
  124. int mask;
  125. a += nr >> 5;
  126. mask = 1 << (nr & 0x1f);
  127. return ((mask & *a) != 0);
  128. }
  129. #define test_bit(nr,addr) \
  130. (__builtin_constant_p(nr) ? \
  131. __constant_test_bit((nr),(addr)) : \
  132. __test_bit((nr),(addr)))
  133. #include <asm-generic/bitops/find.h>
  134. #include <asm-generic/bitops/hweight.h>
  135. static __inline__ int ext2_set_bit(int nr, volatile void * addr)
  136. {
  137. char retval;
  138. #ifdef CONFIG_COLDFIRE
  139. __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
  140. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  141. : "d" (nr)
  142. : "%a0");
  143. #else
  144. __asm__ __volatile__ ("bset %2,%1; sne %0"
  145. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  146. : "di" (nr)
  147. /* No clobber */);
  148. #endif
  149. return retval;
  150. }
  151. static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
  152. {
  153. char retval;
  154. #ifdef CONFIG_COLDFIRE
  155. __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
  156. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  157. : "d" (nr)
  158. : "%a0");
  159. #else
  160. __asm__ __volatile__ ("bclr %2,%1; sne %0"
  161. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  162. : "di" (nr)
  163. /* No clobber */);
  164. #endif
  165. return retval;
  166. }
  167. #define ext2_set_bit_atomic(lock, nr, addr) \
  168. ({ \
  169. int ret; \
  170. spin_lock(lock); \
  171. ret = ext2_set_bit((nr), (addr)); \
  172. spin_unlock(lock); \
  173. ret; \
  174. })
  175. #define ext2_clear_bit_atomic(lock, nr, addr) \
  176. ({ \
  177. int ret; \
  178. spin_lock(lock); \
  179. ret = ext2_clear_bit((nr), (addr)); \
  180. spin_unlock(lock); \
  181. ret; \
  182. })
  183. static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
  184. {
  185. char retval;
  186. #ifdef CONFIG_COLDFIRE
  187. __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
  188. : "=d" (retval)
  189. : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
  190. : "%a0");
  191. #else
  192. __asm__ __volatile__ ("btst %2,%1; sne %0"
  193. : "=d" (retval)
  194. : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
  195. /* No clobber */);
  196. #endif
  197. return retval;
  198. }
  199. #define ext2_find_first_zero_bit(addr, size) \
  200. ext2_find_next_zero_bit((addr), (size), 0)
  201. static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
  202. {
  203. unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
  204. unsigned long result = offset & ~31UL;
  205. unsigned long tmp;
  206. if (offset >= size)
  207. return size;
  208. size -= result;
  209. offset &= 31UL;
  210. if(offset) {
  211. /* We hold the little endian value in tmp, but then the
  212. * shift is illegal. So we could keep a big endian value
  213. * in tmp, like this:
  214. *
  215. * tmp = __swab32(*(p++));
  216. * tmp |= ~0UL >> (32-offset);
  217. *
  218. * but this would decrease preformance, so we change the
  219. * shift:
  220. */
  221. tmp = *(p++);
  222. tmp |= __swab32(~0UL >> (32-offset));
  223. if(size < 32)
  224. goto found_first;
  225. if(~tmp)
  226. goto found_middle;
  227. size -= 32;
  228. result += 32;
  229. }
  230. while(size & ~31UL) {
  231. if(~(tmp = *(p++)))
  232. goto found_middle;
  233. result += 32;
  234. size -= 32;
  235. }
  236. if(!size)
  237. return result;
  238. tmp = *p;
  239. found_first:
  240. /* tmp is little endian, so we would have to swab the shift,
  241. * see above. But then we have to swab tmp below for ffz, so
  242. * we might as well do this here.
  243. */
  244. return result + ffz(__swab32(tmp) | (~0UL << size));
  245. found_middle:
  246. return result + ffz(__swab32(tmp));
  247. }
  248. #include <asm-generic/bitops/minix.h>
  249. #endif /* __KERNEL__ */
  250. #include <asm-generic/bitops/fls.h>
  251. #include <asm-generic/bitops/fls64.h>
  252. #endif /* _M68KNOMMU_BITOPS_H */