dz.c 20 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/delay.h>
  33. #include <linux/module.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/init.h>
  36. #include <linux/console.h>
  37. #include <linux/sysrq.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <linux/serial.h>
  42. #include <asm/bootinfo.h>
  43. #include <asm/dec/interrupts.h>
  44. #include <asm/dec/kn01.h>
  45. #include <asm/dec/kn02.h>
  46. #include <asm/dec/machtype.h>
  47. #include <asm/dec/prom.h>
  48. #include <asm/irq.h>
  49. #include <asm/system.h>
  50. #include <asm/uaccess.h>
  51. #include "dz.h"
  52. static char *dz_name = "DECstation DZ serial driver version ";
  53. static char *dz_version = "1.03";
  54. struct dz_port {
  55. struct uart_port port;
  56. unsigned int cflag;
  57. };
  58. static struct dz_port dz_ports[DZ_NB_PORT];
  59. /*
  60. * ------------------------------------------------------------
  61. * dz_in () and dz_out ()
  62. *
  63. * These routines are used to access the registers of the DZ
  64. * chip, hiding relocation differences between implementation.
  65. * ------------------------------------------------------------
  66. */
  67. static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
  68. {
  69. volatile unsigned short *addr =
  70. (volatile unsigned short *) (dport->port.membase + offset);
  71. return *addr;
  72. }
  73. static inline void dz_out(struct dz_port *dport, unsigned offset,
  74. unsigned short value)
  75. {
  76. volatile unsigned short *addr =
  77. (volatile unsigned short *) (dport->port.membase + offset);
  78. *addr = value;
  79. }
  80. /*
  81. * ------------------------------------------------------------
  82. * rs_stop () and rs_start ()
  83. *
  84. * These routines are called before setting or resetting
  85. * tty->stopped. They enable or disable transmitter interrupts,
  86. * as necessary.
  87. * ------------------------------------------------------------
  88. */
  89. static void dz_stop_tx(struct uart_port *uport)
  90. {
  91. struct dz_port *dport = (struct dz_port *)uport;
  92. unsigned short tmp, mask = 1 << dport->port.line;
  93. unsigned long flags;
  94. spin_lock_irqsave(&dport->port.lock, flags);
  95. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  96. tmp &= ~mask; /* clear the TX flag */
  97. dz_out(dport, DZ_TCR, tmp);
  98. spin_unlock_irqrestore(&dport->port.lock, flags);
  99. }
  100. static void dz_start_tx(struct uart_port *uport)
  101. {
  102. struct dz_port *dport = (struct dz_port *)uport;
  103. unsigned short tmp, mask = 1 << dport->port.line;
  104. unsigned long flags;
  105. spin_lock_irqsave(&dport->port.lock, flags);
  106. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  107. tmp |= mask; /* set the TX flag */
  108. dz_out(dport, DZ_TCR, tmp);
  109. spin_unlock_irqrestore(&dport->port.lock, flags);
  110. }
  111. static void dz_stop_rx(struct uart_port *uport)
  112. {
  113. struct dz_port *dport = (struct dz_port *)uport;
  114. unsigned long flags;
  115. spin_lock_irqsave(&dport->port.lock, flags);
  116. dport->cflag &= ~DZ_CREAD;
  117. dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
  118. spin_unlock_irqrestore(&dport->port.lock, flags);
  119. }
  120. static void dz_enable_ms(struct uart_port *port)
  121. {
  122. /* nothing to do */
  123. }
  124. /*
  125. * ------------------------------------------------------------
  126. *
  127. * Here start the interrupt handling routines. All of the following
  128. * subroutines are declared as inline and are folded into
  129. * dz_interrupt. They were separated out for readability's sake.
  130. *
  131. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  132. * runs with interrupts turned off. People who may want to modify
  133. * dz_interrupt() should try to keep the interrupt handler as fast as
  134. * possible. After you are done making modifications, it is not a bad
  135. * idea to do:
  136. *
  137. * make drivers/serial/dz.s
  138. *
  139. * and look at the resulting assemble code in dz.s.
  140. *
  141. * ------------------------------------------------------------
  142. */
  143. /*
  144. * ------------------------------------------------------------
  145. * receive_char ()
  146. *
  147. * This routine deals with inputs from any lines.
  148. * ------------------------------------------------------------
  149. */
  150. static inline void dz_receive_chars(struct dz_port *dport_in,
  151. struct pt_regs *regs)
  152. {
  153. struct dz_port *dport;
  154. struct tty_struct *tty = NULL;
  155. struct uart_icount *icount;
  156. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  157. unsigned short status;
  158. unsigned char ch, flag;
  159. int i;
  160. while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
  161. dport = &dz_ports[LINE(status)];
  162. tty = dport->port.info->tty; /* point to the proper dev */
  163. ch = UCHAR(status); /* grab the char */
  164. icount = &dport->port.icount;
  165. icount->rx++;
  166. flag = TTY_NORMAL;
  167. if (status & DZ_FERR) { /* frame error */
  168. /*
  169. * There is no separate BREAK status bit, so
  170. * treat framing errors as BREAKs for Magic SysRq
  171. * and SAK; normally, otherwise.
  172. */
  173. if (uart_handle_break(&dport->port))
  174. continue;
  175. if (dport->port.flags & UPF_SAK)
  176. flag = TTY_BREAK;
  177. else
  178. flag = TTY_FRAME;
  179. } else if (status & DZ_OERR) /* overrun error */
  180. flag = TTY_OVERRUN;
  181. else if (status & DZ_PERR) /* parity error */
  182. flag = TTY_PARITY;
  183. /* keep track of the statistics */
  184. switch (flag) {
  185. case TTY_FRAME:
  186. icount->frame++;
  187. break;
  188. case TTY_PARITY:
  189. icount->parity++;
  190. break;
  191. case TTY_OVERRUN:
  192. icount->overrun++;
  193. break;
  194. case TTY_BREAK:
  195. icount->brk++;
  196. break;
  197. default:
  198. break;
  199. }
  200. if (uart_handle_sysrq_char(&dport->port, ch, regs))
  201. continue;
  202. if ((status & dport->port.ignore_status_mask) == 0) {
  203. uart_insert_char(&dport->port,
  204. status, DZ_OERR, ch, flag);
  205. lines_rx[LINE(status)] = 1;
  206. }
  207. }
  208. for (i = 0; i < DZ_NB_PORT; i++)
  209. if (lines_rx[i])
  210. tty_flip_buffer_push(dz_ports[i].port.info->tty);
  211. }
  212. /*
  213. * ------------------------------------------------------------
  214. * transmit_char ()
  215. *
  216. * This routine deals with outputs to any lines.
  217. * ------------------------------------------------------------
  218. */
  219. static inline void dz_transmit_chars(struct dz_port *dport_in)
  220. {
  221. struct dz_port *dport;
  222. struct circ_buf *xmit;
  223. unsigned short status;
  224. unsigned char tmp;
  225. status = dz_in(dport_in, DZ_CSR);
  226. dport = &dz_ports[LINE(status)];
  227. xmit = &dport->port.info->xmit;
  228. if (dport->port.x_char) { /* XON/XOFF chars */
  229. dz_out(dport, DZ_TDR, dport->port.x_char);
  230. dport->port.icount.tx++;
  231. dport->port.x_char = 0;
  232. return;
  233. }
  234. /* If nothing to do or stopped or hardware stopped. */
  235. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  236. dz_stop_tx(&dport->port);
  237. return;
  238. }
  239. /*
  240. * If something to do... (remember the dz has no output fifo,
  241. * so we go one char at a time) :-<
  242. */
  243. tmp = xmit->buf[xmit->tail];
  244. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  245. dz_out(dport, DZ_TDR, tmp);
  246. dport->port.icount.tx++;
  247. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  248. uart_write_wakeup(&dport->port);
  249. /* Are we are done. */
  250. if (uart_circ_empty(xmit))
  251. dz_stop_tx(&dport->port);
  252. }
  253. /*
  254. * ------------------------------------------------------------
  255. * check_modem_status()
  256. *
  257. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  258. * DS 5000/200: Valid for the MODEM and PRINTER line.
  259. * ------------------------------------------------------------
  260. */
  261. static inline void check_modem_status(struct dz_port *dport)
  262. {
  263. /*
  264. * FIXME:
  265. * 1. No status change interrupt; use a timer.
  266. * 2. Handle the 3100/5000 as appropriate. --macro
  267. */
  268. unsigned short status;
  269. /* If not the modem line just return. */
  270. if (dport->port.line != DZ_MODEM)
  271. return;
  272. status = dz_in(dport, DZ_MSR);
  273. /* it's easy, since DSR2 is the only bit in the register */
  274. if (status)
  275. dport->port.icount.dsr++;
  276. }
  277. /*
  278. * ------------------------------------------------------------
  279. * dz_interrupt ()
  280. *
  281. * this is the main interrupt routine for the DZ chip.
  282. * It deals with the multiple ports.
  283. * ------------------------------------------------------------
  284. */
  285. static irqreturn_t dz_interrupt(int irq, void *dev)
  286. {
  287. struct dz_port *dport = (struct dz_port *)dev;
  288. unsigned short status;
  289. /* get the reason why we just got an irq */
  290. status = dz_in(dport, DZ_CSR);
  291. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  292. dz_receive_chars(dport, regs);
  293. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  294. dz_transmit_chars(dport);
  295. return IRQ_HANDLED;
  296. }
  297. /*
  298. * -------------------------------------------------------------------
  299. * Here ends the DZ interrupt routines.
  300. * -------------------------------------------------------------------
  301. */
  302. static unsigned int dz_get_mctrl(struct uart_port *uport)
  303. {
  304. /*
  305. * FIXME: Handle the 3100/5000 as appropriate. --macro
  306. */
  307. struct dz_port *dport = (struct dz_port *)uport;
  308. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  309. if (dport->port.line == DZ_MODEM) {
  310. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  311. mctrl &= ~TIOCM_DSR;
  312. }
  313. return mctrl;
  314. }
  315. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  316. {
  317. /*
  318. * FIXME: Handle the 3100/5000 as appropriate. --macro
  319. */
  320. struct dz_port *dport = (struct dz_port *)uport;
  321. unsigned short tmp;
  322. if (dport->port.line == DZ_MODEM) {
  323. tmp = dz_in(dport, DZ_TCR);
  324. if (mctrl & TIOCM_DTR)
  325. tmp &= ~DZ_MODEM_DTR;
  326. else
  327. tmp |= DZ_MODEM_DTR;
  328. dz_out(dport, DZ_TCR, tmp);
  329. }
  330. }
  331. /*
  332. * -------------------------------------------------------------------
  333. * startup ()
  334. *
  335. * various initialization tasks
  336. * -------------------------------------------------------------------
  337. */
  338. static int dz_startup(struct uart_port *uport)
  339. {
  340. struct dz_port *dport = (struct dz_port *)uport;
  341. unsigned long flags;
  342. unsigned short tmp;
  343. spin_lock_irqsave(&dport->port.lock, flags);
  344. /* enable the interrupt and the scanning */
  345. tmp = dz_in(dport, DZ_CSR);
  346. tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
  347. dz_out(dport, DZ_CSR, tmp);
  348. spin_unlock_irqrestore(&dport->port.lock, flags);
  349. return 0;
  350. }
  351. /*
  352. * -------------------------------------------------------------------
  353. * shutdown ()
  354. *
  355. * This routine will shutdown a serial port; interrupts are disabled, and
  356. * DTR is dropped if the hangup on close termio flag is on.
  357. * -------------------------------------------------------------------
  358. */
  359. static void dz_shutdown(struct uart_port *uport)
  360. {
  361. dz_stop_tx(uport);
  362. }
  363. /*
  364. * -------------------------------------------------------------------
  365. * dz_tx_empty() -- get the transmitter empty status
  366. *
  367. * Purpose: Let user call ioctl() to get info when the UART physically
  368. * is emptied. On bus types like RS485, the transmitter must
  369. * release the bus after transmitting. This must be done when
  370. * the transmit shift register is empty, not be done when the
  371. * transmit holding register is empty. This functionality
  372. * allows an RS485 driver to be written in user space.
  373. * -------------------------------------------------------------------
  374. */
  375. static unsigned int dz_tx_empty(struct uart_port *uport)
  376. {
  377. struct dz_port *dport = (struct dz_port *)uport;
  378. unsigned short tmp, mask = 1 << dport->port.line;
  379. tmp = dz_in(dport, DZ_TCR);
  380. tmp &= mask;
  381. return tmp ? 0 : TIOCSER_TEMT;
  382. }
  383. static void dz_break_ctl(struct uart_port *uport, int break_state)
  384. {
  385. /*
  386. * FIXME: Can't access BREAK bits in TDR easily;
  387. * reuse the code for polled TX. --macro
  388. */
  389. struct dz_port *dport = (struct dz_port *)uport;
  390. unsigned long flags;
  391. unsigned short tmp, mask = 1 << dport->port.line;
  392. spin_lock_irqsave(&uport->lock, flags);
  393. tmp = dz_in(dport, DZ_TCR);
  394. if (break_state)
  395. tmp |= mask;
  396. else
  397. tmp &= ~mask;
  398. dz_out(dport, DZ_TCR, tmp);
  399. spin_unlock_irqrestore(&uport->lock, flags);
  400. }
  401. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  402. struct ktermios *old_termios)
  403. {
  404. struct dz_port *dport = (struct dz_port *)uport;
  405. unsigned long flags;
  406. unsigned int cflag, baud;
  407. cflag = dport->port.line;
  408. switch (termios->c_cflag & CSIZE) {
  409. case CS5:
  410. cflag |= DZ_CS5;
  411. break;
  412. case CS6:
  413. cflag |= DZ_CS6;
  414. break;
  415. case CS7:
  416. cflag |= DZ_CS7;
  417. break;
  418. case CS8:
  419. default:
  420. cflag |= DZ_CS8;
  421. }
  422. if (termios->c_cflag & CSTOPB)
  423. cflag |= DZ_CSTOPB;
  424. if (termios->c_cflag & PARENB)
  425. cflag |= DZ_PARENB;
  426. if (termios->c_cflag & PARODD)
  427. cflag |= DZ_PARODD;
  428. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  429. switch (baud) {
  430. case 50:
  431. cflag |= DZ_B50;
  432. break;
  433. case 75:
  434. cflag |= DZ_B75;
  435. break;
  436. case 110:
  437. cflag |= DZ_B110;
  438. break;
  439. case 134:
  440. cflag |= DZ_B134;
  441. break;
  442. case 150:
  443. cflag |= DZ_B150;
  444. break;
  445. case 300:
  446. cflag |= DZ_B300;
  447. break;
  448. case 600:
  449. cflag |= DZ_B600;
  450. break;
  451. case 1200:
  452. cflag |= DZ_B1200;
  453. break;
  454. case 1800:
  455. cflag |= DZ_B1800;
  456. break;
  457. case 2000:
  458. cflag |= DZ_B2000;
  459. break;
  460. case 2400:
  461. cflag |= DZ_B2400;
  462. break;
  463. case 3600:
  464. cflag |= DZ_B3600;
  465. break;
  466. case 4800:
  467. cflag |= DZ_B4800;
  468. break;
  469. case 7200:
  470. cflag |= DZ_B7200;
  471. break;
  472. case 9600:
  473. default:
  474. cflag |= DZ_B9600;
  475. }
  476. if (termios->c_cflag & CREAD)
  477. cflag |= DZ_RXENAB;
  478. spin_lock_irqsave(&dport->port.lock, flags);
  479. dz_out(dport, DZ_LPR, cflag | dport->port.line);
  480. dport->cflag = cflag;
  481. /* setup accept flag */
  482. dport->port.read_status_mask = DZ_OERR;
  483. if (termios->c_iflag & INPCK)
  484. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  485. /* characters to ignore */
  486. uport->ignore_status_mask = 0;
  487. if (termios->c_iflag & IGNPAR)
  488. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  489. spin_unlock_irqrestore(&dport->port.lock, flags);
  490. }
  491. static const char *dz_type(struct uart_port *port)
  492. {
  493. return "DZ";
  494. }
  495. static void dz_release_port(struct uart_port *port)
  496. {
  497. /* nothing to do */
  498. }
  499. static int dz_request_port(struct uart_port *port)
  500. {
  501. return 0;
  502. }
  503. static void dz_config_port(struct uart_port *port, int flags)
  504. {
  505. if (flags & UART_CONFIG_TYPE)
  506. port->type = PORT_DZ;
  507. }
  508. /*
  509. * verify the new serial_struct (for TIOCSSERIAL).
  510. */
  511. static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
  512. {
  513. int ret = 0;
  514. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  515. ret = -EINVAL;
  516. if (ser->irq != port->irq)
  517. ret = -EINVAL;
  518. return ret;
  519. }
  520. static struct uart_ops dz_ops = {
  521. .tx_empty = dz_tx_empty,
  522. .get_mctrl = dz_get_mctrl,
  523. .set_mctrl = dz_set_mctrl,
  524. .stop_tx = dz_stop_tx,
  525. .start_tx = dz_start_tx,
  526. .stop_rx = dz_stop_rx,
  527. .enable_ms = dz_enable_ms,
  528. .break_ctl = dz_break_ctl,
  529. .startup = dz_startup,
  530. .shutdown = dz_shutdown,
  531. .set_termios = dz_set_termios,
  532. .type = dz_type,
  533. .release_port = dz_release_port,
  534. .request_port = dz_request_port,
  535. .config_port = dz_config_port,
  536. .verify_port = dz_verify_port,
  537. };
  538. static void __init dz_init_ports(void)
  539. {
  540. static int first = 1;
  541. struct dz_port *dport;
  542. unsigned long base;
  543. int i;
  544. if (!first)
  545. return;
  546. first = 0;
  547. if (mips_machtype == MACH_DS23100 ||
  548. mips_machtype == MACH_DS5100)
  549. base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
  550. else
  551. base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
  552. for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
  553. spin_lock_init(&dport->port.lock);
  554. dport->port.membase = (char *) base;
  555. dport->port.iotype = UPIO_MEM;
  556. dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
  557. dport->port.line = i;
  558. dport->port.fifosize = 1;
  559. dport->port.ops = &dz_ops;
  560. dport->port.flags = UPF_BOOT_AUTOCONF;
  561. }
  562. }
  563. static void dz_reset(struct dz_port *dport)
  564. {
  565. dz_out(dport, DZ_CSR, DZ_CLR);
  566. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  567. iob();
  568. /* enable scanning */
  569. dz_out(dport, DZ_CSR, DZ_MSE);
  570. }
  571. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  572. /*
  573. * -------------------------------------------------------------------
  574. * dz_console_putchar() -- transmit a character
  575. *
  576. * Polled transmission. This is tricky. We need to mask transmit
  577. * interrupts so that they do not interfere, enable the transmitter
  578. * for the line requested and then wait till the transmit scanner
  579. * requests data for this line. But it may request data for another
  580. * line first, in which case we have to disable its transmitter and
  581. * repeat waiting till our line pops up. Only then the character may
  582. * be transmitted. Finally, the state of the transmitter mask is
  583. * restored. Welcome to the world of PDP-11!
  584. * -------------------------------------------------------------------
  585. */
  586. static void dz_console_putchar(struct uart_port *uport, int ch)
  587. {
  588. struct dz_port *dport = (struct dz_port *)uport;
  589. unsigned long flags;
  590. unsigned short csr, tcr, trdy, mask;
  591. int loops = 10000;
  592. spin_lock_irqsave(&dport->port.lock, flags);
  593. csr = dz_in(dport, DZ_CSR);
  594. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  595. tcr = dz_in(dport, DZ_TCR);
  596. tcr |= 1 << dport->port.line;
  597. mask = tcr;
  598. dz_out(dport, DZ_TCR, mask);
  599. iob();
  600. spin_unlock_irqrestore(&dport->port.lock, flags);
  601. while (loops--) {
  602. trdy = dz_in(dport, DZ_CSR);
  603. if (!(trdy & DZ_TRDY))
  604. continue;
  605. trdy = (trdy & DZ_TLINE) >> 8;
  606. if (trdy == dport->port.line)
  607. break;
  608. mask &= ~(1 << trdy);
  609. dz_out(dport, DZ_TCR, mask);
  610. iob();
  611. udelay(2);
  612. }
  613. if (loops) /* Cannot send otherwise. */
  614. dz_out(dport, DZ_TDR, ch);
  615. dz_out(dport, DZ_TCR, tcr);
  616. dz_out(dport, DZ_CSR, csr);
  617. }
  618. /*
  619. * -------------------------------------------------------------------
  620. * dz_console_print ()
  621. *
  622. * dz_console_print is registered for printk.
  623. * The console must be locked when we get here.
  624. * -------------------------------------------------------------------
  625. */
  626. static void dz_console_print(struct console *co,
  627. const char *str,
  628. unsigned int count)
  629. {
  630. struct dz_port *dport = &dz_ports[co->index];
  631. #ifdef DEBUG_DZ
  632. prom_printf((char *) str);
  633. #endif
  634. uart_console_write(&dport->port, str, count, dz_console_putchar);
  635. }
  636. static int __init dz_console_setup(struct console *co, char *options)
  637. {
  638. struct dz_port *dport = &dz_ports[co->index];
  639. int baud = 9600;
  640. int bits = 8;
  641. int parity = 'n';
  642. int flow = 'n';
  643. if (options)
  644. uart_parse_options(options, &baud, &parity, &bits, &flow);
  645. dz_reset(dport);
  646. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  647. }
  648. static struct uart_driver dz_reg;
  649. static struct console dz_sercons = {
  650. .name = "ttyS",
  651. .write = dz_console_print,
  652. .device = uart_console_device,
  653. .setup = dz_console_setup,
  654. .flags = CON_PRINTBUFFER,
  655. .index = -1,
  656. .data = &dz_reg,
  657. };
  658. static int __init dz_serial_console_init(void)
  659. {
  660. if (!IOASIC) {
  661. dz_init_ports();
  662. register_console(&dz_sercons);
  663. return 0;
  664. } else
  665. return -ENXIO;
  666. }
  667. console_initcall(dz_serial_console_init);
  668. #define SERIAL_DZ_CONSOLE &dz_sercons
  669. #else
  670. #define SERIAL_DZ_CONSOLE NULL
  671. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  672. static struct uart_driver dz_reg = {
  673. .owner = THIS_MODULE,
  674. .driver_name = "serial",
  675. .dev_name = "ttyS",
  676. .major = TTY_MAJOR,
  677. .minor = 64,
  678. .nr = DZ_NB_PORT,
  679. .cons = SERIAL_DZ_CONSOLE,
  680. };
  681. static int __init dz_init(void)
  682. {
  683. int ret, i;
  684. if (IOASIC)
  685. return -ENXIO;
  686. printk("%s%s\n", dz_name, dz_version);
  687. dz_init_ports();
  688. #ifndef CONFIG_SERIAL_DZ_CONSOLE
  689. /* reset the chip */
  690. dz_reset(&dz_ports[0]);
  691. #endif
  692. if (request_irq(dz_ports[0].port.irq, dz_interrupt,
  693. IRQF_DISABLED, "DZ", &dz_ports[0]))
  694. panic("Unable to register DZ interrupt");
  695. ret = uart_register_driver(&dz_reg);
  696. if (ret != 0)
  697. return ret;
  698. for (i = 0; i < DZ_NB_PORT; i++)
  699. uart_add_one_port(&dz_reg, &dz_ports[i].port);
  700. return ret;
  701. }
  702. module_init(dz_init);
  703. MODULE_DESCRIPTION("DECstation DZ serial driver");
  704. MODULE_LICENSE("GPL");