pci-sysfs.c 17 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include "pci.h"
  22. static int sysfs_initialized; /* = 0 */
  23. /* show configuration fields */
  24. #define pci_config_attr(field, format_string) \
  25. static ssize_t \
  26. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  27. { \
  28. struct pci_dev *pdev; \
  29. \
  30. pdev = to_pci_dev (dev); \
  31. return sprintf (buf, format_string, pdev->field); \
  32. }
  33. pci_config_attr(vendor, "0x%04x\n");
  34. pci_config_attr(device, "0x%04x\n");
  35. pci_config_attr(subsystem_vendor, "0x%04x\n");
  36. pci_config_attr(subsystem_device, "0x%04x\n");
  37. pci_config_attr(class, "0x%06x\n");
  38. pci_config_attr(irq, "%u\n");
  39. static ssize_t broken_parity_status_show(struct device *dev,
  40. struct device_attribute *attr,
  41. char *buf)
  42. {
  43. struct pci_dev *pdev = to_pci_dev(dev);
  44. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  45. }
  46. static ssize_t broken_parity_status_store(struct device *dev,
  47. struct device_attribute *attr,
  48. const char *buf, size_t count)
  49. {
  50. struct pci_dev *pdev = to_pci_dev(dev);
  51. ssize_t consumed = -EINVAL;
  52. if ((count > 0) && (*buf == '0' || *buf == '1')) {
  53. pdev->broken_parity_status = *buf == '1' ? 1 : 0;
  54. consumed = count;
  55. }
  56. return consumed;
  57. }
  58. static ssize_t local_cpus_show(struct device *dev,
  59. struct device_attribute *attr, char *buf)
  60. {
  61. cpumask_t mask;
  62. int len;
  63. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  64. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  65. strcat(buf,"\n");
  66. return 1+len;
  67. }
  68. /* show resources */
  69. static ssize_t
  70. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  71. {
  72. struct pci_dev * pci_dev = to_pci_dev(dev);
  73. char * str = buf;
  74. int i;
  75. int max = 7;
  76. resource_size_t start, end;
  77. if (pci_dev->subordinate)
  78. max = DEVICE_COUNT_RESOURCE;
  79. for (i = 0; i < max; i++) {
  80. struct resource *res = &pci_dev->resource[i];
  81. pci_resource_to_user(pci_dev, i, res, &start, &end);
  82. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  83. (unsigned long long)start,
  84. (unsigned long long)end,
  85. (unsigned long long)res->flags);
  86. }
  87. return (str - buf);
  88. }
  89. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  90. {
  91. struct pci_dev *pci_dev = to_pci_dev(dev);
  92. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  93. pci_dev->vendor, pci_dev->device,
  94. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  95. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  96. (u8)(pci_dev->class));
  97. }
  98. static ssize_t is_enabled_store(struct device *dev,
  99. struct device_attribute *attr, const char *buf,
  100. size_t count)
  101. {
  102. ssize_t result = -EINVAL;
  103. struct pci_dev *pdev = to_pci_dev(dev);
  104. /* this can crash the machine when done on the "wrong" device */
  105. if (!capable(CAP_SYS_ADMIN))
  106. return count;
  107. if (*buf == '0') {
  108. if (atomic_read(&pdev->enable_cnt) != 0)
  109. pci_disable_device(pdev);
  110. else
  111. result = -EIO;
  112. } else if (*buf == '1')
  113. result = pci_enable_device(pdev);
  114. return result < 0 ? result : count;
  115. }
  116. static ssize_t is_enabled_show(struct device *dev,
  117. struct device_attribute *attr, char *buf)
  118. {
  119. struct pci_dev *pdev;
  120. pdev = to_pci_dev (dev);
  121. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  122. }
  123. static ssize_t
  124. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  125. {
  126. struct pci_dev *pdev = to_pci_dev(dev);
  127. if (!pdev->subordinate)
  128. return 0;
  129. return sprintf (buf, "%u\n",
  130. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  131. }
  132. static ssize_t
  133. msi_bus_store(struct device *dev, struct device_attribute *attr,
  134. const char *buf, size_t count)
  135. {
  136. struct pci_dev *pdev = to_pci_dev(dev);
  137. /* bad things may happen if the no_msi flag is changed
  138. * while some drivers are loaded */
  139. if (!capable(CAP_SYS_ADMIN))
  140. return count;
  141. if (!pdev->subordinate)
  142. return count;
  143. if (*buf == '0') {
  144. pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  145. dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
  146. " bad things could happen.\n");
  147. }
  148. if (*buf == '1') {
  149. pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  150. dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
  151. " bad things could happen.\n");
  152. }
  153. return count;
  154. }
  155. struct device_attribute pci_dev_attrs[] = {
  156. __ATTR_RO(resource),
  157. __ATTR_RO(vendor),
  158. __ATTR_RO(device),
  159. __ATTR_RO(subsystem_vendor),
  160. __ATTR_RO(subsystem_device),
  161. __ATTR_RO(class),
  162. __ATTR_RO(irq),
  163. __ATTR_RO(local_cpus),
  164. __ATTR_RO(modalias),
  165. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  166. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  167. broken_parity_status_show,broken_parity_status_store),
  168. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  169. __ATTR_NULL,
  170. };
  171. static ssize_t
  172. pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  173. {
  174. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  175. unsigned int size = 64;
  176. loff_t init_off = off;
  177. u8 *data = (u8*) buf;
  178. /* Several chips lock up trying to read undefined config space */
  179. if (capable(CAP_SYS_ADMIN)) {
  180. size = dev->cfg_size;
  181. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  182. size = 128;
  183. }
  184. if (off > size)
  185. return 0;
  186. if (off + count > size) {
  187. size -= off;
  188. count = size;
  189. } else {
  190. size = count;
  191. }
  192. if ((off & 1) && size) {
  193. u8 val;
  194. pci_user_read_config_byte(dev, off, &val);
  195. data[off - init_off] = val;
  196. off++;
  197. size--;
  198. }
  199. if ((off & 3) && size > 2) {
  200. u16 val;
  201. pci_user_read_config_word(dev, off, &val);
  202. data[off - init_off] = val & 0xff;
  203. data[off - init_off + 1] = (val >> 8) & 0xff;
  204. off += 2;
  205. size -= 2;
  206. }
  207. while (size > 3) {
  208. u32 val;
  209. pci_user_read_config_dword(dev, off, &val);
  210. data[off - init_off] = val & 0xff;
  211. data[off - init_off + 1] = (val >> 8) & 0xff;
  212. data[off - init_off + 2] = (val >> 16) & 0xff;
  213. data[off - init_off + 3] = (val >> 24) & 0xff;
  214. off += 4;
  215. size -= 4;
  216. }
  217. if (size >= 2) {
  218. u16 val;
  219. pci_user_read_config_word(dev, off, &val);
  220. data[off - init_off] = val & 0xff;
  221. data[off - init_off + 1] = (val >> 8) & 0xff;
  222. off += 2;
  223. size -= 2;
  224. }
  225. if (size > 0) {
  226. u8 val;
  227. pci_user_read_config_byte(dev, off, &val);
  228. data[off - init_off] = val;
  229. off++;
  230. --size;
  231. }
  232. return count;
  233. }
  234. static ssize_t
  235. pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  236. {
  237. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  238. unsigned int size = count;
  239. loff_t init_off = off;
  240. u8 *data = (u8*) buf;
  241. if (off > dev->cfg_size)
  242. return 0;
  243. if (off + count > dev->cfg_size) {
  244. size = dev->cfg_size - off;
  245. count = size;
  246. }
  247. if ((off & 1) && size) {
  248. pci_user_write_config_byte(dev, off, data[off - init_off]);
  249. off++;
  250. size--;
  251. }
  252. if ((off & 3) && size > 2) {
  253. u16 val = data[off - init_off];
  254. val |= (u16) data[off - init_off + 1] << 8;
  255. pci_user_write_config_word(dev, off, val);
  256. off += 2;
  257. size -= 2;
  258. }
  259. while (size > 3) {
  260. u32 val = data[off - init_off];
  261. val |= (u32) data[off - init_off + 1] << 8;
  262. val |= (u32) data[off - init_off + 2] << 16;
  263. val |= (u32) data[off - init_off + 3] << 24;
  264. pci_user_write_config_dword(dev, off, val);
  265. off += 4;
  266. size -= 4;
  267. }
  268. if (size >= 2) {
  269. u16 val = data[off - init_off];
  270. val |= (u16) data[off - init_off + 1] << 8;
  271. pci_user_write_config_word(dev, off, val);
  272. off += 2;
  273. size -= 2;
  274. }
  275. if (size) {
  276. pci_user_write_config_byte(dev, off, data[off - init_off]);
  277. off++;
  278. --size;
  279. }
  280. return count;
  281. }
  282. #ifdef HAVE_PCI_LEGACY
  283. /**
  284. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  285. * @kobj: kobject corresponding to file to read from
  286. * @buf: buffer to store results
  287. * @off: offset into legacy I/O port space
  288. * @count: number of bytes to read
  289. *
  290. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  291. * callback routine (pci_legacy_read).
  292. */
  293. ssize_t
  294. pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  295. {
  296. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  297. struct class_device,
  298. kobj));
  299. /* Only support 1, 2 or 4 byte accesses */
  300. if (count != 1 && count != 2 && count != 4)
  301. return -EINVAL;
  302. return pci_legacy_read(bus, off, (u32 *)buf, count);
  303. }
  304. /**
  305. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  306. * @kobj: kobject corresponding to file to read from
  307. * @buf: buffer containing value to be written
  308. * @off: offset into legacy I/O port space
  309. * @count: number of bytes to write
  310. *
  311. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  312. * callback routine (pci_legacy_write).
  313. */
  314. ssize_t
  315. pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  316. {
  317. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  318. struct class_device,
  319. kobj));
  320. /* Only support 1, 2 or 4 byte accesses */
  321. if (count != 1 && count != 2 && count != 4)
  322. return -EINVAL;
  323. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  324. }
  325. /**
  326. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  327. * @kobj: kobject corresponding to device to be mapped
  328. * @attr: struct bin_attribute for this file
  329. * @vma: struct vm_area_struct passed to mmap
  330. *
  331. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  332. * legacy memory space (first meg of bus space) into application virtual
  333. * memory space.
  334. */
  335. int
  336. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  337. struct vm_area_struct *vma)
  338. {
  339. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  340. struct class_device,
  341. kobj));
  342. return pci_mmap_legacy_page_range(bus, vma);
  343. }
  344. #endif /* HAVE_PCI_LEGACY */
  345. #ifdef HAVE_PCI_MMAP
  346. /**
  347. * pci_mmap_resource - map a PCI resource into user memory space
  348. * @kobj: kobject for mapping
  349. * @attr: struct bin_attribute for the file being mapped
  350. * @vma: struct vm_area_struct passed into the mmap
  351. *
  352. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  353. * FIXME: write combining? maybe automatic for prefetchable regions?
  354. */
  355. static int
  356. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  357. struct vm_area_struct *vma)
  358. {
  359. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  360. struct device, kobj));
  361. struct resource *res = (struct resource *)attr->private;
  362. enum pci_mmap_state mmap_type;
  363. resource_size_t start, end;
  364. int i;
  365. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  366. if (res == &pdev->resource[i])
  367. break;
  368. if (i >= PCI_ROM_RESOURCE)
  369. return -ENODEV;
  370. /* pci_mmap_page_range() expects the same kind of entry as coming
  371. * from /proc/bus/pci/ which is a "user visible" value. If this is
  372. * different from the resource itself, arch will do necessary fixup.
  373. */
  374. pci_resource_to_user(pdev, i, res, &start, &end);
  375. vma->vm_pgoff += start >> PAGE_SHIFT;
  376. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  377. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  378. }
  379. /**
  380. * pci_remove_resource_files - cleanup resource files
  381. * @dev: dev to cleanup
  382. *
  383. * If we created resource files for @dev, remove them from sysfs and
  384. * free their resources.
  385. */
  386. static void
  387. pci_remove_resource_files(struct pci_dev *pdev)
  388. {
  389. int i;
  390. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  391. struct bin_attribute *res_attr;
  392. res_attr = pdev->res_attr[i];
  393. if (res_attr) {
  394. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  395. kfree(res_attr);
  396. }
  397. }
  398. }
  399. /**
  400. * pci_create_resource_files - create resource files in sysfs for @dev
  401. * @dev: dev in question
  402. *
  403. * Walk the resources in @dev creating files for each resource available.
  404. */
  405. static int pci_create_resource_files(struct pci_dev *pdev)
  406. {
  407. int i;
  408. int retval;
  409. /* Expose the PCI resources from this device as files */
  410. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  411. struct bin_attribute *res_attr;
  412. /* skip empty resources */
  413. if (!pci_resource_len(pdev, i))
  414. continue;
  415. /* allocate attribute structure, piggyback attribute name */
  416. res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  417. if (res_attr) {
  418. char *res_attr_name = (char *)(res_attr + 1);
  419. pdev->res_attr[i] = res_attr;
  420. sprintf(res_attr_name, "resource%d", i);
  421. res_attr->attr.name = res_attr_name;
  422. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  423. res_attr->attr.owner = THIS_MODULE;
  424. res_attr->size = pci_resource_len(pdev, i);
  425. res_attr->mmap = pci_mmap_resource;
  426. res_attr->private = &pdev->resource[i];
  427. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  428. if (retval) {
  429. pci_remove_resource_files(pdev);
  430. return retval;
  431. }
  432. } else {
  433. return -ENOMEM;
  434. }
  435. }
  436. return 0;
  437. }
  438. #else /* !HAVE_PCI_MMAP */
  439. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  440. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  441. #endif /* HAVE_PCI_MMAP */
  442. /**
  443. * pci_write_rom - used to enable access to the PCI ROM display
  444. * @kobj: kernel object handle
  445. * @buf: user input
  446. * @off: file offset
  447. * @count: number of byte in input
  448. *
  449. * writing anything except 0 enables it
  450. */
  451. static ssize_t
  452. pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  453. {
  454. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  455. if ((off == 0) && (*buf == '0') && (count == 2))
  456. pdev->rom_attr_enabled = 0;
  457. else
  458. pdev->rom_attr_enabled = 1;
  459. return count;
  460. }
  461. /**
  462. * pci_read_rom - read a PCI ROM
  463. * @kobj: kernel object handle
  464. * @buf: where to put the data we read from the ROM
  465. * @off: file offset
  466. * @count: number of bytes to read
  467. *
  468. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  469. * device corresponding to @kobj.
  470. */
  471. static ssize_t
  472. pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  473. {
  474. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  475. void __iomem *rom;
  476. size_t size;
  477. if (!pdev->rom_attr_enabled)
  478. return -EINVAL;
  479. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  480. if (!rom)
  481. return 0;
  482. if (off >= size)
  483. count = 0;
  484. else {
  485. if (off + count > size)
  486. count = size - off;
  487. memcpy_fromio(buf, rom + off, count);
  488. }
  489. pci_unmap_rom(pdev, rom);
  490. return count;
  491. }
  492. static struct bin_attribute pci_config_attr = {
  493. .attr = {
  494. .name = "config",
  495. .mode = S_IRUGO | S_IWUSR,
  496. .owner = THIS_MODULE,
  497. },
  498. .size = 256,
  499. .read = pci_read_config,
  500. .write = pci_write_config,
  501. };
  502. static struct bin_attribute pcie_config_attr = {
  503. .attr = {
  504. .name = "config",
  505. .mode = S_IRUGO | S_IWUSR,
  506. .owner = THIS_MODULE,
  507. },
  508. .size = 4096,
  509. .read = pci_read_config,
  510. .write = pci_write_config,
  511. };
  512. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  513. {
  514. struct bin_attribute *rom_attr = NULL;
  515. int retval;
  516. if (!sysfs_initialized)
  517. return -EACCES;
  518. if (pdev->cfg_size < 4096)
  519. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  520. else
  521. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  522. if (retval)
  523. goto err;
  524. retval = pci_create_resource_files(pdev);
  525. if (retval)
  526. goto err_bin_file;
  527. /* If the device has a ROM, try to expose it in sysfs. */
  528. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  529. rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
  530. if (rom_attr) {
  531. pdev->rom_attr = rom_attr;
  532. rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  533. rom_attr->attr.name = "rom";
  534. rom_attr->attr.mode = S_IRUSR;
  535. rom_attr->attr.owner = THIS_MODULE;
  536. rom_attr->read = pci_read_rom;
  537. rom_attr->write = pci_write_rom;
  538. retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
  539. if (retval)
  540. goto err_rom;
  541. } else {
  542. retval = -ENOMEM;
  543. goto err_bin_file;
  544. }
  545. }
  546. /* add platform-specific attributes */
  547. pcibios_add_platform_entries(pdev);
  548. return 0;
  549. err_rom:
  550. kfree(rom_attr);
  551. err_bin_file:
  552. if (pdev->cfg_size < 4096)
  553. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  554. else
  555. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  556. err:
  557. return retval;
  558. }
  559. /**
  560. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  561. * @pdev: device whose entries we should free
  562. *
  563. * Cleanup when @pdev is removed from sysfs.
  564. */
  565. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  566. {
  567. if (!sysfs_initialized)
  568. return;
  569. if (pdev->cfg_size < 4096)
  570. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  571. else
  572. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  573. pci_remove_resource_files(pdev);
  574. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  575. if (pdev->rom_attr) {
  576. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  577. kfree(pdev->rom_attr);
  578. }
  579. }
  580. }
  581. static int __init pci_sysfs_init(void)
  582. {
  583. struct pci_dev *pdev = NULL;
  584. int retval;
  585. sysfs_initialized = 1;
  586. for_each_pci_dev(pdev) {
  587. retval = pci_create_sysfs_dev_files(pdev);
  588. if (retval)
  589. return retval;
  590. }
  591. return 0;
  592. }
  593. __initcall(pci_sysfs_init);