or51132.c 18 KB

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  1. /*
  2. * Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
  3. *
  4. * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
  5. *
  6. * Based on code from Jack Kelliher (kelliher@xmission.com)
  7. * Copyright (C) 2002 & pcHDTV, inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. */
  24. /*
  25. * This driver needs two external firmware files. Please copy
  26. * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  27. * /usr/lib/hotplug/firmware/ or /lib/firmware/
  28. * (depending on configuration of firmware hotplug).
  29. */
  30. #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  31. #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/init.h>
  36. #include <linux/delay.h>
  37. #include <linux/string.h>
  38. #include <linux/slab.h>
  39. #include <asm/byteorder.h>
  40. #include "dvb_math.h"
  41. #include "dvb_frontend.h"
  42. #include "dvb-pll.h"
  43. #include "or51132.h"
  44. static int debug;
  45. #define dprintk(args...) \
  46. do { \
  47. if (debug) printk(KERN_DEBUG "or51132: " args); \
  48. } while (0)
  49. struct or51132_state
  50. {
  51. struct i2c_adapter* i2c;
  52. /* Configuration settings */
  53. const struct or51132_config* config;
  54. struct dvb_frontend frontend;
  55. /* Demodulator private data */
  56. fe_modulation_t current_modulation;
  57. u32 snr; /* Result of last SNR calculation */
  58. /* Tuner private data */
  59. u32 current_frequency;
  60. };
  61. static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
  62. {
  63. int err;
  64. struct i2c_msg msg;
  65. msg.addr = reg;
  66. msg.flags = 0;
  67. msg.len = len;
  68. msg.buf = buf;
  69. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  70. printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
  71. return -EREMOTEIO;
  72. }
  73. return 0;
  74. }
  75. static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
  76. {
  77. int err;
  78. struct i2c_msg msg;
  79. msg.addr = reg;
  80. msg.flags = I2C_M_RD;
  81. msg.len = len;
  82. msg.buf = buf;
  83. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  84. printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
  85. return -EREMOTEIO;
  86. }
  87. return 0;
  88. }
  89. static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
  90. {
  91. struct or51132_state* state = fe->demodulator_priv;
  92. static u8 run_buf[] = {0x7F,0x01};
  93. u8 rec_buf[8];
  94. u8 cmd_buf[3];
  95. u32 firmwareAsize, firmwareBsize;
  96. int i,ret;
  97. dprintk("Firmware is %Zd bytes\n",fw->size);
  98. /* Get size of firmware A and B */
  99. firmwareAsize = le32_to_cpu(*((u32*)fw->data));
  100. dprintk("FirmwareA is %i bytes\n",firmwareAsize);
  101. firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
  102. dprintk("FirmwareB is %i bytes\n",firmwareBsize);
  103. /* Upload firmware */
  104. if ((ret = i2c_writebytes(state,state->config->demod_address,
  105. &fw->data[8],firmwareAsize))) {
  106. printk(KERN_WARNING "or51132: load_firmware error 1\n");
  107. return ret;
  108. }
  109. msleep(1); /* 1ms */
  110. if ((ret = i2c_writebytes(state,state->config->demod_address,
  111. &fw->data[8+firmwareAsize],firmwareBsize))) {
  112. printk(KERN_WARNING "or51132: load_firmware error 2\n");
  113. return ret;
  114. }
  115. msleep(1); /* 1ms */
  116. if ((ret = i2c_writebytes(state,state->config->demod_address,
  117. run_buf,2))) {
  118. printk(KERN_WARNING "or51132: load_firmware error 3\n");
  119. return ret;
  120. }
  121. /* Wait at least 5 msec */
  122. msleep(20); /* 10ms */
  123. if ((ret = i2c_writebytes(state,state->config->demod_address,
  124. run_buf,2))) {
  125. printk(KERN_WARNING "or51132: load_firmware error 4\n");
  126. return ret;
  127. }
  128. /* 50ms for operation to begin */
  129. msleep(50);
  130. /* Read back ucode version to besure we loaded correctly and are really up and running */
  131. /* Get uCode version */
  132. cmd_buf[0] = 0x10;
  133. cmd_buf[1] = 0x10;
  134. cmd_buf[2] = 0x00;
  135. msleep(20); /* 20ms */
  136. if ((ret = i2c_writebytes(state,state->config->demod_address,
  137. cmd_buf,3))) {
  138. printk(KERN_WARNING "or51132: load_firmware error a\n");
  139. return ret;
  140. }
  141. cmd_buf[0] = 0x04;
  142. cmd_buf[1] = 0x17;
  143. msleep(20); /* 20ms */
  144. if ((ret = i2c_writebytes(state,state->config->demod_address,
  145. cmd_buf,2))) {
  146. printk(KERN_WARNING "or51132: load_firmware error b\n");
  147. return ret;
  148. }
  149. cmd_buf[0] = 0x00;
  150. cmd_buf[1] = 0x00;
  151. msleep(20); /* 20ms */
  152. if ((ret = i2c_writebytes(state,state->config->demod_address,
  153. cmd_buf,2))) {
  154. printk(KERN_WARNING "or51132: load_firmware error c\n");
  155. return ret;
  156. }
  157. for(i=0;i<4;i++) {
  158. msleep(20); /* 20ms */
  159. /* Once upon a time, this command might have had something
  160. to do with getting the firmware version, but it's
  161. not used anymore:
  162. {0x04,0x00,0x30,0x00,i+1} */
  163. /* Read 8 bytes, two bytes at a time */
  164. if ((ret = i2c_readbytes(state,state->config->demod_address,
  165. &rec_buf[i*2],2))) {
  166. printk(KERN_WARNING
  167. "or51132: load_firmware error d - %d\n",i);
  168. return ret;
  169. }
  170. }
  171. printk(KERN_WARNING
  172. "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
  173. rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
  174. rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
  175. rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
  176. rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
  177. cmd_buf[0] = 0x10;
  178. cmd_buf[1] = 0x00;
  179. cmd_buf[2] = 0x00;
  180. msleep(20); /* 20ms */
  181. if ((ret = i2c_writebytes(state,state->config->demod_address,
  182. cmd_buf,3))) {
  183. printk(KERN_WARNING "or51132: load_firmware error e\n");
  184. return ret;
  185. }
  186. return 0;
  187. };
  188. static int or51132_init(struct dvb_frontend* fe)
  189. {
  190. return 0;
  191. }
  192. static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
  193. {
  194. *ber = 0;
  195. return 0;
  196. }
  197. static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  198. {
  199. *ucblocks = 0;
  200. return 0;
  201. }
  202. static int or51132_sleep(struct dvb_frontend* fe)
  203. {
  204. return 0;
  205. }
  206. static int or51132_setmode(struct dvb_frontend* fe)
  207. {
  208. struct or51132_state* state = fe->demodulator_priv;
  209. unsigned char cmd_buf[3];
  210. dprintk("setmode %d\n",(int)state->current_modulation);
  211. /* set operation mode in Receiver 1 register; */
  212. cmd_buf[0] = 0x04;
  213. cmd_buf[1] = 0x01;
  214. switch (state->current_modulation) {
  215. case QAM_256:
  216. case QAM_64:
  217. case QAM_AUTO:
  218. /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
  219. cmd_buf[2] = 0x5F;
  220. break;
  221. case VSB_8:
  222. /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
  223. cmd_buf[2] = 0x50;
  224. break;
  225. default:
  226. printk("setmode:Modulation set to unsupported value\n");
  227. };
  228. if (i2c_writebytes(state,state->config->demod_address,
  229. cmd_buf,3)) {
  230. printk(KERN_WARNING "or51132: set_mode error 1\n");
  231. return -1;
  232. }
  233. dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
  234. /* Set operation mode in Receiver 6 register */
  235. cmd_buf[0] = 0x1C;
  236. switch (state->current_modulation) {
  237. case QAM_AUTO:
  238. /* REC MODE Normal Carrier Lock */
  239. cmd_buf[1] = 0x00;
  240. /* Channel MODE Auto QAM64/256 */
  241. cmd_buf[2] = 0x4f;
  242. break;
  243. case QAM_256:
  244. /* REC MODE Normal Carrier Lock */
  245. cmd_buf[1] = 0x00;
  246. /* Channel MODE QAM256 */
  247. cmd_buf[2] = 0x45;
  248. break;
  249. case QAM_64:
  250. /* REC MODE Normal Carrier Lock */
  251. cmd_buf[1] = 0x00;
  252. /* Channel MODE QAM64 */
  253. cmd_buf[2] = 0x43;
  254. break;
  255. case VSB_8:
  256. /* REC MODE inv IF spectrum, Normal */
  257. cmd_buf[1] = 0x03;
  258. /* Channel MODE ATSC/VSB8 */
  259. cmd_buf[2] = 0x06;
  260. break;
  261. default:
  262. printk("setmode: Modulation set to unsupported value\n");
  263. };
  264. msleep(20); /* 20ms */
  265. if (i2c_writebytes(state,state->config->demod_address,
  266. cmd_buf,3)) {
  267. printk(KERN_WARNING "or51132: set_mode error 2\n");
  268. return -1;
  269. }
  270. dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
  271. return 0;
  272. }
  273. /* Some modulations use the same firmware. This classifies modulations
  274. by the firmware they use. */
  275. #define MOD_FWCLASS_UNKNOWN 0
  276. #define MOD_FWCLASS_VSB 1
  277. #define MOD_FWCLASS_QAM 2
  278. static int modulation_fw_class(fe_modulation_t modulation)
  279. {
  280. switch(modulation) {
  281. case VSB_8:
  282. return MOD_FWCLASS_VSB;
  283. case QAM_AUTO:
  284. case QAM_64:
  285. case QAM_256:
  286. return MOD_FWCLASS_QAM;
  287. default:
  288. return MOD_FWCLASS_UNKNOWN;
  289. }
  290. }
  291. static int or51132_set_parameters(struct dvb_frontend* fe,
  292. struct dvb_frontend_parameters *param)
  293. {
  294. int ret;
  295. struct or51132_state* state = fe->demodulator_priv;
  296. const struct firmware *fw;
  297. const char *fwname;
  298. int clock_mode;
  299. /* Upload new firmware only if we need a different one */
  300. if (modulation_fw_class(state->current_modulation) !=
  301. modulation_fw_class(param->u.vsb.modulation)) {
  302. switch(modulation_fw_class(param->u.vsb.modulation)) {
  303. case MOD_FWCLASS_VSB:
  304. dprintk("set_parameters VSB MODE\n");
  305. fwname = OR51132_VSB_FIRMWARE;
  306. /* Set non-punctured clock for VSB */
  307. clock_mode = 0;
  308. break;
  309. case MOD_FWCLASS_QAM:
  310. dprintk("set_parameters QAM MODE\n");
  311. fwname = OR51132_QAM_FIRMWARE;
  312. /* Set punctured clock for QAM */
  313. clock_mode = 1;
  314. break;
  315. default:
  316. printk("or51132: Modulation type(%d) UNSUPPORTED\n",
  317. param->u.vsb.modulation);
  318. return -1;
  319. }
  320. printk("or51132: Waiting for firmware upload(%s)...\n",
  321. fwname);
  322. ret = request_firmware(&fw, fwname, &state->i2c->dev);
  323. if (ret) {
  324. printk(KERN_WARNING "or51132: No firmware up"
  325. "loaded(timeout or file not found?)\n");
  326. return ret;
  327. }
  328. ret = or51132_load_firmware(fe, fw);
  329. release_firmware(fw);
  330. if (ret) {
  331. printk(KERN_WARNING "or51132: Writing firmware to "
  332. "device failed!\n");
  333. return ret;
  334. }
  335. printk("or51132: Firmware upload complete.\n");
  336. state->config->set_ts_params(fe, clock_mode);
  337. }
  338. /* Change only if we are actually changing the modulation */
  339. if (state->current_modulation != param->u.vsb.modulation) {
  340. state->current_modulation = param->u.vsb.modulation;
  341. or51132_setmode(fe);
  342. }
  343. if (fe->ops.tuner_ops.set_params) {
  344. fe->ops.tuner_ops.set_params(fe, param);
  345. if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
  346. }
  347. /* Set to current mode */
  348. or51132_setmode(fe);
  349. /* Update current frequency */
  350. state->current_frequency = param->frequency;
  351. return 0;
  352. }
  353. static int or51132_get_parameters(struct dvb_frontend* fe,
  354. struct dvb_frontend_parameters *param)
  355. {
  356. struct or51132_state* state = fe->demodulator_priv;
  357. u8 buf[2];
  358. /* Receiver Status */
  359. buf[0]=0x04;
  360. buf[1]=0x00;
  361. msleep(30); /* 30ms */
  362. if (i2c_writebytes(state,state->config->demod_address,buf,2)) {
  363. printk(KERN_WARNING "or51132: get_parameters write error\n");
  364. return -EREMOTEIO;
  365. }
  366. msleep(30); /* 30ms */
  367. if (i2c_readbytes(state,state->config->demod_address,buf,2)) {
  368. printk(KERN_WARNING "or51132: get_parameters read error\n");
  369. return -EREMOTEIO;
  370. }
  371. switch(buf[0]) {
  372. case 0x06: param->u.vsb.modulation = VSB_8; break;
  373. case 0x43: param->u.vsb.modulation = QAM_64; break;
  374. case 0x45: param->u.vsb.modulation = QAM_256; break;
  375. default:
  376. printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
  377. buf[0]);
  378. return -EREMOTEIO;
  379. }
  380. /* FIXME: Read frequency from frontend, take AFC into account */
  381. param->frequency = state->current_frequency;
  382. /* FIXME: How to read inversion setting? Receiver 6 register? */
  383. param->inversion = INVERSION_AUTO;
  384. return 0;
  385. }
  386. static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
  387. {
  388. struct or51132_state* state = fe->demodulator_priv;
  389. unsigned char rec_buf[2];
  390. unsigned char snd_buf[2];
  391. *status = 0;
  392. /* Receiver Status */
  393. snd_buf[0]=0x04;
  394. snd_buf[1]=0x00;
  395. msleep(30); /* 30ms */
  396. if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
  397. printk(KERN_WARNING "or51132: read_status write error\n");
  398. return -1;
  399. }
  400. msleep(30); /* 30ms */
  401. if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
  402. printk(KERN_WARNING "or51132: read_status read error\n");
  403. return -1;
  404. }
  405. dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
  406. if (rec_buf[1] & 0x01) { /* Receiver Lock */
  407. *status |= FE_HAS_SIGNAL;
  408. *status |= FE_HAS_CARRIER;
  409. *status |= FE_HAS_VITERBI;
  410. *status |= FE_HAS_SYNC;
  411. *status |= FE_HAS_LOCK;
  412. }
  413. return 0;
  414. }
  415. /* Calculate SNR estimation (scaled by 2^24)
  416. 8-VSB SNR and QAM equations from Oren datasheets
  417. For 8-VSB:
  418. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 ) - K
  419. Where K = 0 if NTSC rejection filter is OFF; and
  420. K = 3 if NTSC rejection filter is ON
  421. For QAM64:
  422. SNR[dB] = 10 * log10(897152044.8282 / MSE^2 )
  423. For QAM256:
  424. SNR[dB] = 10 * log10(907832426.314266 / MSE^2 )
  425. We re-write the snr equation as:
  426. SNR * 2^24 = 10*(c - 2*intlog10(MSE))
  427. Where for QAM256, c = log10(907832426.314266) * 2^24
  428. and for 8-VSB and QAM64, c = log10(897152044.8282) * 2^24 */
  429. static u32 calculate_snr(u32 mse, u32 c)
  430. {
  431. if (mse == 0) /* No signal */
  432. return 0;
  433. mse = 2*intlog10(mse);
  434. if (mse > c) {
  435. /* Negative SNR, which is possible, but realisticly the
  436. demod will lose lock before the signal gets this bad. The
  437. API only allows for unsigned values, so just return 0 */
  438. return 0;
  439. }
  440. return 10*(c - mse);
  441. }
  442. static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
  443. {
  444. struct or51132_state* state = fe->demodulator_priv;
  445. u8 rec_buf[2];
  446. u8 snd_buf[2];
  447. u32 noise;
  448. u32 c;
  449. u32 usK;
  450. /* Register is same for VSB or QAM firmware */
  451. snd_buf[0]=0x04;
  452. snd_buf[1]=0x02; /* SNR after Equalizer */
  453. msleep(30); /* 30ms */
  454. if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
  455. printk(KERN_WARNING "or51132: snr write error\n");
  456. return -EREMOTEIO;
  457. }
  458. msleep(30); /* 30ms */
  459. if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
  460. printk(KERN_WARNING "or51132: snr read error\n");
  461. return -EREMOTEIO;
  462. }
  463. noise = rec_buf[0] | (rec_buf[1] << 8);
  464. dprintk("read_snr noise %x %x (%i)\n",rec_buf[0],rec_buf[1],noise);
  465. /* Read status, contains modulation type for QAM_AUTO and
  466. NTSC filter for VSB */
  467. snd_buf[0]=0x04;
  468. snd_buf[1]=0x00; /* Status register */
  469. msleep(30); /* 30ms */
  470. if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
  471. printk(KERN_WARNING "or51132: status write error\n");
  472. return -EREMOTEIO;
  473. }
  474. msleep(30); /* 30ms */
  475. if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
  476. printk(KERN_WARNING "or51132: status read error\n");
  477. return -EREMOTEIO;
  478. }
  479. usK = 0;
  480. switch (rec_buf[0]) {
  481. case 0x06:
  482. usK = (rec_buf[1] & 0x10) ? 0x03000000 : 0;
  483. /* Fall through to QAM64 case */
  484. case 0x43:
  485. c = 150204167;
  486. break;
  487. case 0x45:
  488. c = 150290396;
  489. break;
  490. default:
  491. printk(KERN_ERR "or51132: unknown status 0x%02x\n", rec_buf[0]);
  492. return -EREMOTEIO;
  493. }
  494. dprintk("%s: modulation %02x, NTSC rej O%s\n", __FUNCTION__,
  495. rec_buf[0], rec_buf[1]&0x10?"n":"ff");
  496. /* Calculate SNR using noise, c, and NTSC rejection correction */
  497. state->snr = calculate_snr(noise, c) - usK;
  498. *snr = (state->snr) >> 16;
  499. dprintk("%s: noise = 0x%08x, snr = %d.%02d dB\n", __FUNCTION__, noise,
  500. state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16);
  501. return 0;
  502. }
  503. static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  504. {
  505. /* Calculate Strength from SNR up to 35dB */
  506. /* Even though the SNR can go higher than 35dB, there is some comfort */
  507. /* factor in having a range of strong signals that can show at 100% */
  508. struct or51132_state* state = (struct or51132_state*) fe->demodulator_priv;
  509. u16 snr;
  510. int ret;
  511. ret = fe->ops.read_snr(fe, &snr);
  512. if (ret != 0)
  513. return ret;
  514. /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
  515. /* scale the range 0 - 35*2^24 into 0 - 65535 */
  516. if (state->snr >= 8960 * 0x10000)
  517. *strength = 0xffff;
  518. else
  519. *strength = state->snr / 8960;
  520. return 0;
  521. }
  522. static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  523. {
  524. fe_tune_settings->min_delay_ms = 500;
  525. fe_tune_settings->step_size = 0;
  526. fe_tune_settings->max_drift = 0;
  527. return 0;
  528. }
  529. static void or51132_release(struct dvb_frontend* fe)
  530. {
  531. struct or51132_state* state = fe->demodulator_priv;
  532. kfree(state);
  533. }
  534. static struct dvb_frontend_ops or51132_ops;
  535. struct dvb_frontend* or51132_attach(const struct or51132_config* config,
  536. struct i2c_adapter* i2c)
  537. {
  538. struct or51132_state* state = NULL;
  539. /* Allocate memory for the internal state */
  540. state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
  541. if (state == NULL)
  542. goto error;
  543. /* Setup the state */
  544. state->config = config;
  545. state->i2c = i2c;
  546. state->current_frequency = -1;
  547. state->current_modulation = -1;
  548. /* Create dvb_frontend */
  549. memcpy(&state->frontend.ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
  550. state->frontend.demodulator_priv = state;
  551. return &state->frontend;
  552. error:
  553. kfree(state);
  554. return NULL;
  555. }
  556. static struct dvb_frontend_ops or51132_ops = {
  557. .info = {
  558. .name = "Oren OR51132 VSB/QAM Frontend",
  559. .type = FE_ATSC,
  560. .frequency_min = 44000000,
  561. .frequency_max = 958000000,
  562. .frequency_stepsize = 166666,
  563. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  564. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  565. FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
  566. FE_CAN_8VSB
  567. },
  568. .release = or51132_release,
  569. .init = or51132_init,
  570. .sleep = or51132_sleep,
  571. .set_frontend = or51132_set_parameters,
  572. .get_frontend = or51132_get_parameters,
  573. .get_tune_settings = or51132_get_tune_settings,
  574. .read_status = or51132_read_status,
  575. .read_ber = or51132_read_ber,
  576. .read_signal_strength = or51132_read_signal_strength,
  577. .read_snr = or51132_read_snr,
  578. .read_ucblocks = or51132_read_ucblocks,
  579. };
  580. module_param(debug, int, 0644);
  581. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  582. MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
  583. MODULE_AUTHOR("Kirk Lapray");
  584. MODULE_LICENSE("GPL");
  585. EXPORT_SYMBOL(or51132_attach);
  586. /*
  587. * Local variables:
  588. * c-basic-offset: 8
  589. * End:
  590. */