ucb1400_ts.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579
  1. /*
  2. * Philips UCB1400 touchscreen driver
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: September 25, 2006
  6. * Copyright: MontaVista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
  13. * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
  14. * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/init.h>
  19. #include <linux/completion.h>
  20. #include <linux/delay.h>
  21. #include <linux/input.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/suspend.h>
  25. #include <linux/slab.h>
  26. #include <linux/kthread.h>
  27. #include <linux/freezer.h>
  28. #include <sound/driver.h>
  29. #include <sound/core.h>
  30. #include <sound/ac97_codec.h>
  31. /*
  32. * Interesting UCB1400 AC-link registers
  33. */
  34. #define UCB_IE_RIS 0x5e
  35. #define UCB_IE_FAL 0x60
  36. #define UCB_IE_STATUS 0x62
  37. #define UCB_IE_CLEAR 0x62
  38. #define UCB_IE_ADC (1 << 11)
  39. #define UCB_IE_TSPX (1 << 12)
  40. #define UCB_TS_CR 0x64
  41. #define UCB_TS_CR_TSMX_POW (1 << 0)
  42. #define UCB_TS_CR_TSPX_POW (1 << 1)
  43. #define UCB_TS_CR_TSMY_POW (1 << 2)
  44. #define UCB_TS_CR_TSPY_POW (1 << 3)
  45. #define UCB_TS_CR_TSMX_GND (1 << 4)
  46. #define UCB_TS_CR_TSPX_GND (1 << 5)
  47. #define UCB_TS_CR_TSMY_GND (1 << 6)
  48. #define UCB_TS_CR_TSPY_GND (1 << 7)
  49. #define UCB_TS_CR_MODE_INT (0 << 8)
  50. #define UCB_TS_CR_MODE_PRES (1 << 8)
  51. #define UCB_TS_CR_MODE_POS (2 << 8)
  52. #define UCB_TS_CR_BIAS_ENA (1 << 11)
  53. #define UCB_TS_CR_TSPX_LOW (1 << 12)
  54. #define UCB_TS_CR_TSMX_LOW (1 << 13)
  55. #define UCB_ADC_CR 0x66
  56. #define UCB_ADC_SYNC_ENA (1 << 0)
  57. #define UCB_ADC_VREFBYP_CON (1 << 1)
  58. #define UCB_ADC_INP_TSPX (0 << 2)
  59. #define UCB_ADC_INP_TSMX (1 << 2)
  60. #define UCB_ADC_INP_TSPY (2 << 2)
  61. #define UCB_ADC_INP_TSMY (3 << 2)
  62. #define UCB_ADC_INP_AD0 (4 << 2)
  63. #define UCB_ADC_INP_AD1 (5 << 2)
  64. #define UCB_ADC_INP_AD2 (6 << 2)
  65. #define UCB_ADC_INP_AD3 (7 << 2)
  66. #define UCB_ADC_EXT_REF (1 << 5)
  67. #define UCB_ADC_START (1 << 7)
  68. #define UCB_ADC_ENA (1 << 15)
  69. #define UCB_ADC_DATA 0x68
  70. #define UCB_ADC_DAT_VALID (1 << 15)
  71. #define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff)
  72. #define UCB_ID 0x7e
  73. #define UCB_ID_1400 0x4304
  74. struct ucb1400 {
  75. struct snd_ac97 *ac97;
  76. struct input_dev *ts_idev;
  77. int irq;
  78. wait_queue_head_t ts_wait;
  79. struct task_struct *ts_task;
  80. unsigned int irq_pending; /* not bit field shared */
  81. unsigned int ts_restart:1;
  82. unsigned int adcsync:1;
  83. };
  84. static int adcsync;
  85. static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg)
  86. {
  87. return ucb->ac97->bus->ops->read(ucb->ac97, reg);
  88. }
  89. static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val)
  90. {
  91. ucb->ac97->bus->ops->write(ucb->ac97, reg, val);
  92. }
  93. static inline void ucb1400_adc_enable(struct ucb1400 *ucb)
  94. {
  95. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
  96. }
  97. static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel)
  98. {
  99. unsigned int val;
  100. if (ucb->adcsync)
  101. adc_channel |= UCB_ADC_SYNC_ENA;
  102. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel);
  103. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START);
  104. for (;;) {
  105. val = ucb1400_reg_read(ucb, UCB_ADC_DATA);
  106. if (val & UCB_ADC_DAT_VALID)
  107. break;
  108. /* yield to other processes */
  109. set_current_state(TASK_INTERRUPTIBLE);
  110. schedule_timeout(1);
  111. }
  112. return UCB_ADC_DAT_VALUE(val);
  113. }
  114. static inline void ucb1400_adc_disable(struct ucb1400 *ucb)
  115. {
  116. ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
  117. }
  118. /* Switch to interrupt mode. */
  119. static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb)
  120. {
  121. ucb1400_reg_write(ucb, UCB_TS_CR,
  122. UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
  123. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
  124. UCB_TS_CR_MODE_INT);
  125. }
  126. /*
  127. * Switch to pressure mode, and read pressure. We don't need to wait
  128. * here, since both plates are being driven.
  129. */
  130. static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb)
  131. {
  132. ucb1400_reg_write(ucb, UCB_TS_CR,
  133. UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
  134. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
  135. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  136. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
  137. }
  138. /*
  139. * Switch to X position mode and measure Y plate. We switch the plate
  140. * configuration in pressure mode, then switch to position mode. This
  141. * gives a faster response time. Even so, we need to wait about 55us
  142. * for things to stabilise.
  143. */
  144. static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb)
  145. {
  146. ucb1400_reg_write(ucb, UCB_TS_CR,
  147. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  148. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  149. ucb1400_reg_write(ucb, UCB_TS_CR,
  150. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  151. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  152. ucb1400_reg_write(ucb, UCB_TS_CR,
  153. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  154. UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
  155. udelay(55);
  156. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY);
  157. }
  158. /*
  159. * Switch to Y position mode and measure X plate. We switch the plate
  160. * configuration in pressure mode, then switch to position mode. This
  161. * gives a faster response time. Even so, we need to wait about 55us
  162. * for things to stabilise.
  163. */
  164. static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb)
  165. {
  166. ucb1400_reg_write(ucb, UCB_TS_CR,
  167. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  168. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  169. ucb1400_reg_write(ucb, UCB_TS_CR,
  170. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  171. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  172. ucb1400_reg_write(ucb, UCB_TS_CR,
  173. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  174. UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
  175. udelay(55);
  176. return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX);
  177. }
  178. /*
  179. * Switch to X plate resistance mode. Set MX to ground, PX to
  180. * supply. Measure current.
  181. */
  182. static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb)
  183. {
  184. ucb1400_reg_write(ucb, UCB_TS_CR,
  185. UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  186. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  187. return ucb1400_adc_read(ucb, 0);
  188. }
  189. /*
  190. * Switch to Y plate resistance mode. Set MY to ground, PY to
  191. * supply. Measure current.
  192. */
  193. static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb)
  194. {
  195. ucb1400_reg_write(ucb, UCB_TS_CR,
  196. UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  197. UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  198. return ucb1400_adc_read(ucb, 0);
  199. }
  200. static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb)
  201. {
  202. unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR);
  203. return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
  204. }
  205. static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb)
  206. {
  207. ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX);
  208. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  209. ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX);
  210. }
  211. static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb)
  212. {
  213. ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
  214. }
  215. static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
  216. {
  217. input_report_abs(idev, ABS_X, x);
  218. input_report_abs(idev, ABS_Y, y);
  219. input_report_abs(idev, ABS_PRESSURE, pressure);
  220. input_sync(idev);
  221. }
  222. static void ucb1400_ts_event_release(struct input_dev *idev)
  223. {
  224. input_report_abs(idev, ABS_PRESSURE, 0);
  225. input_sync(idev);
  226. }
  227. static void ucb1400_handle_pending_irq(struct ucb1400 *ucb)
  228. {
  229. unsigned int isr;
  230. isr = ucb1400_reg_read(ucb, UCB_IE_STATUS);
  231. ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr);
  232. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  233. if (isr & UCB_IE_TSPX)
  234. ucb1400_ts_irq_disable(ucb);
  235. else
  236. printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
  237. enable_irq(ucb->irq);
  238. }
  239. static int ucb1400_ts_thread(void *_ucb)
  240. {
  241. struct ucb1400 *ucb = _ucb;
  242. struct task_struct *tsk = current;
  243. int valid = 0;
  244. tsk->policy = SCHED_FIFO;
  245. tsk->rt_priority = 1;
  246. while (!kthread_should_stop()) {
  247. unsigned int x, y, p;
  248. long timeout;
  249. ucb->ts_restart = 0;
  250. if (ucb->irq_pending) {
  251. ucb->irq_pending = 0;
  252. ucb1400_handle_pending_irq(ucb);
  253. }
  254. ucb1400_adc_enable(ucb);
  255. x = ucb1400_ts_read_xpos(ucb);
  256. y = ucb1400_ts_read_ypos(ucb);
  257. p = ucb1400_ts_read_pressure(ucb);
  258. ucb1400_adc_disable(ucb);
  259. /* Switch back to interrupt mode. */
  260. ucb1400_ts_mode_int(ucb);
  261. msleep(10);
  262. if (ucb1400_ts_pen_down(ucb)) {
  263. ucb1400_ts_irq_enable(ucb);
  264. /*
  265. * If we spat out a valid sample set last time,
  266. * spit out a "pen off" sample here.
  267. */
  268. if (valid) {
  269. ucb1400_ts_event_release(ucb->ts_idev);
  270. valid = 0;
  271. }
  272. timeout = MAX_SCHEDULE_TIMEOUT;
  273. } else {
  274. valid = 1;
  275. ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
  276. timeout = msecs_to_jiffies(10);
  277. }
  278. wait_event_interruptible_timeout(ucb->ts_wait,
  279. ucb->irq_pending || ucb->ts_restart || kthread_should_stop(),
  280. timeout);
  281. try_to_freeze();
  282. }
  283. /* Send the "pen off" if we are stopping with the pen still active */
  284. if (valid)
  285. ucb1400_ts_event_release(ucb->ts_idev);
  286. ucb->ts_task = NULL;
  287. return 0;
  288. }
  289. /*
  290. * A restriction with interrupts exists when using the ucb1400, as
  291. * the codec read/write routines may sleep while waiting for codec
  292. * access completion and uses semaphores for access control to the
  293. * AC97 bus. A complete codec read cycle could take anywhere from
  294. * 60 to 100uSec so we *definitely* don't want to spin inside the
  295. * interrupt handler waiting for codec access. So, we handle the
  296. * interrupt by scheduling a RT kernel thread to run in process
  297. * context instead of interrupt context.
  298. */
  299. static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
  300. {
  301. struct ucb1400 *ucb = devid;
  302. if (irqnr == ucb->irq) {
  303. disable_irq(ucb->irq);
  304. ucb->irq_pending = 1;
  305. wake_up(&ucb->ts_wait);
  306. return IRQ_HANDLED;
  307. }
  308. return IRQ_NONE;
  309. }
  310. static int ucb1400_ts_open(struct input_dev *idev)
  311. {
  312. struct ucb1400 *ucb = idev->private;
  313. int ret = 0;
  314. BUG_ON(ucb->ts_task);
  315. ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
  316. if (IS_ERR(ucb->ts_task)) {
  317. ret = PTR_ERR(ucb->ts_task);
  318. ucb->ts_task = NULL;
  319. }
  320. return ret;
  321. }
  322. static void ucb1400_ts_close(struct input_dev *idev)
  323. {
  324. struct ucb1400 *ucb = idev->private;
  325. if (ucb->ts_task)
  326. kthread_stop(ucb->ts_task);
  327. ucb1400_ts_irq_disable(ucb);
  328. ucb1400_reg_write(ucb, UCB_TS_CR, 0);
  329. }
  330. #ifdef CONFIG_PM
  331. static int ucb1400_ts_resume(struct device *dev)
  332. {
  333. struct ucb1400 *ucb = dev_get_drvdata(dev);
  334. if (ucb->ts_task) {
  335. /*
  336. * Restart the TS thread to ensure the
  337. * TS interrupt mode is set up again
  338. * after sleep.
  339. */
  340. ucb->ts_restart = 1;
  341. wake_up(&ucb->ts_wait);
  342. }
  343. return 0;
  344. }
  345. #else
  346. #define ucb1400_ts_resume NULL
  347. #endif
  348. #ifndef NO_IRQ
  349. #define NO_IRQ 0
  350. #endif
  351. /*
  352. * Try to probe our interrupt, rather than relying on lots of
  353. * hard-coded machine dependencies.
  354. */
  355. static int ucb1400_detect_irq(struct ucb1400 *ucb)
  356. {
  357. unsigned long mask, timeout;
  358. mask = probe_irq_on();
  359. if (!mask) {
  360. probe_irq_off(mask);
  361. return -EBUSY;
  362. }
  363. /* Enable the ADC interrupt. */
  364. ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC);
  365. ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC);
  366. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  367. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  368. /* Cause an ADC interrupt. */
  369. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA);
  370. ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
  371. /* Wait for the conversion to complete. */
  372. timeout = jiffies + HZ/2;
  373. while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) {
  374. cpu_relax();
  375. if (time_after(jiffies, timeout)) {
  376. printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
  377. probe_irq_off(mask);
  378. return -ENODEV;
  379. }
  380. }
  381. ucb1400_reg_write(ucb, UCB_ADC_CR, 0);
  382. /* Disable and clear interrupt. */
  383. ucb1400_reg_write(ucb, UCB_IE_RIS, 0);
  384. ucb1400_reg_write(ucb, UCB_IE_FAL, 0);
  385. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff);
  386. ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0);
  387. /* Read triggered interrupt. */
  388. ucb->irq = probe_irq_off(mask);
  389. if (ucb->irq < 0 || ucb->irq == NO_IRQ)
  390. return -ENODEV;
  391. return 0;
  392. }
  393. static int ucb1400_ts_probe(struct device *dev)
  394. {
  395. struct ucb1400 *ucb;
  396. struct input_dev *idev;
  397. int error, id, x_res, y_res;
  398. ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL);
  399. idev = input_allocate_device();
  400. if (!ucb || !idev) {
  401. error = -ENOMEM;
  402. goto err_free_devs;
  403. }
  404. ucb->ts_idev = idev;
  405. ucb->adcsync = adcsync;
  406. ucb->ac97 = to_ac97_t(dev);
  407. init_waitqueue_head(&ucb->ts_wait);
  408. id = ucb1400_reg_read(ucb, UCB_ID);
  409. if (id != UCB_ID_1400) {
  410. error = -ENODEV;
  411. goto err_free_devs;
  412. }
  413. error = ucb1400_detect_irq(ucb);
  414. if (error) {
  415. printk(KERN_ERR "UCB1400: IRQ probe failed\n");
  416. goto err_free_devs;
  417. }
  418. error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
  419. "UCB1400", ucb);
  420. if (error) {
  421. printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
  422. ucb->irq, error);
  423. goto err_free_devs;
  424. }
  425. printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
  426. idev->private = ucb;
  427. idev->cdev.dev = dev;
  428. idev->name = "UCB1400 touchscreen interface";
  429. idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1);
  430. idev->id.product = id;
  431. idev->open = ucb1400_ts_open;
  432. idev->close = ucb1400_ts_close;
  433. idev->evbit[0] = BIT(EV_ABS);
  434. ucb1400_adc_enable(ucb);
  435. x_res = ucb1400_ts_read_xres(ucb);
  436. y_res = ucb1400_ts_read_yres(ucb);
  437. ucb1400_adc_disable(ucb);
  438. printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
  439. input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0);
  440. input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0);
  441. input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0);
  442. error = input_register_device(idev);
  443. if (error)
  444. goto err_free_irq;
  445. dev_set_drvdata(dev, ucb);
  446. return 0;
  447. err_free_irq:
  448. free_irq(ucb->irq, ucb);
  449. err_free_devs:
  450. input_free_device(idev);
  451. kfree(ucb);
  452. return error;
  453. }
  454. static int ucb1400_ts_remove(struct device *dev)
  455. {
  456. struct ucb1400 *ucb = dev_get_drvdata(dev);
  457. free_irq(ucb->irq, ucb);
  458. input_unregister_device(ucb->ts_idev);
  459. dev_set_drvdata(dev, NULL);
  460. kfree(ucb);
  461. return 0;
  462. }
  463. static struct device_driver ucb1400_ts_driver = {
  464. .owner = THIS_MODULE,
  465. .bus = &ac97_bus_type,
  466. .probe = ucb1400_ts_probe,
  467. .remove = ucb1400_ts_remove,
  468. .resume = ucb1400_ts_resume,
  469. };
  470. static int __init ucb1400_ts_init(void)
  471. {
  472. return driver_register(&ucb1400_ts_driver);
  473. }
  474. static void __exit ucb1400_ts_exit(void)
  475. {
  476. driver_unregister(&ucb1400_ts_driver);
  477. }
  478. module_param(adcsync, int, 0444);
  479. module_init(ucb1400_ts_init);
  480. module_exit(ucb1400_ts_exit);
  481. MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
  482. MODULE_LICENSE("GPL");