it8213.c 8.5 KB

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  1. /*
  2. * ITE 8213 IDE driver
  3. *
  4. * Copyright (C) 2006 Jack Lee
  5. * Copyright (C) 2006 Alan Cox
  6. * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/types.h>
  10. #include <linux/module.h>
  11. #include <linux/pci.h>
  12. #include <linux/delay.h>
  13. #include <linux/hdreg.h>
  14. #include <linux/ide.h>
  15. #include <linux/init.h>
  16. #include <asm/io.h>
  17. /*
  18. * it8213_ratemask - Compute available modes
  19. * @drive: IDE drive
  20. *
  21. * Compute the available speeds for the devices on the interface. This
  22. * is all modes to ATA133 clipped by drive cable setup.
  23. */
  24. static u8 it8213_ratemask (ide_drive_t *drive)
  25. {
  26. u8 mode = 4;
  27. if (!eighty_ninty_three(drive))
  28. mode = min_t(u8, mode, 1);
  29. return mode;
  30. }
  31. /**
  32. * it8213_dma_2_pio - return the PIO mode matching DMA
  33. * @xfer_rate: transfer speed
  34. *
  35. * Returns the nearest equivalent PIO timing for the PIO or DMA
  36. * mode requested by the controller.
  37. */
  38. static u8 it8213_dma_2_pio (u8 xfer_rate) {
  39. switch(xfer_rate) {
  40. case XFER_UDMA_6:
  41. case XFER_UDMA_5:
  42. case XFER_UDMA_4:
  43. case XFER_UDMA_3:
  44. case XFER_UDMA_2:
  45. case XFER_UDMA_1:
  46. case XFER_UDMA_0:
  47. case XFER_MW_DMA_2:
  48. case XFER_PIO_4:
  49. return 4;
  50. case XFER_MW_DMA_1:
  51. case XFER_PIO_3:
  52. return 3;
  53. case XFER_SW_DMA_2:
  54. case XFER_PIO_2:
  55. return 2;
  56. case XFER_MW_DMA_0:
  57. case XFER_SW_DMA_1:
  58. case XFER_SW_DMA_0:
  59. case XFER_PIO_1:
  60. case XFER_PIO_0:
  61. case XFER_PIO_SLOW:
  62. default:
  63. return 0;
  64. }
  65. }
  66. /*
  67. * it8213_tuneproc - tune a drive
  68. * @drive: drive to tune
  69. * @pio: desired PIO mode
  70. *
  71. * Set the interface PIO mode.
  72. */
  73. static void it8213_tuneproc (ide_drive_t *drive, u8 pio)
  74. {
  75. ide_hwif_t *hwif = HWIF(drive);
  76. struct pci_dev *dev = hwif->pci_dev;
  77. int is_slave = drive->dn & 1;
  78. int master_port = 0x40;
  79. int slave_port = 0x44;
  80. unsigned long flags;
  81. u16 master_data;
  82. u8 slave_data;
  83. static DEFINE_SPINLOCK(tune_lock);
  84. int control = 0;
  85. static const u8 timings[][2]= {
  86. { 0, 0 },
  87. { 0, 0 },
  88. { 1, 0 },
  89. { 2, 1 },
  90. { 2, 3 }, };
  91. pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
  92. spin_lock_irqsave(&tune_lock, flags);
  93. pci_read_config_word(dev, master_port, &master_data);
  94. if (pio > 1)
  95. control |= 1; /* Programmable timing on */
  96. if (drive->media != ide_disk)
  97. control |= 4; /* ATAPI */
  98. if (pio > 2)
  99. control |= 2; /* IORDY */
  100. if (is_slave) {
  101. master_data |= 0x4000;
  102. master_data &= ~0x0070;
  103. if (pio > 1)
  104. master_data = master_data | (control << 4);
  105. pci_read_config_byte(dev, slave_port, &slave_data);
  106. slave_data = slave_data & 0xf0;
  107. slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
  108. } else {
  109. master_data &= ~0x3307;
  110. if (pio > 1)
  111. master_data = master_data | control;
  112. master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
  113. }
  114. pci_write_config_word(dev, master_port, master_data);
  115. if (is_slave)
  116. pci_write_config_byte(dev, slave_port, slave_data);
  117. spin_unlock_irqrestore(&tune_lock, flags);
  118. }
  119. /**
  120. * it8213_tune_chipset - set controller timings
  121. * @drive: Drive to set up
  122. * @xferspeed: speed we want to achieve
  123. *
  124. * Tune the ITE chipset for the desired mode. If we can't achieve
  125. * the desired mode then tune for a lower one, but ultimately
  126. * make the thing work.
  127. */
  128. static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
  129. {
  130. ide_hwif_t *hwif = HWIF(drive);
  131. struct pci_dev *dev = hwif->pci_dev;
  132. u8 maslave = 0x40;
  133. u8 speed = ide_rate_filter(it8213_ratemask(drive), xferspeed);
  134. int a_speed = 3 << (drive->dn * 4);
  135. int u_flag = 1 << drive->dn;
  136. int v_flag = 0x01 << drive->dn;
  137. int w_flag = 0x10 << drive->dn;
  138. int u_speed = 0;
  139. u16 reg4042, reg4a;
  140. u8 reg48, reg54, reg55;
  141. pci_read_config_word(dev, maslave, &reg4042);
  142. pci_read_config_byte(dev, 0x48, &reg48);
  143. pci_read_config_word(dev, 0x4a, &reg4a);
  144. pci_read_config_byte(dev, 0x54, &reg54);
  145. pci_read_config_byte(dev, 0x55, &reg55);
  146. switch(speed) {
  147. case XFER_UDMA_6:
  148. case XFER_UDMA_4:
  149. case XFER_UDMA_2: u_speed = 2 << (drive->dn * 4); break;
  150. case XFER_UDMA_5:
  151. case XFER_UDMA_3:
  152. case XFER_UDMA_1: u_speed = 1 << (drive->dn * 4); break;
  153. case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
  154. break;
  155. case XFER_MW_DMA_2:
  156. case XFER_MW_DMA_1:
  157. case XFER_SW_DMA_2:
  158. break;
  159. case XFER_PIO_4:
  160. case XFER_PIO_3:
  161. case XFER_PIO_2:
  162. case XFER_PIO_1:
  163. case XFER_PIO_0:
  164. break;
  165. default:
  166. return -1;
  167. }
  168. if (speed >= XFER_UDMA_0) {
  169. if (!(reg48 & u_flag))
  170. pci_write_config_byte(dev, 0x48, reg48 | u_flag);
  171. if (speed >= XFER_UDMA_5) {
  172. pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
  173. } else {
  174. pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
  175. }
  176. if ((reg4a & a_speed) != u_speed)
  177. pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
  178. if (speed > XFER_UDMA_2) {
  179. if (!(reg54 & v_flag))
  180. pci_write_config_byte(dev, 0x54, reg54 | v_flag);
  181. } else
  182. pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
  183. } else {
  184. if (reg48 & u_flag)
  185. pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
  186. if (reg4a & a_speed)
  187. pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
  188. if (reg54 & v_flag)
  189. pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
  190. if (reg55 & w_flag)
  191. pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
  192. }
  193. it8213_tuneproc(drive, it8213_dma_2_pio(speed));
  194. return ide_config_drive_speed(drive, speed);
  195. }
  196. /*
  197. * config_chipset_for_dma - configure for DMA
  198. * @drive: drive to configure
  199. *
  200. * Called by the IDE layer when it wants the timings set up.
  201. */
  202. static int config_chipset_for_dma (ide_drive_t *drive)
  203. {
  204. u8 speed = ide_dma_speed(drive, it8213_ratemask(drive));
  205. if (!speed)
  206. return 0;
  207. it8213_tune_chipset(drive, speed);
  208. return ide_dma_enable(drive);
  209. }
  210. /**
  211. * it8213_configure_drive_for_dma - set up for DMA transfers
  212. * @drive: drive we are going to set up
  213. *
  214. * Set up the drive for DMA, tune the controller and drive as
  215. * required. If the drive isn't suitable for DMA or we hit
  216. * other problems then we will drop down to PIO and set up
  217. * PIO appropriately
  218. */
  219. static int it8213_config_drive_for_dma (ide_drive_t *drive)
  220. {
  221. ide_hwif_t *hwif = drive->hwif;
  222. if (ide_use_dma(drive)) {
  223. if (config_chipset_for_dma(drive))
  224. return hwif->ide_dma_on(drive);
  225. }
  226. hwif->speedproc(drive, XFER_PIO_0
  227. + ide_get_best_pio_mode(drive, 255, 4, NULL));
  228. return hwif->ide_dma_off_quietly(drive);
  229. }
  230. /**
  231. * init_hwif_it8213 - set up hwif structs
  232. * @hwif: interface to set up
  233. *
  234. * We do the basic set up of the interface structure. The IT8212
  235. * requires several custom handlers so we override the default
  236. * ide DMA handlers appropriately
  237. */
  238. static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
  239. {
  240. u8 reg42h = 0, ata66 = 0;
  241. hwif->speedproc = &it8213_tune_chipset;
  242. hwif->tuneproc = &it8213_tuneproc;
  243. hwif->autodma = 0;
  244. hwif->drives[0].autotune = 1;
  245. hwif->drives[1].autotune = 1;
  246. if (!hwif->dma_base)
  247. return;
  248. hwif->atapi_dma = 1;
  249. hwif->ultra_mask = 0x7f;
  250. hwif->mwdma_mask = 0x06;
  251. hwif->swdma_mask = 0x04;
  252. pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
  253. ata66 = (reg42h & 0x02) ? 0 : 1;
  254. hwif->ide_dma_check = &it8213_config_drive_for_dma;
  255. if (!(hwif->udma_four))
  256. hwif->udma_four = ata66;
  257. /*
  258. * The BIOS often doesn't set up DMA on this controller
  259. * so we always do it.
  260. */
  261. if (!noautodma)
  262. hwif->autodma = 1;
  263. hwif->drives[0].autodma = hwif->autodma;
  264. hwif->drives[1].autodma = hwif->autodma;
  265. }
  266. #define DECLARE_ITE_DEV(name_str) \
  267. { \
  268. .name = name_str, \
  269. .init_hwif = init_hwif_it8213, \
  270. .channels = 1, \
  271. .autodma = AUTODMA, \
  272. .enablebits = {{0x41,0x80,0x80}}, \
  273. .bootable = ON_BOARD, \
  274. }
  275. static ide_pci_device_t it8213_chipsets[] __devinitdata = {
  276. /* 0 */ DECLARE_ITE_DEV("IT8213"),
  277. };
  278. /**
  279. * it8213_init_one - pci layer discovery entry
  280. * @dev: PCI device
  281. * @id: ident table entry
  282. *
  283. * Called by the PCI code when it finds an ITE8213 controller. As
  284. * this device follows the standard interfaces we can use the
  285. * standard helper functions to do almost all the work for us.
  286. */
  287. static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  288. {
  289. ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
  290. return 0;
  291. }
  292. static struct pci_device_id it8213_pci_tbl[] = {
  293. { PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  294. { 0, },
  295. };
  296. MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
  297. static struct pci_driver driver = {
  298. .name = "ITE8213_IDE",
  299. .id_table = it8213_pci_tbl,
  300. .probe = it8213_init_one,
  301. };
  302. static int __init it8213_ide_init(void)
  303. {
  304. return ide_pci_register_driver(&driver);
  305. }
  306. module_init(it8213_ide_init);
  307. MODULE_AUTHOR("Jack Lee, Alan Cox");
  308. MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
  309. MODULE_LICENSE("GPL");