i915_irq.c 15 KB

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  1. /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*-
  2. */
  3. /*
  4. * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the
  9. * "Software"), to deal in the Software without restriction, including
  10. * without limitation the rights to use, copy, modify, merge, publish,
  11. * distribute, sub license, and/or sell copies of the Software, and to
  12. * permit persons to whom the Software is furnished to do so, subject to
  13. * the following conditions:
  14. *
  15. * The above copyright notice and this permission notice (including the
  16. * next paragraph) shall be included in all copies or substantial portions
  17. * of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20. * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23. * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24. * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25. * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26. *
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "i915_drm.h"
  31. #include "i915_drv.h"
  32. #define USER_INT_FLAG (1<<1)
  33. #define VSYNC_PIPEB_FLAG (1<<5)
  34. #define VSYNC_PIPEA_FLAG (1<<7)
  35. #define MAX_NOPID ((u32)~0)
  36. /**
  37. * Emit blits for scheduled buffer swaps.
  38. *
  39. * This function will be called with the HW lock held.
  40. */
  41. static void i915_vblank_tasklet(drm_device_t *dev)
  42. {
  43. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  44. unsigned long irqflags;
  45. struct list_head *list, *tmp, hits, *hit;
  46. int nhits, nrects, slice[2], upper[2], lower[2], i;
  47. unsigned counter[2] = { atomic_read(&dev->vbl_received),
  48. atomic_read(&dev->vbl_received2) };
  49. drm_drawable_info_t *drw;
  50. drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
  51. u32 cpp = dev_priv->cpp;
  52. u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD |
  53. XY_SRC_COPY_BLT_WRITE_ALPHA |
  54. XY_SRC_COPY_BLT_WRITE_RGB)
  55. : XY_SRC_COPY_BLT_CMD;
  56. u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) |
  57. (cpp << 23) | (1 << 24);
  58. RING_LOCALS;
  59. DRM_DEBUG("\n");
  60. INIT_LIST_HEAD(&hits);
  61. nhits = nrects = 0;
  62. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  63. /* Find buffer swaps scheduled for this vertical blank */
  64. list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) {
  65. drm_i915_vbl_swap_t *vbl_swap =
  66. list_entry(list, drm_i915_vbl_swap_t, head);
  67. if ((counter[vbl_swap->pipe] - vbl_swap->sequence) > (1<<23))
  68. continue;
  69. list_del(list);
  70. dev_priv->swaps_pending--;
  71. spin_unlock(&dev_priv->swaps_lock);
  72. spin_lock(&dev->drw_lock);
  73. drw = drm_get_drawable_info(dev, vbl_swap->drw_id);
  74. if (!drw) {
  75. spin_unlock(&dev->drw_lock);
  76. drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER);
  77. spin_lock(&dev_priv->swaps_lock);
  78. continue;
  79. }
  80. list_for_each(hit, &hits) {
  81. drm_i915_vbl_swap_t *swap_cmp =
  82. list_entry(hit, drm_i915_vbl_swap_t, head);
  83. drm_drawable_info_t *drw_cmp =
  84. drm_get_drawable_info(dev, swap_cmp->drw_id);
  85. if (drw_cmp &&
  86. drw_cmp->rects[0].y1 > drw->rects[0].y1) {
  87. list_add_tail(list, hit);
  88. break;
  89. }
  90. }
  91. spin_unlock(&dev->drw_lock);
  92. /* List of hits was empty, or we reached the end of it */
  93. if (hit == &hits)
  94. list_add_tail(list, hits.prev);
  95. nhits++;
  96. spin_lock(&dev_priv->swaps_lock);
  97. }
  98. if (nhits == 0) {
  99. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  100. return;
  101. }
  102. spin_unlock(&dev_priv->swaps_lock);
  103. i915_kernel_lost_context(dev);
  104. BEGIN_LP_RING(6);
  105. OUT_RING(GFX_OP_DRAWRECT_INFO);
  106. OUT_RING(0);
  107. OUT_RING(0);
  108. OUT_RING(sarea_priv->width | sarea_priv->height << 16);
  109. OUT_RING(sarea_priv->width | sarea_priv->height << 16);
  110. OUT_RING(0);
  111. ADVANCE_LP_RING();
  112. sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT;
  113. upper[0] = upper[1] = 0;
  114. slice[0] = max(sarea_priv->pipeA_h / nhits, 1);
  115. slice[1] = max(sarea_priv->pipeB_h / nhits, 1);
  116. lower[0] = sarea_priv->pipeA_y + slice[0];
  117. lower[1] = sarea_priv->pipeB_y + slice[0];
  118. spin_lock(&dev->drw_lock);
  119. /* Emit blits for buffer swaps, partitioning both outputs into as many
  120. * slices as there are buffer swaps scheduled in order to avoid tearing
  121. * (based on the assumption that a single buffer swap would always
  122. * complete before scanout starts).
  123. */
  124. for (i = 0; i++ < nhits;
  125. upper[0] = lower[0], lower[0] += slice[0],
  126. upper[1] = lower[1], lower[1] += slice[1]) {
  127. if (i == nhits)
  128. lower[0] = lower[1] = sarea_priv->height;
  129. list_for_each(hit, &hits) {
  130. drm_i915_vbl_swap_t *swap_hit =
  131. list_entry(hit, drm_i915_vbl_swap_t, head);
  132. drm_clip_rect_t *rect;
  133. int num_rects, pipe;
  134. unsigned short top, bottom;
  135. drw = drm_get_drawable_info(dev, swap_hit->drw_id);
  136. if (!drw)
  137. continue;
  138. rect = drw->rects;
  139. pipe = swap_hit->pipe;
  140. top = upper[pipe];
  141. bottom = lower[pipe];
  142. for (num_rects = drw->num_rects; num_rects--; rect++) {
  143. int y1 = max(rect->y1, top);
  144. int y2 = min(rect->y2, bottom);
  145. if (y1 >= y2)
  146. continue;
  147. BEGIN_LP_RING(8);
  148. OUT_RING(cmd);
  149. OUT_RING(pitchropcpp);
  150. OUT_RING((y1 << 16) | rect->x1);
  151. OUT_RING((y2 << 16) | rect->x2);
  152. OUT_RING(sarea_priv->front_offset);
  153. OUT_RING((y1 << 16) | rect->x1);
  154. OUT_RING(pitchropcpp & 0xffff);
  155. OUT_RING(sarea_priv->back_offset);
  156. ADVANCE_LP_RING();
  157. }
  158. }
  159. }
  160. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  161. list_for_each_safe(hit, tmp, &hits) {
  162. drm_i915_vbl_swap_t *swap_hit =
  163. list_entry(hit, drm_i915_vbl_swap_t, head);
  164. list_del(hit);
  165. drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER);
  166. }
  167. }
  168. irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
  169. {
  170. drm_device_t *dev = (drm_device_t *) arg;
  171. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  172. u16 temp;
  173. temp = I915_READ16(I915REG_INT_IDENTITY_R);
  174. temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG);
  175. DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
  176. if (temp == 0)
  177. return IRQ_NONE;
  178. I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
  179. dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
  180. if (temp & USER_INT_FLAG)
  181. DRM_WAKEUP(&dev_priv->irq_queue);
  182. if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) {
  183. int vblank_pipe = dev_priv->vblank_pipe;
  184. if ((vblank_pipe &
  185. (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B))
  186. == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) {
  187. if (temp & VSYNC_PIPEA_FLAG)
  188. atomic_inc(&dev->vbl_received);
  189. if (temp & VSYNC_PIPEB_FLAG)
  190. atomic_inc(&dev->vbl_received2);
  191. } else if (((temp & VSYNC_PIPEA_FLAG) &&
  192. (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) ||
  193. ((temp & VSYNC_PIPEB_FLAG) &&
  194. (vblank_pipe & DRM_I915_VBLANK_PIPE_B)))
  195. atomic_inc(&dev->vbl_received);
  196. DRM_WAKEUP(&dev->vbl_queue);
  197. drm_vbl_send_signals(dev);
  198. if (dev_priv->swaps_pending > 0)
  199. drm_locked_tasklet(dev, i915_vblank_tasklet);
  200. }
  201. return IRQ_HANDLED;
  202. }
  203. static int i915_emit_irq(drm_device_t * dev)
  204. {
  205. drm_i915_private_t *dev_priv = dev->dev_private;
  206. RING_LOCALS;
  207. i915_kernel_lost_context(dev);
  208. DRM_DEBUG("%s\n", __FUNCTION__);
  209. dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter;
  210. if (dev_priv->counter > 0x7FFFFFFFUL)
  211. dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
  212. BEGIN_LP_RING(6);
  213. OUT_RING(CMD_STORE_DWORD_IDX);
  214. OUT_RING(20);
  215. OUT_RING(dev_priv->counter);
  216. OUT_RING(0);
  217. OUT_RING(0);
  218. OUT_RING(GFX_OP_USER_INTERRUPT);
  219. ADVANCE_LP_RING();
  220. return dev_priv->counter;
  221. }
  222. static int i915_wait_irq(drm_device_t * dev, int irq_nr)
  223. {
  224. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  225. int ret = 0;
  226. DRM_DEBUG("%s irq_nr=%d breadcrumb=%d\n", __FUNCTION__, irq_nr,
  227. READ_BREADCRUMB(dev_priv));
  228. if (READ_BREADCRUMB(dev_priv) >= irq_nr)
  229. return 0;
  230. dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
  231. DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
  232. READ_BREADCRUMB(dev_priv) >= irq_nr);
  233. if (ret == DRM_ERR(EBUSY)) {
  234. DRM_ERROR("%s: EBUSY -- rec: %d emitted: %d\n",
  235. __FUNCTION__,
  236. READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
  237. }
  238. dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
  239. return ret;
  240. }
  241. static int i915_driver_vblank_do_wait(drm_device_t *dev, unsigned int *sequence,
  242. atomic_t *counter)
  243. {
  244. drm_i915_private_t *dev_priv = dev->dev_private;
  245. unsigned int cur_vblank;
  246. int ret = 0;
  247. if (!dev_priv) {
  248. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  249. return DRM_ERR(EINVAL);
  250. }
  251. DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
  252. (((cur_vblank = atomic_read(counter))
  253. - *sequence) <= (1<<23)));
  254. *sequence = cur_vblank;
  255. return ret;
  256. }
  257. int i915_driver_vblank_wait(drm_device_t *dev, unsigned int *sequence)
  258. {
  259. return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received);
  260. }
  261. int i915_driver_vblank_wait2(drm_device_t *dev, unsigned int *sequence)
  262. {
  263. return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2);
  264. }
  265. /* Needs the lock as it touches the ring.
  266. */
  267. int i915_irq_emit(DRM_IOCTL_ARGS)
  268. {
  269. DRM_DEVICE;
  270. drm_i915_private_t *dev_priv = dev->dev_private;
  271. drm_i915_irq_emit_t emit;
  272. int result;
  273. LOCK_TEST_WITH_RETURN(dev, filp);
  274. if (!dev_priv) {
  275. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  276. return DRM_ERR(EINVAL);
  277. }
  278. DRM_COPY_FROM_USER_IOCTL(emit, (drm_i915_irq_emit_t __user *) data,
  279. sizeof(emit));
  280. result = i915_emit_irq(dev);
  281. if (DRM_COPY_TO_USER(emit.irq_seq, &result, sizeof(int))) {
  282. DRM_ERROR("copy_to_user\n");
  283. return DRM_ERR(EFAULT);
  284. }
  285. return 0;
  286. }
  287. /* Doesn't need the hardware lock.
  288. */
  289. int i915_irq_wait(DRM_IOCTL_ARGS)
  290. {
  291. DRM_DEVICE;
  292. drm_i915_private_t *dev_priv = dev->dev_private;
  293. drm_i915_irq_wait_t irqwait;
  294. if (!dev_priv) {
  295. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  296. return DRM_ERR(EINVAL);
  297. }
  298. DRM_COPY_FROM_USER_IOCTL(irqwait, (drm_i915_irq_wait_t __user *) data,
  299. sizeof(irqwait));
  300. return i915_wait_irq(dev, irqwait.irq_seq);
  301. }
  302. static void i915_enable_interrupt (drm_device_t *dev)
  303. {
  304. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  305. u16 flag;
  306. flag = 0;
  307. if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A)
  308. flag |= VSYNC_PIPEA_FLAG;
  309. if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B)
  310. flag |= VSYNC_PIPEB_FLAG;
  311. I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag);
  312. }
  313. /* Set the vblank monitor pipe
  314. */
  315. int i915_vblank_pipe_set(DRM_IOCTL_ARGS)
  316. {
  317. DRM_DEVICE;
  318. drm_i915_private_t *dev_priv = dev->dev_private;
  319. drm_i915_vblank_pipe_t pipe;
  320. if (!dev_priv) {
  321. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  322. return DRM_ERR(EINVAL);
  323. }
  324. DRM_COPY_FROM_USER_IOCTL(pipe, (drm_i915_vblank_pipe_t __user *) data,
  325. sizeof(pipe));
  326. if (pipe.pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) {
  327. DRM_ERROR("%s called with invalid pipe 0x%x\n",
  328. __FUNCTION__, pipe.pipe);
  329. return DRM_ERR(EINVAL);
  330. }
  331. dev_priv->vblank_pipe = pipe.pipe;
  332. i915_enable_interrupt (dev);
  333. return 0;
  334. }
  335. int i915_vblank_pipe_get(DRM_IOCTL_ARGS)
  336. {
  337. DRM_DEVICE;
  338. drm_i915_private_t *dev_priv = dev->dev_private;
  339. drm_i915_vblank_pipe_t pipe;
  340. u16 flag;
  341. if (!dev_priv) {
  342. DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
  343. return DRM_ERR(EINVAL);
  344. }
  345. flag = I915_READ(I915REG_INT_ENABLE_R);
  346. pipe.pipe = 0;
  347. if (flag & VSYNC_PIPEA_FLAG)
  348. pipe.pipe |= DRM_I915_VBLANK_PIPE_A;
  349. if (flag & VSYNC_PIPEB_FLAG)
  350. pipe.pipe |= DRM_I915_VBLANK_PIPE_B;
  351. DRM_COPY_TO_USER_IOCTL((drm_i915_vblank_pipe_t __user *) data, pipe,
  352. sizeof(pipe));
  353. return 0;
  354. }
  355. /**
  356. * Schedule buffer swap at given vertical blank.
  357. */
  358. int i915_vblank_swap(DRM_IOCTL_ARGS)
  359. {
  360. DRM_DEVICE;
  361. drm_i915_private_t *dev_priv = dev->dev_private;
  362. drm_i915_vblank_swap_t swap;
  363. drm_i915_vbl_swap_t *vbl_swap;
  364. unsigned int pipe, seqtype, curseq;
  365. unsigned long irqflags;
  366. struct list_head *list;
  367. if (!dev_priv) {
  368. DRM_ERROR("%s called with no initialization\n", __func__);
  369. return DRM_ERR(EINVAL);
  370. }
  371. if (dev_priv->sarea_priv->rotation) {
  372. DRM_DEBUG("Rotation not supported\n");
  373. return DRM_ERR(EINVAL);
  374. }
  375. DRM_COPY_FROM_USER_IOCTL(swap, (drm_i915_vblank_swap_t __user *) data,
  376. sizeof(swap));
  377. if (swap.seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE |
  378. _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) {
  379. DRM_ERROR("Invalid sequence type 0x%x\n", swap.seqtype);
  380. return DRM_ERR(EINVAL);
  381. }
  382. pipe = (swap.seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0;
  383. seqtype = swap.seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE);
  384. if (!(dev_priv->vblank_pipe & (1 << pipe))) {
  385. DRM_ERROR("Invalid pipe %d\n", pipe);
  386. return DRM_ERR(EINVAL);
  387. }
  388. spin_lock_irqsave(&dev->drw_lock, irqflags);
  389. if (!drm_get_drawable_info(dev, swap.drawable)) {
  390. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  391. DRM_DEBUG("Invalid drawable ID %d\n", swap.drawable);
  392. return DRM_ERR(EINVAL);
  393. }
  394. spin_unlock_irqrestore(&dev->drw_lock, irqflags);
  395. curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received);
  396. if (seqtype == _DRM_VBLANK_RELATIVE)
  397. swap.sequence += curseq;
  398. if ((curseq - swap.sequence) <= (1<<23)) {
  399. if (swap.seqtype & _DRM_VBLANK_NEXTONMISS) {
  400. swap.sequence = curseq + 1;
  401. } else {
  402. DRM_DEBUG("Missed target sequence\n");
  403. return DRM_ERR(EINVAL);
  404. }
  405. }
  406. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  407. list_for_each(list, &dev_priv->vbl_swaps.head) {
  408. vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head);
  409. if (vbl_swap->drw_id == swap.drawable &&
  410. vbl_swap->pipe == pipe &&
  411. vbl_swap->sequence == swap.sequence) {
  412. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  413. DRM_DEBUG("Already scheduled\n");
  414. return 0;
  415. }
  416. }
  417. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  418. if (dev_priv->swaps_pending >= 100) {
  419. DRM_DEBUG("Too many swaps queued\n");
  420. return DRM_ERR(EBUSY);
  421. }
  422. vbl_swap = drm_calloc(1, sizeof(vbl_swap), DRM_MEM_DRIVER);
  423. if (!vbl_swap) {
  424. DRM_ERROR("Failed to allocate memory to queue swap\n");
  425. return DRM_ERR(ENOMEM);
  426. }
  427. DRM_DEBUG("\n");
  428. vbl_swap->drw_id = swap.drawable;
  429. vbl_swap->pipe = pipe;
  430. vbl_swap->sequence = swap.sequence;
  431. spin_lock_irqsave(&dev_priv->swaps_lock, irqflags);
  432. list_add_tail((struct list_head *)vbl_swap, &dev_priv->vbl_swaps.head);
  433. dev_priv->swaps_pending++;
  434. spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags);
  435. DRM_COPY_TO_USER_IOCTL((drm_i915_vblank_swap_t __user *) data, swap,
  436. sizeof(swap));
  437. return 0;
  438. }
  439. /* drm_dma.h hooks
  440. */
  441. void i915_driver_irq_preinstall(drm_device_t * dev)
  442. {
  443. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  444. I915_WRITE16(I915REG_HWSTAM, 0xfffe);
  445. I915_WRITE16(I915REG_INT_MASK_R, 0x0);
  446. I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
  447. }
  448. void i915_driver_irq_postinstall(drm_device_t * dev)
  449. {
  450. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  451. dev_priv->swaps_lock = SPIN_LOCK_UNLOCKED;
  452. INIT_LIST_HEAD(&dev_priv->vbl_swaps.head);
  453. dev_priv->swaps_pending = 0;
  454. if (!dev_priv->vblank_pipe)
  455. dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A;
  456. i915_enable_interrupt(dev);
  457. DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
  458. }
  459. void i915_driver_irq_uninstall(drm_device_t * dev)
  460. {
  461. drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
  462. u16 temp;
  463. if (!dev_priv)
  464. return;
  465. I915_WRITE16(I915REG_HWSTAM, 0xffff);
  466. I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
  467. I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
  468. temp = I915_READ16(I915REG_INT_IDENTITY_R);
  469. I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
  470. }