pata_hpt3x3.c 6.3 KB

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  1. /*
  2. * pata_hpt3x3 - HPT3x3 driver
  3. * (c) Copyright 2005-2006 Red Hat
  4. *
  5. * Was pata_hpt34x but the naming was confusing as it supported the
  6. * 343 and 363 so it has been renamed.
  7. *
  8. * Based on:
  9. * linux/drivers/ide/pci/hpt34x.c Version 0.40 Sept 10, 2002
  10. * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
  11. *
  12. * May be copied or modified under the terms of the GNU General Public
  13. * License
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/pci.h>
  18. #include <linux/init.h>
  19. #include <linux/blkdev.h>
  20. #include <linux/delay.h>
  21. #include <scsi/scsi_host.h>
  22. #include <linux/libata.h>
  23. #define DRV_NAME "pata_hpt3x3"
  24. #define DRV_VERSION "0.4.2"
  25. static int hpt3x3_probe_init(struct ata_port *ap)
  26. {
  27. ap->cbl = ATA_CBL_PATA40;
  28. return ata_std_prereset(ap);
  29. }
  30. /**
  31. * hpt3x3_probe_reset - reset the hpt3x3 bus
  32. * @ap: ATA port to reset
  33. *
  34. * Perform the housekeeping when doing an ATA bus reeset. We just
  35. * need to force the cable type.
  36. */
  37. static void hpt3x3_error_handler(struct ata_port *ap)
  38. {
  39. return ata_bmdma_drive_eh(ap, hpt3x3_probe_init, ata_std_softreset, NULL, ata_std_postreset);
  40. }
  41. /**
  42. * hpt3x3_set_piomode - PIO setup
  43. * @ap: ATA interface
  44. * @adev: device on the interface
  45. *
  46. * Set our PIO requirements. This is fairly simple on the HPT3x3 as
  47. * all we have to do is clear the MWDMA and UDMA bits then load the
  48. * mode number.
  49. */
  50. static void hpt3x3_set_piomode(struct ata_port *ap, struct ata_device *adev)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  53. u32 r1, r2;
  54. int dn = 2 * ap->port_no + adev->devno;
  55. pci_read_config_dword(pdev, 0x44, &r1);
  56. pci_read_config_dword(pdev, 0x48, &r2);
  57. /* Load the PIO timing number */
  58. r1 &= ~(7 << (3 * dn));
  59. r1 |= (adev->pio_mode - XFER_PIO_0) << (3 * dn);
  60. r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
  61. pci_write_config_dword(pdev, 0x44, r1);
  62. pci_write_config_dword(pdev, 0x48, r2);
  63. }
  64. /**
  65. * hpt3x3_set_dmamode - DMA timing setup
  66. * @ap: ATA interface
  67. * @adev: Device being configured
  68. *
  69. * Set up the channel for MWDMA or UDMA modes. Much the same as with
  70. * PIO, load the mode number and then set MWDMA or UDMA flag.
  71. */
  72. static void hpt3x3_set_dmamode(struct ata_port *ap, struct ata_device *adev)
  73. {
  74. struct pci_dev *pdev = to_pci_dev(ap->host->dev);
  75. u32 r1, r2;
  76. int dn = 2 * ap->port_no + adev->devno;
  77. int mode_num = adev->dma_mode & 0x0F;
  78. pci_read_config_dword(pdev, 0x44, &r1);
  79. pci_read_config_dword(pdev, 0x48, &r2);
  80. /* Load the timing number */
  81. r1 &= ~(7 << (3 * dn));
  82. r1 |= (mode_num << (3 * dn));
  83. r2 &= ~(0x11 << dn); /* Clear MWDMA and UDMA bits */
  84. if (adev->dma_mode >= XFER_UDMA_0)
  85. r2 |= 0x01 << dn; /* Ultra mode */
  86. else
  87. r2 |= 0x10 << dn; /* MWDMA */
  88. pci_write_config_dword(pdev, 0x44, r1);
  89. pci_write_config_dword(pdev, 0x48, r2);
  90. }
  91. static struct scsi_host_template hpt3x3_sht = {
  92. .module = THIS_MODULE,
  93. .name = DRV_NAME,
  94. .ioctl = ata_scsi_ioctl,
  95. .queuecommand = ata_scsi_queuecmd,
  96. .can_queue = ATA_DEF_QUEUE,
  97. .this_id = ATA_SHT_THIS_ID,
  98. .sg_tablesize = LIBATA_MAX_PRD,
  99. .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
  100. .emulated = ATA_SHT_EMULATED,
  101. .use_clustering = ATA_SHT_USE_CLUSTERING,
  102. .proc_name = DRV_NAME,
  103. .dma_boundary = ATA_DMA_BOUNDARY,
  104. .slave_configure = ata_scsi_slave_config,
  105. .slave_destroy = ata_scsi_slave_destroy,
  106. .bios_param = ata_std_bios_param,
  107. .resume = ata_scsi_device_resume,
  108. .suspend = ata_scsi_device_suspend,
  109. };
  110. static struct ata_port_operations hpt3x3_port_ops = {
  111. .port_disable = ata_port_disable,
  112. .set_piomode = hpt3x3_set_piomode,
  113. .set_dmamode = hpt3x3_set_dmamode,
  114. .mode_filter = ata_pci_default_filter,
  115. .tf_load = ata_tf_load,
  116. .tf_read = ata_tf_read,
  117. .check_status = ata_check_status,
  118. .exec_command = ata_exec_command,
  119. .dev_select = ata_std_dev_select,
  120. .freeze = ata_bmdma_freeze,
  121. .thaw = ata_bmdma_thaw,
  122. .error_handler = hpt3x3_error_handler,
  123. .post_internal_cmd = ata_bmdma_post_internal_cmd,
  124. .bmdma_setup = ata_bmdma_setup,
  125. .bmdma_start = ata_bmdma_start,
  126. .bmdma_stop = ata_bmdma_stop,
  127. .bmdma_status = ata_bmdma_status,
  128. .qc_prep = ata_qc_prep,
  129. .qc_issue = ata_qc_issue_prot,
  130. .data_xfer = ata_data_xfer,
  131. .irq_handler = ata_interrupt,
  132. .irq_clear = ata_bmdma_irq_clear,
  133. .irq_on = ata_irq_on,
  134. .irq_ack = ata_irq_ack,
  135. .port_start = ata_port_start,
  136. };
  137. /**
  138. * hpt3x3_init_chipset - chip setup
  139. * @dev: PCI device
  140. *
  141. * Perform the setup required at boot and on resume.
  142. */
  143. static void hpt3x3_init_chipset(struct pci_dev *dev)
  144. {
  145. u16 cmd;
  146. /* Initialize the board */
  147. pci_write_config_word(dev, 0x80, 0x00);
  148. /* Check if it is a 343 or a 363. 363 has COMMAND_MEMORY set */
  149. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  150. if (cmd & PCI_COMMAND_MEMORY)
  151. pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
  152. else
  153. pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
  154. }
  155. /**
  156. * hpt3x3_init_one - Initialise an HPT343/363
  157. * @dev: PCI device
  158. * @id: Entry in match table
  159. *
  160. * Perform basic initialisation. The chip has a quirk that it won't
  161. * function unless it is at XX00. The old ATA driver touched this up
  162. * but we leave it for pci quirks to do properly.
  163. */
  164. static int hpt3x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  165. {
  166. static struct ata_port_info info = {
  167. .sht = &hpt3x3_sht,
  168. .flags = ATA_FLAG_SLAVE_POSS|ATA_FLAG_SRST,
  169. .pio_mask = 0x1f,
  170. .mwdma_mask = 0x07,
  171. .udma_mask = 0x07,
  172. .port_ops = &hpt3x3_port_ops
  173. };
  174. static struct ata_port_info *port_info[2] = { &info, &info };
  175. hpt3x3_init_chipset(dev);
  176. /* Now kick off ATA set up */
  177. return ata_pci_init_one(dev, port_info, 2);
  178. }
  179. static int hpt3x3_reinit_one(struct pci_dev *dev)
  180. {
  181. hpt3x3_init_chipset(dev);
  182. return ata_pci_device_resume(dev);
  183. }
  184. static const struct pci_device_id hpt3x3[] = {
  185. { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), },
  186. { },
  187. };
  188. static struct pci_driver hpt3x3_pci_driver = {
  189. .name = DRV_NAME,
  190. .id_table = hpt3x3,
  191. .probe = hpt3x3_init_one,
  192. .remove = ata_pci_remove_one,
  193. .suspend = ata_pci_device_suspend,
  194. .resume = hpt3x3_reinit_one,
  195. };
  196. static int __init hpt3x3_init(void)
  197. {
  198. return pci_register_driver(&hpt3x3_pci_driver);
  199. }
  200. static void __exit hpt3x3_exit(void)
  201. {
  202. pci_unregister_driver(&hpt3x3_pci_driver);
  203. }
  204. MODULE_AUTHOR("Alan Cox");
  205. MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
  206. MODULE_LICENSE("GPL");
  207. MODULE_DEVICE_TABLE(pci, hpt3x3);
  208. MODULE_VERSION(DRV_VERSION);
  209. module_init(hpt3x3_init);
  210. module_exit(hpt3x3_exit);