early-quirks.c 3.3 KB

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  1. /* Various workarounds for chipset bugs.
  2. This code runs very early and can't use the regular PCI subsystem
  3. The entries are keyed to PCI bridges which usually identify chipsets
  4. uniquely.
  5. This is only for whole classes of chipsets with specific problems which
  6. need early invasive action (e.g. before the timers are initialized).
  7. Most PCI device specific workarounds can be done later and should be
  8. in standard PCI quirks
  9. Mainboard specific bugs should be handled by DMI entries.
  10. CPU specific bugs in setup.c */
  11. #include <linux/pci.h>
  12. #include <linux/acpi.h>
  13. #include <linux/pci_ids.h>
  14. #include <asm/pci-direct.h>
  15. #include <asm/proto.h>
  16. #include <asm/dma.h>
  17. static void via_bugs(void)
  18. {
  19. #ifdef CONFIG_IOMMU
  20. if ((end_pfn > MAX_DMA32_PFN || force_iommu) &&
  21. !iommu_aperture_allowed) {
  22. printk(KERN_INFO
  23. "Looks like a VIA chipset. Disabling IOMMU. Override with iommu=allowed\n");
  24. iommu_aperture_disabled = 1;
  25. }
  26. #endif
  27. }
  28. #ifdef CONFIG_ACPI
  29. static int nvidia_hpet_detected __initdata;
  30. static int __init nvidia_hpet_check(struct acpi_table_header *header)
  31. {
  32. nvidia_hpet_detected = 1;
  33. return 0;
  34. }
  35. #endif
  36. static void nvidia_bugs(void)
  37. {
  38. #ifdef CONFIG_ACPI
  39. /*
  40. * All timer overrides on Nvidia are
  41. * wrong unless HPET is enabled.
  42. * Unfortunately that's not true on many Asus boards.
  43. * We don't know yet how to detect this automatically, but
  44. * at least allow a command line override.
  45. */
  46. if (acpi_use_timer_override)
  47. return;
  48. nvidia_hpet_detected = 0;
  49. acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check);
  50. if (nvidia_hpet_detected == 0) {
  51. acpi_skip_timer_override = 1;
  52. printk(KERN_INFO "Nvidia board "
  53. "detected. Ignoring ACPI "
  54. "timer override.\n");
  55. printk(KERN_INFO "If you got timer trouble "
  56. "try acpi_use_timer_override\n");
  57. }
  58. #endif
  59. /* RED-PEN skip them on mptables too? */
  60. }
  61. static void ati_bugs(void)
  62. {
  63. if (timer_over_8254 == 1) {
  64. timer_over_8254 = 0;
  65. printk(KERN_INFO
  66. "ATI board detected. Disabling timer routing over 8254.\n");
  67. }
  68. }
  69. static void intel_bugs(void)
  70. {
  71. u16 device = read_pci_config_16(0, 0, 0, PCI_DEVICE_ID);
  72. #ifdef CONFIG_SMP
  73. if (device == PCI_DEVICE_ID_INTEL_E7320_MCH ||
  74. device == PCI_DEVICE_ID_INTEL_E7520_MCH ||
  75. device == PCI_DEVICE_ID_INTEL_E7525_MCH)
  76. quirk_intel_irqbalance();
  77. #endif
  78. }
  79. struct chipset {
  80. u16 vendor;
  81. void (*f)(void);
  82. };
  83. static struct chipset early_qrk[] = {
  84. { PCI_VENDOR_ID_NVIDIA, nvidia_bugs },
  85. { PCI_VENDOR_ID_VIA, via_bugs },
  86. { PCI_VENDOR_ID_ATI, ati_bugs },
  87. { PCI_VENDOR_ID_INTEL, intel_bugs},
  88. {}
  89. };
  90. void __init early_quirks(void)
  91. {
  92. int num, slot, func;
  93. if (!early_pci_allowed())
  94. return;
  95. /* Poor man's PCI discovery */
  96. for (num = 0; num < 32; num++) {
  97. for (slot = 0; slot < 32; slot++) {
  98. for (func = 0; func < 8; func++) {
  99. u32 class;
  100. u32 vendor;
  101. u8 type;
  102. int i;
  103. class = read_pci_config(num,slot,func,
  104. PCI_CLASS_REVISION);
  105. if (class == 0xffffffff)
  106. break;
  107. if ((class >> 16) != PCI_CLASS_BRIDGE_PCI)
  108. continue;
  109. vendor = read_pci_config(num, slot, func,
  110. PCI_VENDOR_ID);
  111. vendor &= 0xffff;
  112. for (i = 0; early_qrk[i].f; i++)
  113. if (early_qrk[i].vendor == vendor) {
  114. early_qrk[i].f();
  115. return;
  116. }
  117. type = read_pci_config_byte(num, slot, func,
  118. PCI_HEADER_TYPE);
  119. if (!(type & 0x80))
  120. break;
  121. }
  122. }
  123. }
  124. }