kprobes.c 13 KB

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  1. /* arch/sparc64/kernel/kprobes.c
  2. *
  3. * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/kprobes.h>
  7. #include <linux/module.h>
  8. #include <asm/kdebug.h>
  9. #include <asm/signal.h>
  10. #include <asm/cacheflush.h>
  11. #include <asm/uaccess.h>
  12. /* We do not have hardware single-stepping on sparc64.
  13. * So we implement software single-stepping with breakpoint
  14. * traps. The top-level scheme is similar to that used
  15. * in the x86 kprobes implementation.
  16. *
  17. * In the kprobe->ainsn.insn[] array we store the original
  18. * instruction at index zero and a break instruction at
  19. * index one.
  20. *
  21. * When we hit a kprobe we:
  22. * - Run the pre-handler
  23. * - Remember "regs->tnpc" and interrupt level stored in
  24. * "regs->tstate" so we can restore them later
  25. * - Disable PIL interrupts
  26. * - Set regs->tpc to point to kprobe->ainsn.insn[0]
  27. * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
  28. * - Mark that we are actively in a kprobe
  29. *
  30. * At this point we wait for the second breakpoint at
  31. * kprobe->ainsn.insn[1] to hit. When it does we:
  32. * - Run the post-handler
  33. * - Set regs->tpc to "remembered" regs->tnpc stored above,
  34. * restore the PIL interrupt level in "regs->tstate" as well
  35. * - Make any adjustments necessary to regs->tnpc in order
  36. * to handle relative branches correctly. See below.
  37. * - Mark that we are no longer actively in a kprobe.
  38. */
  39. DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
  40. DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
  41. int __kprobes arch_prepare_kprobe(struct kprobe *p)
  42. {
  43. p->ainsn.insn[0] = *p->addr;
  44. flushi(&p->ainsn.insn[0]);
  45. p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
  46. flushi(&p->ainsn.insn[1]);
  47. p->opcode = *p->addr;
  48. return 0;
  49. }
  50. void __kprobes arch_arm_kprobe(struct kprobe *p)
  51. {
  52. *p->addr = BREAKPOINT_INSTRUCTION;
  53. flushi(p->addr);
  54. }
  55. void __kprobes arch_disarm_kprobe(struct kprobe *p)
  56. {
  57. *p->addr = p->opcode;
  58. flushi(p->addr);
  59. }
  60. static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
  61. {
  62. kcb->prev_kprobe.kp = kprobe_running();
  63. kcb->prev_kprobe.status = kcb->kprobe_status;
  64. kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
  65. kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
  66. }
  67. static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
  68. {
  69. __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp;
  70. kcb->kprobe_status = kcb->prev_kprobe.status;
  71. kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
  72. kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
  73. }
  74. static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
  75. struct kprobe_ctlblk *kcb)
  76. {
  77. __get_cpu_var(current_kprobe) = p;
  78. kcb->kprobe_orig_tnpc = regs->tnpc;
  79. kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
  80. }
  81. static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
  82. struct kprobe_ctlblk *kcb)
  83. {
  84. regs->tstate |= TSTATE_PIL;
  85. /*single step inline, if it a breakpoint instruction*/
  86. if (p->opcode == BREAKPOINT_INSTRUCTION) {
  87. regs->tpc = (unsigned long) p->addr;
  88. regs->tnpc = kcb->kprobe_orig_tnpc;
  89. } else {
  90. regs->tpc = (unsigned long) &p->ainsn.insn[0];
  91. regs->tnpc = (unsigned long) &p->ainsn.insn[1];
  92. }
  93. }
  94. static int __kprobes kprobe_handler(struct pt_regs *regs)
  95. {
  96. struct kprobe *p;
  97. void *addr = (void *) regs->tpc;
  98. int ret = 0;
  99. struct kprobe_ctlblk *kcb;
  100. /*
  101. * We don't want to be preempted for the entire
  102. * duration of kprobe processing
  103. */
  104. preempt_disable();
  105. kcb = get_kprobe_ctlblk();
  106. if (kprobe_running()) {
  107. p = get_kprobe(addr);
  108. if (p) {
  109. if (kcb->kprobe_status == KPROBE_HIT_SS) {
  110. regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
  111. kcb->kprobe_orig_tstate_pil);
  112. goto no_kprobe;
  113. }
  114. /* We have reentered the kprobe_handler(), since
  115. * another probe was hit while within the handler.
  116. * We here save the original kprobes variables and
  117. * just single step on the instruction of the new probe
  118. * without calling any user handlers.
  119. */
  120. save_previous_kprobe(kcb);
  121. set_current_kprobe(p, regs, kcb);
  122. kprobes_inc_nmissed_count(p);
  123. kcb->kprobe_status = KPROBE_REENTER;
  124. prepare_singlestep(p, regs, kcb);
  125. return 1;
  126. } else {
  127. if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
  128. /* The breakpoint instruction was removed by
  129. * another cpu right after we hit, no further
  130. * handling of this interrupt is appropriate
  131. */
  132. ret = 1;
  133. goto no_kprobe;
  134. }
  135. p = __get_cpu_var(current_kprobe);
  136. if (p->break_handler && p->break_handler(p, regs))
  137. goto ss_probe;
  138. }
  139. goto no_kprobe;
  140. }
  141. p = get_kprobe(addr);
  142. if (!p) {
  143. if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
  144. /*
  145. * The breakpoint instruction was removed right
  146. * after we hit it. Another cpu has removed
  147. * either a probepoint or a debugger breakpoint
  148. * at this address. In either case, no further
  149. * handling of this interrupt is appropriate.
  150. */
  151. ret = 1;
  152. }
  153. /* Not one of ours: let kernel handle it */
  154. goto no_kprobe;
  155. }
  156. set_current_kprobe(p, regs, kcb);
  157. kcb->kprobe_status = KPROBE_HIT_ACTIVE;
  158. if (p->pre_handler && p->pre_handler(p, regs))
  159. return 1;
  160. ss_probe:
  161. prepare_singlestep(p, regs, kcb);
  162. kcb->kprobe_status = KPROBE_HIT_SS;
  163. return 1;
  164. no_kprobe:
  165. preempt_enable_no_resched();
  166. return ret;
  167. }
  168. /* If INSN is a relative control transfer instruction,
  169. * return the corrected branch destination value.
  170. *
  171. * regs->tpc and regs->tnpc still hold the values of the
  172. * program counters at the time of trap due to the execution
  173. * of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
  174. *
  175. */
  176. static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p,
  177. struct pt_regs *regs)
  178. {
  179. unsigned long real_pc = (unsigned long) p->addr;
  180. /* Branch not taken, no mods necessary. */
  181. if (regs->tnpc == regs->tpc + 0x4UL)
  182. return real_pc + 0x8UL;
  183. /* The three cases are call, branch w/prediction,
  184. * and traditional branch.
  185. */
  186. if ((insn & 0xc0000000) == 0x40000000 ||
  187. (insn & 0xc1c00000) == 0x00400000 ||
  188. (insn & 0xc1c00000) == 0x00800000) {
  189. unsigned long ainsn_addr;
  190. ainsn_addr = (unsigned long) &p->ainsn.insn[0];
  191. /* The instruction did all the work for us
  192. * already, just apply the offset to the correct
  193. * instruction location.
  194. */
  195. return (real_pc + (regs->tnpc - ainsn_addr));
  196. }
  197. /* It is jmpl or some other absolute PC modification instruction,
  198. * leave NPC as-is.
  199. */
  200. return regs->tnpc;
  201. }
  202. /* If INSN is an instruction which writes it's PC location
  203. * into a destination register, fix that up.
  204. */
  205. static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
  206. unsigned long real_pc)
  207. {
  208. unsigned long *slot = NULL;
  209. /* Simplest case is 'call', which always uses %o7 */
  210. if ((insn & 0xc0000000) == 0x40000000) {
  211. slot = &regs->u_regs[UREG_I7];
  212. }
  213. /* 'jmpl' encodes the register inside of the opcode */
  214. if ((insn & 0xc1f80000) == 0x81c00000) {
  215. unsigned long rd = ((insn >> 25) & 0x1f);
  216. if (rd <= 15) {
  217. slot = &regs->u_regs[rd];
  218. } else {
  219. /* Hard case, it goes onto the stack. */
  220. flushw_all();
  221. rd -= 16;
  222. slot = (unsigned long *)
  223. (regs->u_regs[UREG_FP] + STACK_BIAS);
  224. slot += rd;
  225. }
  226. }
  227. if (slot != NULL)
  228. *slot = real_pc;
  229. }
  230. /*
  231. * Called after single-stepping. p->addr is the address of the
  232. * instruction which has been replaced by the breakpoint
  233. * instruction. To avoid the SMP problems that can occur when we
  234. * temporarily put back the original opcode to single-step, we
  235. * single-stepped a copy of the instruction. The address of this
  236. * copy is &p->ainsn.insn[0].
  237. *
  238. * This function prepares to return from the post-single-step
  239. * breakpoint trap.
  240. */
  241. static void __kprobes resume_execution(struct kprobe *p,
  242. struct pt_regs *regs, struct kprobe_ctlblk *kcb)
  243. {
  244. u32 insn = p->ainsn.insn[0];
  245. regs->tnpc = relbranch_fixup(insn, p, regs);
  246. /* This assignment must occur after relbranch_fixup() */
  247. regs->tpc = kcb->kprobe_orig_tnpc;
  248. retpc_fixup(regs, insn, (unsigned long) p->addr);
  249. regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
  250. kcb->kprobe_orig_tstate_pil);
  251. }
  252. static int __kprobes post_kprobe_handler(struct pt_regs *regs)
  253. {
  254. struct kprobe *cur = kprobe_running();
  255. struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
  256. if (!cur)
  257. return 0;
  258. if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
  259. kcb->kprobe_status = KPROBE_HIT_SSDONE;
  260. cur->post_handler(cur, regs, 0);
  261. }
  262. resume_execution(cur, regs, kcb);
  263. /*Restore back the original saved kprobes variables and continue. */
  264. if (kcb->kprobe_status == KPROBE_REENTER) {
  265. restore_previous_kprobe(kcb);
  266. goto out;
  267. }
  268. reset_current_kprobe();
  269. out:
  270. preempt_enable_no_resched();
  271. return 1;
  272. }
  273. static int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
  274. {
  275. struct kprobe *cur = kprobe_running();
  276. struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
  277. const struct exception_table_entry *entry;
  278. switch(kcb->kprobe_status) {
  279. case KPROBE_HIT_SS:
  280. case KPROBE_REENTER:
  281. /*
  282. * We are here because the instruction being single
  283. * stepped caused a page fault. We reset the current
  284. * kprobe and the tpc points back to the probe address
  285. * and allow the page fault handler to continue as a
  286. * normal page fault.
  287. */
  288. regs->tpc = (unsigned long)cur->addr;
  289. regs->tnpc = kcb->kprobe_orig_tnpc;
  290. regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
  291. kcb->kprobe_orig_tstate_pil);
  292. if (kcb->kprobe_status == KPROBE_REENTER)
  293. restore_previous_kprobe(kcb);
  294. else
  295. reset_current_kprobe();
  296. preempt_enable_no_resched();
  297. break;
  298. case KPROBE_HIT_ACTIVE:
  299. case KPROBE_HIT_SSDONE:
  300. /*
  301. * We increment the nmissed count for accounting,
  302. * we can also use npre/npostfault count for accouting
  303. * these specific fault cases.
  304. */
  305. kprobes_inc_nmissed_count(cur);
  306. /*
  307. * We come here because instructions in the pre/post
  308. * handler caused the page_fault, this could happen
  309. * if handler tries to access user space by
  310. * copy_from_user(), get_user() etc. Let the
  311. * user-specified handler try to fix it first.
  312. */
  313. if (cur->fault_handler && cur->fault_handler(cur, regs, trapnr))
  314. return 1;
  315. /*
  316. * In case the user-specified fault handler returned
  317. * zero, try to fix up.
  318. */
  319. entry = search_exception_tables(regs->tpc);
  320. if (entry) {
  321. regs->tpc = entry->fixup;
  322. regs->tnpc = regs->tpc + 4;
  323. return 1;
  324. }
  325. /*
  326. * fixup_exception() could not handle it,
  327. * Let do_page_fault() fix it.
  328. */
  329. break;
  330. default:
  331. break;
  332. }
  333. return 0;
  334. }
  335. /*
  336. * Wrapper routine to for handling exceptions.
  337. */
  338. int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
  339. unsigned long val, void *data)
  340. {
  341. struct die_args *args = (struct die_args *)data;
  342. int ret = NOTIFY_DONE;
  343. if (args->regs && user_mode(args->regs))
  344. return ret;
  345. switch (val) {
  346. case DIE_DEBUG:
  347. if (kprobe_handler(args->regs))
  348. ret = NOTIFY_STOP;
  349. break;
  350. case DIE_DEBUG_2:
  351. if (post_kprobe_handler(args->regs))
  352. ret = NOTIFY_STOP;
  353. break;
  354. case DIE_GPF:
  355. case DIE_PAGE_FAULT:
  356. /* kprobe_running() needs smp_processor_id() */
  357. preempt_disable();
  358. if (kprobe_running() &&
  359. kprobe_fault_handler(args->regs, args->trapnr))
  360. ret = NOTIFY_STOP;
  361. preempt_enable();
  362. break;
  363. default:
  364. break;
  365. }
  366. return ret;
  367. }
  368. asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
  369. struct pt_regs *regs)
  370. {
  371. BUG_ON(trap_level != 0x170 && trap_level != 0x171);
  372. if (user_mode(regs)) {
  373. local_irq_enable();
  374. bad_trap(regs, trap_level);
  375. return;
  376. }
  377. /* trap_level == 0x170 --> ta 0x70
  378. * trap_level == 0x171 --> ta 0x71
  379. */
  380. if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
  381. (trap_level == 0x170) ? "debug" : "debug_2",
  382. regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
  383. bad_trap(regs, trap_level);
  384. }
  385. /* Jprobes support. */
  386. int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
  387. {
  388. struct jprobe *jp = container_of(p, struct jprobe, kp);
  389. struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
  390. memcpy(&(kcb->jprobe_saved_regs), regs, sizeof(*regs));
  391. regs->tpc = (unsigned long) jp->entry;
  392. regs->tnpc = ((unsigned long) jp->entry) + 0x4UL;
  393. regs->tstate |= TSTATE_PIL;
  394. return 1;
  395. }
  396. void __kprobes jprobe_return(void)
  397. {
  398. struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
  399. register unsigned long orig_fp asm("g1");
  400. orig_fp = kcb->jprobe_saved_regs.u_regs[UREG_FP];
  401. __asm__ __volatile__("\n"
  402. "1: cmp %%sp, %0\n\t"
  403. "blu,a,pt %%xcc, 1b\n\t"
  404. " restore\n\t"
  405. ".globl jprobe_return_trap_instruction\n"
  406. "jprobe_return_trap_instruction:\n\t"
  407. "ta 0x70"
  408. : /* no outputs */
  409. : "r" (orig_fp));
  410. }
  411. extern void jprobe_return_trap_instruction(void);
  412. extern void __show_regs(struct pt_regs * regs);
  413. int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs)
  414. {
  415. u32 *addr = (u32 *) regs->tpc;
  416. struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
  417. if (addr == (u32 *) jprobe_return_trap_instruction) {
  418. memcpy(regs, &(kcb->jprobe_saved_regs), sizeof(*regs));
  419. preempt_enable_no_resched();
  420. return 1;
  421. }
  422. return 0;
  423. }
  424. /* architecture specific initialization */
  425. int arch_init_kprobes(void)
  426. {
  427. return 0;
  428. }