cpufreq_32.c 18 KB

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  1. /*
  2. * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  3. * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * TODO: Need a big cleanup here. Basically, we need to have different
  10. * cpufreq_driver structures for the different type of HW instead of the
  11. * current mess. We also need to better deal with the detection of the
  12. * type of machine.
  13. *
  14. */
  15. #include <linux/module.h>
  16. #include <linux/types.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/pmu.h>
  23. #include <linux/slab.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/init.h>
  26. #include <linux/sysdev.h>
  27. #include <linux/i2c.h>
  28. #include <linux/hardirq.h>
  29. #include <asm/prom.h>
  30. #include <asm/machdep.h>
  31. #include <asm/irq.h>
  32. #include <asm/pmac_feature.h>
  33. #include <asm/mmu_context.h>
  34. #include <asm/sections.h>
  35. #include <asm/cputable.h>
  36. #include <asm/time.h>
  37. #include <asm/system.h>
  38. #include <asm/mpic.h>
  39. #include <asm/keylargo.h>
  40. /* WARNING !!! This will cause calibrate_delay() to be called,
  41. * but this is an __init function ! So you MUST go edit
  42. * init/main.c to make it non-init before enabling DEBUG_FREQ
  43. */
  44. #undef DEBUG_FREQ
  45. /*
  46. * There is a problem with the core cpufreq code on SMP kernels,
  47. * it won't recalculate the Bogomips properly
  48. */
  49. #ifdef CONFIG_SMP
  50. #warning "WARNING, CPUFREQ not recommended on SMP kernels"
  51. #endif
  52. extern void low_choose_7447a_dfs(int dfs);
  53. extern void low_choose_750fx_pll(int pll);
  54. extern void low_sleep_handler(void);
  55. /*
  56. * Currently, PowerMac cpufreq supports only high & low frequencies
  57. * that are set by the firmware
  58. */
  59. static unsigned int low_freq;
  60. static unsigned int hi_freq;
  61. static unsigned int cur_freq;
  62. static unsigned int sleep_freq;
  63. /*
  64. * Different models uses different mechanisms to switch the frequency
  65. */
  66. static int (*set_speed_proc)(int low_speed);
  67. static unsigned int (*get_speed_proc)(void);
  68. /*
  69. * Some definitions used by the various speedprocs
  70. */
  71. static u32 voltage_gpio;
  72. static u32 frequency_gpio;
  73. static u32 slew_done_gpio;
  74. static int no_schedule;
  75. static int has_cpu_l2lve;
  76. static int is_pmu_based;
  77. /* There are only two frequency states for each processor. Values
  78. * are in kHz for the time being.
  79. */
  80. #define CPUFREQ_HIGH 0
  81. #define CPUFREQ_LOW 1
  82. static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
  83. {CPUFREQ_HIGH, 0},
  84. {CPUFREQ_LOW, 0},
  85. {0, CPUFREQ_TABLE_END},
  86. };
  87. static struct freq_attr* pmac_cpu_freqs_attr[] = {
  88. &cpufreq_freq_attr_scaling_available_freqs,
  89. NULL,
  90. };
  91. static inline void local_delay(unsigned long ms)
  92. {
  93. if (no_schedule)
  94. mdelay(ms);
  95. else
  96. msleep(ms);
  97. }
  98. #ifdef DEBUG_FREQ
  99. static inline void debug_calc_bogomips(void)
  100. {
  101. /* This will cause a recalc of bogomips and display the
  102. * result. We backup/restore the value to avoid affecting the
  103. * core cpufreq framework's own calculation.
  104. */
  105. extern void calibrate_delay(void);
  106. unsigned long save_lpj = loops_per_jiffy;
  107. calibrate_delay();
  108. loops_per_jiffy = save_lpj;
  109. }
  110. #endif /* DEBUG_FREQ */
  111. /* Switch CPU speed under 750FX CPU control
  112. */
  113. static int cpu_750fx_cpu_speed(int low_speed)
  114. {
  115. u32 hid2;
  116. if (low_speed == 0) {
  117. /* ramping up, set voltage first */
  118. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  119. /* Make sure we sleep for at least 1ms */
  120. local_delay(10);
  121. /* tweak L2 for high voltage */
  122. if (has_cpu_l2lve) {
  123. hid2 = mfspr(SPRN_HID2);
  124. hid2 &= ~0x2000;
  125. mtspr(SPRN_HID2, hid2);
  126. }
  127. }
  128. #ifdef CONFIG_6xx
  129. low_choose_750fx_pll(low_speed);
  130. #endif
  131. if (low_speed == 1) {
  132. /* tweak L2 for low voltage */
  133. if (has_cpu_l2lve) {
  134. hid2 = mfspr(SPRN_HID2);
  135. hid2 |= 0x2000;
  136. mtspr(SPRN_HID2, hid2);
  137. }
  138. /* ramping down, set voltage last */
  139. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  140. local_delay(10);
  141. }
  142. return 0;
  143. }
  144. static unsigned int cpu_750fx_get_cpu_speed(void)
  145. {
  146. if (mfspr(SPRN_HID1) & HID1_PS)
  147. return low_freq;
  148. else
  149. return hi_freq;
  150. }
  151. /* Switch CPU speed using DFS */
  152. static int dfs_set_cpu_speed(int low_speed)
  153. {
  154. if (low_speed == 0) {
  155. /* ramping up, set voltage first */
  156. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  157. /* Make sure we sleep for at least 1ms */
  158. local_delay(1);
  159. }
  160. /* set frequency */
  161. #ifdef CONFIG_6xx
  162. low_choose_7447a_dfs(low_speed);
  163. #endif
  164. udelay(100);
  165. if (low_speed == 1) {
  166. /* ramping down, set voltage last */
  167. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  168. local_delay(1);
  169. }
  170. return 0;
  171. }
  172. static unsigned int dfs_get_cpu_speed(void)
  173. {
  174. if (mfspr(SPRN_HID1) & HID1_DFS)
  175. return low_freq;
  176. else
  177. return hi_freq;
  178. }
  179. /* Switch CPU speed using slewing GPIOs
  180. */
  181. static int gpios_set_cpu_speed(int low_speed)
  182. {
  183. int gpio, timeout = 0;
  184. /* If ramping up, set voltage first */
  185. if (low_speed == 0) {
  186. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
  187. /* Delay is way too big but it's ok, we schedule */
  188. local_delay(10);
  189. }
  190. /* Set frequency */
  191. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  192. if (low_speed == ((gpio & 0x01) == 0))
  193. goto skip;
  194. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
  195. low_speed ? 0x04 : 0x05);
  196. udelay(200);
  197. do {
  198. if (++timeout > 100)
  199. break;
  200. local_delay(1);
  201. gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
  202. } while((gpio & 0x02) == 0);
  203. skip:
  204. /* If ramping down, set voltage last */
  205. if (low_speed == 1) {
  206. pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
  207. /* Delay is way too big but it's ok, we schedule */
  208. local_delay(10);
  209. }
  210. #ifdef DEBUG_FREQ
  211. debug_calc_bogomips();
  212. #endif
  213. return 0;
  214. }
  215. /* Switch CPU speed under PMU control
  216. */
  217. static int pmu_set_cpu_speed(int low_speed)
  218. {
  219. struct adb_request req;
  220. unsigned long save_l2cr;
  221. unsigned long save_l3cr;
  222. unsigned int pic_prio;
  223. unsigned long flags;
  224. preempt_disable();
  225. #ifdef DEBUG_FREQ
  226. printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
  227. #endif
  228. pmu_suspend();
  229. /* Disable all interrupt sources on openpic */
  230. pic_prio = mpic_cpu_get_priority();
  231. mpic_cpu_set_priority(0xf);
  232. /* Make sure the decrementer won't interrupt us */
  233. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  234. /* Make sure any pending DEC interrupt occurring while we did
  235. * the above didn't re-enable the DEC */
  236. mb();
  237. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  238. /* We can now disable MSR_EE */
  239. local_irq_save(flags);
  240. /* Giveup the FPU & vec */
  241. enable_kernel_fp();
  242. #ifdef CONFIG_ALTIVEC
  243. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  244. enable_kernel_altivec();
  245. #endif /* CONFIG_ALTIVEC */
  246. /* Save & disable L2 and L3 caches */
  247. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  248. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  249. /* Send the new speed command. My assumption is that this command
  250. * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
  251. */
  252. pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
  253. while (!req.complete)
  254. pmu_poll();
  255. /* Prepare the northbridge for the speed transition */
  256. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
  257. /* Call low level code to backup CPU state and recover from
  258. * hardware reset
  259. */
  260. low_sleep_handler();
  261. /* Restore the northbridge */
  262. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
  263. /* Restore L2 cache */
  264. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  265. _set_L2CR(save_l2cr);
  266. /* Restore L3 cache */
  267. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  268. _set_L3CR(save_l3cr);
  269. /* Restore userland MMU context */
  270. set_context(current->active_mm->context.id, current->active_mm->pgd);
  271. #ifdef DEBUG_FREQ
  272. printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
  273. #endif
  274. /* Restore low level PMU operations */
  275. pmu_unlock();
  276. /* Restore decrementer */
  277. wakeup_decrementer();
  278. /* Restore interrupts */
  279. mpic_cpu_set_priority(pic_prio);
  280. /* Let interrupts flow again ... */
  281. local_irq_restore(flags);
  282. #ifdef DEBUG_FREQ
  283. debug_calc_bogomips();
  284. #endif
  285. pmu_resume();
  286. preempt_enable();
  287. return 0;
  288. }
  289. static int do_set_cpu_speed(int speed_mode, int notify)
  290. {
  291. struct cpufreq_freqs freqs;
  292. unsigned long l3cr;
  293. static unsigned long prev_l3cr;
  294. freqs.old = cur_freq;
  295. freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  296. freqs.cpu = smp_processor_id();
  297. if (freqs.old == freqs.new)
  298. return 0;
  299. if (notify)
  300. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  301. if (speed_mode == CPUFREQ_LOW &&
  302. cpu_has_feature(CPU_FTR_L3CR)) {
  303. l3cr = _get_L3CR();
  304. if (l3cr & L3CR_L3E) {
  305. prev_l3cr = l3cr;
  306. _set_L3CR(0);
  307. }
  308. }
  309. set_speed_proc(speed_mode == CPUFREQ_LOW);
  310. if (speed_mode == CPUFREQ_HIGH &&
  311. cpu_has_feature(CPU_FTR_L3CR)) {
  312. l3cr = _get_L3CR();
  313. if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
  314. _set_L3CR(prev_l3cr);
  315. }
  316. if (notify)
  317. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  318. cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
  319. return 0;
  320. }
  321. static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
  322. {
  323. return cur_freq;
  324. }
  325. static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
  326. {
  327. return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
  328. }
  329. static int pmac_cpufreq_target( struct cpufreq_policy *policy,
  330. unsigned int target_freq,
  331. unsigned int relation)
  332. {
  333. unsigned int newstate = 0;
  334. int rc;
  335. if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
  336. target_freq, relation, &newstate))
  337. return -EINVAL;
  338. rc = do_set_cpu_speed(newstate, 1);
  339. ppc_proc_freq = cur_freq * 1000ul;
  340. return rc;
  341. }
  342. static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
  343. {
  344. if (policy->cpu != 0)
  345. return -ENODEV;
  346. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  347. policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
  348. policy->cur = cur_freq;
  349. cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
  350. return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
  351. }
  352. static u32 read_gpio(struct device_node *np)
  353. {
  354. const u32 *reg = get_property(np, "reg", NULL);
  355. u32 offset;
  356. if (reg == NULL)
  357. return 0;
  358. /* That works for all keylargos but shall be fixed properly
  359. * some day... The problem is that it seems we can't rely
  360. * on the "reg" property of the GPIO nodes, they are either
  361. * relative to the base of KeyLargo or to the base of the
  362. * GPIO space, and the device-tree doesn't help.
  363. */
  364. offset = *reg;
  365. if (offset < KEYLARGO_GPIO_LEVELS0)
  366. offset += KEYLARGO_GPIO_LEVELS0;
  367. return offset;
  368. }
  369. static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
  370. {
  371. /* Ok, this could be made a bit smarter, but let's be robust for now. We
  372. * always force a speed change to high speed before sleep, to make sure
  373. * we have appropriate voltage and/or bus speed for the wakeup process,
  374. * and to make sure our loops_per_jiffies are "good enough", that is will
  375. * not cause too short delays if we sleep in low speed and wake in high
  376. * speed..
  377. */
  378. no_schedule = 1;
  379. sleep_freq = cur_freq;
  380. if (cur_freq == low_freq && !is_pmu_based)
  381. do_set_cpu_speed(CPUFREQ_HIGH, 0);
  382. return 0;
  383. }
  384. static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
  385. {
  386. /* If we resume, first check if we have a get() function */
  387. if (get_speed_proc)
  388. cur_freq = get_speed_proc();
  389. else
  390. cur_freq = 0;
  391. /* We don't, hrm... we don't really know our speed here, best
  392. * is that we force a switch to whatever it was, which is
  393. * probably high speed due to our suspend() routine
  394. */
  395. do_set_cpu_speed(sleep_freq == low_freq ?
  396. CPUFREQ_LOW : CPUFREQ_HIGH, 0);
  397. ppc_proc_freq = cur_freq * 1000ul;
  398. no_schedule = 0;
  399. return 0;
  400. }
  401. static struct cpufreq_driver pmac_cpufreq_driver = {
  402. .verify = pmac_cpufreq_verify,
  403. .target = pmac_cpufreq_target,
  404. .get = pmac_cpufreq_get_speed,
  405. .init = pmac_cpufreq_cpu_init,
  406. .suspend = pmac_cpufreq_suspend,
  407. .resume = pmac_cpufreq_resume,
  408. .flags = CPUFREQ_PM_NO_WARN,
  409. .attr = pmac_cpu_freqs_attr,
  410. .name = "powermac",
  411. .owner = THIS_MODULE,
  412. };
  413. static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
  414. {
  415. struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
  416. "voltage-gpio");
  417. struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
  418. "frequency-gpio");
  419. struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
  420. "slewing-done");
  421. const u32 *value;
  422. /*
  423. * Check to see if it's GPIO driven or PMU only
  424. *
  425. * The way we extract the GPIO address is slightly hackish, but it
  426. * works well enough for now. We need to abstract the whole GPIO
  427. * stuff sooner or later anyway
  428. */
  429. if (volt_gpio_np)
  430. voltage_gpio = read_gpio(volt_gpio_np);
  431. if (freq_gpio_np)
  432. frequency_gpio = read_gpio(freq_gpio_np);
  433. if (slew_done_gpio_np)
  434. slew_done_gpio = read_gpio(slew_done_gpio_np);
  435. /* If we use the frequency GPIOs, calculate the min/max speeds based
  436. * on the bus frequencies
  437. */
  438. if (frequency_gpio && slew_done_gpio) {
  439. int lenp, rc;
  440. const u32 *freqs, *ratio;
  441. freqs = get_property(cpunode, "bus-frequencies", &lenp);
  442. lenp /= sizeof(u32);
  443. if (freqs == NULL || lenp != 2) {
  444. printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
  445. return 1;
  446. }
  447. ratio = get_property(cpunode, "processor-to-bus-ratio*2", NULL);
  448. if (ratio == NULL) {
  449. printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
  450. return 1;
  451. }
  452. /* Get the min/max bus frequencies */
  453. low_freq = min(freqs[0], freqs[1]);
  454. hi_freq = max(freqs[0], freqs[1]);
  455. /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
  456. * frequency, it claims it to be around 84Mhz on some models while
  457. * it appears to be approx. 101Mhz on all. Let's hack around here...
  458. * fortunately, we don't need to be too precise
  459. */
  460. if (low_freq < 98000000)
  461. low_freq = 101000000;
  462. /* Convert those to CPU core clocks */
  463. low_freq = (low_freq * (*ratio)) / 2000;
  464. hi_freq = (hi_freq * (*ratio)) / 2000;
  465. /* Now we get the frequencies, we read the GPIO to see what is out current
  466. * speed
  467. */
  468. rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
  469. cur_freq = (rc & 0x01) ? hi_freq : low_freq;
  470. set_speed_proc = gpios_set_cpu_speed;
  471. return 1;
  472. }
  473. /* If we use the PMU, look for the min & max frequencies in the
  474. * device-tree
  475. */
  476. value = get_property(cpunode, "min-clock-frequency", NULL);
  477. if (!value)
  478. return 1;
  479. low_freq = (*value) / 1000;
  480. /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
  481. * here */
  482. if (low_freq < 100000)
  483. low_freq *= 10;
  484. value = get_property(cpunode, "max-clock-frequency", NULL);
  485. if (!value)
  486. return 1;
  487. hi_freq = (*value) / 1000;
  488. set_speed_proc = pmu_set_cpu_speed;
  489. is_pmu_based = 1;
  490. return 0;
  491. }
  492. static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
  493. {
  494. struct device_node *volt_gpio_np;
  495. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  496. return 1;
  497. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  498. if (volt_gpio_np)
  499. voltage_gpio = read_gpio(volt_gpio_np);
  500. if (!voltage_gpio){
  501. printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
  502. return 1;
  503. }
  504. /* OF only reports the high frequency */
  505. hi_freq = cur_freq;
  506. low_freq = cur_freq/2;
  507. /* Read actual frequency from CPU */
  508. cur_freq = dfs_get_cpu_speed();
  509. set_speed_proc = dfs_set_cpu_speed;
  510. get_speed_proc = dfs_get_cpu_speed;
  511. return 0;
  512. }
  513. static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
  514. {
  515. struct device_node *volt_gpio_np;
  516. u32 pvr;
  517. const u32 *value;
  518. if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
  519. return 1;
  520. hi_freq = cur_freq;
  521. value = get_property(cpunode, "reduced-clock-frequency", NULL);
  522. if (!value)
  523. return 1;
  524. low_freq = (*value) / 1000;
  525. volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
  526. if (volt_gpio_np)
  527. voltage_gpio = read_gpio(volt_gpio_np);
  528. pvr = mfspr(SPRN_PVR);
  529. has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
  530. set_speed_proc = cpu_750fx_cpu_speed;
  531. get_speed_proc = cpu_750fx_get_cpu_speed;
  532. cur_freq = cpu_750fx_get_cpu_speed();
  533. return 0;
  534. }
  535. /* Currently, we support the following machines:
  536. *
  537. * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
  538. * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
  539. * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
  540. * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
  541. * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
  542. * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
  543. * - Recent MacRISC3 laptops
  544. * - All new machines with 7447A CPUs
  545. */
  546. static int __init pmac_cpufreq_setup(void)
  547. {
  548. struct device_node *cpunode;
  549. const u32 *value;
  550. if (strstr(cmd_line, "nocpufreq"))
  551. return 0;
  552. /* Assume only one CPU */
  553. cpunode = find_type_devices("cpu");
  554. if (!cpunode)
  555. goto out;
  556. /* Get current cpu clock freq */
  557. value = get_property(cpunode, "clock-frequency", NULL);
  558. if (!value)
  559. goto out;
  560. cur_freq = (*value) / 1000;
  561. /* Check for 7447A based MacRISC3 */
  562. if (machine_is_compatible("MacRISC3") &&
  563. get_property(cpunode, "dynamic-power-step", NULL) &&
  564. PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
  565. pmac_cpufreq_init_7447A(cpunode);
  566. /* Check for other MacRISC3 machines */
  567. } else if (machine_is_compatible("PowerBook3,4") ||
  568. machine_is_compatible("PowerBook3,5") ||
  569. machine_is_compatible("MacRISC3")) {
  570. pmac_cpufreq_init_MacRISC3(cpunode);
  571. /* Else check for iBook2 500/600 */
  572. } else if (machine_is_compatible("PowerBook4,1")) {
  573. hi_freq = cur_freq;
  574. low_freq = 400000;
  575. set_speed_proc = pmu_set_cpu_speed;
  576. is_pmu_based = 1;
  577. }
  578. /* Else check for TiPb 550 */
  579. else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
  580. hi_freq = cur_freq;
  581. low_freq = 500000;
  582. set_speed_proc = pmu_set_cpu_speed;
  583. is_pmu_based = 1;
  584. }
  585. /* Else check for TiPb 400 & 500 */
  586. else if (machine_is_compatible("PowerBook3,2")) {
  587. /* We only know about the 400 MHz and the 500Mhz model
  588. * they both have 300 MHz as low frequency
  589. */
  590. if (cur_freq < 350000 || cur_freq > 550000)
  591. goto out;
  592. hi_freq = cur_freq;
  593. low_freq = 300000;
  594. set_speed_proc = pmu_set_cpu_speed;
  595. is_pmu_based = 1;
  596. }
  597. /* Else check for 750FX */
  598. else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
  599. pmac_cpufreq_init_750FX(cpunode);
  600. out:
  601. if (set_speed_proc == NULL)
  602. return -ENODEV;
  603. pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
  604. pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
  605. ppc_proc_freq = cur_freq * 1000ul;
  606. printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
  607. printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
  608. low_freq/1000, hi_freq/1000, cur_freq/1000);
  609. return cpufreq_register_driver(&pmac_cpufreq_driver);
  610. }
  611. module_init(pmac_cpufreq_setup);