mpc866ads.dts 3.4 KB

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  1. /*
  2. * MPC866 ADS Device Tree Source
  3. *
  4. * Copyright 2006 MontaVista Software, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC866ADS";
  13. compatible = "mpc8xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,866@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <2000>; // L1, 8K
  28. i-cache-size = <4000>; // L1, 16K
  29. timebase-frequency = <0>;
  30. bus-frequency = <0>;
  31. clock-frequency = <0>;
  32. 32-bit;
  33. interrupts = <f 2>; // decrementer interrupt
  34. interrupt-parent = <ff000000>;
  35. linux,phandle = <201>;
  36. linux,boot-cpu;
  37. };
  38. };
  39. memory {
  40. device_type = "memory";
  41. linux,phandle = <300>;
  42. reg = <00000000 800000>;
  43. };
  44. soc866@ff000000 {
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. #interrupt-cells = <2>;
  48. device_type = "soc";
  49. ranges = <0 ff000000 00100000>;
  50. reg = <ff000000 00000200>;
  51. bus-frequency = <0>;
  52. mdio@e80 {
  53. device_type = "mdio";
  54. compatible = "fs_enet";
  55. reg = <e80 8>;
  56. linux,phandle = <e80>;
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. ethernet-phy@f {
  60. linux,phandle = <e800f>;
  61. reg = <f>;
  62. device_type = "ethernet-phy";
  63. };
  64. };
  65. fec@e00 {
  66. device_type = "network";
  67. compatible = "fs_enet";
  68. model = "FEC";
  69. device-id = <1>;
  70. reg = <e00 188>;
  71. mac-address = [ 00 00 0C 00 01 FD ];
  72. interrupts = <3 1>;
  73. interrupt-parent = <ff000000>;
  74. phy-handle = <e800f>;
  75. };
  76. pic@ff000000 {
  77. linux,phandle = <ff000000>;
  78. interrupt-controller;
  79. #address-cells = <0>;
  80. #interrupt-cells = <2>;
  81. reg = <0 24>;
  82. built-in;
  83. device_type = "mpc8xx-pic";
  84. compatible = "CPM";
  85. };
  86. cpm@ff000000 {
  87. linux,phandle = <ff000000>;
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. #interrupt-cells = <2>;
  91. device_type = "cpm";
  92. model = "CPM";
  93. ranges = <0 0 4000>;
  94. reg = <860 f0>;
  95. command-proc = <9c0>;
  96. brg-frequency = <0>;
  97. interrupts = <0 2>; // cpm error interrupt
  98. interrupt-parent = <930>;
  99. pic@930 {
  100. linux,phandle = <930>;
  101. interrupt-controller;
  102. #address-cells = <0>;
  103. #interrupt-cells = <2>;
  104. interrupts = <5 2 0 2>;
  105. interrupt-parent = <ff000000>;
  106. reg = <930 20>;
  107. built-in;
  108. device_type = "cpm-pic";
  109. compatible = "CPM";
  110. };
  111. smc@a80 {
  112. device_type = "serial";
  113. compatible = "cpm_uart";
  114. model = "SMC";
  115. device-id = <1>;
  116. reg = <a80 10 3e80 40>;
  117. clock-setup = <00ffffff 0>;
  118. rx-clock = <1>;
  119. tx-clock = <1>;
  120. current-speed = <0>;
  121. interrupts = <4 3>;
  122. interrupt-parent = <930>;
  123. };
  124. smc@a90 {
  125. device_type = "serial";
  126. compatible = "cpm_uart";
  127. model = "SMC";
  128. device-id = <2>;
  129. reg = <a90 20 3f80 40>;
  130. clock-setup = <ff00ffff 90000>;
  131. rx-clock = <2>;
  132. tx-clock = <2>;
  133. current-speed = <0>;
  134. interrupts = <3 3>;
  135. interrupt-parent = <930>;
  136. };
  137. scc@a00 {
  138. device_type = "network";
  139. compatible = "fs_enet";
  140. model = "SCC";
  141. device-id = <1>;
  142. reg = <a00 18 3c00 80>;
  143. mac-address = [ 00 00 0C 00 03 FD ];
  144. interrupts = <1e 3>;
  145. interrupt-parent = <930>;
  146. };
  147. };
  148. };
  149. };