mpc8560ads.dts 6.6 KB

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  1. /*
  2. * MPC8560 ADS Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8560ADS";
  13. compatible = "MPC85xxADS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,8560@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <8000>; // L1, 32K
  28. i-cache-size = <8000>; // L1, 32K
  29. timebase-frequency = <04ead9a0>;
  30. bus-frequency = <13ab6680>;
  31. clock-frequency = <312c8040>;
  32. 32-bit;
  33. linux,phandle = <201>;
  34. linux,boot-cpu;
  35. };
  36. };
  37. memory {
  38. device_type = "memory";
  39. linux,phandle = <300>;
  40. reg = <00000000 10000000>;
  41. };
  42. soc8560@e0000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. #interrupt-cells = <2>;
  46. device_type = "soc";
  47. ranges = <0 e0000000 00100000>;
  48. reg = <e0000000 00000200>;
  49. bus-frequency = <13ab6680>;
  50. mdio@24520 {
  51. device_type = "mdio";
  52. compatible = "gianfar";
  53. reg = <24520 20>;
  54. linux,phandle = <24520>;
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. ethernet-phy@0 {
  58. linux,phandle = <2452000>;
  59. interrupt-parent = <40000>;
  60. interrupts = <35 1>;
  61. reg = <0>;
  62. device_type = "ethernet-phy";
  63. };
  64. ethernet-phy@1 {
  65. linux,phandle = <2452001>;
  66. interrupt-parent = <40000>;
  67. interrupts = <35 1>;
  68. reg = <1>;
  69. device_type = "ethernet-phy";
  70. };
  71. ethernet-phy@2 {
  72. linux,phandle = <2452002>;
  73. interrupt-parent = <40000>;
  74. interrupts = <37 1>;
  75. reg = <2>;
  76. device_type = "ethernet-phy";
  77. };
  78. ethernet-phy@3 {
  79. linux,phandle = <2452003>;
  80. interrupt-parent = <40000>;
  81. interrupts = <37 1>;
  82. reg = <3>;
  83. device_type = "ethernet-phy";
  84. };
  85. };
  86. ethernet@24000 {
  87. device_type = "network";
  88. model = "TSEC";
  89. compatible = "gianfar";
  90. reg = <24000 1000>;
  91. address = [ 00 00 0C 00 00 FD ];
  92. interrupts = <d 2 e 2 12 2>;
  93. interrupt-parent = <40000>;
  94. phy-handle = <2452000>;
  95. };
  96. ethernet@25000 {
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. device_type = "network";
  100. model = "TSEC";
  101. compatible = "gianfar";
  102. reg = <25000 1000>;
  103. address = [ 00 00 0C 00 01 FD ];
  104. interrupts = <13 2 14 2 18 2>;
  105. interrupt-parent = <40000>;
  106. phy-handle = <2452001>;
  107. };
  108. pci@8000 {
  109. linux,phandle = <8000>;
  110. #interrupt-cells = <1>;
  111. #size-cells = <2>;
  112. #address-cells = <3>;
  113. compatible = "85xx";
  114. device_type = "pci";
  115. reg = <8000 400>;
  116. clock-frequency = <3f940aa>;
  117. interrupt-map-mask = <f800 0 0 7>;
  118. interrupt-map = <
  119. /* IDSEL 0x2 */
  120. 1000 0 0 1 40000 31 1
  121. 1000 0 0 2 40000 32 1
  122. 1000 0 0 3 40000 33 1
  123. 1000 0 0 4 40000 34 1
  124. /* IDSEL 0x3 */
  125. 1800 0 0 1 40000 34 1
  126. 1800 0 0 2 40000 31 1
  127. 1800 0 0 3 40000 32 1
  128. 1800 0 0 4 40000 33 1
  129. /* IDSEL 0x4 */
  130. 2000 0 0 1 40000 33 1
  131. 2000 0 0 2 40000 34 1
  132. 2000 0 0 3 40000 31 1
  133. 2000 0 0 4 40000 32 1
  134. /* IDSEL 0x5 */
  135. 2800 0 0 1 40000 32 1
  136. 2800 0 0 2 40000 33 1
  137. 2800 0 0 3 40000 34 1
  138. 2800 0 0 4 40000 31 1
  139. /* IDSEL 12 */
  140. 6000 0 0 1 40000 31 1
  141. 6000 0 0 2 40000 32 1
  142. 6000 0 0 3 40000 33 1
  143. 6000 0 0 4 40000 34 1
  144. /* IDSEL 13 */
  145. 6800 0 0 1 40000 34 1
  146. 6800 0 0 2 40000 31 1
  147. 6800 0 0 3 40000 32 1
  148. 6800 0 0 4 40000 33 1
  149. /* IDSEL 14*/
  150. 7000 0 0 1 40000 33 1
  151. 7000 0 0 2 40000 34 1
  152. 7000 0 0 3 40000 31 1
  153. 7000 0 0 4 40000 32 1
  154. /* IDSEL 15 */
  155. 7800 0 0 1 40000 32 1
  156. 7800 0 0 2 40000 33 1
  157. 7800 0 0 3 40000 34 1
  158. 7800 0 0 4 40000 31 1
  159. /* IDSEL 18 */
  160. 9000 0 0 1 40000 31 1
  161. 9000 0 0 2 40000 32 1
  162. 9000 0 0 3 40000 33 1
  163. 9000 0 0 4 40000 34 1
  164. /* IDSEL 19 */
  165. 9800 0 0 1 40000 34 1
  166. 9800 0 0 2 40000 31 1
  167. 9800 0 0 3 40000 32 1
  168. 9800 0 0 4 40000 33 1
  169. /* IDSEL 20 */
  170. a000 0 0 1 40000 33 1
  171. a000 0 0 2 40000 34 1
  172. a000 0 0 3 40000 31 1
  173. a000 0 0 4 40000 32 1
  174. /* IDSEL 21 */
  175. a800 0 0 1 40000 32 1
  176. a800 0 0 2 40000 33 1
  177. a800 0 0 3 40000 34 1
  178. a800 0 0 4 40000 31 1>;
  179. interrupt-parent = <40000>;
  180. interrupts = <8 0>;
  181. bus-range = <0 0>;
  182. ranges = <02000000 0 80000000 80000000 0 20000000
  183. 01000000 0 00000000 e2000000 0 01000000>;
  184. };
  185. pic@40000 {
  186. linux,phandle = <40000>;
  187. interrupt-controller;
  188. #address-cells = <0>;
  189. #interrupt-cells = <2>;
  190. reg = <40000 20100>;
  191. built-in;
  192. device_type = "open-pic";
  193. };
  194. cpm@e0000000 {
  195. linux,phandle = <e0000000>;
  196. #address-cells = <1>;
  197. #size-cells = <1>;
  198. #interrupt-cells = <2>;
  199. device_type = "cpm";
  200. model = "CPM2";
  201. ranges = <0 0 c0000>;
  202. reg = <80000 40000>;
  203. command-proc = <919c0>;
  204. brg-frequency = <9d5b340>;
  205. pic@90c00 {
  206. linux,phandle = <90c00>;
  207. interrupt-controller;
  208. #address-cells = <0>;
  209. #interrupt-cells = <2>;
  210. interrupts = <1e 0>;
  211. interrupt-parent = <40000>;
  212. reg = <90c00 80>;
  213. built-in;
  214. device_type = "cpm-pic";
  215. };
  216. scc@91a00 {
  217. device_type = "serial";
  218. compatible = "cpm_uart";
  219. model = "SCC";
  220. device-id = <1>;
  221. reg = <91a00 20 88000 100>;
  222. clock-setup = <00ffffff 0>;
  223. rx-clock = <1>;
  224. tx-clock = <1>;
  225. current-speed = <1c200>;
  226. interrupts = <28 8>;
  227. interrupt-parent = <90c00>;
  228. };
  229. scc@91a20 {
  230. device_type = "serial";
  231. compatible = "cpm_uart";
  232. model = "SCC";
  233. device-id = <2>;
  234. reg = <91a20 20 88100 100>;
  235. clock-setup = <ff00ffff 90000>;
  236. rx-clock = <2>;
  237. tx-clock = <2>;
  238. current-speed = <1c200>;
  239. interrupts = <29 8>;
  240. interrupt-parent = <90c00>;
  241. };
  242. fcc@91320 {
  243. device_type = "network";
  244. compatible = "fs_enet";
  245. model = "FCC";
  246. device-id = <2>;
  247. reg = <91320 20 88500 100 913a0 30>;
  248. mac-address = [ 00 00 0C 00 02 FD ];
  249. clock-setup = <ff00ffff 250000>;
  250. rx-clock = <15>;
  251. tx-clock = <16>;
  252. interrupts = <21 8>;
  253. interrupt-parent = <90c00>;
  254. phy-handle = <2452002>;
  255. };
  256. fcc@91340 {
  257. device_type = "network";
  258. compatible = "fs_enet";
  259. model = "FCC";
  260. device-id = <3>;
  261. reg = <91340 20 88600 100 913d0 30>;
  262. mac-address = [ 00 00 0C 00 03 FD ];
  263. clock-setup = <ffff00ff 3700>;
  264. rx-clock = <17>;
  265. tx-clock = <18>;
  266. interrupts = <22 8>;
  267. interrupt-parent = <90c00>;
  268. phy-handle = <2452003>;
  269. };
  270. };
  271. };
  272. };