mpc8272ads.dts 9.0 KB

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  1. /*
  2. * MPC8272 ADS Device Tree Source
  3. *
  4. * Copyright 2005 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8272ADS";
  13. compatible = "MPC8260ADS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #cpus = <1>;
  19. #address-cells = <1>;
  20. #size-cells = <0>;
  21. linux,phandle = <200>;
  22. PowerPC,8272@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <4000>; // L1, 16K
  28. i-cache-size = <4000>; // L1, 16K
  29. timebase-frequency = <0>;
  30. bus-frequency = <0>;
  31. clock-frequency = <0>;
  32. 32-bit;
  33. linux,phandle = <201>;
  34. linux,boot-cpu;
  35. };
  36. };
  37. interrupt-controller@f8200000 {
  38. linux,phandle = <f8200000>;
  39. #address-cells = <0>;
  40. #interrupt-cells = <2>;
  41. interrupt-controller;
  42. reg = <f8200000 f8200004>;
  43. built-in;
  44. device_type = "pci-pic";
  45. };
  46. memory {
  47. device_type = "memory";
  48. linux,phandle = <300>;
  49. reg = <00000000 4000000 f4500000 00000020>;
  50. };
  51. chosen {
  52. name = "chosen";
  53. linux,platform = <0>;
  54. interrupt-controller = <10c00>;
  55. linux,phandle = <400>;
  56. };
  57. soc8272@f0000000 {
  58. #address-cells = <1>;
  59. #size-cells = <1>;
  60. #interrupt-cells = <2>;
  61. device_type = "soc";
  62. ranges = <00000000 f0000000 00053000>;
  63. reg = <f0000000 10000>;
  64. mdio@0 {
  65. device_type = "mdio";
  66. compatible = "fs_enet";
  67. reg = <0 0>;
  68. linux,phandle = <24520>;
  69. #address-cells = <1>;
  70. #size-cells = <0>;
  71. ethernet-phy@0 {
  72. linux,phandle = <2452000>;
  73. interrupt-parent = <10c00>;
  74. interrupts = <17 4>;
  75. reg = <0>;
  76. bitbang = [ 12 12 13 02 02 01 ];
  77. device_type = "ethernet-phy";
  78. };
  79. ethernet-phy@1 {
  80. linux,phandle = <2452001>;
  81. interrupt-parent = <10c00>;
  82. interrupts = <17 4>;
  83. bitbang = [ 12 12 13 02 02 01 ];
  84. reg = <3>;
  85. device_type = "ethernet-phy";
  86. };
  87. };
  88. ethernet@24000 {
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. device_type = "network";
  92. device-id = <1>;
  93. compatible = "fs_enet";
  94. model = "FCC";
  95. reg = <11300 20 8400 100 11380 30>;
  96. mac-address = [ 00 11 2F 99 43 54 ];
  97. interrupts = <20 2>;
  98. interrupt-parent = <10c00>;
  99. phy-handle = <2452000>;
  100. rx-clock = <13>;
  101. tx-clock = <12>;
  102. };
  103. ethernet@25000 {
  104. device_type = "network";
  105. device-id = <2>;
  106. compatible = "fs_enet";
  107. model = "FCC";
  108. reg = <11320 20 8500 100 113b0 30>;
  109. mac-address = [ 00 11 2F 99 44 54 ];
  110. interrupts = <21 2>;
  111. interrupt-parent = <10c00>;
  112. phy-handle = <2452001>;
  113. rx-clock = <17>;
  114. tx-clock = <18>;
  115. };
  116. cpm@f0000000 {
  117. linux,phandle = <f0000000>;
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. #interrupt-cells = <2>;
  121. device_type = "cpm";
  122. model = "CPM2";
  123. ranges = <00000000 00000000 20000>;
  124. reg = <0 20000>;
  125. command-proc = <119c0>;
  126. brg-frequency = <17D7840>;
  127. cpm_clk = <BEBC200>;
  128. scc@11a00 {
  129. device_type = "serial";
  130. compatible = "cpm_uart";
  131. model = "SCC";
  132. device-id = <1>;
  133. reg = <11a00 20 8000 100>;
  134. current-speed = <1c200>;
  135. interrupts = <28 2>;
  136. interrupt-parent = <10c00>;
  137. clock-setup = <0 00ffffff>;
  138. rx-clock = <1>;
  139. tx-clock = <1>;
  140. };
  141. scc@11a60 {
  142. device_type = "serial";
  143. compatible = "cpm_uart";
  144. model = "SCC";
  145. device-id = <4>;
  146. reg = <11a60 20 8300 100>;
  147. current-speed = <1c200>;
  148. interrupts = <2b 2>;
  149. interrupt-parent = <10c00>;
  150. clock-setup = <1b ffffff00>;
  151. rx-clock = <4>;
  152. tx-clock = <4>;
  153. };
  154. };
  155. interrupt-controller@10c00 {
  156. linux,phandle = <10c00>;
  157. #address-cells = <0>;
  158. #interrupt-cells = <2>;
  159. interrupt-controller;
  160. reg = <10c00 80>;
  161. built-in;
  162. device_type = "cpm-pic";
  163. compatible = "CPM2";
  164. };
  165. pci@0500 {
  166. linux,phandle = <0500>;
  167. #interrupt-cells = <1>;
  168. #size-cells = <2>;
  169. #address-cells = <3>;
  170. compatible = "8272";
  171. device_type = "pci";
  172. reg = <10430 4dc>;
  173. clock-frequency = <3f940aa>;
  174. interrupt-map-mask = <f800 0 0 7>;
  175. interrupt-map = <
  176. /* IDSEL 0x16 */
  177. b000 0 0 1 f8200000 40 8
  178. b000 0 0 2 f8200000 41 8
  179. b000 0 0 3 f8200000 42 8
  180. b000 0 0 4 f8200000 43 8
  181. /* IDSEL 0x17 */
  182. b800 0 0 1 f8200000 43 8
  183. b800 0 0 2 f8200000 40 8
  184. b800 0 0 3 f8200000 41 8
  185. b800 0 0 4 f8200000 42 8
  186. /* IDSEL 0x18 */
  187. c000 0 0 1 f8200000 42 8
  188. c000 0 0 2 f8200000 43 8
  189. c000 0 0 3 f8200000 40 8
  190. c000 0 0 4 f8200000 41 8>;
  191. interrupt-parent = <10c00>;
  192. interrupts = <14 8>;
  193. bus-range = <0 0>;
  194. ranges = <02000000 0 80000000 80000000 0 40000000
  195. 01000000 0 00000000 f6000000 0 02000000>;
  196. };
  197. /* May need to remove if on a part without crypto engine */
  198. crypto@30000 {
  199. device_type = "crypto";
  200. model = "SEC2";
  201. compatible = "talitos";
  202. reg = <30000 10000>;
  203. interrupts = <b 2>;
  204. interrupt-parent = <10c00>;
  205. num-channels = <4>;
  206. channel-fifo-len = <18>;
  207. exec-units-mask = <0000007e>;
  208. /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
  209. descriptor-types-mask = <01010ebf>;
  210. };
  211. };
  212. };