uart-irq.c 2.4 KB

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  1. /*
  2. * Copyright 2002 Momentum Computer
  3. * Author: mdharm@momenco.com
  4. *
  5. * arch/mips/momentum/ocelot_c/uart-irq.c
  6. * Interrupt routines for UARTs. Interrupt numbers are assigned from
  7. * 80 to 81 (2 interrupt sources).
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel_stat.h>
  20. #include <asm/io.h>
  21. #include <asm/irq.h>
  22. #include "ocelot_c_fpga.h"
  23. static inline int ls1bit8(unsigned int x)
  24. {
  25. int b = 7, s;
  26. s = 4; if (((unsigned char)(x << 4)) == 0) s = 0; b -= s; x <<= s;
  27. s = 2; if (((unsigned char)(x << 2)) == 0) s = 0; b -= s; x <<= s;
  28. s = 1; if (((unsigned char)(x << 1)) == 0) s = 0; b -= s;
  29. return b;
  30. }
  31. /* mask off an interrupt -- 0 is enable, 1 is disable */
  32. static inline void mask_uart_irq(unsigned int irq)
  33. {
  34. uint8_t value;
  35. value = OCELOT_FPGA_READ(UART_INTMASK);
  36. value |= 1 << (irq - 74);
  37. OCELOT_FPGA_WRITE(value, UART_INTMASK);
  38. /* read the value back to assure that it's really been written */
  39. value = OCELOT_FPGA_READ(UART_INTMASK);
  40. }
  41. /* unmask an interrupt -- 0 is enable, 1 is disable */
  42. static inline void unmask_uart_irq(unsigned int irq)
  43. {
  44. uint8_t value;
  45. value = OCELOT_FPGA_READ(UART_INTMASK);
  46. value &= ~(1 << (irq - 74));
  47. OCELOT_FPGA_WRITE(value, UART_INTMASK);
  48. /* read the value back to assure that it's really been written */
  49. value = OCELOT_FPGA_READ(UART_INTMASK);
  50. }
  51. /*
  52. * Interrupt handler for interrupts coming from the FPGA chip.
  53. */
  54. void ll_uart_irq(void)
  55. {
  56. unsigned int irq_src, irq_mask;
  57. /* read the interrupt status registers */
  58. irq_src = OCELOT_FPGA_READ(UART_INTSTAT);
  59. irq_mask = OCELOT_FPGA_READ(UART_INTMASK);
  60. /* mask for just the interrupts we want */
  61. irq_src &= ~irq_mask;
  62. do_IRQ(ls1bit8(irq_src) + 74);
  63. }
  64. struct irq_chip uart_irq_type = {
  65. .name = "UART/FPGA",
  66. .ack = mask_uart_irq,
  67. .mask = mask_uart_irq,
  68. .mask_ack = mask_uart_irq,
  69. .unmask = unmask_uart_irq,
  70. };
  71. void uart_irq_init(void)
  72. {
  73. set_irq_chip_and_handler(80, &uart_irq_type, handle_level_irq);
  74. set_irq_chip_and_handler(81, &uart_irq_type, handle_level_irq);
  75. }