smp.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or
  3. * modify it under the terms of the GNU General Public License
  4. * as published by the Free Software Foundation; either version 2
  5. * of the License, or (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2000, 2001 Kanoj Sarcar
  17. * Copyright (C) 2000, 2001 Ralf Baechle
  18. * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19. * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20. */
  21. #include <linux/cache.h>
  22. #include <linux/delay.h>
  23. #include <linux/init.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/threads.h>
  27. #include <linux/module.h>
  28. #include <linux/time.h>
  29. #include <linux/timex.h>
  30. #include <linux/sched.h>
  31. #include <linux/cpumask.h>
  32. #include <linux/cpu.h>
  33. #include <asm/atomic.h>
  34. #include <asm/cpu.h>
  35. #include <asm/processor.h>
  36. #include <asm/system.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/smp.h>
  39. #ifdef CONFIG_MIPS_MT_SMTC
  40. #include <asm/mipsmtregs.h>
  41. #endif /* CONFIG_MIPS_MT_SMTC */
  42. cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */
  43. volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
  44. cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */
  45. int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
  46. int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
  47. EXPORT_SYMBOL(phys_cpu_present_map);
  48. EXPORT_SYMBOL(cpu_online_map);
  49. static void smp_tune_scheduling (void)
  50. {
  51. struct cache_desc *cd = &current_cpu_data.scache;
  52. unsigned long cachesize; /* kB */
  53. unsigned long cpu_khz;
  54. /*
  55. * Crude estimate until we actually meassure ...
  56. */
  57. cpu_khz = loops_per_jiffy * 2 * HZ / 1000;
  58. /*
  59. * Rough estimation for SMP scheduling, this is the number of
  60. * cycles it takes for a fully memory-limited process to flush
  61. * the SMP-local cache.
  62. *
  63. * (For a P5 this pretty much means we will choose another idle
  64. * CPU almost always at wakeup time (this is due to the small
  65. * L1 cache), on PIIs it's around 50-100 usecs, depending on
  66. * the cache size)
  67. */
  68. if (!cpu_khz)
  69. return;
  70. cachesize = cd->linesz * cd->sets * cd->ways;
  71. }
  72. extern void __init calibrate_delay(void);
  73. extern ATTRIB_NORET void cpu_idle(void);
  74. /*
  75. * First C code run on the secondary CPUs after being started up by
  76. * the master.
  77. */
  78. asmlinkage void start_secondary(void)
  79. {
  80. unsigned int cpu;
  81. #ifdef CONFIG_MIPS_MT_SMTC
  82. /* Only do cpu_probe for first TC of CPU */
  83. if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
  84. #endif /* CONFIG_MIPS_MT_SMTC */
  85. cpu_probe();
  86. cpu_report();
  87. per_cpu_trap_init();
  88. prom_init_secondary();
  89. /*
  90. * XXX parity protection should be folded in here when it's converted
  91. * to an option instead of something based on .cputype
  92. */
  93. calibrate_delay();
  94. preempt_disable();
  95. cpu = smp_processor_id();
  96. cpu_data[cpu].udelay_val = loops_per_jiffy;
  97. prom_smp_finish();
  98. cpu_set(cpu, cpu_callin_map);
  99. cpu_idle();
  100. }
  101. DEFINE_SPINLOCK(smp_call_lock);
  102. struct call_data_struct *call_data;
  103. /*
  104. * Run a function on all other CPUs.
  105. * <func> The function to run. This must be fast and non-blocking.
  106. * <info> An arbitrary pointer to pass to the function.
  107. * <retry> If true, keep retrying until ready.
  108. * <wait> If true, wait until function has completed on other CPUs.
  109. * [RETURNS] 0 on success, else a negative status code.
  110. *
  111. * Does not return until remote CPUs are nearly ready to execute <func>
  112. * or are or have executed.
  113. *
  114. * You must not call this function with disabled interrupts or from a
  115. * hardware interrupt handler or from a bottom half handler:
  116. *
  117. * CPU A CPU B
  118. * Disable interrupts
  119. * smp_call_function()
  120. * Take call_lock
  121. * Send IPIs
  122. * Wait for all cpus to acknowledge IPI
  123. * CPU A has not responded, spin waiting
  124. * for cpu A to respond, holding call_lock
  125. * smp_call_function()
  126. * Spin waiting for call_lock
  127. * Deadlock Deadlock
  128. */
  129. int smp_call_function (void (*func) (void *info), void *info, int retry,
  130. int wait)
  131. {
  132. struct call_data_struct data;
  133. int i, cpus = num_online_cpus() - 1;
  134. int cpu = smp_processor_id();
  135. /*
  136. * Can die spectacularly if this CPU isn't yet marked online
  137. */
  138. BUG_ON(!cpu_online(cpu));
  139. if (!cpus)
  140. return 0;
  141. /* Can deadlock when called with interrupts disabled */
  142. WARN_ON(irqs_disabled());
  143. data.func = func;
  144. data.info = info;
  145. atomic_set(&data.started, 0);
  146. data.wait = wait;
  147. if (wait)
  148. atomic_set(&data.finished, 0);
  149. spin_lock(&smp_call_lock);
  150. call_data = &data;
  151. smp_mb();
  152. /* Send a message to all other CPUs and wait for them to respond */
  153. for_each_online_cpu(i)
  154. if (i != cpu)
  155. core_send_ipi(i, SMP_CALL_FUNCTION);
  156. /* Wait for response */
  157. /* FIXME: lock-up detection, backtrace on lock-up */
  158. while (atomic_read(&data.started) != cpus)
  159. barrier();
  160. if (wait)
  161. while (atomic_read(&data.finished) != cpus)
  162. barrier();
  163. call_data = NULL;
  164. spin_unlock(&smp_call_lock);
  165. return 0;
  166. }
  167. void smp_call_function_interrupt(void)
  168. {
  169. void (*func) (void *info) = call_data->func;
  170. void *info = call_data->info;
  171. int wait = call_data->wait;
  172. /*
  173. * Notify initiating CPU that I've grabbed the data and am
  174. * about to execute the function.
  175. */
  176. smp_mb();
  177. atomic_inc(&call_data->started);
  178. /*
  179. * At this point the info structure may be out of scope unless wait==1.
  180. */
  181. irq_enter();
  182. (*func)(info);
  183. irq_exit();
  184. if (wait) {
  185. smp_mb();
  186. atomic_inc(&call_data->finished);
  187. }
  188. }
  189. static void stop_this_cpu(void *dummy)
  190. {
  191. /*
  192. * Remove this CPU:
  193. */
  194. cpu_clear(smp_processor_id(), cpu_online_map);
  195. local_irq_enable(); /* May need to service _machine_restart IPI */
  196. for (;;); /* Wait if available. */
  197. }
  198. void smp_send_stop(void)
  199. {
  200. smp_call_function(stop_this_cpu, NULL, 1, 0);
  201. }
  202. void __init smp_cpus_done(unsigned int max_cpus)
  203. {
  204. prom_cpus_done();
  205. }
  206. /* called from main before smp_init() */
  207. void __init smp_prepare_cpus(unsigned int max_cpus)
  208. {
  209. init_new_context(current, &init_mm);
  210. current_thread_info()->cpu = 0;
  211. smp_tune_scheduling();
  212. plat_prepare_cpus(max_cpus);
  213. #ifndef CONFIG_HOTPLUG_CPU
  214. cpu_present_map = cpu_possible_map;
  215. #endif
  216. }
  217. /* preload SMP state for boot cpu */
  218. void __devinit smp_prepare_boot_cpu(void)
  219. {
  220. /*
  221. * This assumes that bootup is always handled by the processor
  222. * with the logic and physical number 0.
  223. */
  224. __cpu_number_map[0] = 0;
  225. __cpu_logical_map[0] = 0;
  226. cpu_set(0, phys_cpu_present_map);
  227. cpu_set(0, cpu_online_map);
  228. cpu_set(0, cpu_callin_map);
  229. }
  230. /*
  231. * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
  232. * and keep control until "cpu_online(cpu)" is set. Note: cpu is
  233. * physical, not logical.
  234. */
  235. int __cpuinit __cpu_up(unsigned int cpu)
  236. {
  237. struct task_struct *idle;
  238. /*
  239. * Processor goes to start_secondary(), sets online flag
  240. * The following code is purely to make sure
  241. * Linux can schedule processes on this slave.
  242. */
  243. idle = fork_idle(cpu);
  244. if (IS_ERR(idle))
  245. panic(KERN_ERR "Fork failed for CPU %d", cpu);
  246. prom_boot_secondary(cpu, idle);
  247. /*
  248. * Trust is futile. We should really have timeouts ...
  249. */
  250. while (!cpu_isset(cpu, cpu_callin_map))
  251. udelay(100);
  252. cpu_set(cpu, cpu_online_map);
  253. return 0;
  254. }
  255. /* Not really SMP stuff ... */
  256. int setup_profiling_timer(unsigned int multiplier)
  257. {
  258. return 0;
  259. }
  260. static void flush_tlb_all_ipi(void *info)
  261. {
  262. local_flush_tlb_all();
  263. }
  264. void flush_tlb_all(void)
  265. {
  266. on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1);
  267. }
  268. static void flush_tlb_mm_ipi(void *mm)
  269. {
  270. local_flush_tlb_mm((struct mm_struct *)mm);
  271. }
  272. /*
  273. * Special Variant of smp_call_function for use by TLB functions:
  274. *
  275. * o No return value
  276. * o collapses to normal function call on UP kernels
  277. * o collapses to normal function call on systems with a single shared
  278. * primary cache.
  279. * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
  280. */
  281. static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
  282. {
  283. #ifndef CONFIG_MIPS_MT_SMTC
  284. smp_call_function(func, info, 1, 1);
  285. #endif
  286. }
  287. static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
  288. {
  289. preempt_disable();
  290. smp_on_other_tlbs(func, info);
  291. func(info);
  292. preempt_enable();
  293. }
  294. /*
  295. * The following tlb flush calls are invoked when old translations are
  296. * being torn down, or pte attributes are changing. For single threaded
  297. * address spaces, a new context is obtained on the current cpu, and tlb
  298. * context on other cpus are invalidated to force a new context allocation
  299. * at switch_mm time, should the mm ever be used on other cpus. For
  300. * multithreaded address spaces, intercpu interrupts have to be sent.
  301. * Another case where intercpu interrupts are required is when the target
  302. * mm might be active on another cpu (eg debuggers doing the flushes on
  303. * behalf of debugees, kswapd stealing pages from another process etc).
  304. * Kanoj 07/00.
  305. */
  306. void flush_tlb_mm(struct mm_struct *mm)
  307. {
  308. preempt_disable();
  309. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  310. smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm);
  311. } else {
  312. int i;
  313. for (i = 0; i < num_online_cpus(); i++)
  314. if (smp_processor_id() != i)
  315. cpu_context(i, mm) = 0;
  316. }
  317. local_flush_tlb_mm(mm);
  318. preempt_enable();
  319. }
  320. struct flush_tlb_data {
  321. struct vm_area_struct *vma;
  322. unsigned long addr1;
  323. unsigned long addr2;
  324. };
  325. static void flush_tlb_range_ipi(void *info)
  326. {
  327. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  328. local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
  329. }
  330. void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
  331. {
  332. struct mm_struct *mm = vma->vm_mm;
  333. preempt_disable();
  334. if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
  335. struct flush_tlb_data fd;
  336. fd.vma = vma;
  337. fd.addr1 = start;
  338. fd.addr2 = end;
  339. smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd);
  340. } else {
  341. int i;
  342. for (i = 0; i < num_online_cpus(); i++)
  343. if (smp_processor_id() != i)
  344. cpu_context(i, mm) = 0;
  345. }
  346. local_flush_tlb_range(vma, start, end);
  347. preempt_enable();
  348. }
  349. static void flush_tlb_kernel_range_ipi(void *info)
  350. {
  351. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  352. local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
  353. }
  354. void flush_tlb_kernel_range(unsigned long start, unsigned long end)
  355. {
  356. struct flush_tlb_data fd;
  357. fd.addr1 = start;
  358. fd.addr2 = end;
  359. on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1);
  360. }
  361. static void flush_tlb_page_ipi(void *info)
  362. {
  363. struct flush_tlb_data *fd = (struct flush_tlb_data *)info;
  364. local_flush_tlb_page(fd->vma, fd->addr1);
  365. }
  366. void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  367. {
  368. preempt_disable();
  369. if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
  370. struct flush_tlb_data fd;
  371. fd.vma = vma;
  372. fd.addr1 = page;
  373. smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd);
  374. } else {
  375. int i;
  376. for (i = 0; i < num_online_cpus(); i++)
  377. if (smp_processor_id() != i)
  378. cpu_context(i, vma->vm_mm) = 0;
  379. }
  380. local_flush_tlb_page(vma, page);
  381. preempt_enable();
  382. }
  383. static void flush_tlb_one_ipi(void *info)
  384. {
  385. unsigned long vaddr = (unsigned long) info;
  386. local_flush_tlb_one(vaddr);
  387. }
  388. void flush_tlb_one(unsigned long vaddr)
  389. {
  390. smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
  391. }
  392. EXPORT_SYMBOL(flush_tlb_page);
  393. EXPORT_SYMBOL(flush_tlb_one);