ptrace.c 11 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Ross Biro
  7. * Copyright (C) Linus Torvalds
  8. * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
  9. * Copyright (C) 1996 David S. Miller
  10. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11. * Copyright (C) 1999 MIPS Technologies, Inc.
  12. * Copyright (C) 2000 Ulf Carlsson
  13. *
  14. * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15. * binaries.
  16. */
  17. #include <linux/compiler.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/mm.h>
  21. #include <linux/errno.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/audit.h>
  24. #include <linux/smp.h>
  25. #include <linux/smp_lock.h>
  26. #include <linux/user.h>
  27. #include <linux/security.h>
  28. #include <linux/signal.h>
  29. #include <asm/byteorder.h>
  30. #include <asm/cpu.h>
  31. #include <asm/dsp.h>
  32. #include <asm/fpu.h>
  33. #include <asm/mipsregs.h>
  34. #include <asm/mipsmtregs.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/page.h>
  37. #include <asm/system.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/bootinfo.h>
  40. #include <asm/reg.h>
  41. /*
  42. * Called by kernel/ptrace.c when detaching..
  43. *
  44. * Make sure single step bits etc are not set.
  45. */
  46. void ptrace_disable(struct task_struct *child)
  47. {
  48. /* Nothing to do.. */
  49. }
  50. /*
  51. * Read a general register set. We always use the 64-bit format, even
  52. * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  53. * Registers are sign extended to fill the available space.
  54. */
  55. int ptrace_getregs (struct task_struct *child, __s64 __user *data)
  56. {
  57. struct pt_regs *regs;
  58. int i;
  59. if (!access_ok(VERIFY_WRITE, data, 38 * 8))
  60. return -EIO;
  61. regs = task_pt_regs(child);
  62. for (i = 0; i < 32; i++)
  63. __put_user (regs->regs[i], data + i);
  64. __put_user (regs->lo, data + EF_LO - EF_R0);
  65. __put_user (regs->hi, data + EF_HI - EF_R0);
  66. __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  67. __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
  68. __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
  69. __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
  70. return 0;
  71. }
  72. /*
  73. * Write a general register set. As for PTRACE_GETREGS, we always use
  74. * the 64-bit format. On a 32-bit kernel only the lower order half
  75. * (according to endianness) will be used.
  76. */
  77. int ptrace_setregs (struct task_struct *child, __s64 __user *data)
  78. {
  79. struct pt_regs *regs;
  80. int i;
  81. if (!access_ok(VERIFY_READ, data, 38 * 8))
  82. return -EIO;
  83. regs = task_pt_regs(child);
  84. for (i = 0; i < 32; i++)
  85. __get_user (regs->regs[i], data + i);
  86. __get_user (regs->lo, data + EF_LO - EF_R0);
  87. __get_user (regs->hi, data + EF_HI - EF_R0);
  88. __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  89. /* badvaddr, status, and cause may not be written. */
  90. return 0;
  91. }
  92. int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
  93. {
  94. int i;
  95. unsigned int tmp;
  96. if (!access_ok(VERIFY_WRITE, data, 33 * 8))
  97. return -EIO;
  98. if (tsk_used_math(child)) {
  99. fpureg_t *fregs = get_fpu_regs(child);
  100. for (i = 0; i < 32; i++)
  101. __put_user (fregs[i], i + (__u64 __user *) data);
  102. } else {
  103. for (i = 0; i < 32; i++)
  104. __put_user ((__u64) -1, i + (__u64 __user *) data);
  105. }
  106. __put_user (child->thread.fpu.fcr31, data + 64);
  107. preempt_disable();
  108. if (cpu_has_fpu) {
  109. unsigned int flags;
  110. if (cpu_has_mipsmt) {
  111. unsigned int vpflags = dvpe();
  112. flags = read_c0_status();
  113. __enable_fpu();
  114. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  115. write_c0_status(flags);
  116. evpe(vpflags);
  117. } else {
  118. flags = read_c0_status();
  119. __enable_fpu();
  120. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  121. write_c0_status(flags);
  122. }
  123. } else {
  124. tmp = 0;
  125. }
  126. preempt_enable();
  127. __put_user (tmp, data + 65);
  128. return 0;
  129. }
  130. int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
  131. {
  132. fpureg_t *fregs;
  133. int i;
  134. if (!access_ok(VERIFY_READ, data, 33 * 8))
  135. return -EIO;
  136. fregs = get_fpu_regs(child);
  137. for (i = 0; i < 32; i++)
  138. __get_user (fregs[i], i + (__u64 __user *) data);
  139. __get_user (child->thread.fpu.fcr31, data + 64);
  140. /* FIR may not be written. */
  141. return 0;
  142. }
  143. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  144. {
  145. int ret;
  146. switch (request) {
  147. /* when I and D space are separate, these will need to be fixed. */
  148. case PTRACE_PEEKTEXT: /* read word at location addr. */
  149. case PTRACE_PEEKDATA: {
  150. unsigned long tmp;
  151. int copied;
  152. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  153. ret = -EIO;
  154. if (copied != sizeof(tmp))
  155. break;
  156. ret = put_user(tmp,(unsigned long __user *) data);
  157. break;
  158. }
  159. /* Read the word at location addr in the USER area. */
  160. case PTRACE_PEEKUSR: {
  161. struct pt_regs *regs;
  162. unsigned long tmp = 0;
  163. regs = task_pt_regs(child);
  164. ret = 0; /* Default return value. */
  165. switch (addr) {
  166. case 0 ... 31:
  167. tmp = regs->regs[addr];
  168. break;
  169. case FPR_BASE ... FPR_BASE + 31:
  170. if (tsk_used_math(child)) {
  171. fpureg_t *fregs = get_fpu_regs(child);
  172. #ifdef CONFIG_32BIT
  173. /*
  174. * The odd registers are actually the high
  175. * order bits of the values stored in the even
  176. * registers - unless we're using r2k_switch.S.
  177. */
  178. if (addr & 1)
  179. tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
  180. else
  181. tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
  182. #endif
  183. #ifdef CONFIG_64BIT
  184. tmp = fregs[addr - FPR_BASE];
  185. #endif
  186. } else {
  187. tmp = -1; /* FP not yet used */
  188. }
  189. break;
  190. case PC:
  191. tmp = regs->cp0_epc;
  192. break;
  193. case CAUSE:
  194. tmp = regs->cp0_cause;
  195. break;
  196. case BADVADDR:
  197. tmp = regs->cp0_badvaddr;
  198. break;
  199. case MMHI:
  200. tmp = regs->hi;
  201. break;
  202. case MMLO:
  203. tmp = regs->lo;
  204. break;
  205. case FPC_CSR:
  206. tmp = child->thread.fpu.fcr31;
  207. break;
  208. case FPC_EIR: { /* implementation / version register */
  209. unsigned int flags;
  210. #ifdef CONFIG_MIPS_MT_SMTC
  211. unsigned int irqflags;
  212. unsigned int mtflags;
  213. #endif /* CONFIG_MIPS_MT_SMTC */
  214. preempt_disable();
  215. if (!cpu_has_fpu) {
  216. preempt_enable();
  217. break;
  218. }
  219. #ifdef CONFIG_MIPS_MT_SMTC
  220. /* Read-modify-write of Status must be atomic */
  221. local_irq_save(irqflags);
  222. mtflags = dmt();
  223. #endif /* CONFIG_MIPS_MT_SMTC */
  224. if (cpu_has_mipsmt) {
  225. unsigned int vpflags = dvpe();
  226. flags = read_c0_status();
  227. __enable_fpu();
  228. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  229. write_c0_status(flags);
  230. evpe(vpflags);
  231. } else {
  232. flags = read_c0_status();
  233. __enable_fpu();
  234. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  235. write_c0_status(flags);
  236. }
  237. #ifdef CONFIG_MIPS_MT_SMTC
  238. emt(mtflags);
  239. local_irq_restore(irqflags);
  240. #endif /* CONFIG_MIPS_MT_SMTC */
  241. preempt_enable();
  242. break;
  243. }
  244. case DSP_BASE ... DSP_BASE + 5: {
  245. dspreg_t *dregs;
  246. if (!cpu_has_dsp) {
  247. tmp = 0;
  248. ret = -EIO;
  249. goto out;
  250. }
  251. dregs = __get_dsp_regs(child);
  252. tmp = (unsigned long) (dregs[addr - DSP_BASE]);
  253. break;
  254. }
  255. case DSP_CONTROL:
  256. if (!cpu_has_dsp) {
  257. tmp = 0;
  258. ret = -EIO;
  259. goto out;
  260. }
  261. tmp = child->thread.dsp.dspcontrol;
  262. break;
  263. default:
  264. tmp = 0;
  265. ret = -EIO;
  266. goto out;
  267. }
  268. ret = put_user(tmp, (unsigned long __user *) data);
  269. break;
  270. }
  271. /* when I and D space are separate, this will have to be fixed. */
  272. case PTRACE_POKETEXT: /* write the word at location addr. */
  273. case PTRACE_POKEDATA:
  274. ret = 0;
  275. if (access_process_vm(child, addr, &data, sizeof(data), 1)
  276. == sizeof(data))
  277. break;
  278. ret = -EIO;
  279. break;
  280. case PTRACE_POKEUSR: {
  281. struct pt_regs *regs;
  282. ret = 0;
  283. regs = task_pt_regs(child);
  284. switch (addr) {
  285. case 0 ... 31:
  286. regs->regs[addr] = data;
  287. break;
  288. case FPR_BASE ... FPR_BASE + 31: {
  289. fpureg_t *fregs = get_fpu_regs(child);
  290. if (!tsk_used_math(child)) {
  291. /* FP not yet used */
  292. memset(&child->thread.fpu, ~0,
  293. sizeof(child->thread.fpu));
  294. child->thread.fpu.fcr31 = 0;
  295. }
  296. #ifdef CONFIG_32BIT
  297. /*
  298. * The odd registers are actually the high order bits
  299. * of the values stored in the even registers - unless
  300. * we're using r2k_switch.S.
  301. */
  302. if (addr & 1) {
  303. fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
  304. fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
  305. } else {
  306. fregs[addr - FPR_BASE] &= ~0xffffffffLL;
  307. fregs[addr - FPR_BASE] |= data;
  308. }
  309. #endif
  310. #ifdef CONFIG_64BIT
  311. fregs[addr - FPR_BASE] = data;
  312. #endif
  313. break;
  314. }
  315. case PC:
  316. regs->cp0_epc = data;
  317. break;
  318. case MMHI:
  319. regs->hi = data;
  320. break;
  321. case MMLO:
  322. regs->lo = data;
  323. break;
  324. case FPC_CSR:
  325. child->thread.fpu.fcr31 = data;
  326. break;
  327. case DSP_BASE ... DSP_BASE + 5: {
  328. dspreg_t *dregs;
  329. if (!cpu_has_dsp) {
  330. ret = -EIO;
  331. break;
  332. }
  333. dregs = __get_dsp_regs(child);
  334. dregs[addr - DSP_BASE] = data;
  335. break;
  336. }
  337. case DSP_CONTROL:
  338. if (!cpu_has_dsp) {
  339. ret = -EIO;
  340. break;
  341. }
  342. child->thread.dsp.dspcontrol = data;
  343. break;
  344. default:
  345. /* The rest are not allowed. */
  346. ret = -EIO;
  347. break;
  348. }
  349. break;
  350. }
  351. case PTRACE_GETREGS:
  352. ret = ptrace_getregs (child, (__u64 __user *) data);
  353. break;
  354. case PTRACE_SETREGS:
  355. ret = ptrace_setregs (child, (__u64 __user *) data);
  356. break;
  357. case PTRACE_GETFPREGS:
  358. ret = ptrace_getfpregs (child, (__u32 __user *) data);
  359. break;
  360. case PTRACE_SETFPREGS:
  361. ret = ptrace_setfpregs (child, (__u32 __user *) data);
  362. break;
  363. case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
  364. case PTRACE_CONT: { /* restart after signal. */
  365. ret = -EIO;
  366. if (!valid_signal(data))
  367. break;
  368. if (request == PTRACE_SYSCALL) {
  369. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  370. }
  371. else {
  372. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  373. }
  374. child->exit_code = data;
  375. wake_up_process(child);
  376. ret = 0;
  377. break;
  378. }
  379. /*
  380. * make the child exit. Best I can do is send it a sigkill.
  381. * perhaps it should be put in the status that it wants to
  382. * exit.
  383. */
  384. case PTRACE_KILL:
  385. ret = 0;
  386. if (child->exit_state == EXIT_ZOMBIE) /* already dead */
  387. break;
  388. child->exit_code = SIGKILL;
  389. wake_up_process(child);
  390. break;
  391. case PTRACE_DETACH: /* detach a process that was attached. */
  392. ret = ptrace_detach(child, data);
  393. break;
  394. case PTRACE_GET_THREAD_AREA:
  395. ret = put_user(task_thread_info(child)->tp_value,
  396. (unsigned long __user *) data);
  397. break;
  398. default:
  399. ret = ptrace_request(child, request, addr, data);
  400. break;
  401. }
  402. out:
  403. return ret;
  404. }
  405. static inline int audit_arch(void)
  406. {
  407. int arch = EM_MIPS;
  408. #ifdef CONFIG_64BIT
  409. arch |= __AUDIT_ARCH_64BIT;
  410. #endif
  411. #if defined(__LITTLE_ENDIAN)
  412. arch |= __AUDIT_ARCH_LE;
  413. #endif
  414. return arch;
  415. }
  416. /*
  417. * Notification of system call entry/exit
  418. * - triggered by current->work.syscall_trace
  419. */
  420. asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
  421. {
  422. if (unlikely(current->audit_context) && entryexit)
  423. audit_syscall_exit(AUDITSC_RESULT(regs->regs[2]),
  424. regs->regs[2]);
  425. if (!(current->ptrace & PT_PTRACED))
  426. goto out;
  427. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  428. goto out;
  429. /* The 0x80 provides a way for the tracing parent to distinguish
  430. between a syscall stop and SIGTRAP delivery */
  431. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
  432. 0x80 : 0));
  433. /*
  434. * this isn't the same as continuing with a signal, but it will do
  435. * for normal use. strace only continues with a signal if the
  436. * stopping signal is not SIGTRAP. -brl
  437. */
  438. if (current->exit_code) {
  439. send_sig(current->exit_code, current, 1);
  440. current->exit_code = 0;
  441. }
  442. out:
  443. if (unlikely(current->audit_context) && !entryexit)
  444. audit_syscall_entry(audit_arch(), regs->regs[2],
  445. regs->regs[4], regs->regs[5],
  446. regs->regs[6], regs->regs[7]);
  447. }