config.c 5.2 KB

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  1. /*
  2. * linux/arch/m68knommu/platform/68360/config.c
  3. *
  4. * Copyright (c) 2000 Michael Leslie <mleslie@lineo.com>
  5. * Copyright (C) 1993 Hamish Macdonald
  6. * Copyright (C) 1999 D. Jeff Dionne <jeff@uclinux.org>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file COPYING in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <stdarg.h>
  13. #include <linux/types.h>
  14. #include <linux/kernel.h>
  15. #include <linux/mm.h>
  16. #include <linux/tty.h>
  17. #include <linux/console.h>
  18. #include <asm/setup.h>
  19. #include <asm/system.h>
  20. #include <asm/pgtable.h>
  21. #include <asm/irq.h>
  22. #include <asm/machdep.h>
  23. #include <asm/m68360.h>
  24. #ifdef CONFIG_UCQUICC
  25. #include <asm/bootstd.h>
  26. #endif
  27. extern void m360_cpm_reset(void);
  28. // Mask to select if the PLL prescaler is enabled.
  29. #define MCU_PREEN ((unsigned short)(0x0001 << 13))
  30. #if defined(CONFIG_UCQUICC)
  31. #define OSCILLATOR (unsigned long int)33000000
  32. #endif
  33. unsigned long int system_clock;
  34. void M68360_init_IRQ(void);
  35. extern QUICC *pquicc;
  36. /* TODO DON"T Hard Code this */
  37. /* calculate properly using the right PLL and prescaller */
  38. // unsigned int system_clock = 33000000l;
  39. extern unsigned long int system_clock; //In kernel setup.c
  40. extern void config_M68360_irq(void);
  41. void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
  42. {
  43. unsigned char prescaler;
  44. unsigned short tgcr_save;
  45. int return_value;
  46. #if 0
  47. /* Restart mode, Enable int, 32KHz, Enable timer */
  48. TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN;
  49. /* Set prescaler (Divide 32KHz by 32)*/
  50. TPRER = 31;
  51. /* Set compare register 32Khz / 32 / 10 = 100 */
  52. TCMP = 10;
  53. request_irq(IRQ_MACHSPEC | 1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  54. #endif
  55. /* General purpose quicc timers: MC68360UM p7-20 */
  56. /* Set up timer 1 (in [1..4]) to do 100Hz */
  57. tgcr_save = pquicc->timer_tgcr & 0xfff0;
  58. pquicc->timer_tgcr = tgcr_save; /* stop and reset timer 1 */
  59. /* pquicc->timer_tgcr |= 0x4444; */ /* halt timers when FREEZE (ie bdm freeze) */
  60. prescaler = 8;
  61. pquicc->timer_tmr1 = 0x001a | /* or=1, frr=1, iclk=01b */
  62. (unsigned short)((prescaler - 1) << 8);
  63. pquicc->timer_tcn1 = 0x0000; /* initial count */
  64. /* calculate interval for 100Hz based on the _system_clock: */
  65. pquicc->timer_trr1 = (system_clock/ prescaler) / HZ; /* reference count */
  66. pquicc->timer_ter1 = 0x0003; /* clear timer events */
  67. /* enable timer 1 interrupt in CIMR */
  68. // request_irq(IRQ_MACHSPEC | CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  69. //return_value = request_irq( CPMVEC_TIMER1, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
  70. return_value = request_irq(CPMVEC_TIMER1 , timer_routine, IRQ_FLG_LOCK,
  71. "Timer", NULL);
  72. /* Start timer 1: */
  73. tgcr_save = (pquicc->timer_tgcr & 0xfff0) | 0x0001;
  74. pquicc->timer_tgcr = tgcr_save;
  75. }
  76. void BSP_tick(void)
  77. {
  78. /* Reset Timer1 */
  79. /* TSTAT &= 0; */
  80. pquicc->timer_ter1 = 0x0002; /* clear timer event */
  81. }
  82. unsigned long BSP_gettimeoffset (void)
  83. {
  84. return 0;
  85. }
  86. void BSP_gettod (int *yearp, int *monp, int *dayp,
  87. int *hourp, int *minp, int *secp)
  88. {
  89. }
  90. int BSP_hwclk(int op, struct rtc_time *t)
  91. {
  92. if (!op) {
  93. /* read */
  94. } else {
  95. /* write */
  96. }
  97. return 0;
  98. }
  99. int BSP_set_clock_mmss (unsigned long nowtime)
  100. {
  101. #if 0
  102. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  103. tod->second1 = real_seconds / 10;
  104. tod->second2 = real_seconds % 10;
  105. tod->minute1 = real_minutes / 10;
  106. tod->minute2 = real_minutes % 10;
  107. #endif
  108. return 0;
  109. }
  110. void BSP_reset (void)
  111. {
  112. local_irq_disable();
  113. asm volatile (
  114. "moveal #_start, %a0;\n"
  115. "moveb #0, 0xFFFFF300;\n"
  116. "moveal 0(%a0), %sp;\n"
  117. "moveal 4(%a0), %a0;\n"
  118. "jmp (%a0);\n"
  119. );
  120. }
  121. unsigned char *scc1_hwaddr;
  122. static int errno;
  123. #if defined (CONFIG_UCQUICC)
  124. _bsc0(char *, getserialnum)
  125. _bsc1(unsigned char *, gethwaddr, int, a)
  126. _bsc1(char *, getbenv, char *, a)
  127. #endif
  128. void config_BSP(char *command, int len)
  129. {
  130. unsigned char *p;
  131. m360_cpm_reset();
  132. /* Calculate the real system clock value. */
  133. {
  134. unsigned int local_pllcr = (unsigned int)(pquicc->sim_pllcr);
  135. if( local_pllcr & MCU_PREEN ) // If the prescaler is dividing by 128
  136. {
  137. int mf = (int)(pquicc->sim_pllcr & 0x0fff);
  138. system_clock = (OSCILLATOR / 128) * (mf + 1);
  139. }
  140. else
  141. {
  142. int mf = (int)(pquicc->sim_pllcr & 0x0fff);
  143. system_clock = (OSCILLATOR) * (mf + 1);
  144. }
  145. }
  146. printk(KERN_INFO "\n68360 QUICC support (C) 2000 Lineo Inc.\n");
  147. #if defined(CONFIG_UCQUICC) && 0
  148. printk(KERN_INFO "uCquicc serial string [%s]\n",getserialnum());
  149. p = scc1_hwaddr = gethwaddr(0);
  150. printk(KERN_INFO "uCquicc hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n",
  151. p[0], p[1], p[2], p[3], p[4], p[5]);
  152. p = getbenv("APPEND");
  153. if (p)
  154. strcpy(p,command);
  155. else
  156. command[0] = 0;
  157. #else
  158. scc1_hwaddr = "\00\01\02\03\04\05";
  159. #endif
  160. mach_sched_init = BSP_sched_init;
  161. mach_tick = BSP_tick;
  162. mach_gettimeoffset = BSP_gettimeoffset;
  163. mach_gettod = BSP_gettod;
  164. mach_hwclk = NULL;
  165. mach_set_clock_mmss = NULL;
  166. mach_reset = BSP_reset;
  167. }