generic.c 9.1 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code common to all PXA machines.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/ioport.h>
  25. #include <linux/pm.h>
  26. #include <linux/string.h>
  27. #include <linux/sched.h>
  28. #include <asm/cnt32_to_63.h>
  29. #include <asm/div64.h>
  30. #include <asm/hardware.h>
  31. #include <asm/irq.h>
  32. #include <asm/system.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/arch/pxa-regs.h>
  36. #include <asm/arch/udc.h>
  37. #include <asm/arch/pxafb.h>
  38. #include <asm/arch/mmc.h>
  39. #include <asm/arch/irda.h>
  40. #include <asm/arch/i2c.h>
  41. #include "generic.h"
  42. /*
  43. * This is the PXA2xx sched_clock implementation. This has a resolution
  44. * of at least 308ns and a maximum value that depends on the value of
  45. * CLOCK_TICK_RATE.
  46. *
  47. * The return value is guaranteed to be monotonic in that range as
  48. * long as there is always less than 582 seconds between successive
  49. * calls to this function.
  50. */
  51. unsigned long long sched_clock(void)
  52. {
  53. unsigned long long v = cnt32_to_63(OSCR);
  54. /* Note: top bit ov v needs cleared unless multiplier is even. */
  55. #if CLOCK_TICK_RATE == 3686400
  56. /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
  57. /* The <<1 is used to get rid of tick.hi top bit */
  58. v *= 78125<<1;
  59. do_div(v, 288<<1);
  60. #elif CLOCK_TICK_RATE == 3250000
  61. /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
  62. v *= 4000;
  63. do_div(v, 13);
  64. #elif CLOCK_TICK_RATE == 3249600
  65. /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
  66. v *= 625000;
  67. do_div(v, 2031);
  68. #else
  69. #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
  70. /*
  71. * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
  72. * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
  73. * years range and truncation to unsigned long long limits it to
  74. * sched_clock's max range of ~584 years. This is nice but with
  75. * higher computation cost.
  76. */
  77. {
  78. union {
  79. unsigned long long val;
  80. struct { unsigned long lo, hi; };
  81. } x;
  82. unsigned long long y;
  83. x.val = v;
  84. x.hi &= 0x7fffffff;
  85. y = (unsigned long long)x.lo * NSEC_PER_SEC;
  86. x.lo = y;
  87. y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
  88. x.hi = do_div(y, CLOCK_TICK_RATE);
  89. do_div(x.val, CLOCK_TICK_RATE);
  90. x.hi += y;
  91. v = x.val;
  92. }
  93. #endif
  94. return v;
  95. }
  96. /*
  97. * Handy function to set GPIO alternate functions
  98. */
  99. void pxa_gpio_mode(int gpio_mode)
  100. {
  101. unsigned long flags;
  102. int gpio = gpio_mode & GPIO_MD_MASK_NR;
  103. int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
  104. int gafr;
  105. local_irq_save(flags);
  106. if (gpio_mode & GPIO_DFLT_LOW)
  107. GPCR(gpio) = GPIO_bit(gpio);
  108. else if (gpio_mode & GPIO_DFLT_HIGH)
  109. GPSR(gpio) = GPIO_bit(gpio);
  110. if (gpio_mode & GPIO_MD_MASK_DIR)
  111. GPDR(gpio) |= GPIO_bit(gpio);
  112. else
  113. GPDR(gpio) &= ~GPIO_bit(gpio);
  114. gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
  115. GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
  116. local_irq_restore(flags);
  117. }
  118. EXPORT_SYMBOL(pxa_gpio_mode);
  119. /*
  120. * Routine to safely enable or disable a clock in the CKEN
  121. */
  122. void pxa_set_cken(int clock, int enable)
  123. {
  124. unsigned long flags;
  125. local_irq_save(flags);
  126. if (enable)
  127. CKEN |= clock;
  128. else
  129. CKEN &= ~clock;
  130. local_irq_restore(flags);
  131. }
  132. EXPORT_SYMBOL(pxa_set_cken);
  133. /*
  134. * Intel PXA2xx internal register mapping.
  135. *
  136. * Note 1: not all PXA2xx variants implement all those addresses.
  137. *
  138. * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  139. * and cache flush area.
  140. */
  141. static struct map_desc standard_io_desc[] __initdata = {
  142. { /* Devs */
  143. .virtual = 0xf2000000,
  144. .pfn = __phys_to_pfn(0x40000000),
  145. .length = 0x02000000,
  146. .type = MT_DEVICE
  147. }, { /* LCD */
  148. .virtual = 0xf4000000,
  149. .pfn = __phys_to_pfn(0x44000000),
  150. .length = 0x00100000,
  151. .type = MT_DEVICE
  152. }, { /* Mem Ctl */
  153. .virtual = 0xf6000000,
  154. .pfn = __phys_to_pfn(0x48000000),
  155. .length = 0x00100000,
  156. .type = MT_DEVICE
  157. }, { /* USB host */
  158. .virtual = 0xf8000000,
  159. .pfn = __phys_to_pfn(0x4c000000),
  160. .length = 0x00100000,
  161. .type = MT_DEVICE
  162. }, { /* Camera */
  163. .virtual = 0xfa000000,
  164. .pfn = __phys_to_pfn(0x50000000),
  165. .length = 0x00100000,
  166. .type = MT_DEVICE
  167. }, { /* IMem ctl */
  168. .virtual = 0xfe000000,
  169. .pfn = __phys_to_pfn(0x58000000),
  170. .length = 0x00100000,
  171. .type = MT_DEVICE
  172. }, { /* UNCACHED_PHYS_0 */
  173. .virtual = 0xff000000,
  174. .pfn = __phys_to_pfn(0x00000000),
  175. .length = 0x00100000,
  176. .type = MT_DEVICE
  177. }
  178. };
  179. void __init pxa_map_io(void)
  180. {
  181. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  182. get_clk_frequency_khz(1);
  183. }
  184. static struct resource pxamci_resources[] = {
  185. [0] = {
  186. .start = 0x41100000,
  187. .end = 0x41100fff,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. [1] = {
  191. .start = IRQ_MMC,
  192. .end = IRQ_MMC,
  193. .flags = IORESOURCE_IRQ,
  194. },
  195. };
  196. static u64 pxamci_dmamask = 0xffffffffUL;
  197. static struct platform_device pxamci_device = {
  198. .name = "pxa2xx-mci",
  199. .id = -1,
  200. .dev = {
  201. .dma_mask = &pxamci_dmamask,
  202. .coherent_dma_mask = 0xffffffff,
  203. },
  204. .num_resources = ARRAY_SIZE(pxamci_resources),
  205. .resource = pxamci_resources,
  206. };
  207. void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  208. {
  209. pxamci_device.dev.platform_data = info;
  210. }
  211. static struct pxa2xx_udc_mach_info pxa_udc_info;
  212. void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  213. {
  214. memcpy(&pxa_udc_info, info, sizeof *info);
  215. }
  216. static struct resource pxa2xx_udc_resources[] = {
  217. [0] = {
  218. .start = 0x40600000,
  219. .end = 0x4060ffff,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. [1] = {
  223. .start = IRQ_USB,
  224. .end = IRQ_USB,
  225. .flags = IORESOURCE_IRQ,
  226. },
  227. };
  228. static u64 udc_dma_mask = ~(u32)0;
  229. static struct platform_device udc_device = {
  230. .name = "pxa2xx-udc",
  231. .id = -1,
  232. .resource = pxa2xx_udc_resources,
  233. .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
  234. .dev = {
  235. .platform_data = &pxa_udc_info,
  236. .dma_mask = &udc_dma_mask,
  237. }
  238. };
  239. static struct resource pxafb_resources[] = {
  240. [0] = {
  241. .start = 0x44000000,
  242. .end = 0x4400ffff,
  243. .flags = IORESOURCE_MEM,
  244. },
  245. [1] = {
  246. .start = IRQ_LCD,
  247. .end = IRQ_LCD,
  248. .flags = IORESOURCE_IRQ,
  249. },
  250. };
  251. static u64 fb_dma_mask = ~(u64)0;
  252. static struct platform_device pxafb_device = {
  253. .name = "pxa2xx-fb",
  254. .id = -1,
  255. .dev = {
  256. .dma_mask = &fb_dma_mask,
  257. .coherent_dma_mask = 0xffffffff,
  258. },
  259. .num_resources = ARRAY_SIZE(pxafb_resources),
  260. .resource = pxafb_resources,
  261. };
  262. void __init set_pxa_fb_info(struct pxafb_mach_info *info)
  263. {
  264. pxafb_device.dev.platform_data = info;
  265. }
  266. void __init set_pxa_fb_parent(struct device *parent_dev)
  267. {
  268. pxafb_device.dev.parent = parent_dev;
  269. }
  270. static struct platform_device ffuart_device = {
  271. .name = "pxa2xx-uart",
  272. .id = 0,
  273. };
  274. static struct platform_device btuart_device = {
  275. .name = "pxa2xx-uart",
  276. .id = 1,
  277. };
  278. static struct platform_device stuart_device = {
  279. .name = "pxa2xx-uart",
  280. .id = 2,
  281. };
  282. static struct platform_device hwuart_device = {
  283. .name = "pxa2xx-uart",
  284. .id = 3,
  285. };
  286. static struct resource i2c_resources[] = {
  287. {
  288. .start = 0x40301680,
  289. .end = 0x403016a3,
  290. .flags = IORESOURCE_MEM,
  291. }, {
  292. .start = IRQ_I2C,
  293. .end = IRQ_I2C,
  294. .flags = IORESOURCE_IRQ,
  295. },
  296. };
  297. static struct platform_device i2c_device = {
  298. .name = "pxa2xx-i2c",
  299. .id = 0,
  300. .resource = i2c_resources,
  301. .num_resources = ARRAY_SIZE(i2c_resources),
  302. };
  303. void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
  304. {
  305. i2c_device.dev.platform_data = info;
  306. }
  307. static struct resource i2s_resources[] = {
  308. {
  309. .start = 0x40400000,
  310. .end = 0x40400083,
  311. .flags = IORESOURCE_MEM,
  312. }, {
  313. .start = IRQ_I2S,
  314. .end = IRQ_I2S,
  315. .flags = IORESOURCE_IRQ,
  316. },
  317. };
  318. static struct platform_device i2s_device = {
  319. .name = "pxa2xx-i2s",
  320. .id = -1,
  321. .resource = i2s_resources,
  322. .num_resources = ARRAY_SIZE(i2s_resources),
  323. };
  324. static u64 pxaficp_dmamask = ~(u32)0;
  325. static struct platform_device pxaficp_device = {
  326. .name = "pxa2xx-ir",
  327. .id = -1,
  328. .dev = {
  329. .dma_mask = &pxaficp_dmamask,
  330. .coherent_dma_mask = 0xffffffff,
  331. },
  332. };
  333. void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
  334. {
  335. pxaficp_device.dev.platform_data = info;
  336. }
  337. static struct platform_device pxartc_device = {
  338. .name = "sa1100-rtc",
  339. .id = -1,
  340. };
  341. static struct platform_device *devices[] __initdata = {
  342. &pxamci_device,
  343. &udc_device,
  344. &pxafb_device,
  345. &ffuart_device,
  346. &btuart_device,
  347. &stuart_device,
  348. &pxaficp_device,
  349. &i2c_device,
  350. &i2s_device,
  351. &pxartc_device,
  352. };
  353. static int __init pxa_init(void)
  354. {
  355. int cpuid, ret;
  356. ret = platform_add_devices(devices, ARRAY_SIZE(devices));
  357. if (ret)
  358. return ret;
  359. /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
  360. cpuid = read_cpuid(CPUID_ID);
  361. if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
  362. ((cpuid >> 4) & 0xfff) == 0x290)
  363. ret = platform_device_register(&hwuart_device);
  364. return ret;
  365. }
  366. subsys_initcall(pxa_init);