at91sam9261_devices.c 19 KB

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  1. /*
  2. * arch/arm/mach-at91rm9200/at91sam9261_devices.c
  3. *
  4. * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
  5. * Copyright (C) 2005 David Brownell
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. */
  13. #include <asm/mach/arch.h>
  14. #include <asm/mach/map.h>
  15. #include <linux/platform_device.h>
  16. #include <asm/arch/board.h>
  17. #include <asm/arch/gpio.h>
  18. #include <asm/arch/at91sam9261.h>
  19. #include <asm/arch/at91sam9261_matrix.h>
  20. #include <asm/arch/at91sam926x_mc.h>
  21. #include "generic.h"
  22. #define SZ_512 0x00000200
  23. #define SZ_256 0x00000100
  24. #define SZ_16 0x00000010
  25. /* --------------------------------------------------------------------
  26. * USB Host
  27. * -------------------------------------------------------------------- */
  28. #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  29. static u64 ohci_dmamask = 0xffffffffUL;
  30. static struct at91_usbh_data usbh_data;
  31. static struct resource usbh_resources[] = {
  32. [0] = {
  33. .start = AT91SAM9261_UHP_BASE,
  34. .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
  35. .flags = IORESOURCE_MEM,
  36. },
  37. [1] = {
  38. .start = AT91SAM9261_ID_UHP,
  39. .end = AT91SAM9261_ID_UHP,
  40. .flags = IORESOURCE_IRQ,
  41. },
  42. };
  43. static struct platform_device at91sam9261_usbh_device = {
  44. .name = "at91_ohci",
  45. .id = -1,
  46. .dev = {
  47. .dma_mask = &ohci_dmamask,
  48. .coherent_dma_mask = 0xffffffff,
  49. .platform_data = &usbh_data,
  50. },
  51. .resource = usbh_resources,
  52. .num_resources = ARRAY_SIZE(usbh_resources),
  53. };
  54. void __init at91_add_device_usbh(struct at91_usbh_data *data)
  55. {
  56. if (!data)
  57. return;
  58. usbh_data = *data;
  59. platform_device_register(&at91sam9261_usbh_device);
  60. }
  61. #else
  62. void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  63. #endif
  64. /* --------------------------------------------------------------------
  65. * USB Device (Gadget)
  66. * -------------------------------------------------------------------- */
  67. #ifdef CONFIG_USB_GADGET_AT91
  68. static struct at91_udc_data udc_data;
  69. static struct resource udc_resources[] = {
  70. [0] = {
  71. .start = AT91SAM9261_BASE_UDP,
  72. .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
  73. .flags = IORESOURCE_MEM,
  74. },
  75. [1] = {
  76. .start = AT91SAM9261_ID_UDP,
  77. .end = AT91SAM9261_ID_UDP,
  78. .flags = IORESOURCE_IRQ,
  79. },
  80. };
  81. static struct platform_device at91sam9261_udc_device = {
  82. .name = "at91_udc",
  83. .id = -1,
  84. .dev = {
  85. .platform_data = &udc_data,
  86. },
  87. .resource = udc_resources,
  88. .num_resources = ARRAY_SIZE(udc_resources),
  89. };
  90. void __init at91_add_device_udc(struct at91_udc_data *data)
  91. {
  92. unsigned long x;
  93. if (!data)
  94. return;
  95. if (data->vbus_pin) {
  96. at91_set_gpio_input(data->vbus_pin, 0);
  97. at91_set_deglitch(data->vbus_pin, 1);
  98. }
  99. /* Pullup pin is handled internally */
  100. x = at91_sys_read(AT91_MATRIX_USBPUCR);
  101. at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
  102. udc_data = *data;
  103. platform_device_register(&at91sam9261_udc_device);
  104. }
  105. #else
  106. void __init at91_add_device_udc(struct at91_udc_data *data) {}
  107. #endif
  108. /* --------------------------------------------------------------------
  109. * MMC / SD
  110. * -------------------------------------------------------------------- */
  111. #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
  112. static u64 mmc_dmamask = 0xffffffffUL;
  113. static struct at91_mmc_data mmc_data;
  114. static struct resource mmc_resources[] = {
  115. [0] = {
  116. .start = AT91SAM9261_BASE_MCI,
  117. .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. [1] = {
  121. .start = AT91SAM9261_ID_MCI,
  122. .end = AT91SAM9261_ID_MCI,
  123. .flags = IORESOURCE_IRQ,
  124. },
  125. };
  126. static struct platform_device at91sam9261_mmc_device = {
  127. .name = "at91_mci",
  128. .id = -1,
  129. .dev = {
  130. .dma_mask = &mmc_dmamask,
  131. .coherent_dma_mask = 0xffffffff,
  132. .platform_data = &mmc_data,
  133. },
  134. .resource = mmc_resources,
  135. .num_resources = ARRAY_SIZE(mmc_resources),
  136. };
  137. void __init at91_add_device_mmc(struct at91_mmc_data *data)
  138. {
  139. if (!data)
  140. return;
  141. /* input/irq */
  142. if (data->det_pin) {
  143. at91_set_gpio_input(data->det_pin, 1);
  144. at91_set_deglitch(data->det_pin, 1);
  145. }
  146. if (data->wp_pin)
  147. at91_set_gpio_input(data->wp_pin, 1);
  148. if (data->vcc_pin)
  149. at91_set_gpio_output(data->vcc_pin, 0);
  150. /* CLK */
  151. at91_set_B_periph(AT91_PIN_PA2, 0);
  152. /* CMD */
  153. at91_set_B_periph(AT91_PIN_PA1, 1);
  154. /* DAT0, maybe DAT1..DAT3 */
  155. at91_set_B_periph(AT91_PIN_PA0, 1);
  156. if (data->wire4) {
  157. at91_set_B_periph(AT91_PIN_PA4, 1);
  158. at91_set_B_periph(AT91_PIN_PA5, 1);
  159. at91_set_B_periph(AT91_PIN_PA6, 1);
  160. }
  161. mmc_data = *data;
  162. platform_device_register(&at91sam9261_mmc_device);
  163. }
  164. #else
  165. void __init at91_add_device_mmc(struct at91_mmc_data *data) {}
  166. #endif
  167. /* --------------------------------------------------------------------
  168. * NAND / SmartMedia
  169. * -------------------------------------------------------------------- */
  170. #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
  171. static struct at91_nand_data nand_data;
  172. #define NAND_BASE AT91_CHIPSELECT_3
  173. static struct resource nand_resources[] = {
  174. {
  175. .start = NAND_BASE,
  176. .end = NAND_BASE + SZ_256M - 1,
  177. .flags = IORESOURCE_MEM,
  178. }
  179. };
  180. static struct platform_device at91_nand_device = {
  181. .name = "at91_nand",
  182. .id = -1,
  183. .dev = {
  184. .platform_data = &nand_data,
  185. },
  186. .resource = nand_resources,
  187. .num_resources = ARRAY_SIZE(nand_resources),
  188. };
  189. void __init at91_add_device_nand(struct at91_nand_data *data)
  190. {
  191. unsigned long csa, mode;
  192. if (!data)
  193. return;
  194. csa = at91_sys_read(AT91_MATRIX_EBICSA);
  195. at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
  196. /* set the bus interface characteristics */
  197. at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
  198. | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
  199. at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
  200. | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
  201. at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
  202. if (data->bus_width_16)
  203. mode = AT91_SMC_DBW_16;
  204. else
  205. mode = AT91_SMC_DBW_8;
  206. at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
  207. /* enable pin */
  208. if (data->enable_pin)
  209. at91_set_gpio_output(data->enable_pin, 1);
  210. /* ready/busy pin */
  211. if (data->rdy_pin)
  212. at91_set_gpio_input(data->rdy_pin, 1);
  213. /* card detect pin */
  214. if (data->det_pin)
  215. at91_set_gpio_input(data->det_pin, 1);
  216. at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
  217. at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
  218. nand_data = *data;
  219. platform_device_register(&at91_nand_device);
  220. }
  221. #else
  222. void __init at91_add_device_nand(struct at91_nand_data *data) {}
  223. #endif
  224. /* --------------------------------------------------------------------
  225. * TWI (i2c)
  226. * -------------------------------------------------------------------- */
  227. #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
  228. static struct resource twi_resources[] = {
  229. [0] = {
  230. .start = AT91SAM9261_BASE_TWI,
  231. .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = AT91SAM9261_ID_TWI,
  236. .end = AT91SAM9261_ID_TWI,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. };
  240. static struct platform_device at91sam9261_twi_device = {
  241. .name = "at91_i2c",
  242. .id = -1,
  243. .resource = twi_resources,
  244. .num_resources = ARRAY_SIZE(twi_resources),
  245. };
  246. void __init at91_add_device_i2c(void)
  247. {
  248. /* pins used for TWI interface */
  249. at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
  250. at91_set_multi_drive(AT91_PIN_PA7, 1);
  251. at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
  252. at91_set_multi_drive(AT91_PIN_PA8, 1);
  253. platform_device_register(&at91sam9261_twi_device);
  254. }
  255. #else
  256. void __init at91_add_device_i2c(void) {}
  257. #endif
  258. /* --------------------------------------------------------------------
  259. * SPI
  260. * -------------------------------------------------------------------- */
  261. #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
  262. static u64 spi_dmamask = 0xffffffffUL;
  263. static struct resource spi0_resources[] = {
  264. [0] = {
  265. .start = AT91SAM9261_BASE_SPI0,
  266. .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
  267. .flags = IORESOURCE_MEM,
  268. },
  269. [1] = {
  270. .start = AT91SAM9261_ID_SPI0,
  271. .end = AT91SAM9261_ID_SPI0,
  272. .flags = IORESOURCE_IRQ,
  273. },
  274. };
  275. static struct platform_device at91sam9261_spi0_device = {
  276. .name = "atmel_spi",
  277. .id = 0,
  278. .dev = {
  279. .dma_mask = &spi_dmamask,
  280. .coherent_dma_mask = 0xffffffff,
  281. },
  282. .resource = spi0_resources,
  283. .num_resources = ARRAY_SIZE(spi0_resources),
  284. };
  285. static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
  286. static struct resource spi1_resources[] = {
  287. [0] = {
  288. .start = AT91SAM9261_BASE_SPI1,
  289. .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = AT91SAM9261_ID_SPI1,
  294. .end = AT91SAM9261_ID_SPI1,
  295. .flags = IORESOURCE_IRQ,
  296. },
  297. };
  298. static struct platform_device at91sam9261_spi1_device = {
  299. .name = "atmel_spi",
  300. .id = 1,
  301. .dev = {
  302. .dma_mask = &spi_dmamask,
  303. .coherent_dma_mask = 0xffffffff,
  304. },
  305. .resource = spi1_resources,
  306. .num_resources = ARRAY_SIZE(spi1_resources),
  307. };
  308. static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
  309. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
  310. {
  311. int i;
  312. unsigned long cs_pin;
  313. short enable_spi0 = 0;
  314. short enable_spi1 = 0;
  315. /* Choose SPI chip-selects */
  316. for (i = 0; i < nr_devices; i++) {
  317. if (devices[i].controller_data)
  318. cs_pin = (unsigned long) devices[i].controller_data;
  319. else if (devices[i].bus_num == 0)
  320. cs_pin = spi0_standard_cs[devices[i].chip_select];
  321. else
  322. cs_pin = spi1_standard_cs[devices[i].chip_select];
  323. if (devices[i].bus_num == 0)
  324. enable_spi0 = 1;
  325. else
  326. enable_spi1 = 1;
  327. /* enable chip-select pin */
  328. at91_set_gpio_output(cs_pin, 1);
  329. /* pass chip-select pin to driver */
  330. devices[i].controller_data = (void *) cs_pin;
  331. }
  332. spi_register_board_info(devices, nr_devices);
  333. /* Configure SPI bus(es) */
  334. if (enable_spi0) {
  335. at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
  336. at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
  337. at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
  338. at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
  339. platform_device_register(&at91sam9261_spi0_device);
  340. }
  341. if (enable_spi1) {
  342. at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
  343. at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
  344. at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
  345. at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
  346. platform_device_register(&at91sam9261_spi1_device);
  347. }
  348. }
  349. #else
  350. void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
  351. #endif
  352. /* --------------------------------------------------------------------
  353. * LCD Controller
  354. * -------------------------------------------------------------------- */
  355. #if defined(CONFIG_FB_AT91) || defined(CONFIG_FB_AT91_MODULE)
  356. static u64 lcdc_dmamask = 0xffffffffUL;
  357. static struct at91fb_info lcdc_data;
  358. static struct resource lcdc_resources[] = {
  359. [0] = {
  360. .start = AT91SAM9261_LCDC_BASE,
  361. .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
  362. .flags = IORESOURCE_MEM,
  363. },
  364. [1] = {
  365. .start = AT91SAM9261_ID_LCDC,
  366. .end = AT91SAM9261_ID_LCDC,
  367. .flags = IORESOURCE_IRQ,
  368. },
  369. #if defined(CONFIG_FB_INTSRAM)
  370. [2] = {
  371. .start = AT91SAM9261_SRAM_BASE,
  372. .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
  373. .flags = IORESOURCE_MEM,
  374. },
  375. #endif
  376. };
  377. static struct platform_device at91_lcdc_device = {
  378. .name = "at91-fb",
  379. .id = 0,
  380. .dev = {
  381. .dma_mask = &lcdc_dmamask,
  382. .coherent_dma_mask = 0xffffffff,
  383. .platform_data = &lcdc_data,
  384. },
  385. .resource = lcdc_resources,
  386. .num_resources = ARRAY_SIZE(lcdc_resources),
  387. };
  388. void __init at91_add_device_lcdc(struct at91fb_info *data)
  389. {
  390. if (!data) {
  391. return;
  392. }
  393. at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
  394. at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
  395. at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
  396. at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
  397. at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
  398. at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
  399. at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
  400. at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
  401. at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
  402. at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
  403. at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
  404. at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
  405. at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
  406. at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
  407. at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
  408. at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
  409. at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
  410. at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
  411. at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
  412. at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
  413. at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
  414. at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
  415. lcdc_data = *data;
  416. platform_device_register(&at91_lcdc_device);
  417. }
  418. #else
  419. void __init at91_add_device_lcdc(struct at91fb_info *data) {}
  420. #endif
  421. /* --------------------------------------------------------------------
  422. * LEDs
  423. * -------------------------------------------------------------------- */
  424. #if defined(CONFIG_LEDS)
  425. u8 at91_leds_cpu;
  426. u8 at91_leds_timer;
  427. void __init at91_init_leds(u8 cpu_led, u8 timer_led)
  428. {
  429. at91_leds_cpu = cpu_led;
  430. at91_leds_timer = timer_led;
  431. }
  432. #else
  433. void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
  434. #endif
  435. /* --------------------------------------------------------------------
  436. * UART
  437. * -------------------------------------------------------------------- */
  438. #if defined(CONFIG_SERIAL_ATMEL)
  439. static struct resource dbgu_resources[] = {
  440. [0] = {
  441. .start = AT91_VA_BASE_SYS + AT91_DBGU,
  442. .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
  443. .flags = IORESOURCE_MEM,
  444. },
  445. [1] = {
  446. .start = AT91_ID_SYS,
  447. .end = AT91_ID_SYS,
  448. .flags = IORESOURCE_IRQ,
  449. },
  450. };
  451. static struct atmel_uart_data dbgu_data = {
  452. .use_dma_tx = 0,
  453. .use_dma_rx = 0, /* DBGU not capable of receive DMA */
  454. .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
  455. };
  456. static struct platform_device at91sam9261_dbgu_device = {
  457. .name = "atmel_usart",
  458. .id = 0,
  459. .dev = {
  460. .platform_data = &dbgu_data,
  461. .coherent_dma_mask = 0xffffffff,
  462. },
  463. .resource = dbgu_resources,
  464. .num_resources = ARRAY_SIZE(dbgu_resources),
  465. };
  466. static inline void configure_dbgu_pins(void)
  467. {
  468. at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
  469. at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
  470. }
  471. static struct resource uart0_resources[] = {
  472. [0] = {
  473. .start = AT91SAM9261_BASE_US0,
  474. .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
  475. .flags = IORESOURCE_MEM,
  476. },
  477. [1] = {
  478. .start = AT91SAM9261_ID_US0,
  479. .end = AT91SAM9261_ID_US0,
  480. .flags = IORESOURCE_IRQ,
  481. },
  482. };
  483. static struct atmel_uart_data uart0_data = {
  484. .use_dma_tx = 1,
  485. .use_dma_rx = 1,
  486. };
  487. static struct platform_device at91sam9261_uart0_device = {
  488. .name = "atmel_usart",
  489. .id = 1,
  490. .dev = {
  491. .platform_data = &uart0_data,
  492. .coherent_dma_mask = 0xffffffff,
  493. },
  494. .resource = uart0_resources,
  495. .num_resources = ARRAY_SIZE(uart0_resources),
  496. };
  497. static inline void configure_usart0_pins(void)
  498. {
  499. at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
  500. at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
  501. at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
  502. at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
  503. }
  504. static struct resource uart1_resources[] = {
  505. [0] = {
  506. .start = AT91SAM9261_BASE_US1,
  507. .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
  508. .flags = IORESOURCE_MEM,
  509. },
  510. [1] = {
  511. .start = AT91SAM9261_ID_US1,
  512. .end = AT91SAM9261_ID_US1,
  513. .flags = IORESOURCE_IRQ,
  514. },
  515. };
  516. static struct atmel_uart_data uart1_data = {
  517. .use_dma_tx = 1,
  518. .use_dma_rx = 1,
  519. };
  520. static struct platform_device at91sam9261_uart1_device = {
  521. .name = "atmel_usart",
  522. .id = 2,
  523. .dev = {
  524. .platform_data = &uart1_data,
  525. .coherent_dma_mask = 0xffffffff,
  526. },
  527. .resource = uart1_resources,
  528. .num_resources = ARRAY_SIZE(uart1_resources),
  529. };
  530. static inline void configure_usart1_pins(void)
  531. {
  532. at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
  533. at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
  534. }
  535. static struct resource uart2_resources[] = {
  536. [0] = {
  537. .start = AT91SAM9261_BASE_US2,
  538. .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
  539. .flags = IORESOURCE_MEM,
  540. },
  541. [1] = {
  542. .start = AT91SAM9261_ID_US2,
  543. .end = AT91SAM9261_ID_US2,
  544. .flags = IORESOURCE_IRQ,
  545. },
  546. };
  547. static struct atmel_uart_data uart2_data = {
  548. .use_dma_tx = 1,
  549. .use_dma_rx = 1,
  550. };
  551. static struct platform_device at91sam9261_uart2_device = {
  552. .name = "atmel_usart",
  553. .id = 3,
  554. .dev = {
  555. .platform_data = &uart2_data,
  556. .coherent_dma_mask = 0xffffffff,
  557. },
  558. .resource = uart2_resources,
  559. .num_resources = ARRAY_SIZE(uart2_resources),
  560. };
  561. static inline void configure_usart2_pins(void)
  562. {
  563. at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
  564. at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
  565. }
  566. struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
  567. struct platform_device *atmel_default_console_device; /* the serial console device */
  568. void __init at91_init_serial(struct at91_uart_config *config)
  569. {
  570. int i;
  571. /* Fill in list of supported UARTs */
  572. for (i = 0; i < config->nr_tty; i++) {
  573. switch (config->tty_map[i]) {
  574. case 0:
  575. configure_usart0_pins();
  576. at91_uarts[i] = &at91sam9261_uart0_device;
  577. at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
  578. break;
  579. case 1:
  580. configure_usart1_pins();
  581. at91_uarts[i] = &at91sam9261_uart1_device;
  582. at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
  583. break;
  584. case 2:
  585. configure_usart2_pins();
  586. at91_uarts[i] = &at91sam9261_uart2_device;
  587. at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
  588. break;
  589. case 3:
  590. configure_dbgu_pins();
  591. at91_uarts[i] = &at91sam9261_dbgu_device;
  592. at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
  593. break;
  594. default:
  595. continue;
  596. }
  597. at91_uarts[i]->id = i; /* update ID number to mapped ID */
  598. }
  599. /* Set serial console device */
  600. if (config->console_tty < ATMEL_MAX_UART)
  601. atmel_default_console_device = at91_uarts[config->console_tty];
  602. if (!atmel_default_console_device)
  603. printk(KERN_INFO "AT91: No default serial console defined.\n");
  604. }
  605. void __init at91_add_device_serial(void)
  606. {
  607. int i;
  608. for (i = 0; i < ATMEL_MAX_UART; i++) {
  609. if (at91_uarts[i])
  610. platform_device_register(at91_uarts[i]);
  611. }
  612. }
  613. #else
  614. void __init at91_init_serial(struct at91_uart_config *config) {}
  615. void __init at91_add_device_serial(void) {}
  616. #endif
  617. /* -------------------------------------------------------------------- */
  618. /*
  619. * These devices are always present and don't need any board-specific
  620. * setup.
  621. */
  622. static int __init at91_add_standard_devices(void)
  623. {
  624. return 0;
  625. }
  626. arch_initcall(at91_add_standard_devices);