mcp-sa11x0.c 6.9 KB

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  1. /*
  2. * linux/drivers/mfd/mcp-sa11x0.c
  3. *
  4. * Copyright (C) 2001-2005 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License.
  9. *
  10. * SA11x0 MCP (Multimedia Communications Port) driver.
  11. *
  12. * MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/io.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/delay.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm.h>
  23. #include <linux/mfd/mcp.h>
  24. #include <mach/hardware.h>
  25. #include <asm/mach-types.h>
  26. #include <asm/system.h>
  27. #include <mach/mcp.h>
  28. #include <mach/assabet.h>
  29. #define DRIVER_NAME "sa11x0-mcp"
  30. struct mcp_sa11x0 {
  31. void __iomem *base0;
  32. void __iomem *base1;
  33. u32 mccr0;
  34. u32 mccr1;
  35. };
  36. /* Register offsets */
  37. #define MCCR0(m) ((m)->base0 + 0x00)
  38. #define MCDR0(m) ((m)->base0 + 0x08)
  39. #define MCDR1(m) ((m)->base0 + 0x0c)
  40. #define MCDR2(m) ((m)->base0 + 0x10)
  41. #define MCSR(m) ((m)->base0 + 0x18)
  42. #define MCCR1(m) ((m)->base1 + 0x00)
  43. #define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
  44. static void
  45. mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
  46. {
  47. struct mcp_sa11x0 *m = priv(mcp);
  48. divisor /= 32;
  49. m->mccr0 &= ~0x00007f00;
  50. m->mccr0 |= divisor << 8;
  51. writel_relaxed(m->mccr0, MCCR0(m));
  52. }
  53. static void
  54. mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
  55. {
  56. struct mcp_sa11x0 *m = priv(mcp);
  57. divisor /= 32;
  58. m->mccr0 &= ~0x0000007f;
  59. m->mccr0 |= divisor;
  60. writel_relaxed(m->mccr0, MCCR0(m));
  61. }
  62. /*
  63. * Write data to the device. The bit should be set after 3 subframe
  64. * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
  65. * We really should try doing something more productive while we
  66. * wait.
  67. */
  68. static void
  69. mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
  70. {
  71. struct mcp_sa11x0 *m = priv(mcp);
  72. int ret = -ETIME;
  73. int i;
  74. writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));
  75. for (i = 0; i < 2; i++) {
  76. udelay(mcp->rw_timeout);
  77. if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
  78. ret = 0;
  79. break;
  80. }
  81. }
  82. if (ret < 0)
  83. printk(KERN_WARNING "mcp: write timed out\n");
  84. }
  85. /*
  86. * Read data from the device. The bit should be set after 3 subframe
  87. * times (each frame is 64 clocks). We wait a maximum of 6 subframes.
  88. * We really should try doing something more productive while we
  89. * wait.
  90. */
  91. static unsigned int
  92. mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
  93. {
  94. struct mcp_sa11x0 *m = priv(mcp);
  95. int ret = -ETIME;
  96. int i;
  97. writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));
  98. for (i = 0; i < 2; i++) {
  99. udelay(mcp->rw_timeout);
  100. if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
  101. ret = readl_relaxed(MCDR2(m)) & 0xffff;
  102. break;
  103. }
  104. }
  105. if (ret < 0)
  106. printk(KERN_WARNING "mcp: read timed out\n");
  107. return ret;
  108. }
  109. static void mcp_sa11x0_enable(struct mcp *mcp)
  110. {
  111. struct mcp_sa11x0 *m = priv(mcp);
  112. writel(-1, MCSR(m));
  113. m->mccr0 |= MCCR0_MCE;
  114. writel_relaxed(m->mccr0, MCCR0(m));
  115. }
  116. static void mcp_sa11x0_disable(struct mcp *mcp)
  117. {
  118. struct mcp_sa11x0 *m = priv(mcp);
  119. m->mccr0 &= ~MCCR0_MCE;
  120. writel_relaxed(m->mccr0, MCCR0(m));
  121. }
  122. /*
  123. * Our methods.
  124. */
  125. static struct mcp_ops mcp_sa11x0 = {
  126. .set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
  127. .set_audio_divisor = mcp_sa11x0_set_audio_divisor,
  128. .reg_write = mcp_sa11x0_write,
  129. .reg_read = mcp_sa11x0_read,
  130. .enable = mcp_sa11x0_enable,
  131. .disable = mcp_sa11x0_disable,
  132. };
  133. static int mcp_sa11x0_probe(struct platform_device *dev)
  134. {
  135. struct mcp_plat_data *data = dev->dev.platform_data;
  136. struct resource *mem0, *mem1;
  137. struct mcp_sa11x0 *m;
  138. struct mcp *mcp;
  139. int ret;
  140. if (!data)
  141. return -ENODEV;
  142. mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
  143. mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
  144. if (!mem0 || !mem1)
  145. return -ENXIO;
  146. if (!request_mem_region(mem0->start, resource_size(mem0),
  147. DRIVER_NAME)) {
  148. ret = -EBUSY;
  149. goto err_mem0;
  150. }
  151. if (!request_mem_region(mem1->start, resource_size(mem1),
  152. DRIVER_NAME)) {
  153. ret = -EBUSY;
  154. goto err_mem1;
  155. }
  156. mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
  157. if (!mcp) {
  158. ret = -ENOMEM;
  159. goto err_alloc;
  160. }
  161. mcp->owner = THIS_MODULE;
  162. mcp->ops = &mcp_sa11x0;
  163. mcp->sclk_rate = data->sclk_rate;
  164. mcp->gpio_base = data->gpio_base;
  165. m = priv(mcp);
  166. m->mccr0 = data->mccr0 | 0x7f7f;
  167. m->mccr1 = data->mccr1;
  168. m->base0 = ioremap(mem0->start, resource_size(mem0));
  169. m->base1 = ioremap(mem1->start, resource_size(mem1));
  170. if (!m->base0 || !m->base1) {
  171. ret = -ENOMEM;
  172. goto err_ioremap;
  173. }
  174. platform_set_drvdata(dev, mcp);
  175. if (machine_is_assabet()) {
  176. ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
  177. }
  178. /*
  179. * Initialise device. Note that we initially
  180. * set the sampling rate to minimum.
  181. */
  182. writel_relaxed(-1, MCSR(m));
  183. writel_relaxed(m->mccr1, MCCR1(m));
  184. writel_relaxed(m->mccr0, MCCR0(m));
  185. /*
  186. * Calculate the read/write timeout (us) from the bit clock
  187. * rate. This is the period for 3 64-bit frames. Always
  188. * round this time up.
  189. */
  190. mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
  191. mcp->sclk_rate;
  192. ret = mcp_host_add(mcp);
  193. if (ret == 0)
  194. return 0;
  195. platform_set_drvdata(dev, NULL);
  196. err_ioremap:
  197. iounmap(m->base1);
  198. iounmap(m->base0);
  199. mcp_host_free(mcp);
  200. err_alloc:
  201. release_mem_region(mem1->start, resource_size(mem1));
  202. err_mem1:
  203. release_mem_region(mem0->start, resource_size(mem0));
  204. err_mem0:
  205. return ret;
  206. }
  207. static int mcp_sa11x0_remove(struct platform_device *dev)
  208. {
  209. struct mcp *mcp = platform_get_drvdata(dev);
  210. struct mcp_sa11x0 *m = priv(mcp);
  211. struct resource *mem0, *mem1;
  212. mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
  213. mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
  214. platform_set_drvdata(dev, NULL);
  215. mcp_host_del(mcp);
  216. iounmap(m->base1);
  217. iounmap(m->base0);
  218. mcp_host_free(mcp);
  219. release_mem_region(mem1->start, resource_size(mem1));
  220. release_mem_region(mem0->start, resource_size(mem0));
  221. return 0;
  222. }
  223. #ifdef CONFIG_PM_SLEEP
  224. static int mcp_sa11x0_suspend(struct device *dev)
  225. {
  226. struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
  227. writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
  228. return 0;
  229. }
  230. static int mcp_sa11x0_resume(struct device *dev)
  231. {
  232. struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
  233. writel_relaxed(m->mccr1, MCCR1(m));
  234. writel_relaxed(m->mccr0, MCCR0(m));
  235. return 0;
  236. }
  237. #endif
  238. static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
  239. SET_SYSTEM_SLEEP_PM_OPS(mcp_sa11x0_suspend, mcp_sa11x0_resume)
  240. };
  241. static struct platform_driver mcp_sa11x0_driver = {
  242. .probe = mcp_sa11x0_probe,
  243. .remove = mcp_sa11x0_remove,
  244. .driver = {
  245. .name = DRIVER_NAME,
  246. .owner = THIS_MODULE,
  247. .pm = &mcp_sa11x0_pm_ops,
  248. },
  249. };
  250. /*
  251. * This needs re-working
  252. */
  253. module_platform_driver(mcp_sa11x0_driver);
  254. MODULE_ALIAS("platform:" DRIVER_NAME);
  255. MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
  256. MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
  257. MODULE_LICENSE("GPL");