iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #define DRV_NAME "iwl3945"
  45. #include "iwl-fh.h"
  46. #include "iwl-3945-fh.h"
  47. #include "iwl-commands.h"
  48. #include "iwl-sta.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /**
  84. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  85. * @priv: eeprom and antenna fields are used to determine antenna flags
  86. *
  87. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  88. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  89. *
  90. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  91. * IWL_ANTENNA_MAIN - Force MAIN antenna
  92. * IWL_ANTENNA_AUX - Force AUX antenna
  93. */
  94. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  95. {
  96. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  97. switch (iwl3945_mod_params.antenna) {
  98. case IWL_ANTENNA_DIVERSITY:
  99. return 0;
  100. case IWL_ANTENNA_MAIN:
  101. if (eeprom->antenna_switch_type)
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  104. case IWL_ANTENNA_AUX:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  108. }
  109. /* bad antenna selector value */
  110. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  111. iwl3945_mod_params.antenna);
  112. return 0; /* "diversity" is default if error */
  113. }
  114. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  115. struct ieee80211_key_conf *keyconf,
  116. u8 sta_id)
  117. {
  118. unsigned long flags;
  119. __le16 key_flags = 0;
  120. int ret;
  121. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  122. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  123. if (sta_id == priv->hw_params.bcast_sta_id)
  124. key_flags |= STA_KEY_MULTICAST_MSK;
  125. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  126. keyconf->hw_key_idx = keyconf->keyidx;
  127. key_flags &= ~STA_KEY_FLG_INVALID;
  128. spin_lock_irqsave(&priv->sta_lock, flags);
  129. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  130. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  131. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  132. keyconf->keylen);
  133. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  134. keyconf->keylen);
  135. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  136. == STA_KEY_FLG_NO_ENC)
  137. priv->stations[sta_id].sta.key.key_offset =
  138. iwl_get_free_ucode_key_index(priv);
  139. /* else, we are overriding an existing key => no need to allocated room
  140. * in uCode. */
  141. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  142. "no space for a new key");
  143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  146. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  147. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  148. spin_unlock_irqrestore(&priv->sta_lock, flags);
  149. return ret;
  150. }
  151. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  152. struct ieee80211_key_conf *keyconf,
  153. u8 sta_id)
  154. {
  155. return -EOPNOTSUPP;
  156. }
  157. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  158. struct ieee80211_key_conf *keyconf,
  159. u8 sta_id)
  160. {
  161. return -EOPNOTSUPP;
  162. }
  163. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&priv->sta_lock, flags);
  167. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  168. memset(&priv->stations[sta_id].sta.key, 0,
  169. sizeof(struct iwl4965_keyinfo));
  170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  174. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  175. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  176. return 0;
  177. }
  178. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  179. struct ieee80211_key_conf *keyconf, u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->alg) {
  184. case ALG_CCMP:
  185. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  186. break;
  187. case ALG_TKIP:
  188. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_WEP:
  191. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. default:
  194. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  195. ret = -EINVAL;
  196. }
  197. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  198. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  199. sta_id, ret);
  200. return ret;
  201. }
  202. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  203. {
  204. int ret = -EOPNOTSUPP;
  205. return ret;
  206. }
  207. static int iwl3945_set_static_key(struct iwl_priv *priv,
  208. struct ieee80211_key_conf *key)
  209. {
  210. if (key->alg == ALG_WEP)
  211. return -EOPNOTSUPP;
  212. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  213. return -EINVAL;
  214. }
  215. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  216. {
  217. struct list_head *element;
  218. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  219. priv->frames_count);
  220. while (!list_empty(&priv->free_frames)) {
  221. element = priv->free_frames.next;
  222. list_del(element);
  223. kfree(list_entry(element, struct iwl3945_frame, list));
  224. priv->frames_count--;
  225. }
  226. if (priv->frames_count) {
  227. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  228. priv->frames_count);
  229. priv->frames_count = 0;
  230. }
  231. }
  232. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  233. {
  234. struct iwl3945_frame *frame;
  235. struct list_head *element;
  236. if (list_empty(&priv->free_frames)) {
  237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  238. if (!frame) {
  239. IWL_ERR(priv, "Could not allocate frame!\n");
  240. return NULL;
  241. }
  242. priv->frames_count++;
  243. return frame;
  244. }
  245. element = priv->free_frames.next;
  246. list_del(element);
  247. return list_entry(element, struct iwl3945_frame, list);
  248. }
  249. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  250. {
  251. memset(frame, 0, sizeof(*frame));
  252. list_add(&frame->list, &priv->free_frames);
  253. }
  254. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  255. struct ieee80211_hdr *hdr,
  256. int left)
  257. {
  258. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  259. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  260. (priv->iw_mode != NL80211_IFTYPE_AP)))
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->shared_virt)
  289. pci_free_consistent(priv->pci_dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->shared_virt,
  292. priv->shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. u8 rc_flags = info->control.rates[0].flags;
  336. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  337. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  338. tx_flags |= TX_CMD_FLG_ACK_MSK;
  339. if (ieee80211_is_mgmt(fc))
  340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  341. if (ieee80211_is_probe_resp(fc) &&
  342. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  343. tx_flags |= TX_CMD_FLG_TSF_MSK;
  344. } else {
  345. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. }
  348. tx->sta_id = std_id;
  349. if (ieee80211_has_morefrags(fc))
  350. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  351. if (ieee80211_is_data_qos(fc)) {
  352. u8 *qc = ieee80211_get_qos_ctl(hdr);
  353. tx->tid_tspec = qc[0] & 0xf;
  354. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  355. } else {
  356. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  357. }
  358. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  359. tx_flags |= TX_CMD_FLG_RTS_MSK;
  360. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  361. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  362. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  363. tx_flags |= TX_CMD_FLG_CTS_MSK;
  364. }
  365. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  366. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  367. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  368. if (ieee80211_is_mgmt(fc)) {
  369. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  370. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  371. else
  372. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  373. } else {
  374. tx->timeout.pm_frame_timeout = 0;
  375. }
  376. tx->driver_txop = 0;
  377. tx->tx_flags = tx_flags;
  378. tx->next_frame_len = 0;
  379. }
  380. /*
  381. * start REPLY_TX command process
  382. */
  383. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  384. {
  385. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  386. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  387. struct iwl3945_tx_cmd *tx;
  388. struct iwl_tx_queue *txq = NULL;
  389. struct iwl_queue *q = NULL;
  390. struct iwl_device_cmd *out_cmd;
  391. struct iwl_cmd_meta *out_meta;
  392. dma_addr_t phys_addr;
  393. dma_addr_t txcmd_phys;
  394. int txq_id = skb_get_queue_mapping(skb);
  395. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  396. u8 id;
  397. u8 unicast;
  398. u8 sta_id;
  399. u8 tid = 0;
  400. u16 seq_number = 0;
  401. __le16 fc;
  402. u8 wait_write_ptr = 0;
  403. u8 *qc = NULL;
  404. unsigned long flags;
  405. int rc;
  406. spin_lock_irqsave(&priv->lock, flags);
  407. if (iwl_is_rfkill(priv)) {
  408. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  409. goto drop_unlock;
  410. }
  411. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  412. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  413. goto drop_unlock;
  414. }
  415. unicast = !is_multicast_ether_addr(hdr->addr1);
  416. id = 0;
  417. fc = hdr->frame_control;
  418. #ifdef CONFIG_IWLWIFI_DEBUG
  419. if (ieee80211_is_auth(fc))
  420. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  421. else if (ieee80211_is_assoc_req(fc))
  422. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  423. else if (ieee80211_is_reassoc_req(fc))
  424. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  425. #endif
  426. /* drop all non-injected data frame if we are not associated */
  427. if (ieee80211_is_data(fc) &&
  428. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  429. (!iwl_is_associated(priv) ||
  430. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  431. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  432. goto drop_unlock;
  433. }
  434. spin_unlock_irqrestore(&priv->lock, flags);
  435. hdr_len = ieee80211_hdrlen(fc);
  436. /* Find (or create) index into station table for destination station */
  437. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  438. sta_id = priv->hw_params.bcast_sta_id;
  439. else
  440. sta_id = iwl_get_sta_id(priv, hdr);
  441. if (sta_id == IWL_INVALID_STATION) {
  442. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  443. hdr->addr1);
  444. goto drop;
  445. }
  446. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  447. if (ieee80211_is_data_qos(fc)) {
  448. qc = ieee80211_get_qos_ctl(hdr);
  449. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  450. if (unlikely(tid >= MAX_TID_COUNT))
  451. goto drop;
  452. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  453. IEEE80211_SCTL_SEQ;
  454. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  455. (hdr->seq_ctrl &
  456. cpu_to_le16(IEEE80211_SCTL_FRAG));
  457. seq_number += 0x10;
  458. }
  459. /* Descriptor for chosen Tx queue */
  460. txq = &priv->txq[txq_id];
  461. q = &txq->q;
  462. spin_lock_irqsave(&priv->lock, flags);
  463. idx = get_cmd_index(q, q->write_ptr, 0);
  464. /* Set up driver data for this TFD */
  465. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  466. txq->txb[q->write_ptr].skb[0] = skb;
  467. /* Init first empty entry in queue's array of Tx/cmd buffers */
  468. out_cmd = txq->cmd[idx];
  469. out_meta = &txq->meta[idx];
  470. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  471. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  472. memset(tx, 0, sizeof(*tx));
  473. /*
  474. * Set up the Tx-command (not MAC!) header.
  475. * Store the chosen Tx queue and TFD index within the sequence field;
  476. * after Tx, uCode's Tx response will return this value so driver can
  477. * locate the frame within the tx queue and do post-tx processing.
  478. */
  479. out_cmd->hdr.cmd = REPLY_TX;
  480. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  481. INDEX_TO_SEQ(q->write_ptr)));
  482. /* Copy MAC header from skb into command buffer */
  483. memcpy(tx->hdr, hdr, hdr_len);
  484. if (info->control.hw_key)
  485. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  486. /* TODO need this for burst mode later on */
  487. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  488. /* set is_hcca to 0; it probably will never be implemented */
  489. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  490. /* Total # bytes to be transmitted */
  491. len = (u16)skb->len;
  492. tx->len = cpu_to_le16(len);
  493. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  494. iwl_update_stats(priv, true, fc, len);
  495. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  496. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  497. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  498. txq->need_update = 1;
  499. if (qc)
  500. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  501. } else {
  502. wait_write_ptr = 1;
  503. txq->need_update = 0;
  504. }
  505. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  506. le16_to_cpu(out_cmd->hdr.sequence));
  507. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  508. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  509. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  510. ieee80211_hdrlen(fc));
  511. /*
  512. * Use the first empty entry in this queue's command buffer array
  513. * to contain the Tx command and MAC header concatenated together
  514. * (payload data will be in another buffer).
  515. * Size of this varies, due to varying MAC header length.
  516. * If end is not dword aligned, we'll have 2 extra bytes at the end
  517. * of the MAC header (device reads on dword boundaries).
  518. * We'll tell device about this padding later.
  519. */
  520. len = sizeof(struct iwl3945_tx_cmd) +
  521. sizeof(struct iwl_cmd_header) + hdr_len;
  522. len_org = len;
  523. len = (len + 3) & ~3;
  524. if (len_org != len)
  525. len_org = 1;
  526. else
  527. len_org = 0;
  528. /* Physical address of this Tx command's header (not MAC header!),
  529. * within command buffer array. */
  530. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  531. len, PCI_DMA_TODEVICE);
  532. /* we do not map meta data ... so we can safely access address to
  533. * provide to unmap command*/
  534. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  535. pci_unmap_len_set(out_meta, len, len);
  536. /* Add buffer containing Tx command and MAC(!) header to TFD's
  537. * first entry */
  538. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  539. txcmd_phys, len, 1, 0);
  540. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  541. * if any (802.11 null frames have no payload). */
  542. len = skb->len - hdr_len;
  543. if (len) {
  544. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  545. len, PCI_DMA_TODEVICE);
  546. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  547. phys_addr, len,
  548. 0, U32_PAD(len));
  549. }
  550. /* Tell device the write index *just past* this latest filled TFD */
  551. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  552. rc = iwl_txq_update_write_ptr(priv, txq);
  553. spin_unlock_irqrestore(&priv->lock, flags);
  554. if (rc)
  555. return rc;
  556. if ((iwl_queue_space(q) < q->high_mark)
  557. && priv->mac80211_registered) {
  558. if (wait_write_ptr) {
  559. spin_lock_irqsave(&priv->lock, flags);
  560. txq->need_update = 1;
  561. iwl_txq_update_write_ptr(priv, txq);
  562. spin_unlock_irqrestore(&priv->lock, flags);
  563. }
  564. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  565. }
  566. return 0;
  567. drop_unlock:
  568. spin_unlock_irqrestore(&priv->lock, flags);
  569. drop:
  570. return -1;
  571. }
  572. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  573. #include "iwl-spectrum.h"
  574. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  575. #define BEACON_TIME_MASK_HIGH 0xFF000000
  576. #define TIME_UNIT 1024
  577. /*
  578. * extended beacon time format
  579. * time in usec will be changed into a 32-bit value in 8:24 format
  580. * the high 1 byte is the beacon counts
  581. * the lower 3 bytes is the time in usec within one beacon interval
  582. */
  583. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  584. {
  585. u32 quot;
  586. u32 rem;
  587. u32 interval = beacon_interval * 1024;
  588. if (!interval || !usec)
  589. return 0;
  590. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  591. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  592. return (quot << 24) + rem;
  593. }
  594. /* base is usually what we get from ucode with each received frame,
  595. * the same as HW timer counter counting down
  596. */
  597. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  598. {
  599. u32 base_low = base & BEACON_TIME_MASK_LOW;
  600. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  601. u32 interval = beacon_interval * TIME_UNIT;
  602. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  603. (addon & BEACON_TIME_MASK_HIGH);
  604. if (base_low > addon_low)
  605. res += base_low - addon_low;
  606. else if (base_low < addon_low) {
  607. res += interval + base_low - addon_low;
  608. res += (1 << 24);
  609. } else
  610. res += (1 << 24);
  611. return cpu_to_le32(res);
  612. }
  613. static int iwl3945_get_measurement(struct iwl_priv *priv,
  614. struct ieee80211_measurement_params *params,
  615. u8 type)
  616. {
  617. struct iwl_spectrum_cmd spectrum;
  618. struct iwl_rx_packet *res;
  619. struct iwl_host_cmd cmd = {
  620. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  621. .data = (void *)&spectrum,
  622. .flags = CMD_WANT_SKB,
  623. };
  624. u32 add_time = le64_to_cpu(params->start_time);
  625. int rc;
  626. int spectrum_resp_status;
  627. int duration = le16_to_cpu(params->duration);
  628. if (iwl_is_associated(priv))
  629. add_time =
  630. iwl3945_usecs_to_beacons(
  631. le64_to_cpu(params->start_time) - priv->last_tsf,
  632. le16_to_cpu(priv->rxon_timing.beacon_interval));
  633. memset(&spectrum, 0, sizeof(spectrum));
  634. spectrum.channel_count = cpu_to_le16(1);
  635. spectrum.flags =
  636. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  637. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  638. cmd.len = sizeof(spectrum);
  639. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  640. if (iwl_is_associated(priv))
  641. spectrum.start_time =
  642. iwl3945_add_beacon_time(priv->last_beacon_time,
  643. add_time,
  644. le16_to_cpu(priv->rxon_timing.beacon_interval));
  645. else
  646. spectrum.start_time = 0;
  647. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  648. spectrum.channels[0].channel = params->channel;
  649. spectrum.channels[0].type = type;
  650. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  651. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  652. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  653. rc = iwl_send_cmd_sync(priv, &cmd);
  654. if (rc)
  655. return rc;
  656. res = (struct iwl_rx_packet *)cmd.reply_skb->data;
  657. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  658. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  659. rc = -EIO;
  660. }
  661. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  662. switch (spectrum_resp_status) {
  663. case 0: /* Command will be handled */
  664. if (res->u.spectrum.id != 0xff) {
  665. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  666. res->u.spectrum.id);
  667. priv->measurement_status &= ~MEASUREMENT_READY;
  668. }
  669. priv->measurement_status |= MEASUREMENT_ACTIVE;
  670. rc = 0;
  671. break;
  672. case 1: /* Command will not be handled */
  673. rc = -EAGAIN;
  674. break;
  675. }
  676. dev_kfree_skb_any(cmd.reply_skb);
  677. return rc;
  678. }
  679. #endif
  680. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  681. struct iwl_rx_mem_buffer *rxb)
  682. {
  683. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  684. struct iwl_alive_resp *palive;
  685. struct delayed_work *pwork;
  686. palive = &pkt->u.alive_frame;
  687. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  688. "0x%01X 0x%01X\n",
  689. palive->is_valid, palive->ver_type,
  690. palive->ver_subtype);
  691. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  692. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  693. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  694. sizeof(struct iwl_alive_resp));
  695. pwork = &priv->init_alive_start;
  696. } else {
  697. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  698. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  699. sizeof(struct iwl_alive_resp));
  700. pwork = &priv->alive_start;
  701. iwl3945_disable_events(priv);
  702. }
  703. /* We delay the ALIVE response by 5ms to
  704. * give the HW RF Kill time to activate... */
  705. if (palive->is_valid == UCODE_VALID_OK)
  706. queue_delayed_work(priv->workqueue, pwork,
  707. msecs_to_jiffies(5));
  708. else
  709. IWL_WARN(priv, "uCode did not respond OK.\n");
  710. }
  711. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  712. struct iwl_rx_mem_buffer *rxb)
  713. {
  714. #ifdef CONFIG_IWLWIFI_DEBUG
  715. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  716. #endif
  717. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  718. return;
  719. }
  720. static void iwl3945_bg_beacon_update(struct work_struct *work)
  721. {
  722. struct iwl_priv *priv =
  723. container_of(work, struct iwl_priv, beacon_update);
  724. struct sk_buff *beacon;
  725. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  726. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  727. if (!beacon) {
  728. IWL_ERR(priv, "update beacon failed\n");
  729. return;
  730. }
  731. mutex_lock(&priv->mutex);
  732. /* new beacon skb is allocated every time; dispose previous.*/
  733. if (priv->ibss_beacon)
  734. dev_kfree_skb(priv->ibss_beacon);
  735. priv->ibss_beacon = beacon;
  736. mutex_unlock(&priv->mutex);
  737. iwl3945_send_beacon_cmd(priv);
  738. }
  739. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  740. struct iwl_rx_mem_buffer *rxb)
  741. {
  742. #ifdef CONFIG_IWLWIFI_DEBUG
  743. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  744. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  745. u8 rate = beacon->beacon_notify_hdr.rate;
  746. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  747. "tsf %d %d rate %d\n",
  748. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  749. beacon->beacon_notify_hdr.failure_frame,
  750. le32_to_cpu(beacon->ibss_mgr_status),
  751. le32_to_cpu(beacon->high_tsf),
  752. le32_to_cpu(beacon->low_tsf), rate);
  753. #endif
  754. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  755. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  756. queue_work(priv->workqueue, &priv->beacon_update);
  757. }
  758. /* Handle notification from uCode that card's power state is changing
  759. * due to software, hardware, or critical temperature RFKILL */
  760. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  761. struct iwl_rx_mem_buffer *rxb)
  762. {
  763. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  764. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  765. unsigned long status = priv->status;
  766. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  767. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  768. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  769. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  770. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  771. if (flags & HW_CARD_DISABLED)
  772. set_bit(STATUS_RF_KILL_HW, &priv->status);
  773. else
  774. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  775. iwl_scan_cancel(priv);
  776. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  777. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  778. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  779. test_bit(STATUS_RF_KILL_HW, &priv->status));
  780. else
  781. wake_up_interruptible(&priv->wait_command_queue);
  782. }
  783. /**
  784. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  785. *
  786. * Setup the RX handlers for each of the reply types sent from the uCode
  787. * to the host.
  788. *
  789. * This function chains into the hardware specific files for them to setup
  790. * any hardware specific handlers as well.
  791. */
  792. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  793. {
  794. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  795. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  796. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  797. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  798. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  799. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  800. iwl_rx_pm_debug_statistics_notif;
  801. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  802. /*
  803. * The same handler is used for both the REPLY to a discrete
  804. * statistics request from the host as well as for the periodic
  805. * statistics notifications (after received beacons) from the uCode.
  806. */
  807. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  808. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  809. iwl_setup_spectrum_handlers(priv);
  810. iwl_setup_rx_scan_handlers(priv);
  811. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  812. /* Set up hardware specific Rx handlers */
  813. iwl3945_hw_rx_handler_setup(priv);
  814. }
  815. /************************** RX-FUNCTIONS ****************************/
  816. /*
  817. * Rx theory of operation
  818. *
  819. * The host allocates 32 DMA target addresses and passes the host address
  820. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  821. * 0 to 31
  822. *
  823. * Rx Queue Indexes
  824. * The host/firmware share two index registers for managing the Rx buffers.
  825. *
  826. * The READ index maps to the first position that the firmware may be writing
  827. * to -- the driver can read up to (but not including) this position and get
  828. * good data.
  829. * The READ index is managed by the firmware once the card is enabled.
  830. *
  831. * The WRITE index maps to the last position the driver has read from -- the
  832. * position preceding WRITE is the last slot the firmware can place a packet.
  833. *
  834. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  835. * WRITE = READ.
  836. *
  837. * During initialization, the host sets up the READ queue position to the first
  838. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  839. *
  840. * When the firmware places a packet in a buffer, it will advance the READ index
  841. * and fire the RX interrupt. The driver can then query the READ index and
  842. * process as many packets as possible, moving the WRITE index forward as it
  843. * resets the Rx queue buffers with new memory.
  844. *
  845. * The management in the driver is as follows:
  846. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  847. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  848. * to replenish the iwl->rxq->rx_free.
  849. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  850. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  851. * 'processed' and 'read' driver indexes as well)
  852. * + A received packet is processed and handed to the kernel network stack,
  853. * detached from the iwl->rxq. The driver 'processed' index is updated.
  854. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  855. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  856. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  857. * were enough free buffers and RX_STALLED is set it is cleared.
  858. *
  859. *
  860. * Driver sequence:
  861. *
  862. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  863. * iwl3945_rx_queue_restock
  864. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  865. * queue, updates firmware pointers, and updates
  866. * the WRITE index. If insufficient rx_free buffers
  867. * are available, schedules iwl3945_rx_replenish
  868. *
  869. * -- enable interrupts --
  870. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  871. * READ INDEX, detaching the SKB from the pool.
  872. * Moves the packet buffer from queue to rx_used.
  873. * Calls iwl3945_rx_queue_restock to refill any empty
  874. * slots.
  875. * ...
  876. *
  877. */
  878. /**
  879. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  880. */
  881. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  882. dma_addr_t dma_addr)
  883. {
  884. return cpu_to_le32((u32)dma_addr);
  885. }
  886. /**
  887. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  888. *
  889. * If there are slots in the RX queue that need to be restocked,
  890. * and we have free pre-allocated buffers, fill the ranks as much
  891. * as we can, pulling from rx_free.
  892. *
  893. * This moves the 'write' index forward to catch up with 'processed', and
  894. * also updates the memory address in the firmware to reference the new
  895. * target buffer.
  896. */
  897. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  898. {
  899. struct iwl_rx_queue *rxq = &priv->rxq;
  900. struct list_head *element;
  901. struct iwl_rx_mem_buffer *rxb;
  902. unsigned long flags;
  903. int write, rc;
  904. spin_lock_irqsave(&rxq->lock, flags);
  905. write = rxq->write & ~0x7;
  906. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  907. /* Get next free Rx buffer, remove from free list */
  908. element = rxq->rx_free.next;
  909. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  910. list_del(element);
  911. /* Point to Rx buffer via next RBD in circular buffer */
  912. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  913. rxq->queue[rxq->write] = rxb;
  914. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  915. rxq->free_count--;
  916. }
  917. spin_unlock_irqrestore(&rxq->lock, flags);
  918. /* If the pre-allocated buffer pool is dropping low, schedule to
  919. * refill it */
  920. if (rxq->free_count <= RX_LOW_WATERMARK)
  921. queue_work(priv->workqueue, &priv->rx_replenish);
  922. /* If we've added more space for the firmware to place data, tell it.
  923. * Increment device's write pointer in multiples of 8. */
  924. if ((rxq->write_actual != (rxq->write & ~0x7))
  925. || (abs(rxq->write - rxq->read) > 7)) {
  926. spin_lock_irqsave(&rxq->lock, flags);
  927. rxq->need_update = 1;
  928. spin_unlock_irqrestore(&rxq->lock, flags);
  929. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  930. if (rc)
  931. return rc;
  932. }
  933. return 0;
  934. }
  935. /**
  936. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  937. *
  938. * When moving to rx_free an SKB is allocated for the slot.
  939. *
  940. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  941. * This is called as a scheduled work item (except for during initialization)
  942. */
  943. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  944. {
  945. struct iwl_rx_queue *rxq = &priv->rxq;
  946. struct list_head *element;
  947. struct iwl_rx_mem_buffer *rxb;
  948. struct sk_buff *skb;
  949. unsigned long flags;
  950. while (1) {
  951. spin_lock_irqsave(&rxq->lock, flags);
  952. if (list_empty(&rxq->rx_used)) {
  953. spin_unlock_irqrestore(&rxq->lock, flags);
  954. return;
  955. }
  956. spin_unlock_irqrestore(&rxq->lock, flags);
  957. if (rxq->free_count > RX_LOW_WATERMARK)
  958. priority |= __GFP_NOWARN;
  959. /* Alloc a new receive buffer */
  960. skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
  961. if (!skb) {
  962. if (net_ratelimit())
  963. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  964. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  965. net_ratelimit())
  966. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  967. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  968. rxq->free_count);
  969. /* We don't reschedule replenish work here -- we will
  970. * call the restock method and if it still needs
  971. * more buffers it will schedule replenish */
  972. break;
  973. }
  974. spin_lock_irqsave(&rxq->lock, flags);
  975. if (list_empty(&rxq->rx_used)) {
  976. spin_unlock_irqrestore(&rxq->lock, flags);
  977. dev_kfree_skb_any(skb);
  978. return;
  979. }
  980. element = rxq->rx_used.next;
  981. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  982. list_del(element);
  983. spin_unlock_irqrestore(&rxq->lock, flags);
  984. rxb->skb = skb;
  985. /* If radiotap head is required, reserve some headroom here.
  986. * The physical head count is a variable rx_stats->phy_count.
  987. * We reserve 4 bytes here. Plus these extra bytes, the
  988. * headroom of the physical head should be enough for the
  989. * radiotap head that iwl3945 supported. See iwl3945_rt.
  990. */
  991. skb_reserve(rxb->skb, 4);
  992. /* Get physical address of RB/SKB */
  993. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  994. rxb->skb->data,
  995. priv->hw_params.rx_buf_size,
  996. PCI_DMA_FROMDEVICE);
  997. spin_lock_irqsave(&rxq->lock, flags);
  998. list_add_tail(&rxb->list, &rxq->rx_free);
  999. priv->alloc_rxb_skb++;
  1000. rxq->free_count++;
  1001. spin_unlock_irqrestore(&rxq->lock, flags);
  1002. }
  1003. }
  1004. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1005. {
  1006. unsigned long flags;
  1007. int i;
  1008. spin_lock_irqsave(&rxq->lock, flags);
  1009. INIT_LIST_HEAD(&rxq->rx_free);
  1010. INIT_LIST_HEAD(&rxq->rx_used);
  1011. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1012. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1013. /* In the reset function, these buffers may have been allocated
  1014. * to an SKB, so we need to unmap and free potential storage */
  1015. if (rxq->pool[i].skb != NULL) {
  1016. pci_unmap_single(priv->pci_dev,
  1017. rxq->pool[i].real_dma_addr,
  1018. priv->hw_params.rx_buf_size,
  1019. PCI_DMA_FROMDEVICE);
  1020. priv->alloc_rxb_skb--;
  1021. dev_kfree_skb(rxq->pool[i].skb);
  1022. rxq->pool[i].skb = NULL;
  1023. }
  1024. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1025. }
  1026. /* Set us so that we have processed and used all buffers, but have
  1027. * not restocked the Rx queue with fresh buffers */
  1028. rxq->read = rxq->write = 0;
  1029. rxq->free_count = 0;
  1030. rxq->write_actual = 0;
  1031. spin_unlock_irqrestore(&rxq->lock, flags);
  1032. }
  1033. void iwl3945_rx_replenish(void *data)
  1034. {
  1035. struct iwl_priv *priv = data;
  1036. unsigned long flags;
  1037. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1038. spin_lock_irqsave(&priv->lock, flags);
  1039. iwl3945_rx_queue_restock(priv);
  1040. spin_unlock_irqrestore(&priv->lock, flags);
  1041. }
  1042. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1043. {
  1044. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1045. iwl3945_rx_queue_restock(priv);
  1046. }
  1047. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1048. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1049. * This free routine walks the list of POOL entries and if SKB is set to
  1050. * non NULL it is unmapped and freed
  1051. */
  1052. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1053. {
  1054. int i;
  1055. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1056. if (rxq->pool[i].skb != NULL) {
  1057. pci_unmap_single(priv->pci_dev,
  1058. rxq->pool[i].real_dma_addr,
  1059. priv->hw_params.rx_buf_size,
  1060. PCI_DMA_FROMDEVICE);
  1061. dev_kfree_skb(rxq->pool[i].skb);
  1062. }
  1063. }
  1064. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1065. rxq->dma_addr);
  1066. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1067. rxq->rb_stts, rxq->rb_stts_dma);
  1068. rxq->bd = NULL;
  1069. rxq->rb_stts = NULL;
  1070. }
  1071. /* Convert linear signal-to-noise ratio into dB */
  1072. static u8 ratio2dB[100] = {
  1073. /* 0 1 2 3 4 5 6 7 8 9 */
  1074. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1075. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1076. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1077. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1078. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1079. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1080. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1081. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1082. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1083. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1084. };
  1085. /* Calculates a relative dB value from a ratio of linear
  1086. * (i.e. not dB) signal levels.
  1087. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1088. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1089. {
  1090. /* 1000:1 or higher just report as 60 dB */
  1091. if (sig_ratio >= 1000)
  1092. return 60;
  1093. /* 100:1 or higher, divide by 10 and use table,
  1094. * add 20 dB to make up for divide by 10 */
  1095. if (sig_ratio >= 100)
  1096. return 20 + (int)ratio2dB[sig_ratio/10];
  1097. /* We shouldn't see this */
  1098. if (sig_ratio < 1)
  1099. return 0;
  1100. /* Use table for ratios 1:1 - 99:1 */
  1101. return (int)ratio2dB[sig_ratio];
  1102. }
  1103. #define PERFECT_RSSI (-20) /* dBm */
  1104. #define WORST_RSSI (-95) /* dBm */
  1105. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1106. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1107. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1108. * about formulas used below. */
  1109. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1110. {
  1111. int sig_qual;
  1112. int degradation = PERFECT_RSSI - rssi_dbm;
  1113. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1114. * as indicator; formula is (signal dbm - noise dbm).
  1115. * SNR at or above 40 is a great signal (100%).
  1116. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1117. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1118. if (noise_dbm) {
  1119. if (rssi_dbm - noise_dbm >= 40)
  1120. return 100;
  1121. else if (rssi_dbm < noise_dbm)
  1122. return 0;
  1123. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1124. /* Else use just the signal level.
  1125. * This formula is a least squares fit of data points collected and
  1126. * compared with a reference system that had a percentage (%) display
  1127. * for signal quality. */
  1128. } else
  1129. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1130. (15 * RSSI_RANGE + 62 * degradation)) /
  1131. (RSSI_RANGE * RSSI_RANGE);
  1132. if (sig_qual > 100)
  1133. sig_qual = 100;
  1134. else if (sig_qual < 1)
  1135. sig_qual = 0;
  1136. return sig_qual;
  1137. }
  1138. /**
  1139. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1140. *
  1141. * Uses the priv->rx_handlers callback function array to invoke
  1142. * the appropriate handlers, including command responses,
  1143. * frame-received notifications, and other notifications.
  1144. */
  1145. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1146. {
  1147. struct iwl_rx_mem_buffer *rxb;
  1148. struct iwl_rx_packet *pkt;
  1149. struct iwl_rx_queue *rxq = &priv->rxq;
  1150. u32 r, i;
  1151. int reclaim;
  1152. unsigned long flags;
  1153. u8 fill_rx = 0;
  1154. u32 count = 8;
  1155. int total_empty = 0;
  1156. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1157. * buffer that the driver may process (last buffer filled by ucode). */
  1158. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1159. i = rxq->read;
  1160. /* calculate total frames need to be restock after handling RX */
  1161. total_empty = r - priv->rxq.write_actual;
  1162. if (total_empty < 0)
  1163. total_empty += RX_QUEUE_SIZE;
  1164. if (total_empty > (RX_QUEUE_SIZE / 2))
  1165. fill_rx = 1;
  1166. /* Rx interrupt, but nothing sent from uCode */
  1167. if (i == r)
  1168. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1169. while (i != r) {
  1170. rxb = rxq->queue[i];
  1171. /* If an RXB doesn't have a Rx queue slot associated with it,
  1172. * then a bug has been introduced in the queue refilling
  1173. * routines -- catch it here */
  1174. BUG_ON(rxb == NULL);
  1175. rxq->queue[i] = NULL;
  1176. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1177. priv->hw_params.rx_buf_size,
  1178. PCI_DMA_FROMDEVICE);
  1179. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1180. trace_iwlwifi_dev_rx(priv, pkt,
  1181. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1182. /* Reclaim a command buffer only if this packet is a response
  1183. * to a (driver-originated) command.
  1184. * If the packet (e.g. Rx frame) originated from uCode,
  1185. * there is no command buffer to reclaim.
  1186. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1187. * but apparently a few don't get set; catch them here. */
  1188. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1189. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1190. (pkt->hdr.cmd != REPLY_TX);
  1191. /* Based on type of command response or notification,
  1192. * handle those that need handling via function in
  1193. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1194. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1195. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1196. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1197. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1198. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1199. } else {
  1200. /* No handling needed */
  1201. IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
  1202. r, i, get_cmd_string(pkt->hdr.cmd),
  1203. pkt->hdr.cmd);
  1204. }
  1205. if (reclaim) {
  1206. /* Invoke any callbacks, transfer the skb to caller, and
  1207. * fire off the (possibly) blocking iwl_send_cmd()
  1208. * as we reclaim the driver command queue */
  1209. if (rxb && rxb->skb)
  1210. iwl_tx_cmd_complete(priv, rxb);
  1211. else
  1212. IWL_WARN(priv, "Claim null rxb?\n");
  1213. }
  1214. /* For now we just don't re-use anything. We can tweak this
  1215. * later to try and re-use notification packets and SKBs that
  1216. * fail to Rx correctly */
  1217. if (rxb->skb != NULL) {
  1218. priv->alloc_rxb_skb--;
  1219. dev_kfree_skb_any(rxb->skb);
  1220. rxb->skb = NULL;
  1221. }
  1222. spin_lock_irqsave(&rxq->lock, flags);
  1223. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1224. spin_unlock_irqrestore(&rxq->lock, flags);
  1225. i = (i + 1) & RX_QUEUE_MASK;
  1226. /* If there are a lot of unused frames,
  1227. * restock the Rx queue so ucode won't assert. */
  1228. if (fill_rx) {
  1229. count++;
  1230. if (count >= 8) {
  1231. priv->rxq.read = i;
  1232. iwl3945_rx_replenish_now(priv);
  1233. count = 0;
  1234. }
  1235. }
  1236. }
  1237. /* Backtrack one entry */
  1238. priv->rxq.read = i;
  1239. if (fill_rx)
  1240. iwl3945_rx_replenish_now(priv);
  1241. else
  1242. iwl3945_rx_queue_restock(priv);
  1243. }
  1244. /* call this function to flush any scheduled tasklet */
  1245. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1246. {
  1247. /* wait to make sure we flush pending tasklet*/
  1248. synchronize_irq(priv->pci_dev->irq);
  1249. tasklet_kill(&priv->irq_tasklet);
  1250. }
  1251. #ifdef CONFIG_IWLWIFI_DEBUG
  1252. static const char *desc_lookup(int i)
  1253. {
  1254. switch (i) {
  1255. case 1:
  1256. return "FAIL";
  1257. case 2:
  1258. return "BAD_PARAM";
  1259. case 3:
  1260. return "BAD_CHECKSUM";
  1261. case 4:
  1262. return "NMI_INTERRUPT";
  1263. case 5:
  1264. return "SYSASSERT";
  1265. case 6:
  1266. return "FATAL_ERROR";
  1267. }
  1268. return "UNKNOWN";
  1269. }
  1270. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1271. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1272. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1273. {
  1274. u32 i;
  1275. u32 desc, time, count, base, data1;
  1276. u32 blink1, blink2, ilink1, ilink2;
  1277. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1278. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1279. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1280. return;
  1281. }
  1282. count = iwl_read_targ_mem(priv, base);
  1283. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1284. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1285. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1286. priv->status, count);
  1287. }
  1288. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1289. "ilink1 nmiPC Line\n");
  1290. for (i = ERROR_START_OFFSET;
  1291. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1292. i += ERROR_ELEM_SIZE) {
  1293. desc = iwl_read_targ_mem(priv, base + i);
  1294. time =
  1295. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1296. blink1 =
  1297. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1298. blink2 =
  1299. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1300. ilink1 =
  1301. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1302. ilink2 =
  1303. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1304. data1 =
  1305. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1306. IWL_ERR(priv,
  1307. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1308. desc_lookup(desc), desc, time, blink1, blink2,
  1309. ilink1, ilink2, data1);
  1310. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1311. 0, blink1, blink2, ilink1, ilink2);
  1312. }
  1313. }
  1314. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1315. /**
  1316. * iwl3945_print_event_log - Dump error event log to syslog
  1317. *
  1318. */
  1319. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1320. u32 num_events, u32 mode)
  1321. {
  1322. u32 i;
  1323. u32 base; /* SRAM byte address of event log header */
  1324. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1325. u32 ptr; /* SRAM byte address of log data */
  1326. u32 ev, time, data; /* event log data */
  1327. if (num_events == 0)
  1328. return;
  1329. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1330. if (mode == 0)
  1331. event_size = 2 * sizeof(u32);
  1332. else
  1333. event_size = 3 * sizeof(u32);
  1334. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1335. /* "time" is actually "data" for mode 0 (no timestamp).
  1336. * place event id # at far right for easier visual parsing. */
  1337. for (i = 0; i < num_events; i++) {
  1338. ev = iwl_read_targ_mem(priv, ptr);
  1339. ptr += sizeof(u32);
  1340. time = iwl_read_targ_mem(priv, ptr);
  1341. ptr += sizeof(u32);
  1342. if (mode == 0) {
  1343. /* data, ev */
  1344. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1345. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1346. } else {
  1347. data = iwl_read_targ_mem(priv, ptr);
  1348. ptr += sizeof(u32);
  1349. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1350. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1351. }
  1352. }
  1353. }
  1354. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1355. {
  1356. u32 base; /* SRAM byte address of event log header */
  1357. u32 capacity; /* event log capacity in # entries */
  1358. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1359. u32 num_wraps; /* # times uCode wrapped to top of log */
  1360. u32 next_entry; /* index of next entry to be written by uCode */
  1361. u32 size; /* # entries that we'll print */
  1362. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1363. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1364. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1365. return;
  1366. }
  1367. /* event log header */
  1368. capacity = iwl_read_targ_mem(priv, base);
  1369. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1370. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1371. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1372. size = num_wraps ? capacity : next_entry;
  1373. /* bail out if nothing in log */
  1374. if (size == 0) {
  1375. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1376. return;
  1377. }
  1378. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1379. size, num_wraps);
  1380. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1381. * i.e the next one that uCode would fill. */
  1382. if (num_wraps)
  1383. iwl3945_print_event_log(priv, next_entry,
  1384. capacity - next_entry, mode);
  1385. /* (then/else) start at top of log */
  1386. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1387. }
  1388. #else
  1389. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1390. {
  1391. }
  1392. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1393. {
  1394. }
  1395. #endif
  1396. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1397. {
  1398. u32 inta, handled = 0;
  1399. u32 inta_fh;
  1400. unsigned long flags;
  1401. #ifdef CONFIG_IWLWIFI_DEBUG
  1402. u32 inta_mask;
  1403. #endif
  1404. spin_lock_irqsave(&priv->lock, flags);
  1405. /* Ack/clear/reset pending uCode interrupts.
  1406. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1407. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1408. inta = iwl_read32(priv, CSR_INT);
  1409. iwl_write32(priv, CSR_INT, inta);
  1410. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1411. * Any new interrupts that happen after this, either while we're
  1412. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1413. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1414. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1415. #ifdef CONFIG_IWLWIFI_DEBUG
  1416. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1417. /* just for debug */
  1418. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1419. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1420. inta, inta_mask, inta_fh);
  1421. }
  1422. #endif
  1423. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1424. * atomic, make sure that inta covers all the interrupts that
  1425. * we've discovered, even if FH interrupt came in just after
  1426. * reading CSR_INT. */
  1427. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1428. inta |= CSR_INT_BIT_FH_RX;
  1429. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1430. inta |= CSR_INT_BIT_FH_TX;
  1431. /* Now service all interrupt bits discovered above. */
  1432. if (inta & CSR_INT_BIT_HW_ERR) {
  1433. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1434. /* Tell the device to stop sending interrupts */
  1435. iwl_disable_interrupts(priv);
  1436. priv->isr_stats.hw++;
  1437. iwl_irq_handle_error(priv);
  1438. handled |= CSR_INT_BIT_HW_ERR;
  1439. spin_unlock_irqrestore(&priv->lock, flags);
  1440. return;
  1441. }
  1442. #ifdef CONFIG_IWLWIFI_DEBUG
  1443. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1444. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1445. if (inta & CSR_INT_BIT_SCD) {
  1446. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1447. "the frame/frames.\n");
  1448. priv->isr_stats.sch++;
  1449. }
  1450. /* Alive notification via Rx interrupt will do the real work */
  1451. if (inta & CSR_INT_BIT_ALIVE) {
  1452. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1453. priv->isr_stats.alive++;
  1454. }
  1455. }
  1456. #endif
  1457. /* Safely ignore these bits for debug checks below */
  1458. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1459. /* Error detected by uCode */
  1460. if (inta & CSR_INT_BIT_SW_ERR) {
  1461. IWL_ERR(priv, "Microcode SW error detected. "
  1462. "Restarting 0x%X.\n", inta);
  1463. priv->isr_stats.sw++;
  1464. priv->isr_stats.sw_err = inta;
  1465. iwl_irq_handle_error(priv);
  1466. handled |= CSR_INT_BIT_SW_ERR;
  1467. }
  1468. /* uCode wakes up after power-down sleep */
  1469. if (inta & CSR_INT_BIT_WAKEUP) {
  1470. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1471. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1472. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1473. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1474. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1475. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1476. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1477. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1478. priv->isr_stats.wakeup++;
  1479. handled |= CSR_INT_BIT_WAKEUP;
  1480. }
  1481. /* All uCode command responses, including Tx command responses,
  1482. * Rx "responses" (frame-received notification), and other
  1483. * notifications from uCode come through here*/
  1484. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1485. iwl3945_rx_handle(priv);
  1486. priv->isr_stats.rx++;
  1487. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1488. }
  1489. if (inta & CSR_INT_BIT_FH_TX) {
  1490. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1491. priv->isr_stats.tx++;
  1492. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1493. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1494. (FH39_SRVC_CHNL), 0x0);
  1495. handled |= CSR_INT_BIT_FH_TX;
  1496. }
  1497. if (inta & ~handled) {
  1498. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1499. priv->isr_stats.unhandled++;
  1500. }
  1501. if (inta & ~priv->inta_mask) {
  1502. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1503. inta & ~priv->inta_mask);
  1504. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1505. }
  1506. /* Re-enable all interrupts */
  1507. /* only Re-enable if disabled by irq */
  1508. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1509. iwl_enable_interrupts(priv);
  1510. #ifdef CONFIG_IWLWIFI_DEBUG
  1511. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1512. inta = iwl_read32(priv, CSR_INT);
  1513. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1514. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1515. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1516. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1517. }
  1518. #endif
  1519. spin_unlock_irqrestore(&priv->lock, flags);
  1520. }
  1521. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1522. enum ieee80211_band band,
  1523. u8 is_active, u8 n_probes,
  1524. struct iwl3945_scan_channel *scan_ch)
  1525. {
  1526. struct ieee80211_channel *chan;
  1527. const struct ieee80211_supported_band *sband;
  1528. const struct iwl_channel_info *ch_info;
  1529. u16 passive_dwell = 0;
  1530. u16 active_dwell = 0;
  1531. int added, i;
  1532. sband = iwl_get_hw_mode(priv, band);
  1533. if (!sband)
  1534. return 0;
  1535. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1536. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1537. if (passive_dwell <= active_dwell)
  1538. passive_dwell = active_dwell + 1;
  1539. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1540. chan = priv->scan_request->channels[i];
  1541. if (chan->band != band)
  1542. continue;
  1543. scan_ch->channel = chan->hw_value;
  1544. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1545. if (!is_channel_valid(ch_info)) {
  1546. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1547. scan_ch->channel);
  1548. continue;
  1549. }
  1550. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1551. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1552. /* If passive , set up for auto-switch
  1553. * and use long active_dwell time.
  1554. */
  1555. if (!is_active || is_channel_passive(ch_info) ||
  1556. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1557. scan_ch->type = 0; /* passive */
  1558. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1559. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1560. } else {
  1561. scan_ch->type = 1; /* active */
  1562. }
  1563. /* Set direct probe bits. These may be used both for active
  1564. * scan channels (probes gets sent right away),
  1565. * or for passive channels (probes get se sent only after
  1566. * hearing clear Rx packet).*/
  1567. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1568. if (n_probes)
  1569. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1570. } else {
  1571. /* uCode v1 does not allow setting direct probe bits on
  1572. * passive channel. */
  1573. if ((scan_ch->type & 1) && n_probes)
  1574. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1575. }
  1576. /* Set txpower levels to defaults */
  1577. scan_ch->tpc.dsp_atten = 110;
  1578. /* scan_pwr_info->tpc.dsp_atten; */
  1579. /*scan_pwr_info->tpc.tx_gain; */
  1580. if (band == IEEE80211_BAND_5GHZ)
  1581. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1582. else {
  1583. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1584. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1585. * power level:
  1586. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1587. */
  1588. }
  1589. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1590. scan_ch->channel,
  1591. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1592. (scan_ch->type & 1) ?
  1593. active_dwell : passive_dwell);
  1594. scan_ch++;
  1595. added++;
  1596. }
  1597. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1598. return added;
  1599. }
  1600. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1601. struct ieee80211_rate *rates)
  1602. {
  1603. int i;
  1604. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1605. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1606. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1607. rates[i].hw_value_short = i;
  1608. rates[i].flags = 0;
  1609. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1610. /*
  1611. * If CCK != 1M then set short preamble rate flag.
  1612. */
  1613. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1614. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1615. }
  1616. }
  1617. }
  1618. /******************************************************************************
  1619. *
  1620. * uCode download functions
  1621. *
  1622. ******************************************************************************/
  1623. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1624. {
  1625. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1626. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1627. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1628. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1629. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1630. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1631. }
  1632. /**
  1633. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1634. * looking at all data.
  1635. */
  1636. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1637. {
  1638. u32 val;
  1639. u32 save_len = len;
  1640. int rc = 0;
  1641. u32 errcnt;
  1642. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1643. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1644. IWL39_RTC_INST_LOWER_BOUND);
  1645. errcnt = 0;
  1646. for (; len > 0; len -= sizeof(u32), image++) {
  1647. /* read data comes through single port, auto-incr addr */
  1648. /* NOTE: Use the debugless read so we don't flood kernel log
  1649. * if IWL_DL_IO is set */
  1650. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1651. if (val != le32_to_cpu(*image)) {
  1652. IWL_ERR(priv, "uCode INST section is invalid at "
  1653. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1654. save_len - len, val, le32_to_cpu(*image));
  1655. rc = -EIO;
  1656. errcnt++;
  1657. if (errcnt >= 20)
  1658. break;
  1659. }
  1660. }
  1661. if (!errcnt)
  1662. IWL_DEBUG_INFO(priv,
  1663. "ucode image in INSTRUCTION memory is good\n");
  1664. return rc;
  1665. }
  1666. /**
  1667. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1668. * using sample data 100 bytes apart. If these sample points are good,
  1669. * it's a pretty good bet that everything between them is good, too.
  1670. */
  1671. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1672. {
  1673. u32 val;
  1674. int rc = 0;
  1675. u32 errcnt = 0;
  1676. u32 i;
  1677. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1678. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1679. /* read data comes through single port, auto-incr addr */
  1680. /* NOTE: Use the debugless read so we don't flood kernel log
  1681. * if IWL_DL_IO is set */
  1682. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1683. i + IWL39_RTC_INST_LOWER_BOUND);
  1684. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1685. if (val != le32_to_cpu(*image)) {
  1686. #if 0 /* Enable this if you want to see details */
  1687. IWL_ERR(priv, "uCode INST section is invalid at "
  1688. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1689. i, val, *image);
  1690. #endif
  1691. rc = -EIO;
  1692. errcnt++;
  1693. if (errcnt >= 3)
  1694. break;
  1695. }
  1696. }
  1697. return rc;
  1698. }
  1699. /**
  1700. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1701. * and verify its contents
  1702. */
  1703. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1704. {
  1705. __le32 *image;
  1706. u32 len;
  1707. int rc = 0;
  1708. /* Try bootstrap */
  1709. image = (__le32 *)priv->ucode_boot.v_addr;
  1710. len = priv->ucode_boot.len;
  1711. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1712. if (rc == 0) {
  1713. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1714. return 0;
  1715. }
  1716. /* Try initialize */
  1717. image = (__le32 *)priv->ucode_init.v_addr;
  1718. len = priv->ucode_init.len;
  1719. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1720. if (rc == 0) {
  1721. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1722. return 0;
  1723. }
  1724. /* Try runtime/protocol */
  1725. image = (__le32 *)priv->ucode_code.v_addr;
  1726. len = priv->ucode_code.len;
  1727. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1728. if (rc == 0) {
  1729. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1730. return 0;
  1731. }
  1732. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1733. /* Since nothing seems to match, show first several data entries in
  1734. * instruction SRAM, so maybe visual inspection will give a clue.
  1735. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1736. image = (__le32 *)priv->ucode_boot.v_addr;
  1737. len = priv->ucode_boot.len;
  1738. rc = iwl3945_verify_inst_full(priv, image, len);
  1739. return rc;
  1740. }
  1741. static void iwl3945_nic_start(struct iwl_priv *priv)
  1742. {
  1743. /* Remove all resets to allow NIC to operate */
  1744. iwl_write32(priv, CSR_RESET, 0);
  1745. }
  1746. /**
  1747. * iwl3945_read_ucode - Read uCode images from disk file.
  1748. *
  1749. * Copy into buffers for card to fetch via bus-mastering
  1750. */
  1751. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1752. {
  1753. const struct iwl_ucode_header *ucode;
  1754. int ret = -EINVAL, index;
  1755. const struct firmware *ucode_raw;
  1756. /* firmware file name contains uCode/driver compatibility version */
  1757. const char *name_pre = priv->cfg->fw_name_pre;
  1758. const unsigned int api_max = priv->cfg->ucode_api_max;
  1759. const unsigned int api_min = priv->cfg->ucode_api_min;
  1760. char buf[25];
  1761. u8 *src;
  1762. size_t len;
  1763. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1764. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1765. * request_firmware() is synchronous, file is in memory on return. */
  1766. for (index = api_max; index >= api_min; index--) {
  1767. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1768. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1769. if (ret < 0) {
  1770. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1771. buf, ret);
  1772. if (ret == -ENOENT)
  1773. continue;
  1774. else
  1775. goto error;
  1776. } else {
  1777. if (index < api_max)
  1778. IWL_ERR(priv, "Loaded firmware %s, "
  1779. "which is deprecated. "
  1780. " Please use API v%u instead.\n",
  1781. buf, api_max);
  1782. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1783. "(%zd bytes) from disk\n",
  1784. buf, ucode_raw->size);
  1785. break;
  1786. }
  1787. }
  1788. if (ret < 0)
  1789. goto error;
  1790. /* Make sure that we got at least our header! */
  1791. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1792. IWL_ERR(priv, "File size way too small!\n");
  1793. ret = -EINVAL;
  1794. goto err_release;
  1795. }
  1796. /* Data from ucode file: header followed by uCode images */
  1797. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1798. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1799. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1800. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1801. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1802. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1803. init_data_size =
  1804. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1805. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1806. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1807. /* api_ver should match the api version forming part of the
  1808. * firmware filename ... but we don't check for that and only rely
  1809. * on the API version read from firmware header from here on forward */
  1810. if (api_ver < api_min || api_ver > api_max) {
  1811. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1812. "Driver supports v%u, firmware is v%u.\n",
  1813. api_max, api_ver);
  1814. priv->ucode_ver = 0;
  1815. ret = -EINVAL;
  1816. goto err_release;
  1817. }
  1818. if (api_ver != api_max)
  1819. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1820. "got %u. New firmware can be obtained "
  1821. "from http://www.intellinuxwireless.org.\n",
  1822. api_max, api_ver);
  1823. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1824. IWL_UCODE_MAJOR(priv->ucode_ver),
  1825. IWL_UCODE_MINOR(priv->ucode_ver),
  1826. IWL_UCODE_API(priv->ucode_ver),
  1827. IWL_UCODE_SERIAL(priv->ucode_ver));
  1828. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1829. priv->ucode_ver);
  1830. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1831. inst_size);
  1832. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1833. data_size);
  1834. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1835. init_size);
  1836. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1837. init_data_size);
  1838. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1839. boot_size);
  1840. /* Verify size of file vs. image size info in file's header */
  1841. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1842. inst_size + data_size + init_size +
  1843. init_data_size + boot_size) {
  1844. IWL_DEBUG_INFO(priv,
  1845. "uCode file size %zd does not match expected size\n",
  1846. ucode_raw->size);
  1847. ret = -EINVAL;
  1848. goto err_release;
  1849. }
  1850. /* Verify that uCode images will fit in card's SRAM */
  1851. if (inst_size > IWL39_MAX_INST_SIZE) {
  1852. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1853. inst_size);
  1854. ret = -EINVAL;
  1855. goto err_release;
  1856. }
  1857. if (data_size > IWL39_MAX_DATA_SIZE) {
  1858. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1859. data_size);
  1860. ret = -EINVAL;
  1861. goto err_release;
  1862. }
  1863. if (init_size > IWL39_MAX_INST_SIZE) {
  1864. IWL_DEBUG_INFO(priv,
  1865. "uCode init instr len %d too large to fit in\n",
  1866. init_size);
  1867. ret = -EINVAL;
  1868. goto err_release;
  1869. }
  1870. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1871. IWL_DEBUG_INFO(priv,
  1872. "uCode init data len %d too large to fit in\n",
  1873. init_data_size);
  1874. ret = -EINVAL;
  1875. goto err_release;
  1876. }
  1877. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1878. IWL_DEBUG_INFO(priv,
  1879. "uCode boot instr len %d too large to fit in\n",
  1880. boot_size);
  1881. ret = -EINVAL;
  1882. goto err_release;
  1883. }
  1884. /* Allocate ucode buffers for card's bus-master loading ... */
  1885. /* Runtime instructions and 2 copies of data:
  1886. * 1) unmodified from disk
  1887. * 2) backup cache for save/restore during power-downs */
  1888. priv->ucode_code.len = inst_size;
  1889. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1890. priv->ucode_data.len = data_size;
  1891. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1892. priv->ucode_data_backup.len = data_size;
  1893. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1894. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1895. !priv->ucode_data_backup.v_addr)
  1896. goto err_pci_alloc;
  1897. /* Initialization instructions and data */
  1898. if (init_size && init_data_size) {
  1899. priv->ucode_init.len = init_size;
  1900. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1901. priv->ucode_init_data.len = init_data_size;
  1902. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1903. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1904. goto err_pci_alloc;
  1905. }
  1906. /* Bootstrap (instructions only, no data) */
  1907. if (boot_size) {
  1908. priv->ucode_boot.len = boot_size;
  1909. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1910. if (!priv->ucode_boot.v_addr)
  1911. goto err_pci_alloc;
  1912. }
  1913. /* Copy images into buffers for card's bus-master reads ... */
  1914. /* Runtime instructions (first block of data in file) */
  1915. len = inst_size;
  1916. IWL_DEBUG_INFO(priv,
  1917. "Copying (but not loading) uCode instr len %zd\n", len);
  1918. memcpy(priv->ucode_code.v_addr, src, len);
  1919. src += len;
  1920. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1921. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1922. /* Runtime data (2nd block)
  1923. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1924. len = data_size;
  1925. IWL_DEBUG_INFO(priv,
  1926. "Copying (but not loading) uCode data len %zd\n", len);
  1927. memcpy(priv->ucode_data.v_addr, src, len);
  1928. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1929. src += len;
  1930. /* Initialization instructions (3rd block) */
  1931. if (init_size) {
  1932. len = init_size;
  1933. IWL_DEBUG_INFO(priv,
  1934. "Copying (but not loading) init instr len %zd\n", len);
  1935. memcpy(priv->ucode_init.v_addr, src, len);
  1936. src += len;
  1937. }
  1938. /* Initialization data (4th block) */
  1939. if (init_data_size) {
  1940. len = init_data_size;
  1941. IWL_DEBUG_INFO(priv,
  1942. "Copying (but not loading) init data len %zd\n", len);
  1943. memcpy(priv->ucode_init_data.v_addr, src, len);
  1944. src += len;
  1945. }
  1946. /* Bootstrap instructions (5th block) */
  1947. len = boot_size;
  1948. IWL_DEBUG_INFO(priv,
  1949. "Copying (but not loading) boot instr len %zd\n", len);
  1950. memcpy(priv->ucode_boot.v_addr, src, len);
  1951. /* We have our copies now, allow OS release its copies */
  1952. release_firmware(ucode_raw);
  1953. return 0;
  1954. err_pci_alloc:
  1955. IWL_ERR(priv, "failed to allocate pci memory\n");
  1956. ret = -ENOMEM;
  1957. iwl3945_dealloc_ucode_pci(priv);
  1958. err_release:
  1959. release_firmware(ucode_raw);
  1960. error:
  1961. return ret;
  1962. }
  1963. /**
  1964. * iwl3945_set_ucode_ptrs - Set uCode address location
  1965. *
  1966. * Tell initialization uCode where to find runtime uCode.
  1967. *
  1968. * BSM registers initially contain pointers to initialization uCode.
  1969. * We need to replace them to load runtime uCode inst and data,
  1970. * and to save runtime data when powering down.
  1971. */
  1972. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1973. {
  1974. dma_addr_t pinst;
  1975. dma_addr_t pdata;
  1976. /* bits 31:0 for 3945 */
  1977. pinst = priv->ucode_code.p_addr;
  1978. pdata = priv->ucode_data_backup.p_addr;
  1979. /* Tell bootstrap uCode where to find image to load */
  1980. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1981. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1982. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1983. priv->ucode_data.len);
  1984. /* Inst byte count must be last to set up, bit 31 signals uCode
  1985. * that all new ptr/size info is in place */
  1986. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1987. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1988. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1989. return 0;
  1990. }
  1991. /**
  1992. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1993. *
  1994. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1995. *
  1996. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1997. */
  1998. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1999. {
  2000. /* Check alive response for "valid" sign from uCode */
  2001. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2002. /* We had an error bringing up the hardware, so take it
  2003. * all the way back down so we can try again */
  2004. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2005. goto restart;
  2006. }
  2007. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2008. * This is a paranoid check, because we would not have gotten the
  2009. * "initialize" alive if code weren't properly loaded. */
  2010. if (iwl3945_verify_ucode(priv)) {
  2011. /* Runtime instruction load was bad;
  2012. * take it all the way back down so we can try again */
  2013. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2014. goto restart;
  2015. }
  2016. /* Send pointers to protocol/runtime uCode image ... init code will
  2017. * load and launch runtime uCode, which will send us another "Alive"
  2018. * notification. */
  2019. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2020. if (iwl3945_set_ucode_ptrs(priv)) {
  2021. /* Runtime instruction load won't happen;
  2022. * take it all the way back down so we can try again */
  2023. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2024. goto restart;
  2025. }
  2026. return;
  2027. restart:
  2028. queue_work(priv->workqueue, &priv->restart);
  2029. }
  2030. /**
  2031. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2032. * from protocol/runtime uCode (initialization uCode's
  2033. * Alive gets handled by iwl3945_init_alive_start()).
  2034. */
  2035. static void iwl3945_alive_start(struct iwl_priv *priv)
  2036. {
  2037. int thermal_spin = 0;
  2038. u32 rfkill;
  2039. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2040. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2041. /* We had an error bringing up the hardware, so take it
  2042. * all the way back down so we can try again */
  2043. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2044. goto restart;
  2045. }
  2046. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2047. * This is a paranoid check, because we would not have gotten the
  2048. * "runtime" alive if code weren't properly loaded. */
  2049. if (iwl3945_verify_ucode(priv)) {
  2050. /* Runtime instruction load was bad;
  2051. * take it all the way back down so we can try again */
  2052. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2053. goto restart;
  2054. }
  2055. iwl_clear_stations_table(priv);
  2056. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2057. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2058. if (rfkill & 0x1) {
  2059. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2060. /* if RFKILL is not on, then wait for thermal
  2061. * sensor in adapter to kick in */
  2062. while (iwl3945_hw_get_temperature(priv) == 0) {
  2063. thermal_spin++;
  2064. udelay(10);
  2065. }
  2066. if (thermal_spin)
  2067. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2068. thermal_spin * 10);
  2069. } else
  2070. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2071. /* After the ALIVE response, we can send commands to 3945 uCode */
  2072. set_bit(STATUS_ALIVE, &priv->status);
  2073. if (iwl_is_rfkill(priv))
  2074. return;
  2075. ieee80211_wake_queues(priv->hw);
  2076. priv->active_rate = priv->rates_mask;
  2077. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2078. iwl_power_update_mode(priv, false);
  2079. if (iwl_is_associated(priv)) {
  2080. struct iwl3945_rxon_cmd *active_rxon =
  2081. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2082. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2083. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2084. } else {
  2085. /* Initialize our rx_config data */
  2086. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2087. }
  2088. /* Configure Bluetooth device coexistence support */
  2089. iwl_send_bt_config(priv);
  2090. /* Configure the adapter for unassociated operation */
  2091. iwlcore_commit_rxon(priv);
  2092. iwl3945_reg_txpower_periodic(priv);
  2093. iwl_leds_init(priv);
  2094. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2095. set_bit(STATUS_READY, &priv->status);
  2096. wake_up_interruptible(&priv->wait_command_queue);
  2097. /* reassociate for ADHOC mode */
  2098. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2099. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2100. priv->vif);
  2101. if (beacon)
  2102. iwl_mac_beacon_update(priv->hw, beacon);
  2103. }
  2104. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2105. iwl_set_mode(priv, priv->iw_mode);
  2106. return;
  2107. restart:
  2108. queue_work(priv->workqueue, &priv->restart);
  2109. }
  2110. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2111. static void __iwl3945_down(struct iwl_priv *priv)
  2112. {
  2113. unsigned long flags;
  2114. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2115. struct ieee80211_conf *conf = NULL;
  2116. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2117. conf = ieee80211_get_hw_conf(priv->hw);
  2118. if (!exit_pending)
  2119. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2120. iwl_clear_stations_table(priv);
  2121. /* Unblock any waiting calls */
  2122. wake_up_interruptible_all(&priv->wait_command_queue);
  2123. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2124. * exiting the module */
  2125. if (!exit_pending)
  2126. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2127. /* stop and reset the on-board processor */
  2128. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2129. /* tell the device to stop sending interrupts */
  2130. spin_lock_irqsave(&priv->lock, flags);
  2131. iwl_disable_interrupts(priv);
  2132. spin_unlock_irqrestore(&priv->lock, flags);
  2133. iwl_synchronize_irq(priv);
  2134. if (priv->mac80211_registered)
  2135. ieee80211_stop_queues(priv->hw);
  2136. /* If we have not previously called iwl3945_init() then
  2137. * clear all bits but the RF Kill bits and return */
  2138. if (!iwl_is_init(priv)) {
  2139. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2140. STATUS_RF_KILL_HW |
  2141. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2142. STATUS_GEO_CONFIGURED |
  2143. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2144. STATUS_EXIT_PENDING;
  2145. goto exit;
  2146. }
  2147. /* ...otherwise clear out all the status bits but the RF Kill
  2148. * bit and continue taking the NIC down. */
  2149. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2150. STATUS_RF_KILL_HW |
  2151. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2152. STATUS_GEO_CONFIGURED |
  2153. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2154. STATUS_FW_ERROR |
  2155. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2156. STATUS_EXIT_PENDING;
  2157. iwl3945_hw_txq_ctx_stop(priv);
  2158. iwl3945_hw_rxq_stop(priv);
  2159. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2160. APMG_CLK_VAL_DMA_CLK_RQT);
  2161. udelay(5);
  2162. /* Stop the device, and put it in low power state */
  2163. priv->cfg->ops->lib->apm_ops.stop(priv);
  2164. exit:
  2165. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2166. if (priv->ibss_beacon)
  2167. dev_kfree_skb(priv->ibss_beacon);
  2168. priv->ibss_beacon = NULL;
  2169. /* clear out any free frames */
  2170. iwl3945_clear_free_frames(priv);
  2171. }
  2172. static void iwl3945_down(struct iwl_priv *priv)
  2173. {
  2174. mutex_lock(&priv->mutex);
  2175. __iwl3945_down(priv);
  2176. mutex_unlock(&priv->mutex);
  2177. iwl3945_cancel_deferred_work(priv);
  2178. }
  2179. #define MAX_HW_RESTARTS 5
  2180. static int __iwl3945_up(struct iwl_priv *priv)
  2181. {
  2182. int rc, i;
  2183. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2184. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2185. return -EIO;
  2186. }
  2187. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2188. IWL_ERR(priv, "ucode not available for device bring up\n");
  2189. return -EIO;
  2190. }
  2191. /* If platform's RF_KILL switch is NOT set to KILL */
  2192. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2193. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2194. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2195. else {
  2196. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2197. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2198. return -ENODEV;
  2199. }
  2200. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2201. rc = iwl3945_hw_nic_init(priv);
  2202. if (rc) {
  2203. IWL_ERR(priv, "Unable to int nic\n");
  2204. return rc;
  2205. }
  2206. /* make sure rfkill handshake bits are cleared */
  2207. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2208. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2209. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2210. /* clear (again), then enable host interrupts */
  2211. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2212. iwl_enable_interrupts(priv);
  2213. /* really make sure rfkill handshake bits are cleared */
  2214. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2215. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2216. /* Copy original ucode data image from disk into backup cache.
  2217. * This will be used to initialize the on-board processor's
  2218. * data SRAM for a clean start when the runtime program first loads. */
  2219. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2220. priv->ucode_data.len);
  2221. /* We return success when we resume from suspend and rf_kill is on. */
  2222. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2223. return 0;
  2224. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2225. iwl_clear_stations_table(priv);
  2226. /* load bootstrap state machine,
  2227. * load bootstrap program into processor's memory,
  2228. * prepare to load the "initialize" uCode */
  2229. priv->cfg->ops->lib->load_ucode(priv);
  2230. if (rc) {
  2231. IWL_ERR(priv,
  2232. "Unable to set up bootstrap uCode: %d\n", rc);
  2233. continue;
  2234. }
  2235. /* start card; "initialize" will load runtime ucode */
  2236. iwl3945_nic_start(priv);
  2237. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2238. return 0;
  2239. }
  2240. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2241. __iwl3945_down(priv);
  2242. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2243. /* tried to restart and config the device for as long as our
  2244. * patience could withstand */
  2245. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2246. return -EIO;
  2247. }
  2248. /*****************************************************************************
  2249. *
  2250. * Workqueue callbacks
  2251. *
  2252. *****************************************************************************/
  2253. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2254. {
  2255. struct iwl_priv *priv =
  2256. container_of(data, struct iwl_priv, init_alive_start.work);
  2257. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2258. return;
  2259. mutex_lock(&priv->mutex);
  2260. iwl3945_init_alive_start(priv);
  2261. mutex_unlock(&priv->mutex);
  2262. }
  2263. static void iwl3945_bg_alive_start(struct work_struct *data)
  2264. {
  2265. struct iwl_priv *priv =
  2266. container_of(data, struct iwl_priv, alive_start.work);
  2267. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2268. return;
  2269. mutex_lock(&priv->mutex);
  2270. iwl3945_alive_start(priv);
  2271. mutex_unlock(&priv->mutex);
  2272. }
  2273. static void iwl3945_rfkill_poll(struct work_struct *data)
  2274. {
  2275. struct iwl_priv *priv =
  2276. container_of(data, struct iwl_priv, rfkill_poll.work);
  2277. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2278. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2279. else
  2280. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2281. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2282. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2283. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2284. round_jiffies_relative(2 * HZ));
  2285. }
  2286. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2287. static void iwl3945_bg_request_scan(struct work_struct *data)
  2288. {
  2289. struct iwl_priv *priv =
  2290. container_of(data, struct iwl_priv, request_scan);
  2291. struct iwl_host_cmd cmd = {
  2292. .id = REPLY_SCAN_CMD,
  2293. .len = sizeof(struct iwl3945_scan_cmd),
  2294. .flags = CMD_SIZE_HUGE,
  2295. };
  2296. int rc = 0;
  2297. struct iwl3945_scan_cmd *scan;
  2298. struct ieee80211_conf *conf = NULL;
  2299. u8 n_probes = 0;
  2300. enum ieee80211_band band;
  2301. bool is_active = false;
  2302. conf = ieee80211_get_hw_conf(priv->hw);
  2303. mutex_lock(&priv->mutex);
  2304. cancel_delayed_work(&priv->scan_check);
  2305. if (!iwl_is_ready(priv)) {
  2306. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2307. goto done;
  2308. }
  2309. /* Make sure the scan wasn't canceled before this queued work
  2310. * was given the chance to run... */
  2311. if (!test_bit(STATUS_SCANNING, &priv->status))
  2312. goto done;
  2313. /* This should never be called or scheduled if there is currently
  2314. * a scan active in the hardware. */
  2315. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2316. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2317. "Ignoring second request.\n");
  2318. rc = -EIO;
  2319. goto done;
  2320. }
  2321. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2322. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2323. goto done;
  2324. }
  2325. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2326. IWL_DEBUG_HC(priv,
  2327. "Scan request while abort pending. Queuing.\n");
  2328. goto done;
  2329. }
  2330. if (iwl_is_rfkill(priv)) {
  2331. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2332. goto done;
  2333. }
  2334. if (!test_bit(STATUS_READY, &priv->status)) {
  2335. IWL_DEBUG_HC(priv,
  2336. "Scan request while uninitialized. Queuing.\n");
  2337. goto done;
  2338. }
  2339. if (!priv->scan_bands) {
  2340. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2341. goto done;
  2342. }
  2343. if (!priv->scan) {
  2344. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2345. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2346. if (!priv->scan) {
  2347. rc = -ENOMEM;
  2348. goto done;
  2349. }
  2350. }
  2351. scan = priv->scan;
  2352. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2353. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2354. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2355. if (iwl_is_associated(priv)) {
  2356. u16 interval = 0;
  2357. u32 extra;
  2358. u32 suspend_time = 100;
  2359. u32 scan_suspend_time = 100;
  2360. unsigned long flags;
  2361. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2362. spin_lock_irqsave(&priv->lock, flags);
  2363. interval = priv->beacon_int;
  2364. spin_unlock_irqrestore(&priv->lock, flags);
  2365. scan->suspend_time = 0;
  2366. scan->max_out_time = cpu_to_le32(200 * 1024);
  2367. if (!interval)
  2368. interval = suspend_time;
  2369. /*
  2370. * suspend time format:
  2371. * 0-19: beacon interval in usec (time before exec.)
  2372. * 20-23: 0
  2373. * 24-31: number of beacons (suspend between channels)
  2374. */
  2375. extra = (suspend_time / interval) << 24;
  2376. scan_suspend_time = 0xFF0FFFFF &
  2377. (extra | ((suspend_time % interval) * 1024));
  2378. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2379. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2380. scan_suspend_time, interval);
  2381. }
  2382. if (priv->scan_request->n_ssids) {
  2383. int i, p = 0;
  2384. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2385. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2386. /* always does wildcard anyway */
  2387. if (!priv->scan_request->ssids[i].ssid_len)
  2388. continue;
  2389. scan->direct_scan[p].id = WLAN_EID_SSID;
  2390. scan->direct_scan[p].len =
  2391. priv->scan_request->ssids[i].ssid_len;
  2392. memcpy(scan->direct_scan[p].ssid,
  2393. priv->scan_request->ssids[i].ssid,
  2394. priv->scan_request->ssids[i].ssid_len);
  2395. n_probes++;
  2396. p++;
  2397. }
  2398. is_active = true;
  2399. } else
  2400. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2401. /* We don't build a direct scan probe request; the uCode will do
  2402. * that based on the direct_mask added to each channel entry */
  2403. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2404. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2405. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2406. /* flags + rate selection */
  2407. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2408. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2409. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2410. scan->good_CRC_th = 0;
  2411. band = IEEE80211_BAND_2GHZ;
  2412. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2413. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2414. /*
  2415. * If active scaning is requested but a certain channel
  2416. * is marked passive, we can do active scanning if we
  2417. * detect transmissions.
  2418. */
  2419. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2420. band = IEEE80211_BAND_5GHZ;
  2421. } else {
  2422. IWL_WARN(priv, "Invalid scan band count\n");
  2423. goto done;
  2424. }
  2425. scan->tx_cmd.len = cpu_to_le16(
  2426. iwl_fill_probe_req(priv,
  2427. (struct ieee80211_mgmt *)scan->data,
  2428. priv->scan_request->ie,
  2429. priv->scan_request->ie_len,
  2430. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2431. /* select Rx antennas */
  2432. scan->flags |= iwl3945_get_antenna_flags(priv);
  2433. if (iwl_is_monitor_mode(priv))
  2434. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2435. scan->channel_count =
  2436. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2437. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2438. if (scan->channel_count == 0) {
  2439. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2440. goto done;
  2441. }
  2442. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2443. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2444. cmd.data = scan;
  2445. scan->len = cpu_to_le16(cmd.len);
  2446. set_bit(STATUS_SCAN_HW, &priv->status);
  2447. rc = iwl_send_cmd_sync(priv, &cmd);
  2448. if (rc)
  2449. goto done;
  2450. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2451. IWL_SCAN_CHECK_WATCHDOG);
  2452. mutex_unlock(&priv->mutex);
  2453. return;
  2454. done:
  2455. /* can not perform scan make sure we clear scanning
  2456. * bits from status so next scan request can be performed.
  2457. * if we dont clear scanning status bit here all next scan
  2458. * will fail
  2459. */
  2460. clear_bit(STATUS_SCAN_HW, &priv->status);
  2461. clear_bit(STATUS_SCANNING, &priv->status);
  2462. /* inform mac80211 scan aborted */
  2463. queue_work(priv->workqueue, &priv->scan_completed);
  2464. mutex_unlock(&priv->mutex);
  2465. }
  2466. static void iwl3945_bg_up(struct work_struct *data)
  2467. {
  2468. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2469. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2470. return;
  2471. mutex_lock(&priv->mutex);
  2472. __iwl3945_up(priv);
  2473. mutex_unlock(&priv->mutex);
  2474. }
  2475. static void iwl3945_bg_restart(struct work_struct *data)
  2476. {
  2477. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2478. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2479. return;
  2480. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2481. mutex_lock(&priv->mutex);
  2482. priv->vif = NULL;
  2483. priv->is_open = 0;
  2484. mutex_unlock(&priv->mutex);
  2485. iwl3945_down(priv);
  2486. ieee80211_restart_hw(priv->hw);
  2487. } else {
  2488. iwl3945_down(priv);
  2489. queue_work(priv->workqueue, &priv->up);
  2490. }
  2491. }
  2492. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2493. {
  2494. struct iwl_priv *priv =
  2495. container_of(data, struct iwl_priv, rx_replenish);
  2496. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2497. return;
  2498. mutex_lock(&priv->mutex);
  2499. iwl3945_rx_replenish(priv);
  2500. mutex_unlock(&priv->mutex);
  2501. }
  2502. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2503. void iwl3945_post_associate(struct iwl_priv *priv)
  2504. {
  2505. int rc = 0;
  2506. struct ieee80211_conf *conf = NULL;
  2507. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2508. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2509. return;
  2510. }
  2511. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2512. priv->assoc_id, priv->active_rxon.bssid_addr);
  2513. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2514. return;
  2515. if (!priv->vif || !priv->is_open)
  2516. return;
  2517. iwl_scan_cancel_timeout(priv, 200);
  2518. conf = ieee80211_get_hw_conf(priv->hw);
  2519. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2520. iwlcore_commit_rxon(priv);
  2521. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2522. iwl_setup_rxon_timing(priv);
  2523. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2524. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2525. if (rc)
  2526. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2527. "Attempting to continue.\n");
  2528. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2529. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2530. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2531. priv->assoc_id, priv->beacon_int);
  2532. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2533. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2534. else
  2535. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2536. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2537. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2538. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2539. else
  2540. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2541. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2542. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2543. }
  2544. iwlcore_commit_rxon(priv);
  2545. switch (priv->iw_mode) {
  2546. case NL80211_IFTYPE_STATION:
  2547. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2548. break;
  2549. case NL80211_IFTYPE_ADHOC:
  2550. priv->assoc_id = 1;
  2551. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2552. iwl3945_sync_sta(priv, IWL_STA_ID,
  2553. (priv->band == IEEE80211_BAND_5GHZ) ?
  2554. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2555. CMD_ASYNC);
  2556. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2557. iwl3945_send_beacon_cmd(priv);
  2558. break;
  2559. default:
  2560. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2561. __func__, priv->iw_mode);
  2562. break;
  2563. }
  2564. iwl_activate_qos(priv, 0);
  2565. /* we have just associated, don't start scan too early */
  2566. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2567. }
  2568. /*****************************************************************************
  2569. *
  2570. * mac80211 entry point functions
  2571. *
  2572. *****************************************************************************/
  2573. #define UCODE_READY_TIMEOUT (2 * HZ)
  2574. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2575. {
  2576. struct iwl_priv *priv = hw->priv;
  2577. int ret;
  2578. IWL_DEBUG_MAC80211(priv, "enter\n");
  2579. /* we should be verifying the device is ready to be opened */
  2580. mutex_lock(&priv->mutex);
  2581. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2582. * ucode filename and max sizes are card-specific. */
  2583. if (!priv->ucode_code.len) {
  2584. ret = iwl3945_read_ucode(priv);
  2585. if (ret) {
  2586. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2587. mutex_unlock(&priv->mutex);
  2588. goto out_release_irq;
  2589. }
  2590. }
  2591. ret = __iwl3945_up(priv);
  2592. mutex_unlock(&priv->mutex);
  2593. if (ret)
  2594. goto out_release_irq;
  2595. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2596. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2597. * mac80211 will not be run successfully. */
  2598. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2599. test_bit(STATUS_READY, &priv->status),
  2600. UCODE_READY_TIMEOUT);
  2601. if (!ret) {
  2602. if (!test_bit(STATUS_READY, &priv->status)) {
  2603. IWL_ERR(priv,
  2604. "Wait for START_ALIVE timeout after %dms.\n",
  2605. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2606. ret = -ETIMEDOUT;
  2607. goto out_release_irq;
  2608. }
  2609. }
  2610. /* ucode is running and will send rfkill notifications,
  2611. * no need to poll the killswitch state anymore */
  2612. cancel_delayed_work(&priv->rfkill_poll);
  2613. iwl_led_start(priv);
  2614. priv->is_open = 1;
  2615. IWL_DEBUG_MAC80211(priv, "leave\n");
  2616. return 0;
  2617. out_release_irq:
  2618. priv->is_open = 0;
  2619. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2620. return ret;
  2621. }
  2622. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2623. {
  2624. struct iwl_priv *priv = hw->priv;
  2625. IWL_DEBUG_MAC80211(priv, "enter\n");
  2626. if (!priv->is_open) {
  2627. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2628. return;
  2629. }
  2630. priv->is_open = 0;
  2631. if (iwl_is_ready_rf(priv)) {
  2632. /* stop mac, cancel any scan request and clear
  2633. * RXON_FILTER_ASSOC_MSK BIT
  2634. */
  2635. mutex_lock(&priv->mutex);
  2636. iwl_scan_cancel_timeout(priv, 100);
  2637. mutex_unlock(&priv->mutex);
  2638. }
  2639. iwl3945_down(priv);
  2640. flush_workqueue(priv->workqueue);
  2641. /* start polling the killswitch state again */
  2642. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2643. round_jiffies_relative(2 * HZ));
  2644. IWL_DEBUG_MAC80211(priv, "leave\n");
  2645. }
  2646. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2647. {
  2648. struct iwl_priv *priv = hw->priv;
  2649. IWL_DEBUG_MAC80211(priv, "enter\n");
  2650. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2651. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2652. if (iwl3945_tx_skb(priv, skb))
  2653. dev_kfree_skb_any(skb);
  2654. IWL_DEBUG_MAC80211(priv, "leave\n");
  2655. return NETDEV_TX_OK;
  2656. }
  2657. void iwl3945_config_ap(struct iwl_priv *priv)
  2658. {
  2659. int rc = 0;
  2660. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2661. return;
  2662. /* The following should be done only at AP bring up */
  2663. if (!(iwl_is_associated(priv))) {
  2664. /* RXON - unassoc (to set timing command) */
  2665. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2666. iwlcore_commit_rxon(priv);
  2667. /* RXON Timing */
  2668. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2669. iwl_setup_rxon_timing(priv);
  2670. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2671. sizeof(priv->rxon_timing),
  2672. &priv->rxon_timing);
  2673. if (rc)
  2674. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2675. "Attempting to continue.\n");
  2676. /* FIXME: what should be the assoc_id for AP? */
  2677. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2678. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2679. priv->staging_rxon.flags |=
  2680. RXON_FLG_SHORT_PREAMBLE_MSK;
  2681. else
  2682. priv->staging_rxon.flags &=
  2683. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2684. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2685. if (priv->assoc_capability &
  2686. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2687. priv->staging_rxon.flags |=
  2688. RXON_FLG_SHORT_SLOT_MSK;
  2689. else
  2690. priv->staging_rxon.flags &=
  2691. ~RXON_FLG_SHORT_SLOT_MSK;
  2692. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2693. priv->staging_rxon.flags &=
  2694. ~RXON_FLG_SHORT_SLOT_MSK;
  2695. }
  2696. /* restore RXON assoc */
  2697. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2698. iwlcore_commit_rxon(priv);
  2699. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2700. }
  2701. iwl3945_send_beacon_cmd(priv);
  2702. /* FIXME - we need to add code here to detect a totally new
  2703. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2704. * clear sta table, add BCAST sta... */
  2705. }
  2706. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2707. struct ieee80211_vif *vif,
  2708. struct ieee80211_sta *sta,
  2709. struct ieee80211_key_conf *key)
  2710. {
  2711. struct iwl_priv *priv = hw->priv;
  2712. const u8 *addr;
  2713. int ret = 0;
  2714. u8 sta_id = IWL_INVALID_STATION;
  2715. u8 static_key;
  2716. IWL_DEBUG_MAC80211(priv, "enter\n");
  2717. if (iwl3945_mod_params.sw_crypto) {
  2718. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2719. return -EOPNOTSUPP;
  2720. }
  2721. addr = sta ? sta->addr : iwl_bcast_addr;
  2722. static_key = !iwl_is_associated(priv);
  2723. if (!static_key) {
  2724. sta_id = iwl_find_station(priv, addr);
  2725. if (sta_id == IWL_INVALID_STATION) {
  2726. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2727. addr);
  2728. return -EINVAL;
  2729. }
  2730. }
  2731. mutex_lock(&priv->mutex);
  2732. iwl_scan_cancel_timeout(priv, 100);
  2733. mutex_unlock(&priv->mutex);
  2734. switch (cmd) {
  2735. case SET_KEY:
  2736. if (static_key)
  2737. ret = iwl3945_set_static_key(priv, key);
  2738. else
  2739. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2740. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2741. break;
  2742. case DISABLE_KEY:
  2743. if (static_key)
  2744. ret = iwl3945_remove_static_key(priv);
  2745. else
  2746. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2747. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2748. break;
  2749. default:
  2750. ret = -EINVAL;
  2751. }
  2752. IWL_DEBUG_MAC80211(priv, "leave\n");
  2753. return ret;
  2754. }
  2755. /*****************************************************************************
  2756. *
  2757. * sysfs attributes
  2758. *
  2759. *****************************************************************************/
  2760. #ifdef CONFIG_IWLWIFI_DEBUG
  2761. /*
  2762. * The following adds a new attribute to the sysfs representation
  2763. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2764. * used for controlling the debug level.
  2765. *
  2766. * See the level definitions in iwl for details.
  2767. *
  2768. * The debug_level being managed using sysfs below is a per device debug
  2769. * level that is used instead of the global debug level if it (the per
  2770. * device debug level) is set.
  2771. */
  2772. static ssize_t show_debug_level(struct device *d,
  2773. struct device_attribute *attr, char *buf)
  2774. {
  2775. struct iwl_priv *priv = dev_get_drvdata(d);
  2776. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2777. }
  2778. static ssize_t store_debug_level(struct device *d,
  2779. struct device_attribute *attr,
  2780. const char *buf, size_t count)
  2781. {
  2782. struct iwl_priv *priv = dev_get_drvdata(d);
  2783. unsigned long val;
  2784. int ret;
  2785. ret = strict_strtoul(buf, 0, &val);
  2786. if (ret)
  2787. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2788. else {
  2789. priv->debug_level = val;
  2790. if (iwl_alloc_traffic_mem(priv))
  2791. IWL_ERR(priv,
  2792. "Not enough memory to generate traffic log\n");
  2793. }
  2794. return strnlen(buf, count);
  2795. }
  2796. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2797. show_debug_level, store_debug_level);
  2798. #endif /* CONFIG_IWLWIFI_DEBUG */
  2799. static ssize_t show_temperature(struct device *d,
  2800. struct device_attribute *attr, char *buf)
  2801. {
  2802. struct iwl_priv *priv = dev_get_drvdata(d);
  2803. if (!iwl_is_alive(priv))
  2804. return -EAGAIN;
  2805. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2806. }
  2807. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2808. static ssize_t show_tx_power(struct device *d,
  2809. struct device_attribute *attr, char *buf)
  2810. {
  2811. struct iwl_priv *priv = dev_get_drvdata(d);
  2812. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2813. }
  2814. static ssize_t store_tx_power(struct device *d,
  2815. struct device_attribute *attr,
  2816. const char *buf, size_t count)
  2817. {
  2818. struct iwl_priv *priv = dev_get_drvdata(d);
  2819. char *p = (char *)buf;
  2820. u32 val;
  2821. val = simple_strtoul(p, &p, 10);
  2822. if (p == buf)
  2823. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2824. else
  2825. iwl3945_hw_reg_set_txpower(priv, val);
  2826. return count;
  2827. }
  2828. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2829. static ssize_t show_flags(struct device *d,
  2830. struct device_attribute *attr, char *buf)
  2831. {
  2832. struct iwl_priv *priv = dev_get_drvdata(d);
  2833. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2834. }
  2835. static ssize_t store_flags(struct device *d,
  2836. struct device_attribute *attr,
  2837. const char *buf, size_t count)
  2838. {
  2839. struct iwl_priv *priv = dev_get_drvdata(d);
  2840. u32 flags = simple_strtoul(buf, NULL, 0);
  2841. mutex_lock(&priv->mutex);
  2842. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2843. /* Cancel any currently running scans... */
  2844. if (iwl_scan_cancel_timeout(priv, 100))
  2845. IWL_WARN(priv, "Could not cancel scan.\n");
  2846. else {
  2847. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2848. flags);
  2849. priv->staging_rxon.flags = cpu_to_le32(flags);
  2850. iwlcore_commit_rxon(priv);
  2851. }
  2852. }
  2853. mutex_unlock(&priv->mutex);
  2854. return count;
  2855. }
  2856. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2857. static ssize_t show_filter_flags(struct device *d,
  2858. struct device_attribute *attr, char *buf)
  2859. {
  2860. struct iwl_priv *priv = dev_get_drvdata(d);
  2861. return sprintf(buf, "0x%04X\n",
  2862. le32_to_cpu(priv->active_rxon.filter_flags));
  2863. }
  2864. static ssize_t store_filter_flags(struct device *d,
  2865. struct device_attribute *attr,
  2866. const char *buf, size_t count)
  2867. {
  2868. struct iwl_priv *priv = dev_get_drvdata(d);
  2869. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2870. mutex_lock(&priv->mutex);
  2871. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2872. /* Cancel any currently running scans... */
  2873. if (iwl_scan_cancel_timeout(priv, 100))
  2874. IWL_WARN(priv, "Could not cancel scan.\n");
  2875. else {
  2876. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2877. "0x%04X\n", filter_flags);
  2878. priv->staging_rxon.filter_flags =
  2879. cpu_to_le32(filter_flags);
  2880. iwlcore_commit_rxon(priv);
  2881. }
  2882. }
  2883. mutex_unlock(&priv->mutex);
  2884. return count;
  2885. }
  2886. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2887. store_filter_flags);
  2888. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2889. static ssize_t show_measurement(struct device *d,
  2890. struct device_attribute *attr, char *buf)
  2891. {
  2892. struct iwl_priv *priv = dev_get_drvdata(d);
  2893. struct iwl_spectrum_notification measure_report;
  2894. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2895. u8 *data = (u8 *)&measure_report;
  2896. unsigned long flags;
  2897. spin_lock_irqsave(&priv->lock, flags);
  2898. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2899. spin_unlock_irqrestore(&priv->lock, flags);
  2900. return 0;
  2901. }
  2902. memcpy(&measure_report, &priv->measure_report, size);
  2903. priv->measurement_status = 0;
  2904. spin_unlock_irqrestore(&priv->lock, flags);
  2905. while (size && (PAGE_SIZE - len)) {
  2906. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2907. PAGE_SIZE - len, 1);
  2908. len = strlen(buf);
  2909. if (PAGE_SIZE - len)
  2910. buf[len++] = '\n';
  2911. ofs += 16;
  2912. size -= min(size, 16U);
  2913. }
  2914. return len;
  2915. }
  2916. static ssize_t store_measurement(struct device *d,
  2917. struct device_attribute *attr,
  2918. const char *buf, size_t count)
  2919. {
  2920. struct iwl_priv *priv = dev_get_drvdata(d);
  2921. struct ieee80211_measurement_params params = {
  2922. .channel = le16_to_cpu(priv->active_rxon.channel),
  2923. .start_time = cpu_to_le64(priv->last_tsf),
  2924. .duration = cpu_to_le16(1),
  2925. };
  2926. u8 type = IWL_MEASURE_BASIC;
  2927. u8 buffer[32];
  2928. u8 channel;
  2929. if (count) {
  2930. char *p = buffer;
  2931. strncpy(buffer, buf, min(sizeof(buffer), count));
  2932. channel = simple_strtoul(p, NULL, 0);
  2933. if (channel)
  2934. params.channel = channel;
  2935. p = buffer;
  2936. while (*p && *p != ' ')
  2937. p++;
  2938. if (*p)
  2939. type = simple_strtoul(p + 1, NULL, 0);
  2940. }
  2941. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2942. "channel %d (for '%s')\n", type, params.channel, buf);
  2943. iwl3945_get_measurement(priv, &params, type);
  2944. return count;
  2945. }
  2946. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2947. show_measurement, store_measurement);
  2948. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2949. static ssize_t store_retry_rate(struct device *d,
  2950. struct device_attribute *attr,
  2951. const char *buf, size_t count)
  2952. {
  2953. struct iwl_priv *priv = dev_get_drvdata(d);
  2954. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2955. if (priv->retry_rate <= 0)
  2956. priv->retry_rate = 1;
  2957. return count;
  2958. }
  2959. static ssize_t show_retry_rate(struct device *d,
  2960. struct device_attribute *attr, char *buf)
  2961. {
  2962. struct iwl_priv *priv = dev_get_drvdata(d);
  2963. return sprintf(buf, "%d", priv->retry_rate);
  2964. }
  2965. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2966. store_retry_rate);
  2967. static ssize_t show_channels(struct device *d,
  2968. struct device_attribute *attr, char *buf)
  2969. {
  2970. /* all this shit doesn't belong into sysfs anyway */
  2971. return 0;
  2972. }
  2973. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2974. static ssize_t show_statistics(struct device *d,
  2975. struct device_attribute *attr, char *buf)
  2976. {
  2977. struct iwl_priv *priv = dev_get_drvdata(d);
  2978. u32 size = sizeof(struct iwl3945_notif_statistics);
  2979. u32 len = 0, ofs = 0;
  2980. u8 *data = (u8 *)&priv->statistics_39;
  2981. int rc = 0;
  2982. if (!iwl_is_alive(priv))
  2983. return -EAGAIN;
  2984. mutex_lock(&priv->mutex);
  2985. rc = iwl_send_statistics_request(priv, 0);
  2986. mutex_unlock(&priv->mutex);
  2987. if (rc) {
  2988. len = sprintf(buf,
  2989. "Error sending statistics request: 0x%08X\n", rc);
  2990. return len;
  2991. }
  2992. while (size && (PAGE_SIZE - len)) {
  2993. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2994. PAGE_SIZE - len, 1);
  2995. len = strlen(buf);
  2996. if (PAGE_SIZE - len)
  2997. buf[len++] = '\n';
  2998. ofs += 16;
  2999. size -= min(size, 16U);
  3000. }
  3001. return len;
  3002. }
  3003. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3004. static ssize_t show_antenna(struct device *d,
  3005. struct device_attribute *attr, char *buf)
  3006. {
  3007. struct iwl_priv *priv = dev_get_drvdata(d);
  3008. if (!iwl_is_alive(priv))
  3009. return -EAGAIN;
  3010. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3011. }
  3012. static ssize_t store_antenna(struct device *d,
  3013. struct device_attribute *attr,
  3014. const char *buf, size_t count)
  3015. {
  3016. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3017. int ant;
  3018. if (count == 0)
  3019. return 0;
  3020. if (sscanf(buf, "%1i", &ant) != 1) {
  3021. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3022. return count;
  3023. }
  3024. if ((ant >= 0) && (ant <= 2)) {
  3025. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3026. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3027. } else
  3028. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3029. return count;
  3030. }
  3031. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3032. static ssize_t show_status(struct device *d,
  3033. struct device_attribute *attr, char *buf)
  3034. {
  3035. struct iwl_priv *priv = dev_get_drvdata(d);
  3036. if (!iwl_is_alive(priv))
  3037. return -EAGAIN;
  3038. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3039. }
  3040. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3041. static ssize_t dump_error_log(struct device *d,
  3042. struct device_attribute *attr,
  3043. const char *buf, size_t count)
  3044. {
  3045. struct iwl_priv *priv = dev_get_drvdata(d);
  3046. char *p = (char *)buf;
  3047. if (p[0] == '1')
  3048. iwl3945_dump_nic_error_log(priv);
  3049. return strnlen(buf, count);
  3050. }
  3051. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3052. /*****************************************************************************
  3053. *
  3054. * driver setup and tear down
  3055. *
  3056. *****************************************************************************/
  3057. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3058. {
  3059. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3060. init_waitqueue_head(&priv->wait_command_queue);
  3061. INIT_WORK(&priv->up, iwl3945_bg_up);
  3062. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3063. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3064. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3065. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3066. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3067. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3068. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3069. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3070. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3071. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3072. iwl3945_hw_setup_deferred_work(priv);
  3073. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3074. iwl3945_irq_tasklet, (unsigned long)priv);
  3075. }
  3076. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3077. {
  3078. iwl3945_hw_cancel_deferred_work(priv);
  3079. cancel_delayed_work_sync(&priv->init_alive_start);
  3080. cancel_delayed_work(&priv->scan_check);
  3081. cancel_delayed_work(&priv->alive_start);
  3082. cancel_work_sync(&priv->beacon_update);
  3083. }
  3084. static struct attribute *iwl3945_sysfs_entries[] = {
  3085. &dev_attr_antenna.attr,
  3086. &dev_attr_channels.attr,
  3087. &dev_attr_dump_errors.attr,
  3088. &dev_attr_flags.attr,
  3089. &dev_attr_filter_flags.attr,
  3090. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3091. &dev_attr_measurement.attr,
  3092. #endif
  3093. &dev_attr_retry_rate.attr,
  3094. &dev_attr_statistics.attr,
  3095. &dev_attr_status.attr,
  3096. &dev_attr_temperature.attr,
  3097. &dev_attr_tx_power.attr,
  3098. #ifdef CONFIG_IWLWIFI_DEBUG
  3099. &dev_attr_debug_level.attr,
  3100. #endif
  3101. NULL
  3102. };
  3103. static struct attribute_group iwl3945_attribute_group = {
  3104. .name = NULL, /* put in device directory */
  3105. .attrs = iwl3945_sysfs_entries,
  3106. };
  3107. static struct ieee80211_ops iwl3945_hw_ops = {
  3108. .tx = iwl3945_mac_tx,
  3109. .start = iwl3945_mac_start,
  3110. .stop = iwl3945_mac_stop,
  3111. .add_interface = iwl_mac_add_interface,
  3112. .remove_interface = iwl_mac_remove_interface,
  3113. .config = iwl_mac_config,
  3114. .configure_filter = iwl_configure_filter,
  3115. .set_key = iwl3945_mac_set_key,
  3116. .get_tx_stats = iwl_mac_get_tx_stats,
  3117. .conf_tx = iwl_mac_conf_tx,
  3118. .reset_tsf = iwl_mac_reset_tsf,
  3119. .bss_info_changed = iwl_bss_info_changed,
  3120. .hw_scan = iwl_mac_hw_scan
  3121. };
  3122. static int iwl3945_init_drv(struct iwl_priv *priv)
  3123. {
  3124. int ret;
  3125. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3126. priv->retry_rate = 1;
  3127. priv->ibss_beacon = NULL;
  3128. spin_lock_init(&priv->lock);
  3129. spin_lock_init(&priv->sta_lock);
  3130. spin_lock_init(&priv->hcmd_lock);
  3131. INIT_LIST_HEAD(&priv->free_frames);
  3132. mutex_init(&priv->mutex);
  3133. /* Clear the driver's (not device's) station table */
  3134. iwl_clear_stations_table(priv);
  3135. priv->data_retry_limit = -1;
  3136. priv->ieee_channels = NULL;
  3137. priv->ieee_rates = NULL;
  3138. priv->band = IEEE80211_BAND_2GHZ;
  3139. priv->iw_mode = NL80211_IFTYPE_STATION;
  3140. iwl_reset_qos(priv);
  3141. priv->qos_data.qos_active = 0;
  3142. priv->qos_data.qos_cap.val = 0;
  3143. priv->rates_mask = IWL_RATES_MASK;
  3144. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3145. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3146. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3147. eeprom->version);
  3148. ret = -EINVAL;
  3149. goto err;
  3150. }
  3151. ret = iwl_init_channel_map(priv);
  3152. if (ret) {
  3153. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3154. goto err;
  3155. }
  3156. /* Set up txpower settings in driver for all channels */
  3157. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3158. ret = -EIO;
  3159. goto err_free_channel_map;
  3160. }
  3161. ret = iwlcore_init_geos(priv);
  3162. if (ret) {
  3163. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3164. goto err_free_channel_map;
  3165. }
  3166. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3167. return 0;
  3168. err_free_channel_map:
  3169. iwl_free_channel_map(priv);
  3170. err:
  3171. return ret;
  3172. }
  3173. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3174. {
  3175. int ret;
  3176. struct ieee80211_hw *hw = priv->hw;
  3177. hw->rate_control_algorithm = "iwl-3945-rs";
  3178. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3179. /* Tell mac80211 our characteristics */
  3180. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3181. IEEE80211_HW_NOISE_DBM |
  3182. IEEE80211_HW_SPECTRUM_MGMT |
  3183. IEEE80211_HW_SUPPORTS_PS |
  3184. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3185. hw->wiphy->interface_modes =
  3186. BIT(NL80211_IFTYPE_STATION) |
  3187. BIT(NL80211_IFTYPE_ADHOC);
  3188. hw->wiphy->custom_regulatory = true;
  3189. /* Firmware does not support this */
  3190. hw->wiphy->disable_beacon_hints = true;
  3191. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3192. /* we create the 802.11 header and a zero-length SSID element */
  3193. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3194. /* Default value; 4 EDCA QOS priorities */
  3195. hw->queues = 4;
  3196. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3197. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3198. &priv->bands[IEEE80211_BAND_2GHZ];
  3199. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3200. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3201. &priv->bands[IEEE80211_BAND_5GHZ];
  3202. ret = ieee80211_register_hw(priv->hw);
  3203. if (ret) {
  3204. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3205. return ret;
  3206. }
  3207. priv->mac80211_registered = 1;
  3208. return 0;
  3209. }
  3210. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3211. {
  3212. int err = 0;
  3213. struct iwl_priv *priv;
  3214. struct ieee80211_hw *hw;
  3215. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3216. struct iwl3945_eeprom *eeprom;
  3217. unsigned long flags;
  3218. /***********************
  3219. * 1. Allocating HW data
  3220. * ********************/
  3221. /* mac80211 allocates memory for this device instance, including
  3222. * space for this driver's private structure */
  3223. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3224. if (hw == NULL) {
  3225. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3226. err = -ENOMEM;
  3227. goto out;
  3228. }
  3229. priv = hw->priv;
  3230. SET_IEEE80211_DEV(hw, &pdev->dev);
  3231. /*
  3232. * Disabling hardware scan means that mac80211 will perform scans
  3233. * "the hard way", rather than using device's scan.
  3234. */
  3235. if (iwl3945_mod_params.disable_hw_scan) {
  3236. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3237. iwl3945_hw_ops.hw_scan = NULL;
  3238. }
  3239. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3240. priv->cfg = cfg;
  3241. priv->pci_dev = pdev;
  3242. priv->inta_mask = CSR_INI_SET_MASK;
  3243. #ifdef CONFIG_IWLWIFI_DEBUG
  3244. atomic_set(&priv->restrict_refcnt, 0);
  3245. #endif
  3246. if (iwl_alloc_traffic_mem(priv))
  3247. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3248. /***************************
  3249. * 2. Initializing PCI bus
  3250. * *************************/
  3251. if (pci_enable_device(pdev)) {
  3252. err = -ENODEV;
  3253. goto out_ieee80211_free_hw;
  3254. }
  3255. pci_set_master(pdev);
  3256. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3257. if (!err)
  3258. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3259. if (err) {
  3260. IWL_WARN(priv, "No suitable DMA available.\n");
  3261. goto out_pci_disable_device;
  3262. }
  3263. pci_set_drvdata(pdev, priv);
  3264. err = pci_request_regions(pdev, DRV_NAME);
  3265. if (err)
  3266. goto out_pci_disable_device;
  3267. /***********************
  3268. * 3. Read REV Register
  3269. * ********************/
  3270. priv->hw_base = pci_iomap(pdev, 0, 0);
  3271. if (!priv->hw_base) {
  3272. err = -ENODEV;
  3273. goto out_pci_release_regions;
  3274. }
  3275. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3276. (unsigned long long) pci_resource_len(pdev, 0));
  3277. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3278. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3279. * PCI Tx retries from interfering with C3 CPU state */
  3280. pci_write_config_byte(pdev, 0x41, 0x00);
  3281. /* this spin lock will be used in apm_ops.init and EEPROM access
  3282. * we should init now
  3283. */
  3284. spin_lock_init(&priv->reg_lock);
  3285. /* amp init */
  3286. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3287. if (err < 0) {
  3288. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3289. goto out_iounmap;
  3290. }
  3291. /***********************
  3292. * 4. Read EEPROM
  3293. * ********************/
  3294. /* Read the EEPROM */
  3295. err = iwl_eeprom_init(priv);
  3296. if (err) {
  3297. IWL_ERR(priv, "Unable to init EEPROM\n");
  3298. goto out_iounmap;
  3299. }
  3300. /* MAC Address location in EEPROM same for 3945/4965 */
  3301. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3302. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3303. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3304. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3305. /***********************
  3306. * 5. Setup HW Constants
  3307. * ********************/
  3308. /* Device-specific setup */
  3309. if (iwl3945_hw_set_hw_params(priv)) {
  3310. IWL_ERR(priv, "failed to set hw settings\n");
  3311. goto out_eeprom_free;
  3312. }
  3313. /***********************
  3314. * 6. Setup priv
  3315. * ********************/
  3316. err = iwl3945_init_drv(priv);
  3317. if (err) {
  3318. IWL_ERR(priv, "initializing driver failed\n");
  3319. goto out_unset_hw_params;
  3320. }
  3321. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3322. priv->cfg->name);
  3323. /***********************
  3324. * 7. Setup Services
  3325. * ********************/
  3326. spin_lock_irqsave(&priv->lock, flags);
  3327. iwl_disable_interrupts(priv);
  3328. spin_unlock_irqrestore(&priv->lock, flags);
  3329. pci_enable_msi(priv->pci_dev);
  3330. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3331. IRQF_SHARED, DRV_NAME, priv);
  3332. if (err) {
  3333. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3334. goto out_disable_msi;
  3335. }
  3336. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3337. if (err) {
  3338. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3339. goto out_release_irq;
  3340. }
  3341. iwl_set_rxon_channel(priv,
  3342. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3343. iwl3945_setup_deferred_work(priv);
  3344. iwl3945_setup_rx_handlers(priv);
  3345. /*********************************
  3346. * 8. Setup and Register mac80211
  3347. * *******************************/
  3348. iwl_enable_interrupts(priv);
  3349. err = iwl3945_setup_mac(priv);
  3350. if (err)
  3351. goto out_remove_sysfs;
  3352. err = iwl_dbgfs_register(priv, DRV_NAME);
  3353. if (err)
  3354. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3355. /* Start monitoring the killswitch */
  3356. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3357. 2 * HZ);
  3358. return 0;
  3359. out_remove_sysfs:
  3360. destroy_workqueue(priv->workqueue);
  3361. priv->workqueue = NULL;
  3362. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3363. out_release_irq:
  3364. free_irq(priv->pci_dev->irq, priv);
  3365. out_disable_msi:
  3366. pci_disable_msi(priv->pci_dev);
  3367. iwlcore_free_geos(priv);
  3368. iwl_free_channel_map(priv);
  3369. out_unset_hw_params:
  3370. iwl3945_unset_hw_params(priv);
  3371. out_eeprom_free:
  3372. iwl_eeprom_free(priv);
  3373. out_iounmap:
  3374. pci_iounmap(pdev, priv->hw_base);
  3375. out_pci_release_regions:
  3376. pci_release_regions(pdev);
  3377. out_pci_disable_device:
  3378. pci_set_drvdata(pdev, NULL);
  3379. pci_disable_device(pdev);
  3380. out_ieee80211_free_hw:
  3381. iwl_free_traffic_mem(priv);
  3382. ieee80211_free_hw(priv->hw);
  3383. out:
  3384. return err;
  3385. }
  3386. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3387. {
  3388. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3389. unsigned long flags;
  3390. if (!priv)
  3391. return;
  3392. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3393. iwl_dbgfs_unregister(priv);
  3394. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3395. if (priv->mac80211_registered) {
  3396. ieee80211_unregister_hw(priv->hw);
  3397. priv->mac80211_registered = 0;
  3398. } else {
  3399. iwl3945_down(priv);
  3400. }
  3401. /* make sure we flush any pending irq or
  3402. * tasklet for the driver
  3403. */
  3404. spin_lock_irqsave(&priv->lock, flags);
  3405. iwl_disable_interrupts(priv);
  3406. spin_unlock_irqrestore(&priv->lock, flags);
  3407. iwl_synchronize_irq(priv);
  3408. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3409. cancel_delayed_work_sync(&priv->rfkill_poll);
  3410. iwl3945_dealloc_ucode_pci(priv);
  3411. if (priv->rxq.bd)
  3412. iwl3945_rx_queue_free(priv, &priv->rxq);
  3413. iwl3945_hw_txq_ctx_free(priv);
  3414. iwl3945_unset_hw_params(priv);
  3415. iwl_clear_stations_table(priv);
  3416. /*netif_stop_queue(dev); */
  3417. flush_workqueue(priv->workqueue);
  3418. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3419. * priv->workqueue... so we can't take down the workqueue
  3420. * until now... */
  3421. destroy_workqueue(priv->workqueue);
  3422. priv->workqueue = NULL;
  3423. iwl_free_traffic_mem(priv);
  3424. free_irq(pdev->irq, priv);
  3425. pci_disable_msi(pdev);
  3426. pci_iounmap(pdev, priv->hw_base);
  3427. pci_release_regions(pdev);
  3428. pci_disable_device(pdev);
  3429. pci_set_drvdata(pdev, NULL);
  3430. iwl_free_channel_map(priv);
  3431. iwlcore_free_geos(priv);
  3432. kfree(priv->scan);
  3433. if (priv->ibss_beacon)
  3434. dev_kfree_skb(priv->ibss_beacon);
  3435. ieee80211_free_hw(priv->hw);
  3436. }
  3437. /*****************************************************************************
  3438. *
  3439. * driver and module entry point
  3440. *
  3441. *****************************************************************************/
  3442. static struct pci_driver iwl3945_driver = {
  3443. .name = DRV_NAME,
  3444. .id_table = iwl3945_hw_card_ids,
  3445. .probe = iwl3945_pci_probe,
  3446. .remove = __devexit_p(iwl3945_pci_remove),
  3447. #ifdef CONFIG_PM
  3448. .suspend = iwl_pci_suspend,
  3449. .resume = iwl_pci_resume,
  3450. #endif
  3451. };
  3452. static int __init iwl3945_init(void)
  3453. {
  3454. int ret;
  3455. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3456. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3457. ret = iwl3945_rate_control_register();
  3458. if (ret) {
  3459. printk(KERN_ERR DRV_NAME
  3460. "Unable to register rate control algorithm: %d\n", ret);
  3461. return ret;
  3462. }
  3463. ret = pci_register_driver(&iwl3945_driver);
  3464. if (ret) {
  3465. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3466. goto error_register;
  3467. }
  3468. return ret;
  3469. error_register:
  3470. iwl3945_rate_control_unregister();
  3471. return ret;
  3472. }
  3473. static void __exit iwl3945_exit(void)
  3474. {
  3475. pci_unregister_driver(&iwl3945_driver);
  3476. iwl3945_rate_control_unregister();
  3477. }
  3478. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3479. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3480. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3481. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3482. MODULE_PARM_DESC(swcrypto,
  3483. "using software crypto (default 1 [software])\n");
  3484. #ifdef CONFIG_IWLWIFI_DEBUG
  3485. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3486. MODULE_PARM_DESC(debug, "debug output mask");
  3487. #endif
  3488. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3489. int, S_IRUGO);
  3490. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3491. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3492. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3493. module_exit(iwl3945_exit);
  3494. module_init(iwl3945_init);