init.c 42 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. module_param(debug_mask, uint, 0644);
  29. module_param(testmode, uint, 0644);
  30. module_param(suspend_cutpower, bool, 0444);
  31. static const struct ath6kl_hw hw_list[] = {
  32. {
  33. .id = AR6003_HW_2_0_VERSION,
  34. .name = "ar6003 hw 2.0",
  35. .dataset_patch_addr = 0x57e884,
  36. .app_load_addr = 0x543180,
  37. .board_ext_data_addr = 0x57e500,
  38. .reserved_ram_size = 6912,
  39. /* hw2.0 needs override address hardcoded */
  40. .app_start_override_addr = 0x944C00,
  41. .fw_otp = AR6003_HW_2_0_OTP_FILE,
  42. .fw = AR6003_HW_2_0_FIRMWARE_FILE,
  43. .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  44. .fw_patch = AR6003_HW_2_0_PATCH_FILE,
  45. .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE,
  46. .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
  47. .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  48. },
  49. {
  50. .id = AR6003_HW_2_1_1_VERSION,
  51. .name = "ar6003 hw 2.1.1",
  52. .dataset_patch_addr = 0x57ff74,
  53. .app_load_addr = 0x1234,
  54. .board_ext_data_addr = 0x542330,
  55. .reserved_ram_size = 512,
  56. .fw_otp = AR6003_HW_2_1_1_OTP_FILE,
  57. .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
  58. .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  59. .fw_patch = AR6003_HW_2_1_1_PATCH_FILE,
  60. .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE,
  61. .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  62. .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  63. },
  64. {
  65. .id = AR6004_HW_1_0_VERSION,
  66. .name = "ar6004 hw 1.0",
  67. .dataset_patch_addr = 0x57e884,
  68. .app_load_addr = 0x1234,
  69. .board_ext_data_addr = 0x437000,
  70. .reserved_ram_size = 19456,
  71. .board_addr = 0x433900,
  72. .fw = AR6004_HW_1_0_FIRMWARE_FILE,
  73. .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE,
  74. .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
  75. .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  76. },
  77. {
  78. .id = AR6004_HW_1_1_VERSION,
  79. .name = "ar6004 hw 1.1",
  80. .dataset_patch_addr = 0x57e884,
  81. .app_load_addr = 0x1234,
  82. .board_ext_data_addr = 0x437000,
  83. .reserved_ram_size = 11264,
  84. .board_addr = 0x43d400,
  85. .fw = AR6004_HW_1_1_FIRMWARE_FILE,
  86. .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE,
  87. .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
  88. .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
  89. },
  90. };
  91. /*
  92. * Include definitions here that can be used to tune the WLAN module
  93. * behavior. Different customers can tune the behavior as per their needs,
  94. * here.
  95. */
  96. /*
  97. * This configuration item enable/disable keepalive support.
  98. * Keepalive support: In the absence of any data traffic to AP, null
  99. * frames will be sent to the AP at periodic interval, to keep the association
  100. * active. This configuration item defines the periodic interval.
  101. * Use value of zero to disable keepalive support
  102. * Default: 60 seconds
  103. */
  104. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  105. /*
  106. * This configuration item sets the value of disconnect timeout
  107. * Firmware delays sending the disconnec event to the host for this
  108. * timeout after is gets disconnected from the current AP.
  109. * If the firmware successly roams within the disconnect timeout
  110. * it sends a new connect event
  111. */
  112. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  113. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  114. #define ATH6KL_DATA_OFFSET 64
  115. struct sk_buff *ath6kl_buf_alloc(int size)
  116. {
  117. struct sk_buff *skb;
  118. u16 reserved;
  119. /* Add chacheline space at front and back of buffer */
  120. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  121. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  122. skb = dev_alloc_skb(size + reserved);
  123. if (skb)
  124. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  125. return skb;
  126. }
  127. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  128. {
  129. vif->ssid_len = 0;
  130. memset(vif->ssid, 0, sizeof(vif->ssid));
  131. vif->dot11_auth_mode = OPEN_AUTH;
  132. vif->auth_mode = NONE_AUTH;
  133. vif->prwise_crypto = NONE_CRYPT;
  134. vif->prwise_crypto_len = 0;
  135. vif->grp_crypto = NONE_CRYPT;
  136. vif->grp_crypto_len = 0;
  137. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  138. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  139. memset(vif->bssid, 0, sizeof(vif->bssid));
  140. vif->bss_ch = 0;
  141. }
  142. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  143. {
  144. u32 address, data;
  145. struct host_app_area host_app_area;
  146. /* Fetch the address of the host_app_area_s
  147. * instance in the host interest area */
  148. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  149. address = TARG_VTOP(ar->target_type, address);
  150. if (ath6kl_diag_read32(ar, address, &data))
  151. return -EIO;
  152. address = TARG_VTOP(ar->target_type, data);
  153. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  154. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  155. sizeof(struct host_app_area)))
  156. return -EIO;
  157. return 0;
  158. }
  159. static inline void set_ac2_ep_map(struct ath6kl *ar,
  160. u8 ac,
  161. enum htc_endpoint_id ep)
  162. {
  163. ar->ac2ep_map[ac] = ep;
  164. ar->ep2ac_map[ep] = ac;
  165. }
  166. /* connect to a service */
  167. static int ath6kl_connectservice(struct ath6kl *ar,
  168. struct htc_service_connect_req *con_req,
  169. char *desc)
  170. {
  171. int status;
  172. struct htc_service_connect_resp response;
  173. memset(&response, 0, sizeof(response));
  174. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  175. if (status) {
  176. ath6kl_err("failed to connect to %s service status:%d\n",
  177. desc, status);
  178. return status;
  179. }
  180. switch (con_req->svc_id) {
  181. case WMI_CONTROL_SVC:
  182. if (test_bit(WMI_ENABLED, &ar->flag))
  183. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  184. ar->ctrl_ep = response.endpoint;
  185. break;
  186. case WMI_DATA_BE_SVC:
  187. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  188. break;
  189. case WMI_DATA_BK_SVC:
  190. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  191. break;
  192. case WMI_DATA_VI_SVC:
  193. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  194. break;
  195. case WMI_DATA_VO_SVC:
  196. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  197. break;
  198. default:
  199. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  200. return -EINVAL;
  201. }
  202. return 0;
  203. }
  204. static int ath6kl_init_service_ep(struct ath6kl *ar)
  205. {
  206. struct htc_service_connect_req connect;
  207. memset(&connect, 0, sizeof(connect));
  208. /* these fields are the same for all service endpoints */
  209. connect.ep_cb.rx = ath6kl_rx;
  210. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  211. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  212. /*
  213. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  214. * gets called.
  215. */
  216. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  217. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  218. if (!connect.ep_cb.rx_refill_thresh)
  219. connect.ep_cb.rx_refill_thresh++;
  220. /* connect to control service */
  221. connect.svc_id = WMI_CONTROL_SVC;
  222. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  223. return -EIO;
  224. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  225. /*
  226. * Limit the HTC message size on the send path, although e can
  227. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  228. * (802.3) frames on the send path.
  229. */
  230. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  231. /*
  232. * To reduce the amount of committed memory for larger A_MSDU
  233. * frames, use the recv-alloc threshold mechanism for larger
  234. * packets.
  235. */
  236. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  237. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  238. /*
  239. * For the remaining data services set the connection flag to
  240. * reduce dribbling, if configured to do so.
  241. */
  242. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  243. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  244. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  245. connect.svc_id = WMI_DATA_BE_SVC;
  246. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  247. return -EIO;
  248. /* connect to back-ground map this to WMI LOW_PRI */
  249. connect.svc_id = WMI_DATA_BK_SVC;
  250. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  251. return -EIO;
  252. /* connect to Video service, map this to to HI PRI */
  253. connect.svc_id = WMI_DATA_VI_SVC;
  254. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  255. return -EIO;
  256. /*
  257. * Connect to VO service, this is currently not mapped to a WMI
  258. * priority stream due to historical reasons. WMI originally
  259. * defined 3 priorities over 3 mailboxes We can change this when
  260. * WMI is reworked so that priorities are not dependent on
  261. * mailboxes.
  262. */
  263. connect.svc_id = WMI_DATA_VO_SVC;
  264. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  265. return -EIO;
  266. return 0;
  267. }
  268. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  269. {
  270. ath6kl_init_profile_info(vif);
  271. vif->def_txkey_index = 0;
  272. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  273. vif->ch_hint = 0;
  274. }
  275. /*
  276. * Set HTC/Mbox operational parameters, this can only be called when the
  277. * target is in the BMI phase.
  278. */
  279. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  280. u8 htc_ctrl_buf)
  281. {
  282. int status;
  283. u32 blk_size;
  284. blk_size = ar->mbox_info.block_size;
  285. if (htc_ctrl_buf)
  286. blk_size |= ((u32)htc_ctrl_buf) << 16;
  287. /* set the host interest area for the block size */
  288. status = ath6kl_bmi_write(ar,
  289. ath6kl_get_hi_item_addr(ar,
  290. HI_ITEM(hi_mbox_io_block_sz)),
  291. (u8 *)&blk_size,
  292. 4);
  293. if (status) {
  294. ath6kl_err("bmi_write_memory for IO block size failed\n");
  295. goto out;
  296. }
  297. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  298. blk_size,
  299. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  300. if (mbox_isr_yield_val) {
  301. /* set the host interest area for the mbox ISR yield limit */
  302. status = ath6kl_bmi_write(ar,
  303. ath6kl_get_hi_item_addr(ar,
  304. HI_ITEM(hi_mbox_isr_yield_limit)),
  305. (u8 *)&mbox_isr_yield_val,
  306. 4);
  307. if (status) {
  308. ath6kl_err("bmi_write_memory for yield limit failed\n");
  309. goto out;
  310. }
  311. }
  312. out:
  313. return status;
  314. }
  315. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  316. {
  317. int status = 0;
  318. int ret;
  319. /*
  320. * Configure the device for rx dot11 header rules. "0,0" are the
  321. * default values. Required if checksum offload is needed. Set
  322. * RxMetaVersion to 2.
  323. */
  324. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  325. ar->rx_meta_ver, 0, 0)) {
  326. ath6kl_err("unable to set the rx frame format\n");
  327. status = -EIO;
  328. }
  329. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  330. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  331. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  332. ath6kl_err("unable to set power save fail event policy\n");
  333. status = -EIO;
  334. }
  335. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  336. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  337. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  338. ath6kl_err("unable to set barker preamble policy\n");
  339. status = -EIO;
  340. }
  341. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  342. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  343. ath6kl_err("unable to set keep alive interval\n");
  344. status = -EIO;
  345. }
  346. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  347. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  348. ath6kl_err("unable to set disconnect timeout\n");
  349. status = -EIO;
  350. }
  351. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  352. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  353. ath6kl_err("unable to set txop bursting\n");
  354. status = -EIO;
  355. }
  356. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  357. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  358. P2P_FLAG_CAPABILITIES_REQ |
  359. P2P_FLAG_MACADDR_REQ |
  360. P2P_FLAG_HMODEL_REQ);
  361. if (ret) {
  362. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  363. "capabilities (%d) - assuming P2P not "
  364. "supported\n", ret);
  365. ar->p2p = 0;
  366. }
  367. }
  368. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  369. /* Enable Probe Request reporting for P2P */
  370. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  371. if (ret) {
  372. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  373. "Request reporting (%d)\n", ret);
  374. }
  375. }
  376. return status;
  377. }
  378. int ath6kl_configure_target(struct ath6kl *ar)
  379. {
  380. u32 param, ram_reserved_size;
  381. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  382. int i;
  383. /*
  384. * Note: Even though the firmware interface type is
  385. * chosen as BSS_STA for all three interfaces, can
  386. * be configured to IBSS/AP as long as the fw submode
  387. * remains normal mode (0 - AP, STA and IBSS). But
  388. * due to an target assert in firmware only one interface is
  389. * configured for now.
  390. */
  391. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  392. for (i = 0; i < ar->vif_max; i++)
  393. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  394. /*
  395. * By default, submodes :
  396. * vif[0] - AP/STA/IBSS
  397. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  398. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  399. */
  400. for (i = 0; i < ar->max_norm_iface; i++)
  401. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  402. (i * HI_OPTION_FW_SUBMODE_BITS);
  403. for (i = ar->max_norm_iface; i < ar->vif_max; i++)
  404. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  405. (i * HI_OPTION_FW_SUBMODE_BITS);
  406. if (ar->p2p && ar->vif_max == 1)
  407. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  408. param = HTC_PROTOCOL_VERSION;
  409. if (ath6kl_bmi_write(ar,
  410. ath6kl_get_hi_item_addr(ar,
  411. HI_ITEM(hi_app_host_interest)),
  412. (u8 *)&param, 4) != 0) {
  413. ath6kl_err("bmi_write_memory for htc version failed\n");
  414. return -EIO;
  415. }
  416. /* set the firmware mode to STA/IBSS/AP */
  417. param = 0;
  418. if (ath6kl_bmi_read(ar,
  419. ath6kl_get_hi_item_addr(ar,
  420. HI_ITEM(hi_option_flag)),
  421. (u8 *)&param, 4) != 0) {
  422. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  423. return -EIO;
  424. }
  425. param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
  426. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  427. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  428. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  429. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  430. if (ath6kl_bmi_write(ar,
  431. ath6kl_get_hi_item_addr(ar,
  432. HI_ITEM(hi_option_flag)),
  433. (u8 *)&param,
  434. 4) != 0) {
  435. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  436. return -EIO;
  437. }
  438. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  439. /*
  440. * Hardcode the address use for the extended board data
  441. * Ideally this should be pre-allocate by the OS at boot time
  442. * But since it is a new feature and board data is loaded
  443. * at init time, we have to workaround this from host.
  444. * It is difficult to patch the firmware boot code,
  445. * but possible in theory.
  446. */
  447. param = ar->hw.board_ext_data_addr;
  448. ram_reserved_size = ar->hw.reserved_ram_size;
  449. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  450. HI_ITEM(hi_board_ext_data)),
  451. (u8 *)&param, 4) != 0) {
  452. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  453. return -EIO;
  454. }
  455. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  456. HI_ITEM(hi_end_ram_reserve_sz)),
  457. (u8 *)&ram_reserved_size, 4) != 0) {
  458. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  459. return -EIO;
  460. }
  461. /* set the block size for the target */
  462. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  463. /* use default number of control buffers */
  464. return -EIO;
  465. return 0;
  466. }
  467. void ath6kl_core_free(struct ath6kl *ar)
  468. {
  469. wiphy_free(ar->wiphy);
  470. }
  471. void ath6kl_core_cleanup(struct ath6kl *ar)
  472. {
  473. ath6kl_hif_power_off(ar);
  474. destroy_workqueue(ar->ath6kl_wq);
  475. if (ar->htc_target)
  476. ath6kl_htc_cleanup(ar->htc_target);
  477. ath6kl_cookie_cleanup(ar);
  478. ath6kl_cleanup_amsdu_rxbufs(ar);
  479. ath6kl_bmi_cleanup(ar);
  480. ath6kl_debug_cleanup(ar);
  481. kfree(ar->fw_board);
  482. kfree(ar->fw_otp);
  483. kfree(ar->fw);
  484. kfree(ar->fw_patch);
  485. ath6kl_deinit_ieee80211_hw(ar);
  486. }
  487. /* firmware upload */
  488. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  489. u8 **fw, size_t *fw_len)
  490. {
  491. const struct firmware *fw_entry;
  492. int ret;
  493. ret = request_firmware(&fw_entry, filename, ar->dev);
  494. if (ret)
  495. return ret;
  496. *fw_len = fw_entry->size;
  497. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  498. if (*fw == NULL)
  499. ret = -ENOMEM;
  500. release_firmware(fw_entry);
  501. return ret;
  502. }
  503. #ifdef CONFIG_OF
  504. static const char *get_target_ver_dir(const struct ath6kl *ar)
  505. {
  506. switch (ar->version.target_ver) {
  507. case AR6003_HW_1_0_VERSION:
  508. return "ath6k/AR6003/hw1.0";
  509. case AR6003_HW_2_0_VERSION:
  510. return "ath6k/AR6003/hw2.0";
  511. case AR6003_HW_2_1_1_VERSION:
  512. return "ath6k/AR6003/hw2.1.1";
  513. }
  514. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  515. ar->version.target_ver);
  516. return NULL;
  517. }
  518. /*
  519. * Check the device tree for a board-id and use it to construct
  520. * the pathname to the firmware file. Used (for now) to find a
  521. * fallback to the "bdata.bin" file--typically a symlink to the
  522. * appropriate board-specific file.
  523. */
  524. static bool check_device_tree(struct ath6kl *ar)
  525. {
  526. static const char *board_id_prop = "atheros,board-id";
  527. struct device_node *node;
  528. char board_filename[64];
  529. const char *board_id;
  530. int ret;
  531. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  532. board_id = of_get_property(node, board_id_prop, NULL);
  533. if (board_id == NULL) {
  534. ath6kl_warn("No \"%s\" property on %s node.\n",
  535. board_id_prop, node->name);
  536. continue;
  537. }
  538. snprintf(board_filename, sizeof(board_filename),
  539. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  540. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  541. &ar->fw_board_len);
  542. if (ret) {
  543. ath6kl_err("Failed to get DT board file %s: %d\n",
  544. board_filename, ret);
  545. continue;
  546. }
  547. return true;
  548. }
  549. return false;
  550. }
  551. #else
  552. static bool check_device_tree(struct ath6kl *ar)
  553. {
  554. return false;
  555. }
  556. #endif /* CONFIG_OF */
  557. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  558. {
  559. const char *filename;
  560. int ret;
  561. if (ar->fw_board != NULL)
  562. return 0;
  563. if (WARN_ON(ar->hw.fw_board == NULL))
  564. return -EINVAL;
  565. filename = ar->hw.fw_board;
  566. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  567. &ar->fw_board_len);
  568. if (ret == 0) {
  569. /* managed to get proper board file */
  570. return 0;
  571. }
  572. if (check_device_tree(ar)) {
  573. /* got board file from device tree */
  574. return 0;
  575. }
  576. /* there was no proper board file, try to use default instead */
  577. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  578. filename, ret);
  579. filename = ar->hw.fw_default_board;
  580. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  581. &ar->fw_board_len);
  582. if (ret) {
  583. ath6kl_err("Failed to get default board file %s: %d\n",
  584. filename, ret);
  585. return ret;
  586. }
  587. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  588. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  589. return 0;
  590. }
  591. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  592. {
  593. const char *filename;
  594. int ret;
  595. if (ar->fw_otp != NULL)
  596. return 0;
  597. if (ar->hw.fw_otp == NULL) {
  598. ath6kl_dbg(ATH6KL_DBG_BOOT,
  599. "no OTP file configured for this hw\n");
  600. return 0;
  601. }
  602. filename = ar->hw.fw_otp;
  603. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  604. &ar->fw_otp_len);
  605. if (ret) {
  606. ath6kl_err("Failed to get OTP file %s: %d\n",
  607. filename, ret);
  608. return ret;
  609. }
  610. return 0;
  611. }
  612. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  613. {
  614. const char *filename;
  615. int ret;
  616. if (ar->fw != NULL)
  617. return 0;
  618. if (testmode) {
  619. if (ar->hw.fw_tcmd == NULL) {
  620. ath6kl_warn("testmode not supported\n");
  621. return -EOPNOTSUPP;
  622. }
  623. filename = ar->hw.fw_tcmd;
  624. set_bit(TESTMODE, &ar->flag);
  625. goto get_fw;
  626. }
  627. if (WARN_ON(ar->hw.fw == NULL))
  628. return -EINVAL;
  629. filename = ar->hw.fw;
  630. get_fw:
  631. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  632. if (ret) {
  633. ath6kl_err("Failed to get firmware file %s: %d\n",
  634. filename, ret);
  635. return ret;
  636. }
  637. return 0;
  638. }
  639. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  640. {
  641. const char *filename;
  642. int ret;
  643. if (ar->fw_patch != NULL)
  644. return 0;
  645. if (ar->hw.fw_patch == NULL)
  646. return 0;
  647. filename = ar->hw.fw_patch;
  648. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  649. &ar->fw_patch_len);
  650. if (ret) {
  651. ath6kl_err("Failed to get patch file %s: %d\n",
  652. filename, ret);
  653. return ret;
  654. }
  655. return 0;
  656. }
  657. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  658. {
  659. int ret;
  660. ret = ath6kl_fetch_otp_file(ar);
  661. if (ret)
  662. return ret;
  663. ret = ath6kl_fetch_fw_file(ar);
  664. if (ret)
  665. return ret;
  666. ret = ath6kl_fetch_patch_file(ar);
  667. if (ret)
  668. return ret;
  669. return 0;
  670. }
  671. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  672. {
  673. size_t magic_len, len, ie_len;
  674. const struct firmware *fw;
  675. struct ath6kl_fw_ie *hdr;
  676. const char *filename;
  677. const u8 *data;
  678. int ret, ie_id, i, index, bit;
  679. __le32 *val;
  680. if (ar->hw.fw_api2 == NULL)
  681. return -EOPNOTSUPP;
  682. filename = ar->hw.fw_api2;
  683. ret = request_firmware(&fw, filename, ar->dev);
  684. if (ret)
  685. return ret;
  686. data = fw->data;
  687. len = fw->size;
  688. /* magic also includes the null byte, check that as well */
  689. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  690. if (len < magic_len) {
  691. ret = -EINVAL;
  692. goto out;
  693. }
  694. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  695. ret = -EINVAL;
  696. goto out;
  697. }
  698. len -= magic_len;
  699. data += magic_len;
  700. /* loop elements */
  701. while (len > sizeof(struct ath6kl_fw_ie)) {
  702. /* hdr is unaligned! */
  703. hdr = (struct ath6kl_fw_ie *) data;
  704. ie_id = le32_to_cpup(&hdr->id);
  705. ie_len = le32_to_cpup(&hdr->len);
  706. len -= sizeof(*hdr);
  707. data += sizeof(*hdr);
  708. if (len < ie_len) {
  709. ret = -EINVAL;
  710. goto out;
  711. }
  712. switch (ie_id) {
  713. case ATH6KL_FW_IE_OTP_IMAGE:
  714. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  715. ie_len);
  716. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  717. if (ar->fw_otp == NULL) {
  718. ret = -ENOMEM;
  719. goto out;
  720. }
  721. ar->fw_otp_len = ie_len;
  722. break;
  723. case ATH6KL_FW_IE_FW_IMAGE:
  724. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  725. ie_len);
  726. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  727. if (ar->fw == NULL) {
  728. ret = -ENOMEM;
  729. goto out;
  730. }
  731. ar->fw_len = ie_len;
  732. break;
  733. case ATH6KL_FW_IE_PATCH_IMAGE:
  734. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  735. ie_len);
  736. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  737. if (ar->fw_patch == NULL) {
  738. ret = -ENOMEM;
  739. goto out;
  740. }
  741. ar->fw_patch_len = ie_len;
  742. break;
  743. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  744. val = (__le32 *) data;
  745. ar->hw.reserved_ram_size = le32_to_cpup(val);
  746. ath6kl_dbg(ATH6KL_DBG_BOOT,
  747. "found reserved ram size ie 0x%d\n",
  748. ar->hw.reserved_ram_size);
  749. break;
  750. case ATH6KL_FW_IE_CAPABILITIES:
  751. if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
  752. break;
  753. ath6kl_dbg(ATH6KL_DBG_BOOT,
  754. "found firmware capabilities ie (%zd B)\n",
  755. ie_len);
  756. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  757. index = i / 8;
  758. bit = i % 8;
  759. if (data[index] & (1 << bit))
  760. __set_bit(i, ar->fw_capabilities);
  761. }
  762. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  763. ar->fw_capabilities,
  764. sizeof(ar->fw_capabilities));
  765. break;
  766. case ATH6KL_FW_IE_PATCH_ADDR:
  767. if (ie_len != sizeof(*val))
  768. break;
  769. val = (__le32 *) data;
  770. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  771. ath6kl_dbg(ATH6KL_DBG_BOOT,
  772. "found patch address ie 0x%x\n",
  773. ar->hw.dataset_patch_addr);
  774. break;
  775. case ATH6KL_FW_IE_BOARD_ADDR:
  776. if (ie_len != sizeof(*val))
  777. break;
  778. val = (__le32 *) data;
  779. ar->hw.board_addr = le32_to_cpup(val);
  780. ath6kl_dbg(ATH6KL_DBG_BOOT,
  781. "found board address ie 0x%x\n",
  782. ar->hw.board_addr);
  783. break;
  784. case ATH6KL_FW_IE_VIF_MAX:
  785. if (ie_len != sizeof(*val))
  786. break;
  787. val = (__le32 *) data;
  788. ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
  789. ATH6KL_VIF_MAX);
  790. if (ar->vif_max > 1 && !ar->p2p)
  791. ar->max_norm_iface = 2;
  792. ath6kl_dbg(ATH6KL_DBG_BOOT,
  793. "found vif max ie %d\n", ar->vif_max);
  794. break;
  795. default:
  796. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  797. le32_to_cpup(&hdr->id));
  798. break;
  799. }
  800. len -= ie_len;
  801. data += ie_len;
  802. };
  803. ret = 0;
  804. out:
  805. release_firmware(fw);
  806. return ret;
  807. }
  808. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  809. {
  810. int ret;
  811. ret = ath6kl_fetch_board_file(ar);
  812. if (ret)
  813. return ret;
  814. ret = ath6kl_fetch_fw_api2(ar);
  815. if (ret == 0) {
  816. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  817. return 0;
  818. }
  819. ret = ath6kl_fetch_fw_api1(ar);
  820. if (ret)
  821. return ret;
  822. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  823. return 0;
  824. }
  825. static int ath6kl_upload_board_file(struct ath6kl *ar)
  826. {
  827. u32 board_address, board_ext_address, param;
  828. u32 board_data_size, board_ext_data_size;
  829. int ret;
  830. if (WARN_ON(ar->fw_board == NULL))
  831. return -ENOENT;
  832. /*
  833. * Determine where in Target RAM to write Board Data.
  834. * For AR6004, host determine Target RAM address for
  835. * writing board data.
  836. */
  837. if (ar->hw.board_addr != 0) {
  838. board_address = ar->hw.board_addr;
  839. ath6kl_bmi_write(ar,
  840. ath6kl_get_hi_item_addr(ar,
  841. HI_ITEM(hi_board_data)),
  842. (u8 *) &board_address, 4);
  843. } else {
  844. ath6kl_bmi_read(ar,
  845. ath6kl_get_hi_item_addr(ar,
  846. HI_ITEM(hi_board_data)),
  847. (u8 *) &board_address, 4);
  848. }
  849. /* determine where in target ram to write extended board data */
  850. ath6kl_bmi_read(ar,
  851. ath6kl_get_hi_item_addr(ar,
  852. HI_ITEM(hi_board_ext_data)),
  853. (u8 *) &board_ext_address, 4);
  854. if (ar->target_type == TARGET_TYPE_AR6003 &&
  855. board_ext_address == 0) {
  856. ath6kl_err("Failed to get board file target address.\n");
  857. return -EINVAL;
  858. }
  859. switch (ar->target_type) {
  860. case TARGET_TYPE_AR6003:
  861. board_data_size = AR6003_BOARD_DATA_SZ;
  862. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  863. break;
  864. case TARGET_TYPE_AR6004:
  865. board_data_size = AR6004_BOARD_DATA_SZ;
  866. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  867. break;
  868. default:
  869. WARN_ON(1);
  870. return -EINVAL;
  871. break;
  872. }
  873. if (board_ext_address &&
  874. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  875. /* write extended board data */
  876. ath6kl_dbg(ATH6KL_DBG_BOOT,
  877. "writing extended board data to 0x%x (%d B)\n",
  878. board_ext_address, board_ext_data_size);
  879. ret = ath6kl_bmi_write(ar, board_ext_address,
  880. ar->fw_board + board_data_size,
  881. board_ext_data_size);
  882. if (ret) {
  883. ath6kl_err("Failed to write extended board data: %d\n",
  884. ret);
  885. return ret;
  886. }
  887. /* record that extended board data is initialized */
  888. param = (board_ext_data_size << 16) | 1;
  889. ath6kl_bmi_write(ar,
  890. ath6kl_get_hi_item_addr(ar,
  891. HI_ITEM(hi_board_ext_data_config)),
  892. (unsigned char *) &param, 4);
  893. }
  894. if (ar->fw_board_len < board_data_size) {
  895. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  896. ret = -EINVAL;
  897. return ret;
  898. }
  899. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  900. board_address, board_data_size);
  901. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  902. board_data_size);
  903. if (ret) {
  904. ath6kl_err("Board file bmi write failed: %d\n", ret);
  905. return ret;
  906. }
  907. /* record the fact that Board Data IS initialized */
  908. param = 1;
  909. ath6kl_bmi_write(ar,
  910. ath6kl_get_hi_item_addr(ar,
  911. HI_ITEM(hi_board_data_initialized)),
  912. (u8 *)&param, 4);
  913. return ret;
  914. }
  915. static int ath6kl_upload_otp(struct ath6kl *ar)
  916. {
  917. u32 address, param;
  918. bool from_hw = false;
  919. int ret;
  920. if (ar->fw_otp == NULL)
  921. return 0;
  922. address = ar->hw.app_load_addr;
  923. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  924. ar->fw_otp_len);
  925. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  926. ar->fw_otp_len);
  927. if (ret) {
  928. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  929. return ret;
  930. }
  931. /* read firmware start address */
  932. ret = ath6kl_bmi_read(ar,
  933. ath6kl_get_hi_item_addr(ar,
  934. HI_ITEM(hi_app_start)),
  935. (u8 *) &address, sizeof(address));
  936. if (ret) {
  937. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  938. return ret;
  939. }
  940. if (ar->hw.app_start_override_addr == 0) {
  941. ar->hw.app_start_override_addr = address;
  942. from_hw = true;
  943. }
  944. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  945. from_hw ? " (from hw)" : "",
  946. ar->hw.app_start_override_addr);
  947. /* execute the OTP code */
  948. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  949. ar->hw.app_start_override_addr);
  950. param = 0;
  951. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  952. return ret;
  953. }
  954. static int ath6kl_upload_firmware(struct ath6kl *ar)
  955. {
  956. u32 address;
  957. int ret;
  958. if (WARN_ON(ar->fw == NULL))
  959. return 0;
  960. address = ar->hw.app_load_addr;
  961. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  962. address, ar->fw_len);
  963. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  964. if (ret) {
  965. ath6kl_err("Failed to write firmware: %d\n", ret);
  966. return ret;
  967. }
  968. /*
  969. * Set starting address for firmware
  970. * Don't need to setup app_start override addr on AR6004
  971. */
  972. if (ar->target_type != TARGET_TYPE_AR6004) {
  973. address = ar->hw.app_start_override_addr;
  974. ath6kl_bmi_set_app_start(ar, address);
  975. }
  976. return ret;
  977. }
  978. static int ath6kl_upload_patch(struct ath6kl *ar)
  979. {
  980. u32 address, param;
  981. int ret;
  982. if (ar->fw_patch == NULL)
  983. return 0;
  984. address = ar->hw.dataset_patch_addr;
  985. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  986. address, ar->fw_patch_len);
  987. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  988. if (ret) {
  989. ath6kl_err("Failed to write patch file: %d\n", ret);
  990. return ret;
  991. }
  992. param = address;
  993. ath6kl_bmi_write(ar,
  994. ath6kl_get_hi_item_addr(ar,
  995. HI_ITEM(hi_dset_list_head)),
  996. (unsigned char *) &param, 4);
  997. return 0;
  998. }
  999. static int ath6kl_init_upload(struct ath6kl *ar)
  1000. {
  1001. u32 param, options, sleep, address;
  1002. int status = 0;
  1003. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1004. ar->target_type != TARGET_TYPE_AR6004)
  1005. return -EINVAL;
  1006. /* temporarily disable system sleep */
  1007. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1008. status = ath6kl_bmi_reg_read(ar, address, &param);
  1009. if (status)
  1010. return status;
  1011. options = param;
  1012. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1013. status = ath6kl_bmi_reg_write(ar, address, param);
  1014. if (status)
  1015. return status;
  1016. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1017. status = ath6kl_bmi_reg_read(ar, address, &param);
  1018. if (status)
  1019. return status;
  1020. sleep = param;
  1021. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1022. status = ath6kl_bmi_reg_write(ar, address, param);
  1023. if (status)
  1024. return status;
  1025. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1026. options, sleep);
  1027. /* program analog PLL register */
  1028. /* no need to control 40/44MHz clock on AR6004 */
  1029. if (ar->target_type != TARGET_TYPE_AR6004) {
  1030. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1031. 0xF9104001);
  1032. if (status)
  1033. return status;
  1034. /* Run at 80/88MHz by default */
  1035. param = SM(CPU_CLOCK_STANDARD, 1);
  1036. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1037. status = ath6kl_bmi_reg_write(ar, address, param);
  1038. if (status)
  1039. return status;
  1040. }
  1041. param = 0;
  1042. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1043. param = SM(LPO_CAL_ENABLE, 1);
  1044. status = ath6kl_bmi_reg_write(ar, address, param);
  1045. if (status)
  1046. return status;
  1047. /* WAR to avoid SDIO CRC err */
  1048. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1049. ath6kl_err("temporary war to avoid sdio crc error\n");
  1050. param = 0x20;
  1051. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1052. status = ath6kl_bmi_reg_write(ar, address, param);
  1053. if (status)
  1054. return status;
  1055. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1056. status = ath6kl_bmi_reg_write(ar, address, param);
  1057. if (status)
  1058. return status;
  1059. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1060. status = ath6kl_bmi_reg_write(ar, address, param);
  1061. if (status)
  1062. return status;
  1063. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1064. status = ath6kl_bmi_reg_write(ar, address, param);
  1065. if (status)
  1066. return status;
  1067. }
  1068. /* write EEPROM data to Target RAM */
  1069. status = ath6kl_upload_board_file(ar);
  1070. if (status)
  1071. return status;
  1072. /* transfer One time Programmable data */
  1073. status = ath6kl_upload_otp(ar);
  1074. if (status)
  1075. return status;
  1076. /* Download Target firmware */
  1077. status = ath6kl_upload_firmware(ar);
  1078. if (status)
  1079. return status;
  1080. status = ath6kl_upload_patch(ar);
  1081. if (status)
  1082. return status;
  1083. /* Restore system sleep */
  1084. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1085. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1086. if (status)
  1087. return status;
  1088. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1089. param = options | 0x20;
  1090. status = ath6kl_bmi_reg_write(ar, address, param);
  1091. if (status)
  1092. return status;
  1093. /* Configure GPIO AR6003 UART */
  1094. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1095. status = ath6kl_bmi_write(ar,
  1096. ath6kl_get_hi_item_addr(ar,
  1097. HI_ITEM(hi_dbg_uart_txpin)),
  1098. (u8 *)&param, 4);
  1099. return status;
  1100. }
  1101. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1102. {
  1103. const struct ath6kl_hw *hw;
  1104. int i;
  1105. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1106. hw = &hw_list[i];
  1107. if (hw->id == ar->version.target_ver)
  1108. break;
  1109. }
  1110. if (i == ARRAY_SIZE(hw_list)) {
  1111. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1112. ar->version.target_ver);
  1113. return -EINVAL;
  1114. }
  1115. ar->hw = *hw;
  1116. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1117. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1118. ar->version.target_ver, ar->target_type,
  1119. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1120. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1121. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1122. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1123. ar->hw.reserved_ram_size);
  1124. return 0;
  1125. }
  1126. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1127. {
  1128. switch (type) {
  1129. case ATH6KL_HIF_TYPE_SDIO:
  1130. return "sdio";
  1131. case ATH6KL_HIF_TYPE_USB:
  1132. return "usb";
  1133. }
  1134. return NULL;
  1135. }
  1136. int ath6kl_init_hw_start(struct ath6kl *ar)
  1137. {
  1138. long timeleft;
  1139. int ret, i;
  1140. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1141. ret = ath6kl_hif_power_on(ar);
  1142. if (ret)
  1143. return ret;
  1144. ret = ath6kl_configure_target(ar);
  1145. if (ret)
  1146. goto err_power_off;
  1147. ret = ath6kl_init_upload(ar);
  1148. if (ret)
  1149. goto err_power_off;
  1150. /* Do we need to finish the BMI phase */
  1151. /* FIXME: return error from ath6kl_bmi_done() */
  1152. if (ath6kl_bmi_done(ar)) {
  1153. ret = -EIO;
  1154. goto err_power_off;
  1155. }
  1156. /*
  1157. * The reason we have to wait for the target here is that the
  1158. * driver layer has to init BMI in order to set the host block
  1159. * size.
  1160. */
  1161. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1162. ret = -EIO;
  1163. goto err_power_off;
  1164. }
  1165. if (ath6kl_init_service_ep(ar)) {
  1166. ret = -EIO;
  1167. goto err_cleanup_scatter;
  1168. }
  1169. /* setup credit distribution */
  1170. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1171. /* start HTC */
  1172. ret = ath6kl_htc_start(ar->htc_target);
  1173. if (ret) {
  1174. /* FIXME: call this */
  1175. ath6kl_cookie_cleanup(ar);
  1176. goto err_cleanup_scatter;
  1177. }
  1178. /* Wait for Wmi event to be ready */
  1179. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1180. test_bit(WMI_READY,
  1181. &ar->flag),
  1182. WMI_TIMEOUT);
  1183. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1184. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1185. ath6kl_info("%s %s fw %s%s\n",
  1186. ar->hw.name,
  1187. ath6kl_init_get_hif_name(ar->hif_type),
  1188. ar->wiphy->fw_version,
  1189. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1190. }
  1191. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1192. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1193. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1194. ret = -EIO;
  1195. goto err_htc_stop;
  1196. }
  1197. if (!timeleft || signal_pending(current)) {
  1198. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1199. ret = -EIO;
  1200. goto err_htc_stop;
  1201. }
  1202. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1203. /* communicate the wmi protocol verision to the target */
  1204. /* FIXME: return error */
  1205. if ((ath6kl_set_host_app_area(ar)) != 0)
  1206. ath6kl_err("unable to set the host app area\n");
  1207. for (i = 0; i < ar->vif_max; i++) {
  1208. ret = ath6kl_target_config_wlan_params(ar, i);
  1209. if (ret)
  1210. goto err_htc_stop;
  1211. }
  1212. ar->state = ATH6KL_STATE_ON;
  1213. return 0;
  1214. err_htc_stop:
  1215. ath6kl_htc_stop(ar->htc_target);
  1216. err_cleanup_scatter:
  1217. ath6kl_hif_cleanup_scatter(ar);
  1218. err_power_off:
  1219. ath6kl_hif_power_off(ar);
  1220. return ret;
  1221. }
  1222. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1223. {
  1224. int ret;
  1225. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1226. ath6kl_htc_stop(ar->htc_target);
  1227. ath6kl_hif_stop(ar);
  1228. ath6kl_bmi_reset(ar);
  1229. ret = ath6kl_hif_power_off(ar);
  1230. if (ret)
  1231. ath6kl_warn("failed to power off hif: %d\n", ret);
  1232. ar->state = ATH6KL_STATE_OFF;
  1233. return 0;
  1234. }
  1235. int ath6kl_core_init(struct ath6kl *ar)
  1236. {
  1237. struct ath6kl_bmi_target_info targ_info;
  1238. struct net_device *ndev;
  1239. int ret = 0, i;
  1240. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1241. if (!ar->ath6kl_wq)
  1242. return -ENOMEM;
  1243. ret = ath6kl_bmi_init(ar);
  1244. if (ret)
  1245. goto err_wq;
  1246. /*
  1247. * Turn on power to get hardware (target) version and leave power
  1248. * on delibrately as we will boot the hardware anyway within few
  1249. * seconds.
  1250. */
  1251. ret = ath6kl_hif_power_on(ar);
  1252. if (ret)
  1253. goto err_bmi_cleanup;
  1254. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1255. if (ret)
  1256. goto err_power_off;
  1257. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1258. ar->target_type = le32_to_cpu(targ_info.type);
  1259. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1260. ret = ath6kl_init_hw_params(ar);
  1261. if (ret)
  1262. goto err_power_off;
  1263. ar->htc_target = ath6kl_htc_create(ar);
  1264. if (!ar->htc_target) {
  1265. ret = -ENOMEM;
  1266. goto err_power_off;
  1267. }
  1268. ret = ath6kl_fetch_firmwares(ar);
  1269. if (ret)
  1270. goto err_htc_cleanup;
  1271. /* FIXME: we should free all firmwares in the error cases below */
  1272. /* Indicate that WMI is enabled (although not ready yet) */
  1273. set_bit(WMI_ENABLED, &ar->flag);
  1274. ar->wmi = ath6kl_wmi_init(ar);
  1275. if (!ar->wmi) {
  1276. ath6kl_err("failed to initialize wmi\n");
  1277. ret = -EIO;
  1278. goto err_htc_cleanup;
  1279. }
  1280. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1281. ret = ath6kl_register_ieee80211_hw(ar);
  1282. if (ret)
  1283. goto err_node_cleanup;
  1284. ret = ath6kl_debug_init(ar);
  1285. if (ret) {
  1286. wiphy_unregister(ar->wiphy);
  1287. goto err_node_cleanup;
  1288. }
  1289. for (i = 0; i < ar->vif_max; i++)
  1290. ar->avail_idx_map |= BIT(i);
  1291. rtnl_lock();
  1292. /* Add an initial station interface */
  1293. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1294. INFRA_NETWORK);
  1295. rtnl_unlock();
  1296. if (!ndev) {
  1297. ath6kl_err("Failed to instantiate a network device\n");
  1298. ret = -ENOMEM;
  1299. wiphy_unregister(ar->wiphy);
  1300. goto err_debug_init;
  1301. }
  1302. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1303. __func__, ndev->name, ndev, ar);
  1304. /* setup access class priority mappings */
  1305. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1306. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1307. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1308. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1309. /* give our connected endpoints some buffers */
  1310. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1311. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1312. /* allocate some buffers that handle larger AMSDU frames */
  1313. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1314. ath6kl_cookie_init(ar);
  1315. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1316. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1317. if (suspend_cutpower)
  1318. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1319. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1320. WIPHY_FLAG_HAVE_AP_SME |
  1321. WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
  1322. ar->wiphy->probe_resp_offload =
  1323. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
  1324. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
  1325. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
  1326. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
  1327. set_bit(FIRST_BOOT, &ar->flag);
  1328. ret = ath6kl_init_hw_start(ar);
  1329. if (ret) {
  1330. ath6kl_err("Failed to start hardware: %d\n", ret);
  1331. goto err_rxbuf_cleanup;
  1332. }
  1333. /*
  1334. * Set mac address which is received in ready event
  1335. * FIXME: Move to ath6kl_interface_add()
  1336. */
  1337. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1338. return ret;
  1339. err_rxbuf_cleanup:
  1340. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1341. ath6kl_cleanup_amsdu_rxbufs(ar);
  1342. rtnl_lock();
  1343. ath6kl_deinit_if_data(netdev_priv(ndev));
  1344. rtnl_unlock();
  1345. wiphy_unregister(ar->wiphy);
  1346. err_debug_init:
  1347. ath6kl_debug_cleanup(ar);
  1348. err_node_cleanup:
  1349. ath6kl_wmi_shutdown(ar->wmi);
  1350. clear_bit(WMI_ENABLED, &ar->flag);
  1351. ar->wmi = NULL;
  1352. err_htc_cleanup:
  1353. ath6kl_htc_cleanup(ar->htc_target);
  1354. err_power_off:
  1355. ath6kl_hif_power_off(ar);
  1356. err_bmi_cleanup:
  1357. ath6kl_bmi_cleanup(ar);
  1358. err_wq:
  1359. destroy_workqueue(ar->ath6kl_wq);
  1360. return ret;
  1361. }
  1362. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1363. {
  1364. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1365. bool discon_issued;
  1366. netif_stop_queue(vif->ndev);
  1367. clear_bit(WLAN_ENABLED, &vif->flags);
  1368. if (wmi_ready) {
  1369. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1370. test_bit(CONNECT_PEND, &vif->flags);
  1371. ath6kl_disconnect(vif);
  1372. del_timer(&vif->disconnect_timer);
  1373. if (discon_issued)
  1374. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1375. (vif->nw_type & AP_NETWORK) ?
  1376. bcast_mac : vif->bssid,
  1377. 0, NULL, 0);
  1378. }
  1379. if (vif->scan_req) {
  1380. cfg80211_scan_done(vif->scan_req, true);
  1381. vif->scan_req = NULL;
  1382. }
  1383. }
  1384. void ath6kl_stop_txrx(struct ath6kl *ar)
  1385. {
  1386. struct ath6kl_vif *vif, *tmp_vif;
  1387. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1388. if (down_interruptible(&ar->sem)) {
  1389. ath6kl_err("down_interruptible failed\n");
  1390. return;
  1391. }
  1392. spin_lock_bh(&ar->list_lock);
  1393. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1394. list_del(&vif->list);
  1395. spin_unlock_bh(&ar->list_lock);
  1396. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1397. rtnl_lock();
  1398. ath6kl_deinit_if_data(vif);
  1399. rtnl_unlock();
  1400. spin_lock_bh(&ar->list_lock);
  1401. }
  1402. spin_unlock_bh(&ar->list_lock);
  1403. clear_bit(WMI_READY, &ar->flag);
  1404. /*
  1405. * After wmi_shudown all WMI events will be dropped. We
  1406. * need to cleanup the buffers allocated in AP mode and
  1407. * give disconnect notification to stack, which usually
  1408. * happens in the disconnect_event. Simulate the disconnect
  1409. * event by calling the function directly. Sometimes
  1410. * disconnect_event will be received when the debug logs
  1411. * are collected.
  1412. */
  1413. ath6kl_wmi_shutdown(ar->wmi);
  1414. clear_bit(WMI_ENABLED, &ar->flag);
  1415. if (ar->htc_target) {
  1416. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1417. ath6kl_htc_stop(ar->htc_target);
  1418. }
  1419. /*
  1420. * Try to reset the device if we can. The driver may have been
  1421. * configure NOT to reset the target during a debug session.
  1422. */
  1423. ath6kl_dbg(ATH6KL_DBG_TRC,
  1424. "attempting to reset target on instance destroy\n");
  1425. ath6kl_reset_device(ar, ar->target_type, true, true);
  1426. clear_bit(WLAN_ENABLED, &ar->flag);
  1427. }