nouveau_drm.c 25 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/client.h>
  33. #include <core/gpuobj.h>
  34. #include <core/class.h>
  35. #include <engine/device.h>
  36. #include <engine/disp.h>
  37. #include <engine/fifo.h>
  38. #include <subdev/vm.h>
  39. #include "nouveau_drm.h"
  40. #include "nouveau_dma.h"
  41. #include "nouveau_ttm.h"
  42. #include "nouveau_gem.h"
  43. #include "nouveau_agp.h"
  44. #include "nouveau_vga.h"
  45. #include "nouveau_sysfs.h"
  46. #include "nouveau_hwmon.h"
  47. #include "nouveau_acpi.h"
  48. #include "nouveau_bios.h"
  49. #include "nouveau_ioctl.h"
  50. #include "nouveau_abi16.h"
  51. #include "nouveau_fbcon.h"
  52. #include "nouveau_fence.h"
  53. #include "nouveau_debugfs.h"
  54. MODULE_PARM_DESC(config, "option string to pass to driver core");
  55. static char *nouveau_config;
  56. module_param_named(config, nouveau_config, charp, 0400);
  57. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  58. static char *nouveau_debug;
  59. module_param_named(debug, nouveau_debug, charp, 0400);
  60. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  61. static int nouveau_noaccel = 0;
  62. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  63. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  64. "0 = disabled, 1 = enabled, 2 = headless)");
  65. int nouveau_modeset = -1;
  66. module_param_named(modeset, nouveau_modeset, int, 0400);
  67. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  68. int nouveau_runtime_pm = -1;
  69. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  70. static struct drm_driver driver;
  71. static u64
  72. nouveau_name(struct pci_dev *pdev)
  73. {
  74. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  75. name |= pdev->bus->number << 16;
  76. name |= PCI_SLOT(pdev->devfn) << 8;
  77. return name | PCI_FUNC(pdev->devfn);
  78. }
  79. static int
  80. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  81. int size, void **pcli)
  82. {
  83. struct nouveau_cli *cli;
  84. int ret;
  85. *pcli = NULL;
  86. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  87. nouveau_debug, size, pcli);
  88. cli = *pcli;
  89. if (ret) {
  90. if (cli)
  91. nouveau_client_destroy(&cli->base);
  92. *pcli = NULL;
  93. return ret;
  94. }
  95. mutex_init(&cli->mutex);
  96. return 0;
  97. }
  98. static void
  99. nouveau_cli_destroy(struct nouveau_cli *cli)
  100. {
  101. struct nouveau_object *client = nv_object(cli);
  102. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  103. nouveau_client_fini(&cli->base, false);
  104. atomic_set(&client->refcount, 1);
  105. nouveau_object_ref(NULL, &client);
  106. }
  107. static void
  108. nouveau_accel_fini(struct nouveau_drm *drm)
  109. {
  110. nouveau_gpuobj_ref(NULL, &drm->notify);
  111. nouveau_channel_del(&drm->channel);
  112. nouveau_channel_del(&drm->cechan);
  113. if (drm->fence)
  114. nouveau_fence(drm)->dtor(drm);
  115. }
  116. static void
  117. nouveau_accel_init(struct nouveau_drm *drm)
  118. {
  119. struct nouveau_device *device = nv_device(drm->device);
  120. struct nouveau_object *object;
  121. u32 arg0, arg1;
  122. int ret;
  123. if (nouveau_noaccel || !nouveau_fifo(device) /*XXX*/)
  124. return;
  125. /* initialise synchronisation routines */
  126. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  127. else if (device->card_type < NV_11 ||
  128. device->chipset < 0x17) ret = nv10_fence_create(drm);
  129. else if (device->card_type < NV_50) ret = nv17_fence_create(drm);
  130. else if (device->chipset < 0x84) ret = nv50_fence_create(drm);
  131. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  132. else ret = nvc0_fence_create(drm);
  133. if (ret) {
  134. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  135. nouveau_accel_fini(drm);
  136. return;
  137. }
  138. if (device->card_type >= NV_E0) {
  139. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  140. NVDRM_CHAN + 1,
  141. NVE0_CHANNEL_IND_ENGINE_CE0 |
  142. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  143. &drm->cechan);
  144. if (ret)
  145. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  146. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  147. arg1 = 1;
  148. } else
  149. if (device->chipset >= 0xa3 &&
  150. device->chipset != 0xaa &&
  151. device->chipset != 0xac) {
  152. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  153. NVDRM_CHAN + 1, NvDmaFB, NvDmaTT,
  154. &drm->cechan);
  155. if (ret)
  156. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  157. arg0 = NvDmaFB;
  158. arg1 = NvDmaTT;
  159. } else {
  160. arg0 = NvDmaFB;
  161. arg1 = NvDmaTT;
  162. }
  163. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  164. arg0, arg1, &drm->channel);
  165. if (ret) {
  166. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  167. nouveau_accel_fini(drm);
  168. return;
  169. }
  170. if (device->card_type < NV_C0) {
  171. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  172. &drm->notify);
  173. if (ret) {
  174. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  175. nouveau_accel_fini(drm);
  176. return;
  177. }
  178. ret = nouveau_object_new(nv_object(drm),
  179. drm->channel->handle, NvNotify0,
  180. 0x003d, &(struct nv_dma_class) {
  181. .flags = NV_DMA_TARGET_VRAM |
  182. NV_DMA_ACCESS_RDWR,
  183. .start = drm->notify->addr,
  184. .limit = drm->notify->addr + 31
  185. }, sizeof(struct nv_dma_class),
  186. &object);
  187. if (ret) {
  188. nouveau_accel_fini(drm);
  189. return;
  190. }
  191. }
  192. nouveau_bo_move_init(drm);
  193. }
  194. static int nouveau_drm_probe(struct pci_dev *pdev,
  195. const struct pci_device_id *pent)
  196. {
  197. struct nouveau_device *device;
  198. struct apertures_struct *aper;
  199. bool boot = false;
  200. int ret;
  201. /* remove conflicting drivers (vesafb, efifb etc) */
  202. aper = alloc_apertures(3);
  203. if (!aper)
  204. return -ENOMEM;
  205. aper->ranges[0].base = pci_resource_start(pdev, 1);
  206. aper->ranges[0].size = pci_resource_len(pdev, 1);
  207. aper->count = 1;
  208. if (pci_resource_len(pdev, 2)) {
  209. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  210. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  211. aper->count++;
  212. }
  213. if (pci_resource_len(pdev, 3)) {
  214. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  215. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  216. aper->count++;
  217. }
  218. #ifdef CONFIG_X86
  219. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  220. #endif
  221. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  222. kfree(aper);
  223. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  224. nouveau_config, nouveau_debug, &device);
  225. if (ret)
  226. return ret;
  227. pci_set_master(pdev);
  228. ret = drm_get_pci_dev(pdev, pent, &driver);
  229. if (ret) {
  230. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  231. return ret;
  232. }
  233. return 0;
  234. }
  235. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  236. static void
  237. nouveau_get_hdmi_dev(struct drm_device *dev)
  238. {
  239. struct nouveau_drm *drm = dev->dev_private;
  240. struct pci_dev *pdev = dev->pdev;
  241. /* subfunction one is a hdmi audio device? */
  242. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  243. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  244. if (!drm->hdmi_device) {
  245. DRM_INFO("hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  246. return;
  247. }
  248. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  249. DRM_INFO("possible hdmi device not audio %d\n", drm->hdmi_device->class);
  250. pci_dev_put(drm->hdmi_device);
  251. drm->hdmi_device = NULL;
  252. return;
  253. }
  254. }
  255. static int
  256. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  257. {
  258. struct pci_dev *pdev = dev->pdev;
  259. struct nouveau_device *device;
  260. struct nouveau_drm *drm;
  261. int ret;
  262. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  263. if (ret)
  264. return ret;
  265. dev->dev_private = drm;
  266. drm->dev = dev;
  267. INIT_LIST_HEAD(&drm->clients);
  268. spin_lock_init(&drm->tile.lock);
  269. nouveau_get_hdmi_dev(dev);
  270. /* make sure AGP controller is in a consistent state before we
  271. * (possibly) execute vbios init tables (see nouveau_agp.h)
  272. */
  273. if (drm_pci_device_is_agp(dev) && dev->agp) {
  274. /* dummy device object, doesn't init anything, but allows
  275. * agp code access to registers
  276. */
  277. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  278. NVDRM_DEVICE, 0x0080,
  279. &(struct nv_device_class) {
  280. .device = ~0,
  281. .disable =
  282. ~(NV_DEVICE_DISABLE_MMIO |
  283. NV_DEVICE_DISABLE_IDENTIFY),
  284. .debug0 = ~0,
  285. }, sizeof(struct nv_device_class),
  286. &drm->device);
  287. if (ret)
  288. goto fail_device;
  289. nouveau_agp_reset(drm);
  290. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  291. }
  292. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  293. 0x0080, &(struct nv_device_class) {
  294. .device = ~0,
  295. .disable = 0,
  296. .debug0 = 0,
  297. }, sizeof(struct nv_device_class),
  298. &drm->device);
  299. if (ret)
  300. goto fail_device;
  301. /* workaround an odd issue on nvc1 by disabling the device's
  302. * nosnoop capability. hopefully won't cause issues until a
  303. * better fix is found - assuming there is one...
  304. */
  305. device = nv_device(drm->device);
  306. if (nv_device(drm->device)->chipset == 0xc1)
  307. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  308. nouveau_vga_init(drm);
  309. nouveau_agp_init(drm);
  310. if (device->card_type >= NV_50) {
  311. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  312. 0x1000, &drm->client.base.vm);
  313. if (ret)
  314. goto fail_device;
  315. }
  316. ret = nouveau_ttm_init(drm);
  317. if (ret)
  318. goto fail_ttm;
  319. ret = nouveau_bios_init(dev);
  320. if (ret)
  321. goto fail_bios;
  322. ret = nouveau_display_create(dev);
  323. if (ret)
  324. goto fail_dispctor;
  325. if (dev->mode_config.num_crtc) {
  326. ret = nouveau_display_init(dev);
  327. if (ret)
  328. goto fail_dispinit;
  329. }
  330. nouveau_sysfs_init(dev);
  331. nouveau_hwmon_init(dev);
  332. nouveau_accel_init(drm);
  333. nouveau_fbcon_init(dev);
  334. if (nouveau_runtime_pm != 0) {
  335. pm_runtime_use_autosuspend(dev->dev);
  336. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  337. pm_runtime_set_active(dev->dev);
  338. pm_runtime_allow(dev->dev);
  339. pm_runtime_mark_last_busy(dev->dev);
  340. pm_runtime_put(dev->dev);
  341. }
  342. return 0;
  343. fail_dispinit:
  344. nouveau_display_destroy(dev);
  345. fail_dispctor:
  346. nouveau_bios_takedown(dev);
  347. fail_bios:
  348. nouveau_ttm_fini(drm);
  349. fail_ttm:
  350. nouveau_agp_fini(drm);
  351. nouveau_vga_fini(drm);
  352. fail_device:
  353. nouveau_cli_destroy(&drm->client);
  354. return ret;
  355. }
  356. static int
  357. nouveau_drm_unload(struct drm_device *dev)
  358. {
  359. struct nouveau_drm *drm = nouveau_drm(dev);
  360. pm_runtime_get_sync(dev->dev);
  361. nouveau_fbcon_fini(dev);
  362. nouveau_accel_fini(drm);
  363. nouveau_hwmon_fini(dev);
  364. nouveau_sysfs_fini(dev);
  365. if (dev->mode_config.num_crtc)
  366. nouveau_display_fini(dev);
  367. nouveau_display_destroy(dev);
  368. nouveau_bios_takedown(dev);
  369. nouveau_ttm_fini(drm);
  370. nouveau_agp_fini(drm);
  371. nouveau_vga_fini(drm);
  372. if (drm->hdmi_device)
  373. pci_dev_put(drm->hdmi_device);
  374. nouveau_cli_destroy(&drm->client);
  375. return 0;
  376. }
  377. static void
  378. nouveau_drm_remove(struct pci_dev *pdev)
  379. {
  380. struct drm_device *dev = pci_get_drvdata(pdev);
  381. struct nouveau_drm *drm = nouveau_drm(dev);
  382. struct nouveau_object *device;
  383. device = drm->client.base.device;
  384. drm_put_dev(dev);
  385. nouveau_object_ref(NULL, &device);
  386. nouveau_object_debug();
  387. }
  388. static int
  389. nouveau_do_suspend(struct drm_device *dev)
  390. {
  391. struct nouveau_drm *drm = nouveau_drm(dev);
  392. struct nouveau_cli *cli;
  393. int ret;
  394. if (dev->mode_config.num_crtc) {
  395. NV_INFO(drm, "suspending display...\n");
  396. ret = nouveau_display_suspend(dev);
  397. if (ret)
  398. return ret;
  399. }
  400. NV_INFO(drm, "evicting buffers...\n");
  401. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  402. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  403. if (drm->cechan) {
  404. ret = nouveau_channel_idle(drm->cechan);
  405. if (ret)
  406. return ret;
  407. }
  408. if (drm->channel) {
  409. ret = nouveau_channel_idle(drm->channel);
  410. if (ret)
  411. return ret;
  412. }
  413. NV_INFO(drm, "suspending client object trees...\n");
  414. if (drm->fence && nouveau_fence(drm)->suspend) {
  415. if (!nouveau_fence(drm)->suspend(drm))
  416. return -ENOMEM;
  417. }
  418. list_for_each_entry(cli, &drm->clients, head) {
  419. ret = nouveau_client_fini(&cli->base, true);
  420. if (ret)
  421. goto fail_client;
  422. }
  423. NV_INFO(drm, "suspending kernel object tree...\n");
  424. ret = nouveau_client_fini(&drm->client.base, true);
  425. if (ret)
  426. goto fail_client;
  427. nouveau_agp_fini(drm);
  428. return 0;
  429. fail_client:
  430. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  431. nouveau_client_init(&cli->base);
  432. }
  433. if (dev->mode_config.num_crtc) {
  434. NV_INFO(drm, "resuming display...\n");
  435. nouveau_display_resume(dev);
  436. }
  437. return ret;
  438. }
  439. int nouveau_pmops_suspend(struct device *dev)
  440. {
  441. struct pci_dev *pdev = to_pci_dev(dev);
  442. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  443. int ret;
  444. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  445. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  446. return 0;
  447. if (drm_dev->mode_config.num_crtc)
  448. nouveau_fbcon_set_suspend(drm_dev, 1);
  449. ret = nouveau_do_suspend(drm_dev);
  450. if (ret)
  451. return ret;
  452. pci_save_state(pdev);
  453. pci_disable_device(pdev);
  454. pci_set_power_state(pdev, PCI_D3hot);
  455. return 0;
  456. }
  457. static int
  458. nouveau_do_resume(struct drm_device *dev)
  459. {
  460. struct nouveau_drm *drm = nouveau_drm(dev);
  461. struct nouveau_cli *cli;
  462. NV_INFO(drm, "re-enabling device...\n");
  463. nouveau_agp_reset(drm);
  464. NV_INFO(drm, "resuming kernel object tree...\n");
  465. nouveau_client_init(&drm->client.base);
  466. nouveau_agp_init(drm);
  467. NV_INFO(drm, "resuming client object trees...\n");
  468. if (drm->fence && nouveau_fence(drm)->resume)
  469. nouveau_fence(drm)->resume(drm);
  470. list_for_each_entry(cli, &drm->clients, head) {
  471. nouveau_client_init(&cli->base);
  472. }
  473. nouveau_run_vbios_init(dev);
  474. if (dev->mode_config.num_crtc) {
  475. NV_INFO(drm, "resuming display...\n");
  476. nouveau_display_repin(dev);
  477. }
  478. return 0;
  479. }
  480. int nouveau_pmops_resume(struct device *dev)
  481. {
  482. struct pci_dev *pdev = to_pci_dev(dev);
  483. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  484. int ret;
  485. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  486. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  487. return 0;
  488. pci_set_power_state(pdev, PCI_D0);
  489. pci_restore_state(pdev);
  490. ret = pci_enable_device(pdev);
  491. if (ret)
  492. return ret;
  493. pci_set_master(pdev);
  494. ret = nouveau_do_resume(drm_dev);
  495. if (ret)
  496. return ret;
  497. if (drm_dev->mode_config.num_crtc)
  498. nouveau_fbcon_set_suspend(drm_dev, 0);
  499. nouveau_fbcon_zfill_all(drm_dev);
  500. if (drm_dev->mode_config.num_crtc)
  501. nouveau_display_resume(drm_dev);
  502. return 0;
  503. }
  504. static int nouveau_pmops_freeze(struct device *dev)
  505. {
  506. struct pci_dev *pdev = to_pci_dev(dev);
  507. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  508. int ret;
  509. if (drm_dev->mode_config.num_crtc)
  510. nouveau_fbcon_set_suspend(drm_dev, 1);
  511. ret = nouveau_do_suspend(drm_dev);
  512. return ret;
  513. }
  514. static int nouveau_pmops_thaw(struct device *dev)
  515. {
  516. struct pci_dev *pdev = to_pci_dev(dev);
  517. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  518. int ret;
  519. ret = nouveau_do_resume(drm_dev);
  520. if (ret)
  521. return ret;
  522. if (drm_dev->mode_config.num_crtc)
  523. nouveau_fbcon_set_suspend(drm_dev, 0);
  524. nouveau_fbcon_zfill_all(drm_dev);
  525. if (drm_dev->mode_config.num_crtc)
  526. nouveau_display_resume(drm_dev);
  527. return 0;
  528. }
  529. static int
  530. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  531. {
  532. struct pci_dev *pdev = dev->pdev;
  533. struct nouveau_drm *drm = nouveau_drm(dev);
  534. struct nouveau_cli *cli;
  535. char name[32], tmpname[TASK_COMM_LEN];
  536. int ret;
  537. /* need to bring up power immediately if opening device */
  538. ret = pm_runtime_get_sync(dev->dev);
  539. if (ret < 0)
  540. return ret;
  541. get_task_comm(tmpname, current);
  542. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  543. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  544. if (ret)
  545. goto out_suspend;
  546. if (nv_device(drm->device)->card_type >= NV_50) {
  547. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  548. 0x1000, &cli->base.vm);
  549. if (ret) {
  550. nouveau_cli_destroy(cli);
  551. goto out_suspend;
  552. }
  553. }
  554. fpriv->driver_priv = cli;
  555. mutex_lock(&drm->client.mutex);
  556. list_add(&cli->head, &drm->clients);
  557. mutex_unlock(&drm->client.mutex);
  558. out_suspend:
  559. pm_runtime_mark_last_busy(dev->dev);
  560. pm_runtime_put_autosuspend(dev->dev);
  561. return ret;
  562. }
  563. static void
  564. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  565. {
  566. struct nouveau_cli *cli = nouveau_cli(fpriv);
  567. struct nouveau_drm *drm = nouveau_drm(dev);
  568. pm_runtime_get_sync(dev->dev);
  569. if (cli->abi16)
  570. nouveau_abi16_fini(cli->abi16);
  571. mutex_lock(&drm->client.mutex);
  572. list_del(&cli->head);
  573. mutex_unlock(&drm->client.mutex);
  574. }
  575. static void
  576. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  577. {
  578. struct nouveau_cli *cli = nouveau_cli(fpriv);
  579. nouveau_cli_destroy(cli);
  580. pm_runtime_mark_last_busy(dev->dev);
  581. pm_runtime_put_autosuspend(dev->dev);
  582. }
  583. static const struct drm_ioctl_desc
  584. nouveau_ioctls[] = {
  585. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  586. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  587. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  588. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  589. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  590. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  591. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  592. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  593. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  594. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  595. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  596. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  597. };
  598. long nouveau_drm_ioctl(struct file *filp,
  599. unsigned int cmd, unsigned long arg)
  600. {
  601. struct drm_file *file_priv = filp->private_data;
  602. struct drm_device *dev;
  603. long ret;
  604. dev = file_priv->minor->dev;
  605. ret = pm_runtime_get_sync(dev->dev);
  606. if (ret < 0)
  607. return ret;
  608. ret = drm_ioctl(filp, cmd, arg);
  609. pm_runtime_mark_last_busy(dev->dev);
  610. pm_runtime_put_autosuspend(dev->dev);
  611. return ret;
  612. }
  613. static const struct file_operations
  614. nouveau_driver_fops = {
  615. .owner = THIS_MODULE,
  616. .open = drm_open,
  617. .release = drm_release,
  618. .unlocked_ioctl = nouveau_drm_ioctl,
  619. .mmap = nouveau_ttm_mmap,
  620. .poll = drm_poll,
  621. .read = drm_read,
  622. #if defined(CONFIG_COMPAT)
  623. .compat_ioctl = nouveau_compat_ioctl,
  624. #endif
  625. .llseek = noop_llseek,
  626. };
  627. static struct drm_driver
  628. driver = {
  629. .driver_features =
  630. DRIVER_USE_AGP |
  631. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  632. .load = nouveau_drm_load,
  633. .unload = nouveau_drm_unload,
  634. .open = nouveau_drm_open,
  635. .preclose = nouveau_drm_preclose,
  636. .postclose = nouveau_drm_postclose,
  637. .lastclose = nouveau_vga_lastclose,
  638. #if defined(CONFIG_DEBUG_FS)
  639. .debugfs_init = nouveau_debugfs_init,
  640. .debugfs_cleanup = nouveau_debugfs_takedown,
  641. #endif
  642. .get_vblank_counter = drm_vblank_count,
  643. .enable_vblank = nouveau_display_vblank_enable,
  644. .disable_vblank = nouveau_display_vblank_disable,
  645. .ioctls = nouveau_ioctls,
  646. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  647. .fops = &nouveau_driver_fops,
  648. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  649. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  650. .gem_prime_export = drm_gem_prime_export,
  651. .gem_prime_import = drm_gem_prime_import,
  652. .gem_prime_pin = nouveau_gem_prime_pin,
  653. .gem_prime_unpin = nouveau_gem_prime_unpin,
  654. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  655. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  656. .gem_prime_vmap = nouveau_gem_prime_vmap,
  657. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  658. .gem_free_object = nouveau_gem_object_del,
  659. .gem_open_object = nouveau_gem_object_open,
  660. .gem_close_object = nouveau_gem_object_close,
  661. .dumb_create = nouveau_display_dumb_create,
  662. .dumb_map_offset = nouveau_display_dumb_map_offset,
  663. .dumb_destroy = drm_gem_dumb_destroy,
  664. .name = DRIVER_NAME,
  665. .desc = DRIVER_DESC,
  666. #ifdef GIT_REVISION
  667. .date = GIT_REVISION,
  668. #else
  669. .date = DRIVER_DATE,
  670. #endif
  671. .major = DRIVER_MAJOR,
  672. .minor = DRIVER_MINOR,
  673. .patchlevel = DRIVER_PATCHLEVEL,
  674. };
  675. static struct pci_device_id
  676. nouveau_drm_pci_table[] = {
  677. {
  678. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  679. .class = PCI_BASE_CLASS_DISPLAY << 16,
  680. .class_mask = 0xff << 16,
  681. },
  682. {
  683. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  684. .class = PCI_BASE_CLASS_DISPLAY << 16,
  685. .class_mask = 0xff << 16,
  686. },
  687. {}
  688. };
  689. static int nouveau_pmops_runtime_suspend(struct device *dev)
  690. {
  691. struct pci_dev *pdev = to_pci_dev(dev);
  692. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  693. int ret;
  694. if (nouveau_runtime_pm == 0)
  695. return -EINVAL;
  696. nv_debug_level(SILENT);
  697. drm_kms_helper_poll_disable(drm_dev);
  698. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  699. nouveau_switcheroo_optimus_dsm();
  700. ret = nouveau_do_suspend(drm_dev);
  701. pci_save_state(pdev);
  702. pci_disable_device(pdev);
  703. pci_set_power_state(pdev, PCI_D3cold);
  704. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  705. return ret;
  706. }
  707. static int nouveau_pmops_runtime_resume(struct device *dev)
  708. {
  709. struct pci_dev *pdev = to_pci_dev(dev);
  710. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  711. struct nouveau_device *device = nouveau_dev(drm_dev);
  712. int ret;
  713. if (nouveau_runtime_pm == 0)
  714. return -EINVAL;
  715. pci_set_power_state(pdev, PCI_D0);
  716. pci_restore_state(pdev);
  717. ret = pci_enable_device(pdev);
  718. if (ret)
  719. return ret;
  720. pci_set_master(pdev);
  721. ret = nouveau_do_resume(drm_dev);
  722. if (drm_dev->mode_config.num_crtc)
  723. nouveau_display_resume(drm_dev);
  724. drm_kms_helper_poll_enable(drm_dev);
  725. /* do magic */
  726. nv_mask(device, 0x88488, (1 << 25), (1 << 25));
  727. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  728. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  729. nv_debug_level(NORMAL);
  730. return ret;
  731. }
  732. static int nouveau_pmops_runtime_idle(struct device *dev)
  733. {
  734. struct pci_dev *pdev = to_pci_dev(dev);
  735. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  736. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  737. struct drm_crtc *crtc;
  738. if (nouveau_runtime_pm == 0)
  739. return -EBUSY;
  740. /* are we optimus enabled? */
  741. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  742. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  743. return -EBUSY;
  744. }
  745. /* if we have a hdmi audio device - make sure it has a driver loaded */
  746. if (drm->hdmi_device) {
  747. if (!drm->hdmi_device->driver) {
  748. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  749. pm_runtime_mark_last_busy(dev);
  750. return -EBUSY;
  751. }
  752. }
  753. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  754. if (crtc->enabled) {
  755. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  756. return -EBUSY;
  757. }
  758. }
  759. pm_runtime_mark_last_busy(dev);
  760. pm_runtime_autosuspend(dev);
  761. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  762. return 1;
  763. }
  764. static const struct dev_pm_ops nouveau_pm_ops = {
  765. .suspend = nouveau_pmops_suspend,
  766. .resume = nouveau_pmops_resume,
  767. .freeze = nouveau_pmops_freeze,
  768. .thaw = nouveau_pmops_thaw,
  769. .poweroff = nouveau_pmops_freeze,
  770. .restore = nouveau_pmops_resume,
  771. .runtime_suspend = nouveau_pmops_runtime_suspend,
  772. .runtime_resume = nouveau_pmops_runtime_resume,
  773. .runtime_idle = nouveau_pmops_runtime_idle,
  774. };
  775. static struct pci_driver
  776. nouveau_drm_pci_driver = {
  777. .name = "nouveau",
  778. .id_table = nouveau_drm_pci_table,
  779. .probe = nouveau_drm_probe,
  780. .remove = nouveau_drm_remove,
  781. .driver.pm = &nouveau_pm_ops,
  782. };
  783. static int __init
  784. nouveau_drm_init(void)
  785. {
  786. if (nouveau_modeset == -1) {
  787. #ifdef CONFIG_VGA_CONSOLE
  788. if (vgacon_text_force())
  789. nouveau_modeset = 0;
  790. #endif
  791. }
  792. if (!nouveau_modeset)
  793. return 0;
  794. nouveau_register_dsm_handler();
  795. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  796. }
  797. static void __exit
  798. nouveau_drm_exit(void)
  799. {
  800. if (!nouveau_modeset)
  801. return;
  802. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  803. nouveau_unregister_dsm_handler();
  804. }
  805. module_init(nouveau_drm_init);
  806. module_exit(nouveau_drm_exit);
  807. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  808. MODULE_AUTHOR(DRIVER_AUTHOR);
  809. MODULE_DESCRIPTION(DRIVER_DESC);
  810. MODULE_LICENSE("GPL and additional rights");