qla_init.c 100 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2005 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. /* XXX(hch): this is ugly, but we don't want to pull in exioctl.h */
  12. #ifndef EXT_IS_LUN_BIT_SET
  13. #define EXT_IS_LUN_BIT_SET(P,L) \
  14. (((P)->mask[L/8] & (0x80 >> (L%8)))?1:0)
  15. #define EXT_SET_LUN_BIT(P,L) \
  16. ((P)->mask[L/8] |= (0x80 >> (L%8)))
  17. #endif
  18. /*
  19. * QLogic ISP2x00 Hardware Support Function Prototypes.
  20. */
  21. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  22. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  23. static int qla2x00_setup_chip(scsi_qla_host_t *);
  24. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  25. static int qla2x00_init_rings(scsi_qla_host_t *);
  26. static int qla2x00_fw_ready(scsi_qla_host_t *);
  27. static int qla2x00_configure_hba(scsi_qla_host_t *);
  28. static int qla2x00_configure_loop(scsi_qla_host_t *);
  29. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  30. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  31. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  32. static int qla2x00_device_resync(scsi_qla_host_t *);
  33. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  34. uint16_t *);
  35. static int qla2x00_restart_isp(scsi_qla_host_t *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  51. {
  52. int rval;
  53. uint8_t restart_risc = 0;
  54. uint8_t retry;
  55. uint32_t wait_time;
  56. /* Clear adapter flags. */
  57. ha->flags.online = 0;
  58. ha->flags.reset_active = 0;
  59. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  60. atomic_set(&ha->loop_state, LOOP_DOWN);
  61. ha->device_flags = 0;
  62. ha->dpc_flags = 0;
  63. ha->flags.management_server_logged_in = 0;
  64. ha->marker_needed = 0;
  65. ha->mbx_flags = 0;
  66. ha->isp_abort_cnt = 0;
  67. ha->beacon_blink_led = 0;
  68. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops.pci_config(ha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space=n",
  73. ha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops.reset_chip(ha);
  77. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  78. ha->isp_ops.nvram_config(ha);
  79. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  80. retry = 10;
  81. /*
  82. * Try to configure the loop.
  83. */
  84. do {
  85. restart_risc = 0;
  86. /* If firmware needs to be loaded */
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. if ((rval = ha->isp_ops.chip_diag(ha)) == QLA_SUCCESS) {
  89. rval = qla2x00_setup_chip(ha);
  90. }
  91. }
  92. if (rval == QLA_SUCCESS &&
  93. (rval = qla2x00_init_rings(ha)) == QLA_SUCCESS) {
  94. check_fw_ready_again:
  95. /*
  96. * Wait for a successful LIP up to a maximum
  97. * of (in seconds): RISC login timeout value,
  98. * RISC retry count value, and port down retry
  99. * value OR a minimum of 4 seconds OR If no
  100. * cable, only 5 seconds.
  101. */
  102. rval = qla2x00_fw_ready(ha);
  103. if (rval == QLA_SUCCESS) {
  104. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  105. /* Issue a marker after FW becomes ready. */
  106. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  107. /*
  108. * Wait at most MAX_TARGET RSCNs for a stable
  109. * link.
  110. */
  111. wait_time = 256;
  112. do {
  113. clear_bit(LOOP_RESYNC_NEEDED,
  114. &ha->dpc_flags);
  115. rval = qla2x00_configure_loop(ha);
  116. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  117. &ha->dpc_flags)) {
  118. restart_risc = 1;
  119. break;
  120. }
  121. /*
  122. * If loop state change while we were
  123. * discoverying devices then wait for
  124. * LIP to complete
  125. */
  126. if (atomic_read(&ha->loop_state) !=
  127. LOOP_READY && retry--) {
  128. goto check_fw_ready_again;
  129. }
  130. wait_time--;
  131. } while (!atomic_read(&ha->loop_down_timer) &&
  132. retry &&
  133. wait_time &&
  134. (test_bit(LOOP_RESYNC_NEEDED,
  135. &ha->dpc_flags)));
  136. if (wait_time == 0)
  137. rval = QLA_FUNCTION_FAILED;
  138. } else if (ha->device_flags & DFLG_NO_CABLE)
  139. /* If no cable, then all is good. */
  140. rval = QLA_SUCCESS;
  141. }
  142. } while (restart_risc && retry--);
  143. if (rval == QLA_SUCCESS) {
  144. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  145. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  146. ha->marker_needed = 0;
  147. ha->flags.online = 1;
  148. } else {
  149. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  150. }
  151. return (rval);
  152. }
  153. /**
  154. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  155. * @ha: HA context
  156. *
  157. * Returns 0 on success.
  158. */
  159. int
  160. qla2100_pci_config(scsi_qla_host_t *ha)
  161. {
  162. uint16_t w, mwi;
  163. uint32_t d;
  164. unsigned long flags;
  165. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  166. pci_set_master(ha->pdev);
  167. mwi = 0;
  168. if (pci_set_mwi(ha->pdev))
  169. mwi = PCI_COMMAND_INVALIDATE;
  170. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  171. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  172. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  173. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  174. /* Reset expansion ROM address decode enable */
  175. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  176. d &= ~PCI_ROM_ADDRESS_ENABLE;
  177. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  178. /* Get PCI bus information. */
  179. spin_lock_irqsave(&ha->hardware_lock, flags);
  180. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  181. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  182. return QLA_SUCCESS;
  183. }
  184. /**
  185. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  186. * @ha: HA context
  187. *
  188. * Returns 0 on success.
  189. */
  190. int
  191. qla2300_pci_config(scsi_qla_host_t *ha)
  192. {
  193. uint16_t w, mwi;
  194. uint32_t d;
  195. unsigned long flags = 0;
  196. uint32_t cnt;
  197. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  198. pci_set_master(ha->pdev);
  199. mwi = 0;
  200. if (pci_set_mwi(ha->pdev))
  201. mwi = PCI_COMMAND_INVALIDATE;
  202. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  203. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  204. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  205. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  206. w &= ~PCI_COMMAND_INTX_DISABLE;
  207. /*
  208. * If this is a 2300 card and not 2312, reset the
  209. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  210. * the 2310 also reports itself as a 2300 so we need to get the
  211. * fb revision level -- a 6 indicates it really is a 2300 and
  212. * not a 2310.
  213. */
  214. if (IS_QLA2300(ha)) {
  215. spin_lock_irqsave(&ha->hardware_lock, flags);
  216. /* Pause RISC. */
  217. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  218. for (cnt = 0; cnt < 30000; cnt++) {
  219. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  220. break;
  221. udelay(10);
  222. }
  223. /* Select FPM registers. */
  224. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  225. RD_REG_WORD(&reg->ctrl_status);
  226. /* Get the fb rev level */
  227. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  228. if (ha->fb_rev == FPM_2300)
  229. w &= ~PCI_COMMAND_INVALIDATE;
  230. /* Deselect FPM registers. */
  231. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  232. RD_REG_WORD(&reg->ctrl_status);
  233. /* Release RISC module. */
  234. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  235. for (cnt = 0; cnt < 30000; cnt++) {
  236. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  237. break;
  238. udelay(10);
  239. }
  240. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  241. }
  242. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  243. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  244. /* Reset expansion ROM address decode enable */
  245. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  246. d &= ~PCI_ROM_ADDRESS_ENABLE;
  247. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  248. /* Get PCI bus information. */
  249. spin_lock_irqsave(&ha->hardware_lock, flags);
  250. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  251. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  252. return QLA_SUCCESS;
  253. }
  254. /**
  255. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  256. * @ha: HA context
  257. *
  258. * Returns 0 on success.
  259. */
  260. int
  261. qla24xx_pci_config(scsi_qla_host_t *ha)
  262. {
  263. uint16_t w, mwi;
  264. uint32_t d;
  265. unsigned long flags = 0;
  266. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  267. int pcix_cmd_reg, pcie_dctl_reg;
  268. pci_set_master(ha->pdev);
  269. mwi = 0;
  270. if (pci_set_mwi(ha->pdev))
  271. mwi = PCI_COMMAND_INVALIDATE;
  272. pci_read_config_word(ha->pdev, PCI_REVISION_ID, &ha->revision);
  273. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  274. w |= mwi | (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  275. w &= ~PCI_COMMAND_INTX_DISABLE;
  276. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  277. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  278. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  279. pcix_cmd_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX);
  280. if (pcix_cmd_reg) {
  281. uint16_t pcix_cmd;
  282. pcix_cmd_reg += PCI_X_CMD;
  283. pci_read_config_word(ha->pdev, pcix_cmd_reg, &pcix_cmd);
  284. pcix_cmd &= ~PCI_X_CMD_MAX_READ;
  285. pcix_cmd |= 0x0008;
  286. pci_write_config_word(ha->pdev, pcix_cmd_reg, pcix_cmd);
  287. }
  288. /* PCIe -- adjust Maximum Read Request Size (2048). */
  289. pcie_dctl_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  290. if (pcie_dctl_reg) {
  291. uint16_t pcie_dctl;
  292. pcie_dctl_reg += PCI_EXP_DEVCTL;
  293. pci_read_config_word(ha->pdev, pcie_dctl_reg, &pcie_dctl);
  294. pcie_dctl &= ~PCI_EXP_DEVCTL_READRQ;
  295. pcie_dctl |= 0x4000;
  296. pci_write_config_word(ha->pdev, pcie_dctl_reg, pcie_dctl);
  297. }
  298. /* Reset expansion ROM address decode enable */
  299. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  300. d &= ~PCI_ROM_ADDRESS_ENABLE;
  301. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  302. /* Get PCI bus information. */
  303. spin_lock_irqsave(&ha->hardware_lock, flags);
  304. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  305. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  306. return QLA_SUCCESS;
  307. }
  308. /**
  309. * qla2x00_isp_firmware() - Choose firmware image.
  310. * @ha: HA context
  311. *
  312. * Returns 0 on success.
  313. */
  314. static int
  315. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  316. {
  317. int rval;
  318. /* Assume loading risc code */
  319. rval = QLA_FUNCTION_FAILED;
  320. if (ha->flags.disable_risc_code_load) {
  321. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  322. ha->host_no));
  323. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  324. /* Verify checksum of loaded RISC code. */
  325. rval = qla2x00_verify_checksum(ha,
  326. IS_QLA24XX(ha) || IS_QLA25XX(ha) ? RISC_SADDRESS :
  327. *ha->brd_info->fw_info[0].fwstart);
  328. }
  329. if (rval) {
  330. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  331. ha->host_no));
  332. }
  333. return (rval);
  334. }
  335. /**
  336. * qla2x00_reset_chip() - Reset ISP chip.
  337. * @ha: HA context
  338. *
  339. * Returns 0 on success.
  340. */
  341. void
  342. qla2x00_reset_chip(scsi_qla_host_t *ha)
  343. {
  344. unsigned long flags = 0;
  345. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  346. uint32_t cnt;
  347. unsigned long mbx_flags = 0;
  348. uint16_t cmd;
  349. ha->isp_ops.disable_intrs(ha);
  350. spin_lock_irqsave(&ha->hardware_lock, flags);
  351. /* Turn off master enable */
  352. cmd = 0;
  353. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  354. cmd &= ~PCI_COMMAND_MASTER;
  355. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  356. if (!IS_QLA2100(ha)) {
  357. /* Pause RISC. */
  358. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  359. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  360. for (cnt = 0; cnt < 30000; cnt++) {
  361. if ((RD_REG_WORD(&reg->hccr) &
  362. HCCR_RISC_PAUSE) != 0)
  363. break;
  364. udelay(100);
  365. }
  366. } else {
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. udelay(10);
  369. }
  370. /* Select FPM registers. */
  371. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  372. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  373. /* FPM Soft Reset. */
  374. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  375. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  376. /* Toggle Fpm Reset. */
  377. if (!IS_QLA2200(ha)) {
  378. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  379. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  380. }
  381. /* Select frame buffer registers. */
  382. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  383. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  384. /* Reset frame buffer FIFOs. */
  385. if (IS_QLA2200(ha)) {
  386. WRT_FB_CMD_REG(ha, reg, 0xa000);
  387. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  388. } else {
  389. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  390. /* Read back fb_cmd until zero or 3 seconds max */
  391. for (cnt = 0; cnt < 3000; cnt++) {
  392. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  393. break;
  394. udelay(100);
  395. }
  396. }
  397. /* Select RISC module registers. */
  398. WRT_REG_WORD(&reg->ctrl_status, 0);
  399. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  400. /* Reset RISC processor. */
  401. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  402. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  403. /* Release RISC processor. */
  404. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  405. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  406. }
  407. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  408. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  409. /* Reset ISP chip. */
  410. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  411. /* Wait for RISC to recover from reset. */
  412. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  413. /*
  414. * It is necessary to for a delay here since the card doesn't
  415. * respond to PCI reads during a reset. On some architectures
  416. * this will result in an MCA.
  417. */
  418. udelay(20);
  419. for (cnt = 30000; cnt; cnt--) {
  420. if ((RD_REG_WORD(&reg->ctrl_status) &
  421. CSR_ISP_SOFT_RESET) == 0)
  422. break;
  423. udelay(100);
  424. }
  425. } else
  426. udelay(10);
  427. /* Reset RISC processor. */
  428. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  429. WRT_REG_WORD(&reg->semaphore, 0);
  430. /* Release RISC processor. */
  431. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  432. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  433. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  434. for (cnt = 0; cnt < 30000; cnt++) {
  435. if (!(test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags)))
  436. spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
  437. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) {
  438. if (!(test_bit(ABORT_ISP_ACTIVE,
  439. &ha->dpc_flags)))
  440. spin_unlock_irqrestore(
  441. &ha->mbx_reg_lock, mbx_flags);
  442. break;
  443. }
  444. if (!(test_bit(ABORT_ISP_ACTIVE, &ha->dpc_flags)))
  445. spin_unlock_irqrestore(&ha->mbx_reg_lock,
  446. mbx_flags);
  447. udelay(100);
  448. }
  449. } else
  450. udelay(100);
  451. /* Turn on master enable */
  452. cmd |= PCI_COMMAND_MASTER;
  453. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  454. /* Disable RISC pause on FPM parity error. */
  455. if (!IS_QLA2100(ha)) {
  456. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  457. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  458. }
  459. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  460. }
  461. /**
  462. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  463. * @ha: HA context
  464. *
  465. * Returns 0 on success.
  466. */
  467. static inline void
  468. qla24xx_reset_risc(scsi_qla_host_t *ha)
  469. {
  470. unsigned long flags = 0;
  471. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  472. uint32_t cnt, d2;
  473. uint16_t wd;
  474. spin_lock_irqsave(&ha->hardware_lock, flags);
  475. /* Reset RISC. */
  476. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  477. for (cnt = 0; cnt < 30000; cnt++) {
  478. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  479. break;
  480. udelay(10);
  481. }
  482. WRT_REG_DWORD(&reg->ctrl_status,
  483. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  484. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  485. udelay(100);
  486. /* Wait for firmware to complete NVRAM accesses. */
  487. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  488. for (cnt = 10000 ; cnt && d2; cnt--) {
  489. udelay(5);
  490. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  491. barrier();
  492. }
  493. /* Wait for soft-reset to complete. */
  494. d2 = RD_REG_DWORD(&reg->ctrl_status);
  495. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  496. udelay(5);
  497. d2 = RD_REG_DWORD(&reg->ctrl_status);
  498. barrier();
  499. }
  500. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  501. RD_REG_DWORD(&reg->hccr);
  502. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  503. RD_REG_DWORD(&reg->hccr);
  504. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  505. RD_REG_DWORD(&reg->hccr);
  506. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  507. for (cnt = 6000000 ; cnt && d2; cnt--) {
  508. udelay(5);
  509. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  510. barrier();
  511. }
  512. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  513. }
  514. /**
  515. * qla24xx_reset_chip() - Reset ISP24xx chip.
  516. * @ha: HA context
  517. *
  518. * Returns 0 on success.
  519. */
  520. void
  521. qla24xx_reset_chip(scsi_qla_host_t *ha)
  522. {
  523. ha->isp_ops.disable_intrs(ha);
  524. /* Perform RISC reset. */
  525. qla24xx_reset_risc(ha);
  526. }
  527. /**
  528. * qla2x00_chip_diag() - Test chip for proper operation.
  529. * @ha: HA context
  530. *
  531. * Returns 0 on success.
  532. */
  533. int
  534. qla2x00_chip_diag(scsi_qla_host_t *ha)
  535. {
  536. int rval;
  537. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  538. unsigned long flags = 0;
  539. uint16_t data;
  540. uint32_t cnt;
  541. uint16_t mb[5];
  542. /* Assume a failed state */
  543. rval = QLA_FUNCTION_FAILED;
  544. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  545. ha->host_no, (u_long)&reg->flash_address));
  546. spin_lock_irqsave(&ha->hardware_lock, flags);
  547. /* Reset ISP chip. */
  548. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  549. /*
  550. * We need to have a delay here since the card will not respond while
  551. * in reset causing an MCA on some architectures.
  552. */
  553. udelay(20);
  554. data = qla2x00_debounce_register(&reg->ctrl_status);
  555. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  556. udelay(5);
  557. data = RD_REG_WORD(&reg->ctrl_status);
  558. barrier();
  559. }
  560. if (!cnt)
  561. goto chip_diag_failed;
  562. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  563. ha->host_no));
  564. /* Reset RISC processor. */
  565. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  566. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  567. /* Workaround for QLA2312 PCI parity error */
  568. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  569. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  570. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  571. udelay(5);
  572. data = RD_MAILBOX_REG(ha, reg, 0);
  573. barrier();
  574. }
  575. } else
  576. udelay(10);
  577. if (!cnt)
  578. goto chip_diag_failed;
  579. /* Check product ID of chip */
  580. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  581. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  582. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  583. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  584. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  585. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  586. mb[3] != PROD_ID_3) {
  587. qla_printk(KERN_WARNING, ha,
  588. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  589. goto chip_diag_failed;
  590. }
  591. ha->product_id[0] = mb[1];
  592. ha->product_id[1] = mb[2];
  593. ha->product_id[2] = mb[3];
  594. ha->product_id[3] = mb[4];
  595. /* Adjust fw RISC transfer size */
  596. if (ha->request_q_length > 1024)
  597. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  598. else
  599. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  600. ha->request_q_length;
  601. if (IS_QLA2200(ha) &&
  602. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  603. /* Limit firmware transfer size with a 2200A */
  604. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  605. ha->host_no));
  606. ha->fw_transfer_size = 128;
  607. }
  608. /* Wrap Incoming Mailboxes Test. */
  609. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  610. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  611. rval = qla2x00_mbx_reg_test(ha);
  612. if (rval) {
  613. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  614. ha->host_no));
  615. qla_printk(KERN_WARNING, ha,
  616. "Failed mailbox send register test\n");
  617. }
  618. else {
  619. /* Flag a successful rval */
  620. rval = QLA_SUCCESS;
  621. }
  622. spin_lock_irqsave(&ha->hardware_lock, flags);
  623. chip_diag_failed:
  624. if (rval)
  625. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  626. "****\n", ha->host_no));
  627. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  628. return (rval);
  629. }
  630. /**
  631. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  632. * @ha: HA context
  633. *
  634. * Returns 0 on success.
  635. */
  636. int
  637. qla24xx_chip_diag(scsi_qla_host_t *ha)
  638. {
  639. int rval;
  640. /* Perform RISC reset. */
  641. qla24xx_reset_risc(ha);
  642. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  643. rval = qla2x00_mbx_reg_test(ha);
  644. if (rval) {
  645. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  646. ha->host_no));
  647. qla_printk(KERN_WARNING, ha,
  648. "Failed mailbox send register test\n");
  649. } else {
  650. /* Flag a successful rval */
  651. rval = QLA_SUCCESS;
  652. }
  653. return rval;
  654. }
  655. static void
  656. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  657. {
  658. ha->fw_dumped = 0;
  659. ha->fw_dump24_len = sizeof(struct qla24xx_fw_dump);
  660. ha->fw_dump24_len += (ha->fw_memory_size - 0x100000) * sizeof(uint32_t);
  661. ha->fw_dump24 = vmalloc(ha->fw_dump24_len);
  662. if (ha->fw_dump24)
  663. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware "
  664. "dump...\n", ha->fw_dump24_len / 1024);
  665. else
  666. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  667. "firmware dump!!!\n", ha->fw_dump24_len / 1024);
  668. }
  669. /**
  670. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  671. * @ha: HA context
  672. *
  673. * Returns 0 on success.
  674. */
  675. static void
  676. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  677. {
  678. int rval;
  679. uint16_t fw_iocb_cnt = 0;
  680. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  681. dma_addr_t request_dma;
  682. request_t *request_ring;
  683. /* Valid only on recent ISPs. */
  684. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  685. return;
  686. if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
  687. qla2x00_alloc_fw_dump(ha);
  688. /* Retrieve IOCB counts available to the firmware. */
  689. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt);
  690. if (rval)
  691. return;
  692. /* No point in continuing if current settings are sufficient. */
  693. if (fw_iocb_cnt < 1024)
  694. return;
  695. if (ha->request_q_length >= request_q_length)
  696. return;
  697. /* Attempt to claim larger area for request queue. */
  698. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  699. (request_q_length + 1) * sizeof(request_t), &request_dma,
  700. GFP_KERNEL);
  701. if (request_ring == NULL)
  702. return;
  703. /* Resize successful, report extensions. */
  704. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  705. (ha->fw_memory_size + 1) / 1024);
  706. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  707. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  708. /* Clear old allocations. */
  709. dma_free_coherent(&ha->pdev->dev,
  710. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  711. ha->request_dma);
  712. /* Begin using larger queue. */
  713. ha->request_q_length = request_q_length;
  714. ha->request_ring = request_ring;
  715. ha->request_dma = request_dma;
  716. }
  717. /**
  718. * qla2x00_setup_chip() - Load and start RISC firmware.
  719. * @ha: HA context
  720. *
  721. * Returns 0 on success.
  722. */
  723. static int
  724. qla2x00_setup_chip(scsi_qla_host_t *ha)
  725. {
  726. int rval;
  727. uint32_t srisc_address = 0;
  728. /* Load firmware sequences */
  729. rval = ha->isp_ops.load_risc(ha, &srisc_address);
  730. if (rval == QLA_SUCCESS) {
  731. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  732. "code.\n", ha->host_no));
  733. rval = qla2x00_verify_checksum(ha, srisc_address);
  734. if (rval == QLA_SUCCESS) {
  735. /* Start firmware execution. */
  736. DEBUG(printk("scsi(%ld): Checksum OK, start "
  737. "firmware.\n", ha->host_no));
  738. rval = qla2x00_execute_fw(ha, srisc_address);
  739. /* Retrieve firmware information. */
  740. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  741. qla2x00_get_fw_version(ha,
  742. &ha->fw_major_version,
  743. &ha->fw_minor_version,
  744. &ha->fw_subminor_version,
  745. &ha->fw_attributes, &ha->fw_memory_size);
  746. qla2x00_resize_request_q(ha);
  747. }
  748. } else {
  749. DEBUG2(printk(KERN_INFO
  750. "scsi(%ld): ISP Firmware failed checksum.\n",
  751. ha->host_no));
  752. }
  753. }
  754. if (rval) {
  755. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  756. ha->host_no));
  757. }
  758. return (rval);
  759. }
  760. /**
  761. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  762. * @ha: HA context
  763. *
  764. * Beginning of request ring has initialization control block already built
  765. * by nvram config routine.
  766. *
  767. * Returns 0 on success.
  768. */
  769. static void
  770. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  771. {
  772. uint16_t cnt;
  773. response_t *pkt;
  774. pkt = ha->response_ring_ptr;
  775. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  776. pkt->signature = RESPONSE_PROCESSED;
  777. pkt++;
  778. }
  779. }
  780. /**
  781. * qla2x00_update_fw_options() - Read and process firmware options.
  782. * @ha: HA context
  783. *
  784. * Returns 0 on success.
  785. */
  786. void
  787. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  788. {
  789. uint16_t swing, emphasis, tx_sens, rx_sens;
  790. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  791. qla2x00_get_fw_options(ha, ha->fw_options);
  792. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  793. return;
  794. /* Serial Link options. */
  795. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  796. ha->host_no));
  797. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  798. sizeof(ha->fw_seriallink_options)));
  799. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  800. if (ha->fw_seriallink_options[3] & BIT_2) {
  801. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  802. /* 1G settings */
  803. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  804. emphasis = (ha->fw_seriallink_options[2] &
  805. (BIT_4 | BIT_3)) >> 3;
  806. tx_sens = ha->fw_seriallink_options[0] &
  807. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  808. rx_sens = (ha->fw_seriallink_options[0] &
  809. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  810. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  811. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  812. if (rx_sens == 0x0)
  813. rx_sens = 0x3;
  814. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  815. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  816. ha->fw_options[10] |= BIT_5 |
  817. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  818. (tx_sens & (BIT_1 | BIT_0));
  819. /* 2G settings */
  820. swing = (ha->fw_seriallink_options[2] &
  821. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  822. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  823. tx_sens = ha->fw_seriallink_options[1] &
  824. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  825. rx_sens = (ha->fw_seriallink_options[1] &
  826. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  827. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  828. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  829. if (rx_sens == 0x0)
  830. rx_sens = 0x3;
  831. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  832. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  833. ha->fw_options[11] |= BIT_5 |
  834. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  835. (tx_sens & (BIT_1 | BIT_0));
  836. }
  837. /* FCP2 options. */
  838. /* Return command IOCBs without waiting for an ABTS to complete. */
  839. ha->fw_options[3] |= BIT_13;
  840. /* LED scheme. */
  841. if (ha->flags.enable_led_scheme)
  842. ha->fw_options[2] |= BIT_12;
  843. /* Update firmware options. */
  844. qla2x00_set_fw_options(ha, ha->fw_options);
  845. }
  846. void
  847. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  848. {
  849. int rval;
  850. /* Update Serial Link options. */
  851. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  852. return;
  853. rval = qla2x00_set_serdes_params(ha,
  854. le16_to_cpu(ha->fw_seriallink_options24[1]),
  855. le16_to_cpu(ha->fw_seriallink_options24[2]),
  856. le16_to_cpu(ha->fw_seriallink_options24[3]));
  857. if (rval != QLA_SUCCESS) {
  858. qla_printk(KERN_WARNING, ha,
  859. "Unable to update Serial Link options (%x).\n", rval);
  860. }
  861. }
  862. void
  863. qla2x00_config_rings(struct scsi_qla_host *ha)
  864. {
  865. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  866. /* Setup ring parameters in initialization control block. */
  867. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  868. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  869. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  870. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  871. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  872. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  873. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  874. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  875. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  876. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  877. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  878. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  879. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  880. }
  881. void
  882. qla24xx_config_rings(struct scsi_qla_host *ha)
  883. {
  884. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  885. struct init_cb_24xx *icb;
  886. /* Setup ring parameters in initialization control block. */
  887. icb = (struct init_cb_24xx *)ha->init_cb;
  888. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  889. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  890. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  891. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  892. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  893. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  894. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  895. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  896. WRT_REG_DWORD(&reg->req_q_in, 0);
  897. WRT_REG_DWORD(&reg->req_q_out, 0);
  898. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  899. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  900. RD_REG_DWORD(&reg->rsp_q_out);
  901. }
  902. /**
  903. * qla2x00_init_rings() - Initializes firmware.
  904. * @ha: HA context
  905. *
  906. * Beginning of request ring has initialization control block already built
  907. * by nvram config routine.
  908. *
  909. * Returns 0 on success.
  910. */
  911. static int
  912. qla2x00_init_rings(scsi_qla_host_t *ha)
  913. {
  914. int rval;
  915. unsigned long flags = 0;
  916. int cnt;
  917. spin_lock_irqsave(&ha->hardware_lock, flags);
  918. /* Clear outstanding commands array. */
  919. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  920. ha->outstanding_cmds[cnt] = NULL;
  921. ha->current_outstanding_cmd = 0;
  922. /* Clear RSCN queue. */
  923. ha->rscn_in_ptr = 0;
  924. ha->rscn_out_ptr = 0;
  925. /* Initialize firmware. */
  926. ha->request_ring_ptr = ha->request_ring;
  927. ha->req_ring_index = 0;
  928. ha->req_q_cnt = ha->request_q_length;
  929. ha->response_ring_ptr = ha->response_ring;
  930. ha->rsp_ring_index = 0;
  931. /* Initialize response queue entries */
  932. qla2x00_init_response_q_entries(ha);
  933. ha->isp_ops.config_rings(ha);
  934. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  935. /* Update any ISP specific firmware options before initialization. */
  936. ha->isp_ops.update_fw_options(ha);
  937. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  938. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  939. if (rval) {
  940. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  941. ha->host_no));
  942. } else {
  943. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  944. ha->host_no));
  945. }
  946. return (rval);
  947. }
  948. /**
  949. * qla2x00_fw_ready() - Waits for firmware ready.
  950. * @ha: HA context
  951. *
  952. * Returns 0 on success.
  953. */
  954. static int
  955. qla2x00_fw_ready(scsi_qla_host_t *ha)
  956. {
  957. int rval;
  958. unsigned long wtime, mtime;
  959. uint16_t min_wait; /* Minimum wait time if loop is down */
  960. uint16_t wait_time; /* Wait time if loop is coming ready */
  961. uint16_t fw_state;
  962. rval = QLA_SUCCESS;
  963. /* 20 seconds for loop down. */
  964. min_wait = 20;
  965. /*
  966. * Firmware should take at most one RATOV to login, plus 5 seconds for
  967. * our own processing.
  968. */
  969. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  970. wait_time = min_wait;
  971. }
  972. /* Min wait time if loop down */
  973. mtime = jiffies + (min_wait * HZ);
  974. /* wait time before firmware ready */
  975. wtime = jiffies + (wait_time * HZ);
  976. /* Wait for ISP to finish LIP */
  977. if (!ha->flags.init_done)
  978. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  979. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  980. ha->host_no));
  981. do {
  982. rval = qla2x00_get_firmware_state(ha, &fw_state);
  983. if (rval == QLA_SUCCESS) {
  984. if (fw_state < FSTATE_LOSS_OF_SYNC) {
  985. ha->device_flags &= ~DFLG_NO_CABLE;
  986. }
  987. if (fw_state == FSTATE_READY) {
  988. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  989. ha->host_no));
  990. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  991. &ha->login_timeout, &ha->r_a_tov);
  992. rval = QLA_SUCCESS;
  993. break;
  994. }
  995. rval = QLA_FUNCTION_FAILED;
  996. if (atomic_read(&ha->loop_down_timer) &&
  997. (fw_state >= FSTATE_LOSS_OF_SYNC ||
  998. fw_state == FSTATE_WAIT_AL_PA)) {
  999. /* Loop down. Timeout on min_wait for states
  1000. * other than Wait for Login.
  1001. */
  1002. if (time_after_eq(jiffies, mtime)) {
  1003. qla_printk(KERN_INFO, ha,
  1004. "Cable is unplugged...\n");
  1005. ha->device_flags |= DFLG_NO_CABLE;
  1006. break;
  1007. }
  1008. }
  1009. } else {
  1010. /* Mailbox cmd failed. Timeout on min_wait. */
  1011. if (time_after_eq(jiffies, mtime))
  1012. break;
  1013. }
  1014. if (time_after_eq(jiffies, wtime))
  1015. break;
  1016. /* Delay for a while */
  1017. msleep(500);
  1018. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1019. ha->host_no, fw_state, jiffies));
  1020. } while (1);
  1021. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1022. ha->host_no, fw_state, jiffies));
  1023. if (rval) {
  1024. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1025. ha->host_no));
  1026. }
  1027. return (rval);
  1028. }
  1029. /*
  1030. * qla2x00_configure_hba
  1031. * Setup adapter context.
  1032. *
  1033. * Input:
  1034. * ha = adapter state pointer.
  1035. *
  1036. * Returns:
  1037. * 0 = success
  1038. *
  1039. * Context:
  1040. * Kernel context.
  1041. */
  1042. static int
  1043. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1044. {
  1045. int rval;
  1046. uint16_t loop_id;
  1047. uint16_t topo;
  1048. uint8_t al_pa;
  1049. uint8_t area;
  1050. uint8_t domain;
  1051. char connect_type[22];
  1052. /* Get host addresses. */
  1053. rval = qla2x00_get_adapter_id(ha,
  1054. &loop_id, &al_pa, &area, &domain, &topo);
  1055. if (rval != QLA_SUCCESS) {
  1056. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1057. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1058. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1059. __func__, ha->host_no));
  1060. } else {
  1061. qla_printk(KERN_WARNING, ha,
  1062. "ERROR -- Unable to get host loop ID.\n");
  1063. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1064. }
  1065. return (rval);
  1066. }
  1067. if (topo == 4) {
  1068. qla_printk(KERN_INFO, ha,
  1069. "Cannot get topology - retrying.\n");
  1070. return (QLA_FUNCTION_FAILED);
  1071. }
  1072. ha->loop_id = loop_id;
  1073. /* initialize */
  1074. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1075. ha->operating_mode = LOOP;
  1076. switch (topo) {
  1077. case 0:
  1078. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1079. ha->host_no));
  1080. ha->current_topology = ISP_CFG_NL;
  1081. strcpy(connect_type, "(Loop)");
  1082. break;
  1083. case 1:
  1084. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1085. ha->host_no));
  1086. ha->current_topology = ISP_CFG_FL;
  1087. strcpy(connect_type, "(FL_Port)");
  1088. break;
  1089. case 2:
  1090. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1091. ha->host_no));
  1092. ha->operating_mode = P2P;
  1093. ha->current_topology = ISP_CFG_N;
  1094. strcpy(connect_type, "(N_Port-to-N_Port)");
  1095. break;
  1096. case 3:
  1097. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1098. ha->host_no));
  1099. ha->operating_mode = P2P;
  1100. ha->current_topology = ISP_CFG_F;
  1101. strcpy(connect_type, "(F_Port)");
  1102. break;
  1103. default:
  1104. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1105. "Using NL.\n",
  1106. ha->host_no, topo));
  1107. ha->current_topology = ISP_CFG_NL;
  1108. strcpy(connect_type, "(Loop)");
  1109. break;
  1110. }
  1111. /* Save Host port and loop ID. */
  1112. /* byte order - Big Endian */
  1113. ha->d_id.b.domain = domain;
  1114. ha->d_id.b.area = area;
  1115. ha->d_id.b.al_pa = al_pa;
  1116. if (!ha->flags.init_done)
  1117. qla_printk(KERN_INFO, ha,
  1118. "Topology - %s, Host Loop address 0x%x\n",
  1119. connect_type, ha->loop_id);
  1120. if (rval) {
  1121. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1122. } else {
  1123. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1124. }
  1125. return(rval);
  1126. }
  1127. /*
  1128. * NVRAM configuration for ISP 2xxx
  1129. *
  1130. * Input:
  1131. * ha = adapter block pointer.
  1132. *
  1133. * Output:
  1134. * initialization control block in response_ring
  1135. * host adapters parameters in host adapter block
  1136. *
  1137. * Returns:
  1138. * 0 = success.
  1139. */
  1140. int
  1141. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1142. {
  1143. int rval;
  1144. uint8_t chksum = 0;
  1145. uint16_t cnt;
  1146. uint8_t *dptr1, *dptr2;
  1147. init_cb_t *icb = ha->init_cb;
  1148. nvram_t *nv = (nvram_t *)ha->request_ring;
  1149. uint8_t *ptr = (uint8_t *)ha->request_ring;
  1150. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1151. rval = QLA_SUCCESS;
  1152. /* Determine NVRAM starting address. */
  1153. ha->nvram_size = sizeof(nvram_t);
  1154. ha->nvram_base = 0;
  1155. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1156. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1157. ha->nvram_base = 0x80;
  1158. /* Get NVRAM data and calculate checksum. */
  1159. ha->isp_ops.read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1160. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1161. chksum += *ptr++;
  1162. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1163. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  1164. ha->nvram_size));
  1165. /* Bad NVRAM data, set defaults parameters. */
  1166. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1167. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1168. /* Reset NVRAM data. */
  1169. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1170. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1171. nv->nvram_version);
  1172. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1173. "invalid -- WWPN) defaults.\n");
  1174. /*
  1175. * Set default initialization control block.
  1176. */
  1177. memset(nv, 0, ha->nvram_size);
  1178. nv->parameter_block_version = ICB_VERSION;
  1179. if (IS_QLA23XX(ha)) {
  1180. nv->firmware_options[0] = BIT_2 | BIT_1;
  1181. nv->firmware_options[1] = BIT_7 | BIT_5;
  1182. nv->add_firmware_options[0] = BIT_5;
  1183. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1184. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1185. nv->special_options[1] = BIT_7;
  1186. } else if (IS_QLA2200(ha)) {
  1187. nv->firmware_options[0] = BIT_2 | BIT_1;
  1188. nv->firmware_options[1] = BIT_7 | BIT_5;
  1189. nv->add_firmware_options[0] = BIT_5;
  1190. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1191. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1192. } else if (IS_QLA2100(ha)) {
  1193. nv->firmware_options[0] = BIT_3 | BIT_1;
  1194. nv->firmware_options[1] = BIT_5;
  1195. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1196. }
  1197. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1198. nv->execution_throttle = __constant_cpu_to_le16(16);
  1199. nv->retry_count = 8;
  1200. nv->retry_delay = 1;
  1201. nv->port_name[0] = 33;
  1202. nv->port_name[3] = 224;
  1203. nv->port_name[4] = 139;
  1204. nv->login_timeout = 4;
  1205. /*
  1206. * Set default host adapter parameters
  1207. */
  1208. nv->host_p[1] = BIT_2;
  1209. nv->reset_delay = 5;
  1210. nv->port_down_retry_count = 8;
  1211. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1212. nv->link_down_timeout = 60;
  1213. rval = 1;
  1214. }
  1215. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1216. /*
  1217. * The SN2 does not provide BIOS emulation which means you can't change
  1218. * potentially bogus BIOS settings. Force the use of default settings
  1219. * for link rate and frame size. Hope that the rest of the settings
  1220. * are valid.
  1221. */
  1222. if (ia64_platform_is("sn2")) {
  1223. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1224. if (IS_QLA23XX(ha))
  1225. nv->special_options[1] = BIT_7;
  1226. }
  1227. #endif
  1228. /* Reset Initialization control block */
  1229. memset(icb, 0, ha->init_cb_size);
  1230. /*
  1231. * Setup driver NVRAM options.
  1232. */
  1233. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1234. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1235. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1236. nv->firmware_options[1] &= ~BIT_4;
  1237. if (IS_QLA23XX(ha)) {
  1238. nv->firmware_options[0] |= BIT_2;
  1239. nv->firmware_options[0] &= ~BIT_3;
  1240. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1241. if (IS_QLA2300(ha)) {
  1242. if (ha->fb_rev == FPM_2310) {
  1243. strcpy(ha->model_number, "QLA2310");
  1244. } else {
  1245. strcpy(ha->model_number, "QLA2300");
  1246. }
  1247. } else {
  1248. if (rval == 0 &&
  1249. memcmp(nv->model_number, BINZERO,
  1250. sizeof(nv->model_number)) != 0) {
  1251. char *st, *en;
  1252. strncpy(ha->model_number, nv->model_number,
  1253. sizeof(nv->model_number));
  1254. st = en = ha->model_number;
  1255. en += sizeof(nv->model_number) - 1;
  1256. while (en > st) {
  1257. if (*en != 0x20 && *en != 0x00)
  1258. break;
  1259. *en-- = '\0';
  1260. }
  1261. } else {
  1262. uint16_t index;
  1263. index = (ha->pdev->subsystem_device & 0xff);
  1264. if (index < QLA_MODEL_NAMES) {
  1265. strcpy(ha->model_number,
  1266. qla2x00_model_name[index]);
  1267. ha->model_desc =
  1268. qla2x00_model_desc[index];
  1269. } else {
  1270. strcpy(ha->model_number, "QLA23xx");
  1271. }
  1272. }
  1273. }
  1274. } else if (IS_QLA2200(ha)) {
  1275. nv->firmware_options[0] |= BIT_2;
  1276. /*
  1277. * 'Point-to-point preferred, else loop' is not a safe
  1278. * connection mode setting.
  1279. */
  1280. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1281. (BIT_5 | BIT_4)) {
  1282. /* Force 'loop preferred, else point-to-point'. */
  1283. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1284. nv->add_firmware_options[0] |= BIT_5;
  1285. }
  1286. strcpy(ha->model_number, "QLA22xx");
  1287. } else /*if (IS_QLA2100(ha))*/ {
  1288. strcpy(ha->model_number, "QLA2100");
  1289. }
  1290. /*
  1291. * Copy over NVRAM RISC parameter block to initialization control block.
  1292. */
  1293. dptr1 = (uint8_t *)icb;
  1294. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1295. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1296. while (cnt--)
  1297. *dptr1++ = *dptr2++;
  1298. /* Copy 2nd half. */
  1299. dptr1 = (uint8_t *)icb->add_firmware_options;
  1300. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1301. while (cnt--)
  1302. *dptr1++ = *dptr2++;
  1303. /* Prepare nodename */
  1304. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1305. /*
  1306. * Firmware will apply the following mask if the nodename was
  1307. * not provided.
  1308. */
  1309. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1310. icb->node_name[0] &= 0xF0;
  1311. }
  1312. /*
  1313. * Set host adapter parameters.
  1314. */
  1315. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1316. /* Always load RISC code on non ISP2[12]00 chips. */
  1317. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1318. ha->flags.disable_risc_code_load = 0;
  1319. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1320. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1321. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1322. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1323. ha->operating_mode =
  1324. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1325. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1326. sizeof(ha->fw_seriallink_options));
  1327. /* save HBA serial number */
  1328. ha->serial0 = icb->port_name[5];
  1329. ha->serial1 = icb->port_name[6];
  1330. ha->serial2 = icb->port_name[7];
  1331. ha->node_name = icb->node_name;
  1332. ha->port_name = icb->port_name;
  1333. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1334. ha->retry_count = nv->retry_count;
  1335. /* Set minimum login_timeout to 4 seconds. */
  1336. if (nv->login_timeout < ql2xlogintimeout)
  1337. nv->login_timeout = ql2xlogintimeout;
  1338. if (nv->login_timeout < 4)
  1339. nv->login_timeout = 4;
  1340. ha->login_timeout = nv->login_timeout;
  1341. icb->login_timeout = nv->login_timeout;
  1342. /* Set minimum RATOV to 200 tenths of a second. */
  1343. ha->r_a_tov = 200;
  1344. ha->loop_reset_delay = nv->reset_delay;
  1345. /* Link Down Timeout = 0:
  1346. *
  1347. * When Port Down timer expires we will start returning
  1348. * I/O's to OS with "DID_NO_CONNECT".
  1349. *
  1350. * Link Down Timeout != 0:
  1351. *
  1352. * The driver waits for the link to come up after link down
  1353. * before returning I/Os to OS with "DID_NO_CONNECT".
  1354. */
  1355. if (nv->link_down_timeout == 0) {
  1356. ha->loop_down_abort_time =
  1357. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1358. } else {
  1359. ha->link_down_timeout = nv->link_down_timeout;
  1360. ha->loop_down_abort_time =
  1361. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1362. }
  1363. /*
  1364. * Need enough time to try and get the port back.
  1365. */
  1366. ha->port_down_retry_count = nv->port_down_retry_count;
  1367. if (qlport_down_retry)
  1368. ha->port_down_retry_count = qlport_down_retry;
  1369. /* Set login_retry_count */
  1370. ha->login_retry_count = nv->retry_count;
  1371. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1372. ha->port_down_retry_count > 3)
  1373. ha->login_retry_count = ha->port_down_retry_count;
  1374. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1375. ha->login_retry_count = ha->port_down_retry_count;
  1376. if (ql2xloginretrycount)
  1377. ha->login_retry_count = ql2xloginretrycount;
  1378. icb->lun_enables = __constant_cpu_to_le16(0);
  1379. icb->command_resource_count = 0;
  1380. icb->immediate_notify_resource_count = 0;
  1381. icb->timeout = __constant_cpu_to_le16(0);
  1382. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1383. /* Enable RIO */
  1384. icb->firmware_options[0] &= ~BIT_3;
  1385. icb->add_firmware_options[0] &=
  1386. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1387. icb->add_firmware_options[0] |= BIT_2;
  1388. icb->response_accumulation_timer = 3;
  1389. icb->interrupt_delay_timer = 5;
  1390. ha->flags.process_response_queue = 1;
  1391. } else {
  1392. /* Enable ZIO. */
  1393. if (!ha->flags.init_done) {
  1394. ha->zio_mode = icb->add_firmware_options[0] &
  1395. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1396. ha->zio_timer = icb->interrupt_delay_timer ?
  1397. icb->interrupt_delay_timer: 2;
  1398. }
  1399. icb->add_firmware_options[0] &=
  1400. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1401. ha->flags.process_response_queue = 0;
  1402. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1403. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1404. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1405. ha->zio_timer * 100));
  1406. qla_printk(KERN_INFO, ha,
  1407. "ZIO mode %d enabled; timer delay (%d us).\n",
  1408. ha->zio_mode, ha->zio_timer * 100);
  1409. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1410. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1411. ha->flags.process_response_queue = 1;
  1412. }
  1413. }
  1414. if (rval) {
  1415. DEBUG2_3(printk(KERN_WARNING
  1416. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1417. }
  1418. return (rval);
  1419. }
  1420. static void
  1421. qla2x00_rport_add(void *data)
  1422. {
  1423. fc_port_t *fcport = data;
  1424. qla2x00_reg_remote_port(fcport->ha, fcport);
  1425. }
  1426. static void
  1427. qla2x00_rport_del(void *data)
  1428. {
  1429. fc_port_t *fcport = data;
  1430. struct fc_rport *rport;
  1431. unsigned long flags;
  1432. spin_lock_irqsave(&fcport->rport_lock, flags);
  1433. rport = fcport->drport;
  1434. fcport->drport = NULL;
  1435. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1436. if (rport)
  1437. fc_remote_port_delete(rport);
  1438. }
  1439. /**
  1440. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1441. * @ha: HA context
  1442. * @flags: allocation flags
  1443. *
  1444. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1445. */
  1446. fc_port_t *
  1447. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1448. {
  1449. fc_port_t *fcport;
  1450. fcport = kmalloc(sizeof(fc_port_t), flags);
  1451. if (fcport == NULL)
  1452. return (fcport);
  1453. /* Setup fcport template structure. */
  1454. memset(fcport, 0, sizeof (fc_port_t));
  1455. fcport->ha = ha;
  1456. fcport->port_type = FCT_UNKNOWN;
  1457. fcport->loop_id = FC_NO_LOOP_ID;
  1458. fcport->iodesc_idx_sent = IODESC_INVALID_INDEX;
  1459. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1460. fcport->flags = FCF_RLC_SUPPORT;
  1461. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1462. spin_lock_init(&fcport->rport_lock);
  1463. INIT_WORK(&fcport->rport_add_work, qla2x00_rport_add, fcport);
  1464. INIT_WORK(&fcport->rport_del_work, qla2x00_rport_del, fcport);
  1465. return (fcport);
  1466. }
  1467. /*
  1468. * qla2x00_configure_loop
  1469. * Updates Fibre Channel Device Database with what is actually on loop.
  1470. *
  1471. * Input:
  1472. * ha = adapter block pointer.
  1473. *
  1474. * Returns:
  1475. * 0 = success.
  1476. * 1 = error.
  1477. * 2 = database was full and device was not configured.
  1478. */
  1479. static int
  1480. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1481. {
  1482. int rval;
  1483. unsigned long flags, save_flags;
  1484. rval = QLA_SUCCESS;
  1485. /* Get Initiator ID */
  1486. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1487. rval = qla2x00_configure_hba(ha);
  1488. if (rval != QLA_SUCCESS) {
  1489. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1490. ha->host_no));
  1491. return (rval);
  1492. }
  1493. }
  1494. save_flags = flags = ha->dpc_flags;
  1495. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1496. ha->host_no, flags));
  1497. /*
  1498. * If we have both an RSCN and PORT UPDATE pending then handle them
  1499. * both at the same time.
  1500. */
  1501. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1502. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1503. /* Determine what we need to do */
  1504. if (ha->current_topology == ISP_CFG_FL &&
  1505. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1506. ha->flags.rscn_queue_overflow = 1;
  1507. set_bit(RSCN_UPDATE, &flags);
  1508. } else if (ha->current_topology == ISP_CFG_F &&
  1509. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1510. ha->flags.rscn_queue_overflow = 1;
  1511. set_bit(RSCN_UPDATE, &flags);
  1512. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1513. } else if (!ha->flags.online ||
  1514. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1515. ha->flags.rscn_queue_overflow = 1;
  1516. set_bit(RSCN_UPDATE, &flags);
  1517. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1518. }
  1519. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1520. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1521. rval = QLA_FUNCTION_FAILED;
  1522. } else {
  1523. rval = qla2x00_configure_local_loop(ha);
  1524. }
  1525. }
  1526. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1527. if (LOOP_TRANSITION(ha)) {
  1528. rval = QLA_FUNCTION_FAILED;
  1529. } else {
  1530. rval = qla2x00_configure_fabric(ha);
  1531. }
  1532. }
  1533. if (rval == QLA_SUCCESS) {
  1534. if (atomic_read(&ha->loop_down_timer) ||
  1535. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1536. rval = QLA_FUNCTION_FAILED;
  1537. } else {
  1538. atomic_set(&ha->loop_state, LOOP_READY);
  1539. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1540. }
  1541. }
  1542. if (rval) {
  1543. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1544. __func__, ha->host_no));
  1545. } else {
  1546. DEBUG3(printk("%s: exiting normally\n", __func__));
  1547. }
  1548. /* Restore state if a resync event occured during processing */
  1549. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1550. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1551. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1552. if (test_bit(RSCN_UPDATE, &save_flags))
  1553. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1554. }
  1555. return (rval);
  1556. }
  1557. /*
  1558. * qla2x00_configure_local_loop
  1559. * Updates Fibre Channel Device Database with local loop devices.
  1560. *
  1561. * Input:
  1562. * ha = adapter block pointer.
  1563. *
  1564. * Returns:
  1565. * 0 = success.
  1566. */
  1567. static int
  1568. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1569. {
  1570. int rval, rval2;
  1571. int found_devs;
  1572. int found;
  1573. fc_port_t *fcport, *new_fcport;
  1574. uint16_t index;
  1575. uint16_t entries;
  1576. char *id_iter;
  1577. uint16_t loop_id;
  1578. uint8_t domain, area, al_pa;
  1579. found_devs = 0;
  1580. new_fcport = NULL;
  1581. entries = MAX_FIBRE_DEVICES;
  1582. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1583. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1584. /* Get list of logged in devices. */
  1585. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1586. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1587. &entries);
  1588. if (rval != QLA_SUCCESS)
  1589. goto cleanup_allocation;
  1590. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1591. ha->host_no, entries));
  1592. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1593. entries * sizeof(struct gid_list_info)));
  1594. /* Allocate temporary fcport for any new fcports discovered. */
  1595. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1596. if (new_fcport == NULL) {
  1597. rval = QLA_MEMORY_ALLOC_FAILED;
  1598. goto cleanup_allocation;
  1599. }
  1600. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1601. /*
  1602. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1603. */
  1604. list_for_each_entry(fcport, &ha->fcports, list) {
  1605. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1606. fcport->port_type != FCT_BROADCAST &&
  1607. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1608. DEBUG(printk("scsi(%ld): Marking port lost, "
  1609. "loop_id=0x%04x\n",
  1610. ha->host_no, fcport->loop_id));
  1611. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1612. fcport->flags &= ~FCF_FARP_DONE;
  1613. }
  1614. }
  1615. /* Add devices to port list. */
  1616. id_iter = (char *)ha->gid_list;
  1617. for (index = 0; index < entries; index++) {
  1618. domain = ((struct gid_list_info *)id_iter)->domain;
  1619. area = ((struct gid_list_info *)id_iter)->area;
  1620. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1621. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1622. loop_id = (uint16_t)
  1623. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1624. else
  1625. loop_id = le16_to_cpu(
  1626. ((struct gid_list_info *)id_iter)->loop_id);
  1627. id_iter += ha->gid_list_info_size;
  1628. /* Bypass reserved domain fields. */
  1629. if ((domain & 0xf0) == 0xf0)
  1630. continue;
  1631. /* Bypass if not same domain and area of adapter. */
  1632. if (area && domain &&
  1633. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1634. continue;
  1635. /* Bypass invalid local loop ID. */
  1636. if (loop_id > LAST_LOCAL_LOOP_ID)
  1637. continue;
  1638. /* Fill in member data. */
  1639. new_fcport->d_id.b.domain = domain;
  1640. new_fcport->d_id.b.area = area;
  1641. new_fcport->d_id.b.al_pa = al_pa;
  1642. new_fcport->loop_id = loop_id;
  1643. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1644. if (rval2 != QLA_SUCCESS) {
  1645. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1646. "information -- get_port_database=%x, "
  1647. "loop_id=0x%04x\n",
  1648. ha->host_no, rval2, new_fcport->loop_id));
  1649. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1650. ha->host_no));
  1651. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1652. continue;
  1653. }
  1654. /* Check for matching device in port list. */
  1655. found = 0;
  1656. fcport = NULL;
  1657. list_for_each_entry(fcport, &ha->fcports, list) {
  1658. if (memcmp(new_fcport->port_name, fcport->port_name,
  1659. WWN_SIZE))
  1660. continue;
  1661. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1662. FCF_PERSISTENT_BOUND);
  1663. fcport->loop_id = new_fcport->loop_id;
  1664. fcport->port_type = new_fcport->port_type;
  1665. fcport->d_id.b24 = new_fcport->d_id.b24;
  1666. memcpy(fcport->node_name, new_fcport->node_name,
  1667. WWN_SIZE);
  1668. found++;
  1669. break;
  1670. }
  1671. if (!found) {
  1672. /* New device, add to fcports list. */
  1673. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1674. list_add_tail(&new_fcport->list, &ha->fcports);
  1675. /* Allocate a new replacement fcport. */
  1676. fcport = new_fcport;
  1677. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1678. if (new_fcport == NULL) {
  1679. rval = QLA_MEMORY_ALLOC_FAILED;
  1680. goto cleanup_allocation;
  1681. }
  1682. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1683. }
  1684. qla2x00_update_fcport(ha, fcport);
  1685. found_devs++;
  1686. }
  1687. cleanup_allocation:
  1688. kfree(new_fcport);
  1689. if (rval != QLA_SUCCESS) {
  1690. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1691. "rval=%x\n", ha->host_no, rval));
  1692. }
  1693. if (found_devs) {
  1694. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1695. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1696. }
  1697. return (rval);
  1698. }
  1699. static void
  1700. qla2x00_probe_for_all_luns(scsi_qla_host_t *ha)
  1701. {
  1702. fc_port_t *fcport;
  1703. qla2x00_mark_all_devices_lost(ha, 0);
  1704. list_for_each_entry(fcport, &ha->fcports, list) {
  1705. if (fcport->port_type != FCT_TARGET)
  1706. continue;
  1707. qla2x00_update_fcport(ha, fcport);
  1708. }
  1709. }
  1710. /*
  1711. * qla2x00_update_fcport
  1712. * Updates device on list.
  1713. *
  1714. * Input:
  1715. * ha = adapter block pointer.
  1716. * fcport = port structure pointer.
  1717. *
  1718. * Return:
  1719. * 0 - Success
  1720. * BIT_0 - error
  1721. *
  1722. * Context:
  1723. * Kernel context.
  1724. */
  1725. void
  1726. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1727. {
  1728. fcport->ha = ha;
  1729. fcport->login_retry = 0;
  1730. fcport->port_login_retry_count = ha->port_down_retry_count *
  1731. PORT_RETRY_TIME;
  1732. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  1733. PORT_RETRY_TIME);
  1734. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1735. if (fcport->port_type == FCT_INITIATOR ||
  1736. fcport->port_type == FCT_BROADCAST)
  1737. fcport->device_type = TYPE_PROCESSOR;
  1738. atomic_set(&fcport->state, FCS_ONLINE);
  1739. if (ha->flags.init_done)
  1740. qla2x00_reg_remote_port(ha, fcport);
  1741. }
  1742. void
  1743. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1744. {
  1745. struct fc_rport_identifiers rport_ids;
  1746. struct fc_rport *rport;
  1747. unsigned long flags;
  1748. if (fcport->drport)
  1749. qla2x00_rport_del(fcport);
  1750. if (fcport->rport)
  1751. return;
  1752. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1753. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1754. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1755. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1756. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1757. rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1758. if (!rport) {
  1759. qla_printk(KERN_WARNING, ha,
  1760. "Unable to allocate fc remote port!\n");
  1761. return;
  1762. }
  1763. spin_lock_irqsave(&fcport->rport_lock, flags);
  1764. fcport->rport = rport;
  1765. *((fc_port_t **)rport->dd_data) = fcport;
  1766. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1767. rport->supported_classes = fcport->supported_classes;
  1768. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1769. if (fcport->port_type == FCT_INITIATOR)
  1770. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1771. if (fcport->port_type == FCT_TARGET)
  1772. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1773. fc_remote_port_rolechg(rport, rport_ids.roles);
  1774. if (rport->scsi_target_id != -1 &&
  1775. rport->scsi_target_id < ha->host->max_id)
  1776. fcport->os_target_id = rport->scsi_target_id;
  1777. }
  1778. /*
  1779. * qla2x00_configure_fabric
  1780. * Setup SNS devices with loop ID's.
  1781. *
  1782. * Input:
  1783. * ha = adapter block pointer.
  1784. *
  1785. * Returns:
  1786. * 0 = success.
  1787. * BIT_0 = error
  1788. */
  1789. static int
  1790. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1791. {
  1792. int rval, rval2;
  1793. fc_port_t *fcport, *fcptemp;
  1794. uint16_t next_loopid;
  1795. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1796. uint16_t loop_id;
  1797. LIST_HEAD(new_fcports);
  1798. /* If FL port exists, then SNS is present */
  1799. if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
  1800. loop_id = NPH_F_PORT;
  1801. else
  1802. loop_id = SNS_FL_PORT;
  1803. rval = qla2x00_get_port_name(ha, loop_id, NULL, 0);
  1804. if (rval != QLA_SUCCESS) {
  1805. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1806. "Port\n", ha->host_no));
  1807. ha->device_flags &= ~SWITCH_FOUND;
  1808. return (QLA_SUCCESS);
  1809. }
  1810. /* Mark devices that need re-synchronization. */
  1811. rval2 = qla2x00_device_resync(ha);
  1812. if (rval2 == QLA_RSCNS_HANDLED) {
  1813. /* No point doing the scan, just continue. */
  1814. return (QLA_SUCCESS);
  1815. }
  1816. do {
  1817. /* FDMI support. */
  1818. if (ql2xfdmienable &&
  1819. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  1820. qla2x00_fdmi_register(ha);
  1821. /* Ensure we are logged into the SNS. */
  1822. if (IS_QLA24XX(ha) || IS_QLA25XX(ha))
  1823. loop_id = NPH_SNS;
  1824. else
  1825. loop_id = SIMPLE_NAME_SERVER;
  1826. ha->isp_ops.fabric_login(ha, loop_id, 0xff, 0xff,
  1827. 0xfc, mb, BIT_1 | BIT_0);
  1828. if (mb[0] != MBS_COMMAND_COMPLETE) {
  1829. DEBUG2(qla_printk(KERN_INFO, ha,
  1830. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  1831. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  1832. mb[0], mb[1], mb[2], mb[6], mb[7]));
  1833. return (QLA_SUCCESS);
  1834. }
  1835. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  1836. if (qla2x00_rft_id(ha)) {
  1837. /* EMPTY */
  1838. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1839. "TYPE failed.\n", ha->host_no));
  1840. }
  1841. if (qla2x00_rff_id(ha)) {
  1842. /* EMPTY */
  1843. DEBUG2(printk("scsi(%ld): Register FC-4 "
  1844. "Features failed.\n", ha->host_no));
  1845. }
  1846. if (qla2x00_rnn_id(ha)) {
  1847. /* EMPTY */
  1848. DEBUG2(printk("scsi(%ld): Register Node Name "
  1849. "failed.\n", ha->host_no));
  1850. } else if (qla2x00_rsnn_nn(ha)) {
  1851. /* EMPTY */
  1852. DEBUG2(printk("scsi(%ld): Register Symbolic "
  1853. "Node Name failed.\n", ha->host_no));
  1854. }
  1855. }
  1856. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  1857. if (rval != QLA_SUCCESS)
  1858. break;
  1859. /*
  1860. * Logout all previous fabric devices marked lost, except
  1861. * tape devices.
  1862. */
  1863. list_for_each_entry(fcport, &ha->fcports, list) {
  1864. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1865. break;
  1866. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  1867. continue;
  1868. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  1869. qla2x00_mark_device_lost(ha, fcport,
  1870. ql2xplogiabsentdevice, 0);
  1871. if (fcport->loop_id != FC_NO_LOOP_ID &&
  1872. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  1873. fcport->port_type != FCT_INITIATOR &&
  1874. fcport->port_type != FCT_BROADCAST) {
  1875. ha->isp_ops.fabric_logout(ha,
  1876. fcport->loop_id,
  1877. fcport->d_id.b.domain,
  1878. fcport->d_id.b.area,
  1879. fcport->d_id.b.al_pa);
  1880. fcport->loop_id = FC_NO_LOOP_ID;
  1881. }
  1882. }
  1883. }
  1884. /* Starting free loop ID. */
  1885. next_loopid = ha->min_external_loopid;
  1886. /*
  1887. * Scan through our port list and login entries that need to be
  1888. * logged in.
  1889. */
  1890. list_for_each_entry(fcport, &ha->fcports, list) {
  1891. if (atomic_read(&ha->loop_down_timer) ||
  1892. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1893. break;
  1894. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  1895. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  1896. continue;
  1897. if (fcport->loop_id == FC_NO_LOOP_ID) {
  1898. fcport->loop_id = next_loopid;
  1899. rval = qla2x00_find_new_loop_id(ha, fcport);
  1900. if (rval != QLA_SUCCESS) {
  1901. /* Ran out of IDs to use */
  1902. break;
  1903. }
  1904. }
  1905. /* Login and update database */
  1906. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1907. }
  1908. /* Exit if out of loop IDs. */
  1909. if (rval != QLA_SUCCESS) {
  1910. break;
  1911. }
  1912. /*
  1913. * Login and add the new devices to our port list.
  1914. */
  1915. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1916. if (atomic_read(&ha->loop_down_timer) ||
  1917. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  1918. break;
  1919. /* Find a new loop ID to use. */
  1920. fcport->loop_id = next_loopid;
  1921. rval = qla2x00_find_new_loop_id(ha, fcport);
  1922. if (rval != QLA_SUCCESS) {
  1923. /* Ran out of IDs to use */
  1924. break;
  1925. }
  1926. /* Remove device from the new list and add it to DB */
  1927. list_del(&fcport->list);
  1928. list_add_tail(&fcport->list, &ha->fcports);
  1929. /* Login and update database */
  1930. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  1931. }
  1932. } while (0);
  1933. /* Free all new device structures not processed. */
  1934. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  1935. list_del(&fcport->list);
  1936. kfree(fcport);
  1937. }
  1938. if (rval) {
  1939. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  1940. "rval=%d\n", ha->host_no, rval));
  1941. }
  1942. return (rval);
  1943. }
  1944. /*
  1945. * qla2x00_find_all_fabric_devs
  1946. *
  1947. * Input:
  1948. * ha = adapter block pointer.
  1949. * dev = database device entry pointer.
  1950. *
  1951. * Returns:
  1952. * 0 = success.
  1953. *
  1954. * Context:
  1955. * Kernel context.
  1956. */
  1957. static int
  1958. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  1959. {
  1960. int rval;
  1961. uint16_t loop_id;
  1962. fc_port_t *fcport, *new_fcport, *fcptemp;
  1963. int found;
  1964. sw_info_t *swl;
  1965. int swl_idx;
  1966. int first_dev, last_dev;
  1967. port_id_t wrap, nxt_d_id;
  1968. rval = QLA_SUCCESS;
  1969. /* Try GID_PT to get device list, else GAN. */
  1970. swl = kmalloc(sizeof(sw_info_t) * MAX_FIBRE_DEVICES, GFP_ATOMIC);
  1971. if (swl == NULL) {
  1972. /*EMPTY*/
  1973. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  1974. "on GA_NXT\n", ha->host_no));
  1975. } else {
  1976. memset(swl, 0, sizeof(sw_info_t) * MAX_FIBRE_DEVICES);
  1977. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  1978. kfree(swl);
  1979. swl = NULL;
  1980. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  1981. kfree(swl);
  1982. swl = NULL;
  1983. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  1984. kfree(swl);
  1985. swl = NULL;
  1986. }
  1987. }
  1988. swl_idx = 0;
  1989. /* Allocate temporary fcport for any new fcports discovered. */
  1990. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1991. if (new_fcport == NULL) {
  1992. kfree(swl);
  1993. return (QLA_MEMORY_ALLOC_FAILED);
  1994. }
  1995. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  1996. /* Set start port ID scan at adapter ID. */
  1997. first_dev = 1;
  1998. last_dev = 0;
  1999. /* Starting free loop ID. */
  2000. loop_id = ha->min_external_loopid;
  2001. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2002. if (qla2x00_is_reserved_id(ha, loop_id))
  2003. continue;
  2004. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2005. break;
  2006. if (swl != NULL) {
  2007. if (last_dev) {
  2008. wrap.b24 = new_fcport->d_id.b24;
  2009. } else {
  2010. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2011. memcpy(new_fcport->node_name,
  2012. swl[swl_idx].node_name, WWN_SIZE);
  2013. memcpy(new_fcport->port_name,
  2014. swl[swl_idx].port_name, WWN_SIZE);
  2015. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2016. last_dev = 1;
  2017. }
  2018. swl_idx++;
  2019. }
  2020. } else {
  2021. /* Send GA_NXT to the switch */
  2022. rval = qla2x00_ga_nxt(ha, new_fcport);
  2023. if (rval != QLA_SUCCESS) {
  2024. qla_printk(KERN_WARNING, ha,
  2025. "SNS scan failed -- assuming zero-entry "
  2026. "result...\n");
  2027. list_for_each_entry_safe(fcport, fcptemp,
  2028. new_fcports, list) {
  2029. list_del(&fcport->list);
  2030. kfree(fcport);
  2031. }
  2032. rval = QLA_SUCCESS;
  2033. break;
  2034. }
  2035. }
  2036. /* If wrap on switch device list, exit. */
  2037. if (first_dev) {
  2038. wrap.b24 = new_fcport->d_id.b24;
  2039. first_dev = 0;
  2040. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2041. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2042. ha->host_no, new_fcport->d_id.b.domain,
  2043. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2044. break;
  2045. }
  2046. /* Bypass if host adapter. */
  2047. if (new_fcport->d_id.b24 == ha->d_id.b24)
  2048. continue;
  2049. /* Bypass if same domain and area of adapter. */
  2050. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2051. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2052. ISP_CFG_FL)
  2053. continue;
  2054. /* Bypass reserved domain fields. */
  2055. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2056. continue;
  2057. /* Locate matching device in database. */
  2058. found = 0;
  2059. list_for_each_entry(fcport, &ha->fcports, list) {
  2060. if (memcmp(new_fcport->port_name, fcport->port_name,
  2061. WWN_SIZE))
  2062. continue;
  2063. found++;
  2064. /*
  2065. * If address the same and state FCS_ONLINE, nothing
  2066. * changed.
  2067. */
  2068. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2069. atomic_read(&fcport->state) == FCS_ONLINE) {
  2070. break;
  2071. }
  2072. /*
  2073. * If device was not a fabric device before.
  2074. */
  2075. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2076. fcport->d_id.b24 = new_fcport->d_id.b24;
  2077. fcport->loop_id = FC_NO_LOOP_ID;
  2078. fcport->flags |= (FCF_FABRIC_DEVICE |
  2079. FCF_LOGIN_NEEDED);
  2080. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2081. break;
  2082. }
  2083. /*
  2084. * Port ID changed or device was marked to be updated;
  2085. * Log it out if still logged in and mark it for
  2086. * relogin later.
  2087. */
  2088. fcport->d_id.b24 = new_fcport->d_id.b24;
  2089. fcport->flags |= FCF_LOGIN_NEEDED;
  2090. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2091. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2092. fcport->port_type != FCT_INITIATOR &&
  2093. fcport->port_type != FCT_BROADCAST) {
  2094. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2095. fcport->d_id.b.domain, fcport->d_id.b.area,
  2096. fcport->d_id.b.al_pa);
  2097. fcport->loop_id = FC_NO_LOOP_ID;
  2098. }
  2099. break;
  2100. }
  2101. if (found)
  2102. continue;
  2103. /* If device was not in our fcports list, then add it. */
  2104. list_add_tail(&new_fcport->list, new_fcports);
  2105. /* Allocate a new replacement fcport. */
  2106. nxt_d_id.b24 = new_fcport->d_id.b24;
  2107. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2108. if (new_fcport == NULL) {
  2109. kfree(swl);
  2110. return (QLA_MEMORY_ALLOC_FAILED);
  2111. }
  2112. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2113. new_fcport->d_id.b24 = nxt_d_id.b24;
  2114. }
  2115. kfree(swl);
  2116. kfree(new_fcport);
  2117. if (!list_empty(new_fcports))
  2118. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2119. return (rval);
  2120. }
  2121. /*
  2122. * qla2x00_find_new_loop_id
  2123. * Scan through our port list and find a new usable loop ID.
  2124. *
  2125. * Input:
  2126. * ha: adapter state pointer.
  2127. * dev: port structure pointer.
  2128. *
  2129. * Returns:
  2130. * qla2x00 local function return status code.
  2131. *
  2132. * Context:
  2133. * Kernel context.
  2134. */
  2135. int
  2136. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2137. {
  2138. int rval;
  2139. int found;
  2140. fc_port_t *fcport;
  2141. uint16_t first_loop_id;
  2142. rval = QLA_SUCCESS;
  2143. /* Save starting loop ID. */
  2144. first_loop_id = dev->loop_id;
  2145. for (;;) {
  2146. /* Skip loop ID if already used by adapter. */
  2147. if (dev->loop_id == ha->loop_id) {
  2148. dev->loop_id++;
  2149. }
  2150. /* Skip reserved loop IDs. */
  2151. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2152. dev->loop_id++;
  2153. }
  2154. /* Reset loop ID if passed the end. */
  2155. if (dev->loop_id > ha->last_loop_id) {
  2156. /* first loop ID. */
  2157. dev->loop_id = ha->min_external_loopid;
  2158. }
  2159. /* Check for loop ID being already in use. */
  2160. found = 0;
  2161. fcport = NULL;
  2162. list_for_each_entry(fcport, &ha->fcports, list) {
  2163. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2164. /* ID possibly in use */
  2165. found++;
  2166. break;
  2167. }
  2168. }
  2169. /* If not in use then it is free to use. */
  2170. if (!found) {
  2171. break;
  2172. }
  2173. /* ID in use. Try next value. */
  2174. dev->loop_id++;
  2175. /* If wrap around. No free ID to use. */
  2176. if (dev->loop_id == first_loop_id) {
  2177. dev->loop_id = FC_NO_LOOP_ID;
  2178. rval = QLA_FUNCTION_FAILED;
  2179. break;
  2180. }
  2181. }
  2182. return (rval);
  2183. }
  2184. /*
  2185. * qla2x00_device_resync
  2186. * Marks devices in the database that needs resynchronization.
  2187. *
  2188. * Input:
  2189. * ha = adapter block pointer.
  2190. *
  2191. * Context:
  2192. * Kernel context.
  2193. */
  2194. static int
  2195. qla2x00_device_resync(scsi_qla_host_t *ha)
  2196. {
  2197. int rval;
  2198. int rval2;
  2199. uint32_t mask;
  2200. fc_port_t *fcport;
  2201. uint32_t rscn_entry;
  2202. uint8_t rscn_out_iter;
  2203. uint8_t format;
  2204. port_id_t d_id;
  2205. rval = QLA_RSCNS_HANDLED;
  2206. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2207. ha->flags.rscn_queue_overflow) {
  2208. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2209. format = MSB(MSW(rscn_entry));
  2210. d_id.b.domain = LSB(MSW(rscn_entry));
  2211. d_id.b.area = MSB(LSW(rscn_entry));
  2212. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2213. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2214. "[%02x/%02x%02x%02x].\n",
  2215. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2216. d_id.b.area, d_id.b.al_pa));
  2217. ha->rscn_out_ptr++;
  2218. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2219. ha->rscn_out_ptr = 0;
  2220. /* Skip duplicate entries. */
  2221. for (rscn_out_iter = ha->rscn_out_ptr;
  2222. !ha->flags.rscn_queue_overflow &&
  2223. rscn_out_iter != ha->rscn_in_ptr;
  2224. rscn_out_iter = (rscn_out_iter ==
  2225. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2226. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2227. break;
  2228. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2229. "entry found at [%d].\n", ha->host_no,
  2230. rscn_out_iter));
  2231. ha->rscn_out_ptr = rscn_out_iter;
  2232. }
  2233. /* Queue overflow, set switch default case. */
  2234. if (ha->flags.rscn_queue_overflow) {
  2235. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2236. "overflow.\n", ha->host_no));
  2237. format = 3;
  2238. ha->flags.rscn_queue_overflow = 0;
  2239. }
  2240. switch (format) {
  2241. case 0:
  2242. if (ql2xprocessrscn &&
  2243. !IS_QLA2100(ha) && !IS_QLA2200(ha) &&
  2244. !IS_QLA6312(ha) && !IS_QLA6322(ha) &&
  2245. !IS_QLA24XX(ha) && !IS_QLA25XX(ha) &&
  2246. ha->flags.init_done) {
  2247. /* Handle port RSCN via asyncronous IOCBs */
  2248. rval2 = qla2x00_handle_port_rscn(ha, rscn_entry,
  2249. NULL, 0);
  2250. if (rval2 == QLA_SUCCESS)
  2251. continue;
  2252. }
  2253. mask = 0xffffff;
  2254. break;
  2255. case 1:
  2256. mask = 0xffff00;
  2257. break;
  2258. case 2:
  2259. mask = 0xff0000;
  2260. break;
  2261. default:
  2262. mask = 0x0;
  2263. d_id.b24 = 0;
  2264. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2265. break;
  2266. }
  2267. rval = QLA_SUCCESS;
  2268. /* Abort any outstanding IO descriptors. */
  2269. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2270. qla2x00_cancel_io_descriptors(ha);
  2271. list_for_each_entry(fcport, &ha->fcports, list) {
  2272. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2273. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2274. fcport->port_type == FCT_BROADCAST)
  2275. continue;
  2276. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2277. if (format != 3 ||
  2278. fcport->port_type != FCT_INITIATOR) {
  2279. qla2x00_mark_device_lost(ha, fcport,
  2280. 0, 0);
  2281. }
  2282. }
  2283. fcport->flags &= ~FCF_FARP_DONE;
  2284. }
  2285. }
  2286. return (rval);
  2287. }
  2288. /*
  2289. * qla2x00_fabric_dev_login
  2290. * Login fabric target device and update FC port database.
  2291. *
  2292. * Input:
  2293. * ha: adapter state pointer.
  2294. * fcport: port structure list pointer.
  2295. * next_loopid: contains value of a new loop ID that can be used
  2296. * by the next login attempt.
  2297. *
  2298. * Returns:
  2299. * qla2x00 local function return status code.
  2300. *
  2301. * Context:
  2302. * Kernel context.
  2303. */
  2304. static int
  2305. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2306. uint16_t *next_loopid)
  2307. {
  2308. int rval;
  2309. int retry;
  2310. uint8_t opts;
  2311. rval = QLA_SUCCESS;
  2312. retry = 0;
  2313. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2314. if (rval == QLA_SUCCESS) {
  2315. /* Send an ADISC to tape devices.*/
  2316. opts = 0;
  2317. if (fcport->flags & FCF_TAPE_PRESENT)
  2318. opts |= BIT_1;
  2319. rval = qla2x00_get_port_database(ha, fcport, opts);
  2320. if (rval != QLA_SUCCESS) {
  2321. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2322. fcport->d_id.b.domain, fcport->d_id.b.area,
  2323. fcport->d_id.b.al_pa);
  2324. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2325. } else {
  2326. qla2x00_update_fcport(ha, fcport);
  2327. }
  2328. }
  2329. return (rval);
  2330. }
  2331. /*
  2332. * qla2x00_fabric_login
  2333. * Issue fabric login command.
  2334. *
  2335. * Input:
  2336. * ha = adapter block pointer.
  2337. * device = pointer to FC device type structure.
  2338. *
  2339. * Returns:
  2340. * 0 - Login successfully
  2341. * 1 - Login failed
  2342. * 2 - Initiator device
  2343. * 3 - Fatal error
  2344. */
  2345. int
  2346. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2347. uint16_t *next_loopid)
  2348. {
  2349. int rval;
  2350. int retry;
  2351. uint16_t tmp_loopid;
  2352. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2353. retry = 0;
  2354. tmp_loopid = 0;
  2355. for (;;) {
  2356. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2357. "for port %02x%02x%02x.\n",
  2358. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2359. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2360. /* Login fcport on switch. */
  2361. ha->isp_ops.fabric_login(ha, fcport->loop_id,
  2362. fcport->d_id.b.domain, fcport->d_id.b.area,
  2363. fcport->d_id.b.al_pa, mb, BIT_0);
  2364. if (mb[0] == MBS_PORT_ID_USED) {
  2365. /*
  2366. * Device has another loop ID. The firmware team
  2367. * recommends the driver perform an implicit login with
  2368. * the specified ID again. The ID we just used is save
  2369. * here so we return with an ID that can be tried by
  2370. * the next login.
  2371. */
  2372. retry++;
  2373. tmp_loopid = fcport->loop_id;
  2374. fcport->loop_id = mb[1];
  2375. DEBUG(printk("Fabric Login: port in use - next "
  2376. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2377. fcport->loop_id, fcport->d_id.b.domain,
  2378. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2379. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2380. /*
  2381. * Login succeeded.
  2382. */
  2383. if (retry) {
  2384. /* A retry occurred before. */
  2385. *next_loopid = tmp_loopid;
  2386. } else {
  2387. /*
  2388. * No retry occurred before. Just increment the
  2389. * ID value for next login.
  2390. */
  2391. *next_loopid = (fcport->loop_id + 1);
  2392. }
  2393. if (mb[1] & BIT_0) {
  2394. fcport->port_type = FCT_INITIATOR;
  2395. } else {
  2396. fcport->port_type = FCT_TARGET;
  2397. if (mb[1] & BIT_1) {
  2398. fcport->flags |= FCF_TAPE_PRESENT;
  2399. }
  2400. }
  2401. if (mb[10] & BIT_0)
  2402. fcport->supported_classes |= FC_COS_CLASS2;
  2403. if (mb[10] & BIT_1)
  2404. fcport->supported_classes |= FC_COS_CLASS3;
  2405. rval = QLA_SUCCESS;
  2406. break;
  2407. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2408. /*
  2409. * Loop ID already used, try next loop ID.
  2410. */
  2411. fcport->loop_id++;
  2412. rval = qla2x00_find_new_loop_id(ha, fcport);
  2413. if (rval != QLA_SUCCESS) {
  2414. /* Ran out of loop IDs to use */
  2415. break;
  2416. }
  2417. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2418. /*
  2419. * Firmware possibly timed out during login. If NO
  2420. * retries are left to do then the device is declared
  2421. * dead.
  2422. */
  2423. *next_loopid = fcport->loop_id;
  2424. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2425. fcport->d_id.b.domain, fcport->d_id.b.area,
  2426. fcport->d_id.b.al_pa);
  2427. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2428. rval = 1;
  2429. break;
  2430. } else {
  2431. /*
  2432. * unrecoverable / not handled error
  2433. */
  2434. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2435. "loop_id=%x jiffies=%lx.\n",
  2436. __func__, ha->host_no, mb[0],
  2437. fcport->d_id.b.domain, fcport->d_id.b.area,
  2438. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2439. *next_loopid = fcport->loop_id;
  2440. ha->isp_ops.fabric_logout(ha, fcport->loop_id,
  2441. fcport->d_id.b.domain, fcport->d_id.b.area,
  2442. fcport->d_id.b.al_pa);
  2443. fcport->loop_id = FC_NO_LOOP_ID;
  2444. fcport->login_retry = 0;
  2445. rval = 3;
  2446. break;
  2447. }
  2448. }
  2449. return (rval);
  2450. }
  2451. /*
  2452. * qla2x00_local_device_login
  2453. * Issue local device login command.
  2454. *
  2455. * Input:
  2456. * ha = adapter block pointer.
  2457. * loop_id = loop id of device to login to.
  2458. *
  2459. * Returns (Where's the #define!!!!):
  2460. * 0 - Login successfully
  2461. * 1 - Login failed
  2462. * 3 - Fatal error
  2463. */
  2464. int
  2465. qla2x00_local_device_login(scsi_qla_host_t *ha, uint16_t loop_id)
  2466. {
  2467. int rval;
  2468. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2469. memset(mb, 0, sizeof(mb));
  2470. rval = qla2x00_login_local_device(ha, loop_id, mb, BIT_0);
  2471. if (rval == QLA_SUCCESS) {
  2472. /* Interrogate mailbox registers for any errors */
  2473. if (mb[0] == MBS_COMMAND_ERROR)
  2474. rval = 1;
  2475. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2476. /* device not in PCB table */
  2477. rval = 3;
  2478. }
  2479. return (rval);
  2480. }
  2481. /*
  2482. * qla2x00_loop_resync
  2483. * Resync with fibre channel devices.
  2484. *
  2485. * Input:
  2486. * ha = adapter block pointer.
  2487. *
  2488. * Returns:
  2489. * 0 = success
  2490. */
  2491. int
  2492. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2493. {
  2494. int rval;
  2495. uint32_t wait_time;
  2496. rval = QLA_SUCCESS;
  2497. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2498. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2499. if (ha->flags.online) {
  2500. if (!(rval = qla2x00_fw_ready(ha))) {
  2501. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2502. wait_time = 256;
  2503. do {
  2504. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2505. /* Issue a marker after FW becomes ready. */
  2506. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2507. ha->marker_needed = 0;
  2508. /* Remap devices on Loop. */
  2509. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2510. qla2x00_configure_loop(ha);
  2511. wait_time--;
  2512. } while (!atomic_read(&ha->loop_down_timer) &&
  2513. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2514. wait_time &&
  2515. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2516. }
  2517. }
  2518. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2519. return (QLA_FUNCTION_FAILED);
  2520. }
  2521. if (rval) {
  2522. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2523. }
  2524. return (rval);
  2525. }
  2526. void
  2527. qla2x00_rescan_fcports(scsi_qla_host_t *ha)
  2528. {
  2529. int rescan_done;
  2530. fc_port_t *fcport;
  2531. rescan_done = 0;
  2532. list_for_each_entry(fcport, &ha->fcports, list) {
  2533. if ((fcport->flags & FCF_RESCAN_NEEDED) == 0)
  2534. continue;
  2535. qla2x00_update_fcport(ha, fcport);
  2536. fcport->flags &= ~FCF_RESCAN_NEEDED;
  2537. rescan_done = 1;
  2538. }
  2539. qla2x00_probe_for_all_luns(ha);
  2540. }
  2541. void
  2542. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2543. {
  2544. fc_port_t *fcport;
  2545. /* Go with deferred removal of rport references. */
  2546. list_for_each_entry(fcport, &ha->fcports, list)
  2547. if (fcport->drport)
  2548. qla2x00_rport_del(fcport);
  2549. }
  2550. /*
  2551. * qla2x00_abort_isp
  2552. * Resets ISP and aborts all outstanding commands.
  2553. *
  2554. * Input:
  2555. * ha = adapter block pointer.
  2556. *
  2557. * Returns:
  2558. * 0 = success
  2559. */
  2560. int
  2561. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2562. {
  2563. unsigned long flags = 0;
  2564. uint16_t cnt;
  2565. srb_t *sp;
  2566. uint8_t status = 0;
  2567. if (ha->flags.online) {
  2568. ha->flags.online = 0;
  2569. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2570. qla_printk(KERN_INFO, ha,
  2571. "Performing ISP error recovery - ha= %p.\n", ha);
  2572. ha->isp_ops.reset_chip(ha);
  2573. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2574. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2575. atomic_set(&ha->loop_state, LOOP_DOWN);
  2576. qla2x00_mark_all_devices_lost(ha, 0);
  2577. } else {
  2578. if (!atomic_read(&ha->loop_down_timer))
  2579. atomic_set(&ha->loop_down_timer,
  2580. LOOP_DOWN_TIME);
  2581. }
  2582. spin_lock_irqsave(&ha->hardware_lock, flags);
  2583. /* Requeue all commands in outstanding command list. */
  2584. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  2585. sp = ha->outstanding_cmds[cnt];
  2586. if (sp) {
  2587. ha->outstanding_cmds[cnt] = NULL;
  2588. sp->flags = 0;
  2589. sp->cmd->result = DID_RESET << 16;
  2590. sp->cmd->host_scribble = (unsigned char *)NULL;
  2591. qla2x00_sp_compl(ha, sp);
  2592. }
  2593. }
  2594. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2595. ha->isp_ops.nvram_config(ha);
  2596. if (!qla2x00_restart_isp(ha)) {
  2597. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2598. if (!atomic_read(&ha->loop_down_timer)) {
  2599. /*
  2600. * Issue marker command only when we are going
  2601. * to start the I/O .
  2602. */
  2603. ha->marker_needed = 1;
  2604. }
  2605. ha->flags.online = 1;
  2606. ha->isp_ops.enable_intrs(ha);
  2607. ha->isp_abort_cnt = 0;
  2608. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2609. } else { /* failed the ISP abort */
  2610. ha->flags.online = 1;
  2611. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2612. if (ha->isp_abort_cnt == 0) {
  2613. qla_printk(KERN_WARNING, ha,
  2614. "ISP error recovery failed - "
  2615. "board disabled\n");
  2616. /*
  2617. * The next call disables the board
  2618. * completely.
  2619. */
  2620. ha->isp_ops.reset_adapter(ha);
  2621. ha->flags.online = 0;
  2622. clear_bit(ISP_ABORT_RETRY,
  2623. &ha->dpc_flags);
  2624. status = 0;
  2625. } else { /* schedule another ISP abort */
  2626. ha->isp_abort_cnt--;
  2627. DEBUG(printk("qla%ld: ISP abort - "
  2628. "retry remaining %d\n",
  2629. ha->host_no, ha->isp_abort_cnt);)
  2630. status = 1;
  2631. }
  2632. } else {
  2633. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2634. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2635. "- retrying (%d) more times\n",
  2636. ha->host_no, ha->isp_abort_cnt);)
  2637. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2638. status = 1;
  2639. }
  2640. }
  2641. }
  2642. if (status) {
  2643. qla_printk(KERN_INFO, ha,
  2644. "qla2x00_abort_isp: **** FAILED ****\n");
  2645. } else {
  2646. DEBUG(printk(KERN_INFO
  2647. "qla2x00_abort_isp(%ld): exiting.\n",
  2648. ha->host_no);)
  2649. }
  2650. return(status);
  2651. }
  2652. /*
  2653. * qla2x00_restart_isp
  2654. * restarts the ISP after a reset
  2655. *
  2656. * Input:
  2657. * ha = adapter block pointer.
  2658. *
  2659. * Returns:
  2660. * 0 = success
  2661. */
  2662. static int
  2663. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2664. {
  2665. uint8_t status = 0;
  2666. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2667. unsigned long flags = 0;
  2668. uint32_t wait_time;
  2669. /* If firmware needs to be loaded */
  2670. if (qla2x00_isp_firmware(ha)) {
  2671. ha->flags.online = 0;
  2672. if (!(status = ha->isp_ops.chip_diag(ha))) {
  2673. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2674. status = qla2x00_setup_chip(ha);
  2675. goto done;
  2676. }
  2677. spin_lock_irqsave(&ha->hardware_lock, flags);
  2678. if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha)) {
  2679. /*
  2680. * Disable SRAM, Instruction RAM and GP RAM
  2681. * parity.
  2682. */
  2683. WRT_REG_WORD(&reg->hccr,
  2684. (HCCR_ENABLE_PARITY + 0x0));
  2685. RD_REG_WORD(&reg->hccr);
  2686. }
  2687. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2688. status = qla2x00_setup_chip(ha);
  2689. spin_lock_irqsave(&ha->hardware_lock, flags);
  2690. if (!IS_QLA24XX(ha) && !IS_QLA25XX(ha)) {
  2691. /* Enable proper parity */
  2692. if (IS_QLA2300(ha))
  2693. /* SRAM parity */
  2694. WRT_REG_WORD(&reg->hccr,
  2695. (HCCR_ENABLE_PARITY + 0x1));
  2696. else
  2697. /*
  2698. * SRAM, Instruction RAM and GP RAM
  2699. * parity.
  2700. */
  2701. WRT_REG_WORD(&reg->hccr,
  2702. (HCCR_ENABLE_PARITY + 0x7));
  2703. RD_REG_WORD(&reg->hccr);
  2704. }
  2705. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2706. }
  2707. }
  2708. done:
  2709. if (!status && !(status = qla2x00_init_rings(ha))) {
  2710. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2711. if (!(status = qla2x00_fw_ready(ha))) {
  2712. DEBUG(printk("%s(): Start configure loop, "
  2713. "status = %d\n", __func__, status);)
  2714. /* Issue a marker after FW becomes ready. */
  2715. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2716. ha->flags.online = 1;
  2717. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2718. wait_time = 256;
  2719. do {
  2720. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2721. qla2x00_configure_loop(ha);
  2722. wait_time--;
  2723. } while (!atomic_read(&ha->loop_down_timer) &&
  2724. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2725. wait_time &&
  2726. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2727. }
  2728. /* if no cable then assume it's good */
  2729. if ((ha->device_flags & DFLG_NO_CABLE))
  2730. status = 0;
  2731. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2732. __func__,
  2733. status);)
  2734. }
  2735. return (status);
  2736. }
  2737. /*
  2738. * qla2x00_reset_adapter
  2739. * Reset adapter.
  2740. *
  2741. * Input:
  2742. * ha = adapter block pointer.
  2743. */
  2744. void
  2745. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2746. {
  2747. unsigned long flags = 0;
  2748. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2749. ha->flags.online = 0;
  2750. ha->isp_ops.disable_intrs(ha);
  2751. spin_lock_irqsave(&ha->hardware_lock, flags);
  2752. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2753. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2754. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2755. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2756. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2757. }
  2758. void
  2759. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2760. {
  2761. unsigned long flags = 0;
  2762. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2763. ha->flags.online = 0;
  2764. ha->isp_ops.disable_intrs(ha);
  2765. spin_lock_irqsave(&ha->hardware_lock, flags);
  2766. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2767. RD_REG_DWORD(&reg->hccr);
  2768. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2769. RD_REG_DWORD(&reg->hccr);
  2770. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2771. }
  2772. int
  2773. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2774. {
  2775. int rval;
  2776. struct init_cb_24xx *icb;
  2777. struct nvram_24xx *nv;
  2778. uint32_t *dptr;
  2779. uint8_t *dptr1, *dptr2;
  2780. uint32_t chksum;
  2781. uint16_t cnt;
  2782. rval = QLA_SUCCESS;
  2783. icb = (struct init_cb_24xx *)ha->init_cb;
  2784. nv = (struct nvram_24xx *)ha->request_ring;
  2785. /* Determine NVRAM starting address. */
  2786. ha->nvram_size = sizeof(struct nvram_24xx);
  2787. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2788. if (PCI_FUNC(ha->pdev->devfn))
  2789. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  2790. /* Get NVRAM data and calculate checksum. */
  2791. dptr = (uint32_t *)nv;
  2792. ha->isp_ops.read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  2793. ha->nvram_size);
  2794. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  2795. chksum += le32_to_cpu(*dptr++);
  2796. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  2797. DEBUG5(qla2x00_dump_buffer((uint8_t *)ha->request_ring,
  2798. ha->nvram_size));
  2799. /* Bad NVRAM data, set defaults parameters. */
  2800. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  2801. || nv->id[3] != ' ' ||
  2802. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  2803. /* Reset NVRAM data. */
  2804. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  2805. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  2806. le16_to_cpu(nv->nvram_version));
  2807. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  2808. "invalid -- WWPN) defaults.\n");
  2809. /*
  2810. * Set default initialization control block.
  2811. */
  2812. memset(nv, 0, ha->nvram_size);
  2813. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  2814. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  2815. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  2816. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2817. nv->exchange_count = __constant_cpu_to_le16(0);
  2818. nv->hard_address = __constant_cpu_to_le16(124);
  2819. nv->port_name[0] = 0x21;
  2820. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  2821. nv->port_name[2] = 0x00;
  2822. nv->port_name[3] = 0xe0;
  2823. nv->port_name[4] = 0x8b;
  2824. nv->port_name[5] = 0x1c;
  2825. nv->port_name[6] = 0x55;
  2826. nv->port_name[7] = 0x86;
  2827. nv->node_name[0] = 0x20;
  2828. nv->node_name[1] = 0x00;
  2829. nv->node_name[2] = 0x00;
  2830. nv->node_name[3] = 0xe0;
  2831. nv->node_name[4] = 0x8b;
  2832. nv->node_name[5] = 0x1c;
  2833. nv->node_name[6] = 0x55;
  2834. nv->node_name[7] = 0x86;
  2835. nv->login_retry_count = __constant_cpu_to_le16(8);
  2836. nv->link_down_timeout = __constant_cpu_to_le16(200);
  2837. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  2838. nv->login_timeout = __constant_cpu_to_le16(0);
  2839. nv->firmware_options_1 =
  2840. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  2841. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  2842. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  2843. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  2844. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  2845. nv->efi_parameters = __constant_cpu_to_le32(0);
  2846. nv->reset_delay = 5;
  2847. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  2848. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  2849. nv->link_down_timeout = __constant_cpu_to_le16(30);
  2850. rval = 1;
  2851. }
  2852. /* Reset Initialization control block */
  2853. memset(icb, 0, sizeof(struct init_cb_24xx));
  2854. /* Copy 1st segment. */
  2855. dptr1 = (uint8_t *)icb;
  2856. dptr2 = (uint8_t *)&nv->version;
  2857. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  2858. while (cnt--)
  2859. *dptr1++ = *dptr2++;
  2860. icb->login_retry_count = nv->login_retry_count;
  2861. icb->link_down_timeout = nv->link_down_timeout;
  2862. /* Copy 2nd segment. */
  2863. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  2864. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  2865. cnt = (uint8_t *)&icb->reserved_3 -
  2866. (uint8_t *)&icb->interrupt_delay_timer;
  2867. while (cnt--)
  2868. *dptr1++ = *dptr2++;
  2869. /*
  2870. * Setup driver NVRAM options.
  2871. */
  2872. if (memcmp(nv->model_name, BINZERO, sizeof(nv->model_name)) != 0) {
  2873. char *st, *en;
  2874. uint16_t index;
  2875. strncpy(ha->model_number, nv->model_name,
  2876. sizeof(nv->model_name));
  2877. st = en = ha->model_number;
  2878. en += sizeof(nv->model_name) - 1;
  2879. while (en > st) {
  2880. if (*en != 0x20 && *en != 0x00)
  2881. break;
  2882. *en-- = '\0';
  2883. }
  2884. index = (ha->pdev->subsystem_device & 0xff);
  2885. if (index < QLA_MODEL_NAMES)
  2886. ha->model_desc = qla2x00_model_desc[index];
  2887. } else
  2888. strcpy(ha->model_number, "QLA2462");
  2889. /* Prepare nodename */
  2890. if ((icb->firmware_options_1 & BIT_14) == 0) {
  2891. /*
  2892. * Firmware will apply the following mask if the nodename was
  2893. * not provided.
  2894. */
  2895. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2896. icb->node_name[0] &= 0xF0;
  2897. }
  2898. /* Set host adapter parameters. */
  2899. ha->flags.disable_risc_code_load = 0;
  2900. ha->flags.enable_lip_reset = 1;
  2901. ha->flags.enable_lip_full_login = 1;
  2902. ha->flags.enable_target_reset = 1;
  2903. ha->flags.enable_led_scheme = 0;
  2904. ha->operating_mode =
  2905. (icb->firmware_options_2 & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2906. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  2907. sizeof(ha->fw_seriallink_options24));
  2908. /* save HBA serial number */
  2909. ha->serial0 = icb->port_name[5];
  2910. ha->serial1 = icb->port_name[6];
  2911. ha->serial2 = icb->port_name[7];
  2912. ha->node_name = icb->node_name;
  2913. ha->port_name = icb->port_name;
  2914. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2915. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  2916. /* Set minimum login_timeout to 4 seconds. */
  2917. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  2918. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  2919. if (le16_to_cpu(nv->login_timeout) < 4)
  2920. nv->login_timeout = __constant_cpu_to_le16(4);
  2921. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  2922. icb->login_timeout = cpu_to_le16(nv->login_timeout);
  2923. /* Set minimum RATOV to 200 tenths of a second. */
  2924. ha->r_a_tov = 200;
  2925. ha->loop_reset_delay = nv->reset_delay;
  2926. /* Link Down Timeout = 0:
  2927. *
  2928. * When Port Down timer expires we will start returning
  2929. * I/O's to OS with "DID_NO_CONNECT".
  2930. *
  2931. * Link Down Timeout != 0:
  2932. *
  2933. * The driver waits for the link to come up after link down
  2934. * before returning I/Os to OS with "DID_NO_CONNECT".
  2935. */
  2936. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  2937. ha->loop_down_abort_time =
  2938. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2939. } else {
  2940. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  2941. ha->loop_down_abort_time =
  2942. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2943. }
  2944. /* Need enough time to try and get the port back. */
  2945. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  2946. if (qlport_down_retry)
  2947. ha->port_down_retry_count = qlport_down_retry;
  2948. /* Set login_retry_count */
  2949. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  2950. if (ha->port_down_retry_count ==
  2951. le16_to_cpu(nv->port_down_retry_count) &&
  2952. ha->port_down_retry_count > 3)
  2953. ha->login_retry_count = ha->port_down_retry_count;
  2954. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2955. ha->login_retry_count = ha->port_down_retry_count;
  2956. if (ql2xloginretrycount)
  2957. ha->login_retry_count = ql2xloginretrycount;
  2958. /* Enable ZIO. */
  2959. if (!ha->flags.init_done) {
  2960. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  2961. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2962. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  2963. le16_to_cpu(icb->interrupt_delay_timer): 2;
  2964. }
  2965. icb->firmware_options_2 &= __constant_cpu_to_le32(
  2966. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  2967. ha->flags.process_response_queue = 0;
  2968. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2969. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  2970. "(%d us).\n", ha->host_no, ha->zio_mode,
  2971. ha->zio_timer * 100));
  2972. qla_printk(KERN_INFO, ha,
  2973. "ZIO mode %d enabled; timer delay (%d us).\n",
  2974. ha->zio_mode, ha->zio_timer * 100);
  2975. icb->firmware_options_2 |= cpu_to_le32(
  2976. (uint32_t)ha->zio_mode);
  2977. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  2978. ha->flags.process_response_queue = 1;
  2979. }
  2980. if (rval) {
  2981. DEBUG2_3(printk(KERN_WARNING
  2982. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  2983. }
  2984. return (rval);
  2985. }
  2986. #if defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE)
  2987. int
  2988. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  2989. {
  2990. int rval, num, i;
  2991. uint32_t cnt;
  2992. uint16_t *risc_code;
  2993. uint32_t risc_addr, risc_size;
  2994. uint16_t *req_ring;
  2995. struct qla_fw_info *fw_iter;
  2996. rval = QLA_SUCCESS;
  2997. /* Load firmware sequences */
  2998. fw_iter = ha->brd_info->fw_info;
  2999. *srisc_addr = *ha->brd_info->fw_info->fwstart;
  3000. while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
  3001. risc_code = fw_iter->fwcode;
  3002. risc_size = *fw_iter->fwlen;
  3003. if (fw_iter->addressing == FW_INFO_ADDR_NORMAL)
  3004. risc_addr = *fw_iter->fwstart;
  3005. else
  3006. risc_addr = *fw_iter->lfwstart;
  3007. num = 0;
  3008. rval = 0;
  3009. while (risc_size > 0 && !rval) {
  3010. cnt = (uint16_t)(ha->fw_transfer_size >> 1);
  3011. if (cnt > risc_size)
  3012. cnt = risc_size;
  3013. DEBUG7(printk("scsi(%ld): Loading risc segment@ "
  3014. "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
  3015. ha->host_no, risc_code, cnt, risc_addr));
  3016. req_ring = (uint16_t *)ha->request_ring;
  3017. for (i = 0; i < cnt; i++)
  3018. req_ring[i] = cpu_to_le16(risc_code[i]);
  3019. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3020. cnt);
  3021. if (rval) {
  3022. DEBUG(printk("scsi(%ld): [ERROR] Failed to "
  3023. "load segment %d of firmware\n",
  3024. ha->host_no, num));
  3025. qla_printk(KERN_WARNING, ha,
  3026. "[ERROR] Failed to load segment %d of "
  3027. "firmware\n", num);
  3028. qla2x00_dump_regs(ha);
  3029. break;
  3030. }
  3031. risc_code += cnt;
  3032. risc_addr += cnt;
  3033. risc_size -= cnt;
  3034. num++;
  3035. }
  3036. /* Next firmware sequence */
  3037. fw_iter++;
  3038. }
  3039. return rval;
  3040. }
  3041. int
  3042. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3043. {
  3044. int rval, num, i;
  3045. uint32_t cnt;
  3046. uint32_t *risc_code;
  3047. uint32_t risc_addr, risc_size;
  3048. uint32_t *req_ring;
  3049. struct qla_fw_info *fw_iter;
  3050. rval = QLA_SUCCESS;
  3051. /* Load firmware sequences */
  3052. fw_iter = ha->brd_info->fw_info;
  3053. *srisc_addr = *((uint32_t *)fw_iter->lfwstart);
  3054. while (fw_iter->addressing != FW_INFO_ADDR_NOMORE) {
  3055. risc_code = (uint32_t *)fw_iter->fwcode;
  3056. risc_size = *((uint32_t *)fw_iter->fwlen);
  3057. risc_addr = *((uint32_t *)fw_iter->lfwstart);
  3058. num = 0;
  3059. rval = 0;
  3060. while (risc_size > 0 && !rval) {
  3061. cnt = (uint32_t)(ha->fw_transfer_size >> 2);
  3062. if (cnt > risc_size)
  3063. cnt = risc_size;
  3064. DEBUG7(printk("scsi(%ld): Loading risc segment@ "
  3065. "addr %p, number of bytes 0x%x, offset 0x%lx.\n",
  3066. ha->host_no, risc_code, cnt, risc_addr));
  3067. req_ring = (uint32_t *)ha->request_ring;
  3068. for (i = 0; i < cnt; i++)
  3069. req_ring[i] = cpu_to_le32(risc_code[i]);
  3070. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3071. cnt);
  3072. if (rval) {
  3073. DEBUG(printk("scsi(%ld): [ERROR] Failed to "
  3074. "load segment %d of firmware\n",
  3075. ha->host_no, num));
  3076. qla_printk(KERN_WARNING, ha,
  3077. "[ERROR] Failed to load segment %d of "
  3078. "firmware\n", num);
  3079. qla2x00_dump_regs(ha);
  3080. break;
  3081. }
  3082. risc_code += cnt;
  3083. risc_addr += cnt;
  3084. risc_size -= cnt;
  3085. num++;
  3086. }
  3087. /* Next firmware sequence */
  3088. fw_iter++;
  3089. }
  3090. return rval;
  3091. }
  3092. int
  3093. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3094. {
  3095. int rval;
  3096. int segments, fragment;
  3097. uint32_t faddr;
  3098. uint32_t *dcode, dlen;
  3099. uint32_t risc_addr;
  3100. uint32_t risc_size;
  3101. uint32_t i;
  3102. rval = QLA_SUCCESS;
  3103. segments = FA_RISC_CODE_SEGMENTS;
  3104. faddr = FA_RISC_CODE_ADDR;
  3105. dcode = (uint32_t *)ha->request_ring;
  3106. *srisc_addr = 0;
  3107. /* Validate firmware image by checking version. */
  3108. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3109. for (i = 0; i < 4; i++)
  3110. dcode[i] = be32_to_cpu(dcode[i]);
  3111. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3112. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3113. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3114. dcode[3] == 0)) {
  3115. qla_printk(KERN_WARNING, ha,
  3116. "Unable to verify integrity of flash firmware image!\n");
  3117. qla_printk(KERN_WARNING, ha,
  3118. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3119. dcode[1], dcode[2], dcode[3]);
  3120. return QLA_FUNCTION_FAILED;
  3121. }
  3122. while (segments && rval == QLA_SUCCESS) {
  3123. /* Read segment's load information. */
  3124. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3125. risc_addr = be32_to_cpu(dcode[2]);
  3126. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3127. risc_size = be32_to_cpu(dcode[3]);
  3128. fragment = 0;
  3129. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3130. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3131. if (dlen > risc_size)
  3132. dlen = risc_size;
  3133. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3134. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3135. ha->host_no, risc_addr, dlen, faddr));
  3136. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3137. for (i = 0; i < dlen; i++)
  3138. dcode[i] = swab32(dcode[i]);
  3139. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3140. dlen);
  3141. if (rval) {
  3142. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3143. "segment %d of firmware\n", ha->host_no,
  3144. fragment));
  3145. qla_printk(KERN_WARNING, ha,
  3146. "[ERROR] Failed to load segment %d of "
  3147. "firmware\n", fragment);
  3148. break;
  3149. }
  3150. faddr += dlen;
  3151. risc_addr += dlen;
  3152. risc_size -= dlen;
  3153. fragment++;
  3154. }
  3155. /* Next segment. */
  3156. segments--;
  3157. }
  3158. return rval;
  3159. }
  3160. #else /* !defined(CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE) */
  3161. int
  3162. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3163. {
  3164. int rval;
  3165. int i, fragment;
  3166. uint16_t *wcode, *fwcode;
  3167. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3168. struct fw_blob *blob;
  3169. /* Load firmware blob. */
  3170. blob = qla2x00_request_firmware(ha);
  3171. if (!blob) {
  3172. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3173. return QLA_FUNCTION_FAILED;
  3174. }
  3175. rval = QLA_SUCCESS;
  3176. wcode = (uint16_t *)ha->request_ring;
  3177. *srisc_addr = 0;
  3178. fwcode = (uint16_t *)blob->fw->data;
  3179. fwclen = 0;
  3180. /* Validate firmware image by checking version. */
  3181. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3182. qla_printk(KERN_WARNING, ha,
  3183. "Unable to verify integrity of firmware image (%Zd)!\n",
  3184. blob->fw->size);
  3185. goto fail_fw_integrity;
  3186. }
  3187. for (i = 0; i < 4; i++)
  3188. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3189. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3190. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3191. wcode[2] == 0 && wcode[3] == 0)) {
  3192. qla_printk(KERN_WARNING, ha,
  3193. "Unable to verify integrity of firmware image!\n");
  3194. qla_printk(KERN_WARNING, ha,
  3195. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3196. wcode[1], wcode[2], wcode[3]);
  3197. goto fail_fw_integrity;
  3198. }
  3199. seg = blob->segs;
  3200. while (*seg && rval == QLA_SUCCESS) {
  3201. risc_addr = *seg;
  3202. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3203. risc_size = be16_to_cpu(fwcode[3]);
  3204. /* Validate firmware image size. */
  3205. fwclen += risc_size * sizeof(uint16_t);
  3206. if (blob->fw->size < fwclen) {
  3207. qla_printk(KERN_WARNING, ha,
  3208. "Unable to verify integrity of firmware image "
  3209. "(%Zd)!\n", blob->fw->size);
  3210. goto fail_fw_integrity;
  3211. }
  3212. fragment = 0;
  3213. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3214. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3215. if (wlen > risc_size)
  3216. wlen = risc_size;
  3217. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3218. "addr %x, number of words 0x%x.\n", ha->host_no,
  3219. risc_addr, wlen));
  3220. for (i = 0; i < wlen; i++)
  3221. wcode[i] = swab16(fwcode[i]);
  3222. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3223. wlen);
  3224. if (rval) {
  3225. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3226. "segment %d of firmware\n", ha->host_no,
  3227. fragment));
  3228. qla_printk(KERN_WARNING, ha,
  3229. "[ERROR] Failed to load segment %d of "
  3230. "firmware\n", fragment);
  3231. break;
  3232. }
  3233. fwcode += wlen;
  3234. risc_addr += wlen;
  3235. risc_size -= wlen;
  3236. fragment++;
  3237. }
  3238. /* Next segment. */
  3239. seg++;
  3240. }
  3241. return rval;
  3242. fail_fw_integrity:
  3243. return QLA_FUNCTION_FAILED;
  3244. }
  3245. int
  3246. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3247. {
  3248. int rval;
  3249. int segments, fragment;
  3250. uint32_t *dcode, dlen;
  3251. uint32_t risc_addr;
  3252. uint32_t risc_size;
  3253. uint32_t i;
  3254. struct fw_blob *blob;
  3255. uint32_t *fwcode, fwclen;
  3256. /* Load firmware blob. */
  3257. blob = qla2x00_request_firmware(ha);
  3258. if (!blob) {
  3259. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3260. return QLA_FUNCTION_FAILED;
  3261. }
  3262. rval = QLA_SUCCESS;
  3263. segments = FA_RISC_CODE_SEGMENTS;
  3264. dcode = (uint32_t *)ha->request_ring;
  3265. *srisc_addr = 0;
  3266. fwcode = (uint32_t *)blob->fw->data;
  3267. fwclen = 0;
  3268. /* Validate firmware image by checking version. */
  3269. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3270. qla_printk(KERN_WARNING, ha,
  3271. "Unable to verify integrity of firmware image (%Zd)!\n",
  3272. blob->fw->size);
  3273. goto fail_fw_integrity;
  3274. }
  3275. for (i = 0; i < 4; i++)
  3276. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3277. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3278. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3279. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3280. dcode[3] == 0)) {
  3281. qla_printk(KERN_WARNING, ha,
  3282. "Unable to verify integrity of firmware image!\n");
  3283. qla_printk(KERN_WARNING, ha,
  3284. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3285. dcode[1], dcode[2], dcode[3]);
  3286. goto fail_fw_integrity;
  3287. }
  3288. while (segments && rval == QLA_SUCCESS) {
  3289. risc_addr = be32_to_cpu(fwcode[2]);
  3290. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3291. risc_size = be32_to_cpu(fwcode[3]);
  3292. /* Validate firmware image size. */
  3293. fwclen += risc_size * sizeof(uint32_t);
  3294. if (blob->fw->size < fwclen) {
  3295. qla_printk(KERN_WARNING, ha,
  3296. "Unable to verify integrity of firmware image "
  3297. "(%Zd)!\n", blob->fw->size);
  3298. goto fail_fw_integrity;
  3299. }
  3300. fragment = 0;
  3301. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3302. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3303. if (dlen > risc_size)
  3304. dlen = risc_size;
  3305. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3306. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3307. risc_addr, dlen));
  3308. for (i = 0; i < dlen; i++)
  3309. dcode[i] = swab32(fwcode[i]);
  3310. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3311. dlen);
  3312. if (rval) {
  3313. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3314. "segment %d of firmware\n", ha->host_no,
  3315. fragment));
  3316. qla_printk(KERN_WARNING, ha,
  3317. "[ERROR] Failed to load segment %d of "
  3318. "firmware\n", fragment);
  3319. break;
  3320. }
  3321. fwcode += dlen;
  3322. risc_addr += dlen;
  3323. risc_size -= dlen;
  3324. fragment++;
  3325. }
  3326. /* Next segment. */
  3327. segments--;
  3328. }
  3329. return rval;
  3330. fail_fw_integrity:
  3331. return QLA_FUNCTION_FAILED;
  3332. }
  3333. #endif