iwl4965-base.c 251 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-core.h"
  46. #include "iwl-4965.h"
  47. #include "iwl-helpers.h"
  48. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  49. struct iwl4965_tx_queue *txq);
  50. /******************************************************************************
  51. *
  52. * module boiler plate
  53. *
  54. ******************************************************************************/
  55. /* module parameters */
  56. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  57. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  58. static int iwl4965_param_disable; /* def: enable radio */
  59. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  60. int iwl4965_param_hwcrypto; /* def: using software encryption */
  61. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  62. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  63. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  64. /*
  65. * module name, copyright, version, etc.
  66. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  67. */
  68. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  69. #ifdef CONFIG_IWL4965_DEBUG
  70. #define VD "d"
  71. #else
  72. #define VD
  73. #endif
  74. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  75. #define VS "s"
  76. #else
  77. #define VS
  78. #endif
  79. #define DRV_VERSION IWLWIFI_VERSION VD VS
  80. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  81. MODULE_VERSION(DRV_VERSION);
  82. MODULE_AUTHOR(DRV_COPYRIGHT);
  83. MODULE_LICENSE("GPL");
  84. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  85. {
  86. u16 fc = le16_to_cpu(hdr->frame_control);
  87. int hdr_len = ieee80211_get_hdrlen(fc);
  88. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  89. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  90. return NULL;
  91. }
  92. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  93. struct iwl4965_priv *priv, enum ieee80211_band band)
  94. {
  95. return priv->hw->wiphy->bands[band];
  96. }
  97. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  98. {
  99. /* Single white space is for Linksys APs */
  100. if (essid_len == 1 && essid[0] == ' ')
  101. return 1;
  102. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  103. while (essid_len) {
  104. essid_len--;
  105. if (essid[essid_len] != '\0')
  106. return 0;
  107. }
  108. return 1;
  109. }
  110. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  111. {
  112. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  113. const char *s = essid;
  114. char *d = escaped;
  115. if (iwl4965_is_empty_essid(essid, essid_len)) {
  116. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  117. return escaped;
  118. }
  119. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  120. while (essid_len--) {
  121. if (*s == '\0') {
  122. *d++ = '\\';
  123. *d++ = '0';
  124. s++;
  125. } else
  126. *d++ = *s++;
  127. }
  128. *d = '\0';
  129. return escaped;
  130. }
  131. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  132. * DMA services
  133. *
  134. * Theory of operation
  135. *
  136. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  137. * of buffer descriptors, each of which points to one or more data buffers for
  138. * the device to read from or fill. Driver and device exchange status of each
  139. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  140. * entries in each circular buffer, to protect against confusing empty and full
  141. * queue states.
  142. *
  143. * The device reads or writes the data in the queues via the device's several
  144. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  145. *
  146. * For Tx queue, there are low mark and high mark limits. If, after queuing
  147. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  148. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  149. * Tx queue resumed.
  150. *
  151. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  152. * queue (#4) for sending commands to the device firmware, and 15 other
  153. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  154. *
  155. * See more detailed info in iwl-4965-hw.h.
  156. ***************************************************/
  157. int iwl4965_queue_space(const struct iwl4965_queue *q)
  158. {
  159. int s = q->read_ptr - q->write_ptr;
  160. if (q->read_ptr > q->write_ptr)
  161. s -= q->n_bd;
  162. if (s <= 0)
  163. s += q->n_window;
  164. /* keep some reserve to not confuse empty and full situations */
  165. s -= 2;
  166. if (s < 0)
  167. s = 0;
  168. return s;
  169. }
  170. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  171. {
  172. return q->write_ptr > q->read_ptr ?
  173. (i >= q->read_ptr && i < q->write_ptr) :
  174. !(i < q->read_ptr && i >= q->write_ptr);
  175. }
  176. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  177. {
  178. /* This is for scan command, the big buffer at end of command array */
  179. if (is_huge)
  180. return q->n_window; /* must be power of 2 */
  181. /* Otherwise, use normal size buffers */
  182. return index & (q->n_window - 1);
  183. }
  184. /**
  185. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  186. */
  187. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  188. int count, int slots_num, u32 id)
  189. {
  190. q->n_bd = count;
  191. q->n_window = slots_num;
  192. q->id = id;
  193. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  194. * and iwl_queue_dec_wrap are broken. */
  195. BUG_ON(!is_power_of_2(count));
  196. /* slots_num must be power-of-two size, otherwise
  197. * get_cmd_index is broken. */
  198. BUG_ON(!is_power_of_2(slots_num));
  199. q->low_mark = q->n_window / 4;
  200. if (q->low_mark < 4)
  201. q->low_mark = 4;
  202. q->high_mark = q->n_window / 8;
  203. if (q->high_mark < 2)
  204. q->high_mark = 2;
  205. q->write_ptr = q->read_ptr = 0;
  206. return 0;
  207. }
  208. /**
  209. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  210. */
  211. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  212. struct iwl4965_tx_queue *txq, u32 id)
  213. {
  214. struct pci_dev *dev = priv->pci_dev;
  215. /* Driver private data, only for Tx (not command) queues,
  216. * not shared with device. */
  217. if (id != IWL_CMD_QUEUE_NUM) {
  218. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  219. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  220. if (!txq->txb) {
  221. IWL_ERROR("kmalloc for auxiliary BD "
  222. "structures failed\n");
  223. goto error;
  224. }
  225. } else
  226. txq->txb = NULL;
  227. /* Circular buffer of transmit frame descriptors (TFDs),
  228. * shared with device */
  229. txq->bd = pci_alloc_consistent(dev,
  230. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  231. &txq->q.dma_addr);
  232. if (!txq->bd) {
  233. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  234. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  235. goto error;
  236. }
  237. txq->q.id = id;
  238. return 0;
  239. error:
  240. if (txq->txb) {
  241. kfree(txq->txb);
  242. txq->txb = NULL;
  243. }
  244. return -ENOMEM;
  245. }
  246. /**
  247. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  248. */
  249. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  250. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  251. {
  252. struct pci_dev *dev = priv->pci_dev;
  253. int len;
  254. int rc = 0;
  255. /*
  256. * Alloc buffer array for commands (Tx or other types of commands).
  257. * For the command queue (#4), allocate command space + one big
  258. * command for scan, since scan command is very huge; the system will
  259. * not have two scans at the same time, so only one is needed.
  260. * For normal Tx queues (all other queues), no super-size command
  261. * space is needed.
  262. */
  263. len = sizeof(struct iwl4965_cmd) * slots_num;
  264. if (txq_id == IWL_CMD_QUEUE_NUM)
  265. len += IWL_MAX_SCAN_SIZE;
  266. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  267. if (!txq->cmd)
  268. return -ENOMEM;
  269. /* Alloc driver data array and TFD circular buffer */
  270. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  271. if (rc) {
  272. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  273. return -ENOMEM;
  274. }
  275. txq->need_update = 0;
  276. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  277. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  278. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  279. /* Initialize queue's high/low-water marks, and head/tail indexes */
  280. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  281. /* Tell device where to find queue */
  282. iwl4965_hw_tx_queue_init(priv, txq);
  283. return 0;
  284. }
  285. /**
  286. * iwl4965_tx_queue_free - Deallocate DMA queue.
  287. * @txq: Transmit queue to deallocate.
  288. *
  289. * Empty queue by removing and destroying all BD's.
  290. * Free all buffers.
  291. * 0-fill, but do not free "txq" descriptor structure.
  292. */
  293. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  294. {
  295. struct iwl4965_queue *q = &txq->q;
  296. struct pci_dev *dev = priv->pci_dev;
  297. int len;
  298. if (q->n_bd == 0)
  299. return;
  300. /* first, empty all BD's */
  301. for (; q->write_ptr != q->read_ptr;
  302. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  303. iwl4965_hw_txq_free_tfd(priv, txq);
  304. len = sizeof(struct iwl4965_cmd) * q->n_window;
  305. if (q->id == IWL_CMD_QUEUE_NUM)
  306. len += IWL_MAX_SCAN_SIZE;
  307. /* De-alloc array of command/tx buffers */
  308. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  309. /* De-alloc circular buffer of TFDs */
  310. if (txq->q.n_bd)
  311. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  312. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  313. /* De-alloc array of per-TFD driver data */
  314. if (txq->txb) {
  315. kfree(txq->txb);
  316. txq->txb = NULL;
  317. }
  318. /* 0-fill queue descriptor structure */
  319. memset(txq, 0, sizeof(*txq));
  320. }
  321. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  322. /*************** STATION TABLE MANAGEMENT ****
  323. * mac80211 should be examined to determine if sta_info is duplicating
  324. * the functionality provided here
  325. */
  326. /**************************************************************/
  327. #if 0 /* temporary disable till we add real remove station */
  328. /**
  329. * iwl4965_remove_station - Remove driver's knowledge of station.
  330. *
  331. * NOTE: This does not remove station from device's station table.
  332. */
  333. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  334. {
  335. int index = IWL_INVALID_STATION;
  336. int i;
  337. unsigned long flags;
  338. spin_lock_irqsave(&priv->sta_lock, flags);
  339. if (is_ap)
  340. index = IWL_AP_ID;
  341. else if (is_broadcast_ether_addr(addr))
  342. index = priv->hw_setting.bcast_sta_id;
  343. else
  344. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  345. if (priv->stations[i].used &&
  346. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  347. addr)) {
  348. index = i;
  349. break;
  350. }
  351. if (unlikely(index == IWL_INVALID_STATION))
  352. goto out;
  353. if (priv->stations[index].used) {
  354. priv->stations[index].used = 0;
  355. priv->num_stations--;
  356. }
  357. BUG_ON(priv->num_stations < 0);
  358. out:
  359. spin_unlock_irqrestore(&priv->sta_lock, flags);
  360. return 0;
  361. }
  362. #endif
  363. /**
  364. * iwl4965_clear_stations_table - Clear the driver's station table
  365. *
  366. * NOTE: This does not clear or otherwise alter the device's station table.
  367. */
  368. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  369. {
  370. unsigned long flags;
  371. spin_lock_irqsave(&priv->sta_lock, flags);
  372. priv->num_stations = 0;
  373. memset(priv->stations, 0, sizeof(priv->stations));
  374. spin_unlock_irqrestore(&priv->sta_lock, flags);
  375. }
  376. /**
  377. * iwl4965_add_station_flags - Add station to tables in driver and device
  378. */
  379. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  380. int is_ap, u8 flags, void *ht_data)
  381. {
  382. int i;
  383. int index = IWL_INVALID_STATION;
  384. struct iwl4965_station_entry *station;
  385. unsigned long flags_spin;
  386. DECLARE_MAC_BUF(mac);
  387. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  388. if (is_ap)
  389. index = IWL_AP_ID;
  390. else if (is_broadcast_ether_addr(addr))
  391. index = priv->hw_setting.bcast_sta_id;
  392. else
  393. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  394. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  395. addr)) {
  396. index = i;
  397. break;
  398. }
  399. if (!priv->stations[i].used &&
  400. index == IWL_INVALID_STATION)
  401. index = i;
  402. }
  403. /* These two conditions have the same outcome, but keep them separate
  404. since they have different meanings */
  405. if (unlikely(index == IWL_INVALID_STATION)) {
  406. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  407. return index;
  408. }
  409. if (priv->stations[index].used &&
  410. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. return index;
  413. }
  414. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  415. station = &priv->stations[index];
  416. station->used = 1;
  417. priv->num_stations++;
  418. /* Set up the REPLY_ADD_STA command to send to device */
  419. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  420. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  421. station->sta.mode = 0;
  422. station->sta.sta.sta_id = index;
  423. station->sta.station_flags = 0;
  424. #ifdef CONFIG_IWL4965_HT
  425. /* BCAST station and IBSS stations do not work in HT mode */
  426. if (index != priv->hw_setting.bcast_sta_id &&
  427. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  428. iwl4965_set_ht_add_station(priv, index,
  429. (struct ieee80211_ht_info *) ht_data);
  430. #endif /*CONFIG_IWL4965_HT*/
  431. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  432. /* Add station to device's station table */
  433. iwl4965_send_add_station(priv, &station->sta, flags);
  434. return index;
  435. }
  436. /*************** DRIVER STATUS FUNCTIONS *****/
  437. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  438. {
  439. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  440. * set but EXIT_PENDING is not */
  441. return test_bit(STATUS_READY, &priv->status) &&
  442. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  443. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  444. }
  445. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  446. {
  447. return test_bit(STATUS_ALIVE, &priv->status);
  448. }
  449. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  450. {
  451. return test_bit(STATUS_INIT, &priv->status);
  452. }
  453. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  454. {
  455. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  456. test_bit(STATUS_RF_KILL_SW, &priv->status);
  457. }
  458. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  459. {
  460. if (iwl4965_is_rfkill(priv))
  461. return 0;
  462. return iwl4965_is_ready(priv);
  463. }
  464. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  465. #define IWL_CMD(x) case x : return #x
  466. static const char *get_cmd_string(u8 cmd)
  467. {
  468. switch (cmd) {
  469. IWL_CMD(REPLY_ALIVE);
  470. IWL_CMD(REPLY_ERROR);
  471. IWL_CMD(REPLY_RXON);
  472. IWL_CMD(REPLY_RXON_ASSOC);
  473. IWL_CMD(REPLY_QOS_PARAM);
  474. IWL_CMD(REPLY_RXON_TIMING);
  475. IWL_CMD(REPLY_ADD_STA);
  476. IWL_CMD(REPLY_REMOVE_STA);
  477. IWL_CMD(REPLY_REMOVE_ALL_STA);
  478. IWL_CMD(REPLY_TX);
  479. IWL_CMD(REPLY_RATE_SCALE);
  480. IWL_CMD(REPLY_LEDS_CMD);
  481. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  482. IWL_CMD(RADAR_NOTIFICATION);
  483. IWL_CMD(REPLY_QUIET_CMD);
  484. IWL_CMD(REPLY_CHANNEL_SWITCH);
  485. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  486. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  487. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  488. IWL_CMD(POWER_TABLE_CMD);
  489. IWL_CMD(PM_SLEEP_NOTIFICATION);
  490. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  491. IWL_CMD(REPLY_SCAN_CMD);
  492. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  493. IWL_CMD(SCAN_START_NOTIFICATION);
  494. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  495. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  496. IWL_CMD(BEACON_NOTIFICATION);
  497. IWL_CMD(REPLY_TX_BEACON);
  498. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  499. IWL_CMD(QUIET_NOTIFICATION);
  500. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  501. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  502. IWL_CMD(REPLY_BT_CONFIG);
  503. IWL_CMD(REPLY_STATISTICS_CMD);
  504. IWL_CMD(STATISTICS_NOTIFICATION);
  505. IWL_CMD(REPLY_CARD_STATE_CMD);
  506. IWL_CMD(CARD_STATE_NOTIFICATION);
  507. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  508. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  509. IWL_CMD(SENSITIVITY_CMD);
  510. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  511. IWL_CMD(REPLY_RX_PHY_CMD);
  512. IWL_CMD(REPLY_RX_MPDU_CMD);
  513. IWL_CMD(REPLY_4965_RX);
  514. IWL_CMD(REPLY_COMPRESSED_BA);
  515. default:
  516. return "UNKNOWN";
  517. }
  518. }
  519. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  520. /**
  521. * iwl4965_enqueue_hcmd - enqueue a uCode command
  522. * @priv: device private data point
  523. * @cmd: a point to the ucode command structure
  524. *
  525. * The function returns < 0 values to indicate the operation is
  526. * failed. On success, it turns the index (> 0) of command in the
  527. * command queue.
  528. */
  529. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  530. {
  531. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  532. struct iwl4965_queue *q = &txq->q;
  533. struct iwl4965_tfd_frame *tfd;
  534. u32 *control_flags;
  535. struct iwl4965_cmd *out_cmd;
  536. u32 idx;
  537. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  538. dma_addr_t phys_addr;
  539. int ret;
  540. unsigned long flags;
  541. /* If any of the command structures end up being larger than
  542. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  543. * we will need to increase the size of the TFD entries */
  544. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  545. !(cmd->meta.flags & CMD_SIZE_HUGE));
  546. if (iwl4965_is_rfkill(priv)) {
  547. IWL_DEBUG_INFO("Not sending command - RF KILL");
  548. return -EIO;
  549. }
  550. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  551. IWL_ERROR("No space for Tx\n");
  552. return -ENOSPC;
  553. }
  554. spin_lock_irqsave(&priv->hcmd_lock, flags);
  555. tfd = &txq->bd[q->write_ptr];
  556. memset(tfd, 0, sizeof(*tfd));
  557. control_flags = (u32 *) tfd;
  558. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  559. out_cmd = &txq->cmd[idx];
  560. out_cmd->hdr.cmd = cmd->id;
  561. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  562. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  563. /* At this point, the out_cmd now has all of the incoming cmd
  564. * information */
  565. out_cmd->hdr.flags = 0;
  566. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  567. INDEX_TO_SEQ(q->write_ptr));
  568. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  569. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  570. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  571. offsetof(struct iwl4965_cmd, hdr);
  572. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  573. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  574. "%d bytes at %d[%d]:%d\n",
  575. get_cmd_string(out_cmd->hdr.cmd),
  576. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  577. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  578. txq->need_update = 1;
  579. /* Set up entry in queue's byte count circular buffer */
  580. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  581. /* Increment and update queue's write index */
  582. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  583. iwl4965_tx_queue_update_write_ptr(priv, txq);
  584. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  585. return ret ? ret : idx;
  586. }
  587. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  588. {
  589. int ret;
  590. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  591. /* An asynchronous command can not expect an SKB to be set. */
  592. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  593. /* An asynchronous command MUST have a callback. */
  594. BUG_ON(!cmd->meta.u.callback);
  595. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  596. return -EBUSY;
  597. ret = iwl4965_enqueue_hcmd(priv, cmd);
  598. if (ret < 0) {
  599. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  600. get_cmd_string(cmd->id), ret);
  601. return ret;
  602. }
  603. return 0;
  604. }
  605. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  606. {
  607. int cmd_idx;
  608. int ret;
  609. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  610. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  611. /* A synchronous command can not have a callback set. */
  612. BUG_ON(cmd->meta.u.callback != NULL);
  613. if (atomic_xchg(&entry, 1)) {
  614. IWL_ERROR("Error sending %s: Already sending a host command\n",
  615. get_cmd_string(cmd->id));
  616. return -EBUSY;
  617. }
  618. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  619. if (cmd->meta.flags & CMD_WANT_SKB)
  620. cmd->meta.source = &cmd->meta;
  621. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  622. if (cmd_idx < 0) {
  623. ret = cmd_idx;
  624. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  625. get_cmd_string(cmd->id), ret);
  626. goto out;
  627. }
  628. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  629. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  630. HOST_COMPLETE_TIMEOUT);
  631. if (!ret) {
  632. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  633. IWL_ERROR("Error sending %s: time out after %dms.\n",
  634. get_cmd_string(cmd->id),
  635. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  636. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  637. ret = -ETIMEDOUT;
  638. goto cancel;
  639. }
  640. }
  641. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  642. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  643. get_cmd_string(cmd->id));
  644. ret = -ECANCELED;
  645. goto fail;
  646. }
  647. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  648. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  649. get_cmd_string(cmd->id));
  650. ret = -EIO;
  651. goto fail;
  652. }
  653. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  654. IWL_ERROR("Error: Response NULL in '%s'\n",
  655. get_cmd_string(cmd->id));
  656. ret = -EIO;
  657. goto out;
  658. }
  659. ret = 0;
  660. goto out;
  661. cancel:
  662. if (cmd->meta.flags & CMD_WANT_SKB) {
  663. struct iwl4965_cmd *qcmd;
  664. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  665. * TX cmd queue. Otherwise in case the cmd comes
  666. * in later, it will possibly set an invalid
  667. * address (cmd->meta.source). */
  668. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  669. qcmd->meta.flags &= ~CMD_WANT_SKB;
  670. }
  671. fail:
  672. if (cmd->meta.u.skb) {
  673. dev_kfree_skb_any(cmd->meta.u.skb);
  674. cmd->meta.u.skb = NULL;
  675. }
  676. out:
  677. atomic_set(&entry, 0);
  678. return ret;
  679. }
  680. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  681. {
  682. if (cmd->meta.flags & CMD_ASYNC)
  683. return iwl4965_send_cmd_async(priv, cmd);
  684. return iwl4965_send_cmd_sync(priv, cmd);
  685. }
  686. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  687. {
  688. struct iwl4965_host_cmd cmd = {
  689. .id = id,
  690. .len = len,
  691. .data = data,
  692. };
  693. return iwl4965_send_cmd_sync(priv, &cmd);
  694. }
  695. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  696. {
  697. struct iwl4965_host_cmd cmd = {
  698. .id = id,
  699. .len = sizeof(val),
  700. .data = &val,
  701. };
  702. return iwl4965_send_cmd_sync(priv, &cmd);
  703. }
  704. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  705. {
  706. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  707. }
  708. /**
  709. * iwl4965_rxon_add_station - add station into station table.
  710. *
  711. * there is only one AP station with id= IWL_AP_ID
  712. * NOTE: mutex must be held before calling this fnction
  713. */
  714. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  715. const u8 *addr, int is_ap)
  716. {
  717. u8 sta_id;
  718. /* Add station to device's station table */
  719. #ifdef CONFIG_IWL4965_HT
  720. struct ieee80211_conf *conf = &priv->hw->conf;
  721. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  722. if ((is_ap) &&
  723. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  724. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  725. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  726. 0, cur_ht_config);
  727. else
  728. #endif /* CONFIG_IWL4965_HT */
  729. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  730. 0, NULL);
  731. /* Set up default rate scaling table in device's station table */
  732. iwl4965_add_station(priv, addr, is_ap);
  733. return sta_id;
  734. }
  735. /**
  736. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  737. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  738. * @channel: Any channel valid for the requested phymode
  739. * In addition to setting the staging RXON, priv->phymode is also set.
  740. *
  741. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  742. * in the staging RXON flag structure based on the phymode
  743. */
  744. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  745. enum ieee80211_band band,
  746. u16 channel)
  747. {
  748. if (!iwl4965_get_channel_info(priv, band, channel)) {
  749. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  750. channel, band);
  751. return -EINVAL;
  752. }
  753. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  754. (priv->band == band))
  755. return 0;
  756. priv->staging_rxon.channel = cpu_to_le16(channel);
  757. if (band == IEEE80211_BAND_5GHZ)
  758. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  759. else
  760. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  761. priv->band = band;
  762. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  763. return 0;
  764. }
  765. /**
  766. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  767. *
  768. * NOTE: This is really only useful during development and can eventually
  769. * be #ifdef'd out once the driver is stable and folks aren't actively
  770. * making changes
  771. */
  772. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  773. {
  774. int error = 0;
  775. int counter = 1;
  776. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  777. error |= le32_to_cpu(rxon->flags &
  778. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  779. RXON_FLG_RADAR_DETECT_MSK));
  780. if (error)
  781. IWL_WARNING("check 24G fields %d | %d\n",
  782. counter++, error);
  783. } else {
  784. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  785. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  786. if (error)
  787. IWL_WARNING("check 52 fields %d | %d\n",
  788. counter++, error);
  789. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  790. if (error)
  791. IWL_WARNING("check 52 CCK %d | %d\n",
  792. counter++, error);
  793. }
  794. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  795. if (error)
  796. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  797. /* make sure basic rates 6Mbps and 1Mbps are supported */
  798. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  799. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  800. if (error)
  801. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  802. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  803. if (error)
  804. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  805. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  806. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  807. if (error)
  808. IWL_WARNING("check CCK and short slot %d | %d\n",
  809. counter++, error);
  810. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  811. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  812. if (error)
  813. IWL_WARNING("check CCK & auto detect %d | %d\n",
  814. counter++, error);
  815. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  816. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  817. if (error)
  818. IWL_WARNING("check TGG and auto detect %d | %d\n",
  819. counter++, error);
  820. if (error)
  821. IWL_WARNING("Tuning to channel %d\n",
  822. le16_to_cpu(rxon->channel));
  823. if (error) {
  824. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  825. return -1;
  826. }
  827. return 0;
  828. }
  829. /**
  830. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  831. * @priv: staging_rxon is compared to active_rxon
  832. *
  833. * If the RXON structure is changing enough to require a new tune,
  834. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  835. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  836. */
  837. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  838. {
  839. /* These items are only settable from the full RXON command */
  840. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  841. compare_ether_addr(priv->staging_rxon.bssid_addr,
  842. priv->active_rxon.bssid_addr) ||
  843. compare_ether_addr(priv->staging_rxon.node_addr,
  844. priv->active_rxon.node_addr) ||
  845. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  846. priv->active_rxon.wlap_bssid_addr) ||
  847. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  848. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  849. (priv->staging_rxon.air_propagation !=
  850. priv->active_rxon.air_propagation) ||
  851. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  852. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  853. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  854. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  855. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  856. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  857. return 1;
  858. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  859. * be updated with the RXON_ASSOC command -- however only some
  860. * flag transitions are allowed using RXON_ASSOC */
  861. /* Check if we are not switching bands */
  862. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  863. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  864. return 1;
  865. /* Check if we are switching association toggle */
  866. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  867. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  868. return 1;
  869. return 0;
  870. }
  871. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  872. {
  873. int rc = 0;
  874. struct iwl4965_rx_packet *res = NULL;
  875. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  876. struct iwl4965_host_cmd cmd = {
  877. .id = REPLY_RXON_ASSOC,
  878. .len = sizeof(rxon_assoc),
  879. .meta.flags = CMD_WANT_SKB,
  880. .data = &rxon_assoc,
  881. };
  882. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  883. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  884. if ((rxon1->flags == rxon2->flags) &&
  885. (rxon1->filter_flags == rxon2->filter_flags) &&
  886. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  887. (rxon1->ofdm_ht_single_stream_basic_rates ==
  888. rxon2->ofdm_ht_single_stream_basic_rates) &&
  889. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  890. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  891. (rxon1->rx_chain == rxon2->rx_chain) &&
  892. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  893. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  894. return 0;
  895. }
  896. rxon_assoc.flags = priv->staging_rxon.flags;
  897. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  898. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  899. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  900. rxon_assoc.reserved = 0;
  901. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  902. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  903. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  904. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  905. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  906. rc = iwl4965_send_cmd_sync(priv, &cmd);
  907. if (rc)
  908. return rc;
  909. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  910. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  911. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  912. rc = -EIO;
  913. }
  914. priv->alloc_rxb_skb--;
  915. dev_kfree_skb_any(cmd.meta.u.skb);
  916. return rc;
  917. }
  918. /**
  919. * iwl4965_commit_rxon - commit staging_rxon to hardware
  920. *
  921. * The RXON command in staging_rxon is committed to the hardware and
  922. * the active_rxon structure is updated with the new data. This
  923. * function correctly transitions out of the RXON_ASSOC_MSK state if
  924. * a HW tune is required based on the RXON structure changes.
  925. */
  926. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  927. {
  928. /* cast away the const for active_rxon in this function */
  929. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  930. DECLARE_MAC_BUF(mac);
  931. int rc = 0;
  932. if (!iwl4965_is_alive(priv))
  933. return -1;
  934. /* always get timestamp with Rx frame */
  935. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  936. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  937. if (rc) {
  938. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  939. return -EINVAL;
  940. }
  941. /* If we don't need to send a full RXON, we can use
  942. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  943. * and other flags for the current radio configuration. */
  944. if (!iwl4965_full_rxon_required(priv)) {
  945. rc = iwl4965_send_rxon_assoc(priv);
  946. if (rc) {
  947. IWL_ERROR("Error setting RXON_ASSOC "
  948. "configuration (%d).\n", rc);
  949. return rc;
  950. }
  951. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  952. return 0;
  953. }
  954. /* station table will be cleared */
  955. priv->assoc_station_added = 0;
  956. #ifdef CONFIG_IWL4965_SENSITIVITY
  957. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  958. if (!priv->error_recovering)
  959. priv->start_calib = 0;
  960. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  961. #endif /* CONFIG_IWL4965_SENSITIVITY */
  962. /* If we are currently associated and the new config requires
  963. * an RXON_ASSOC and the new config wants the associated mask enabled,
  964. * we must clear the associated from the active configuration
  965. * before we apply the new config */
  966. if (iwl4965_is_associated(priv) &&
  967. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  968. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  969. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  970. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  971. sizeof(struct iwl4965_rxon_cmd),
  972. &priv->active_rxon);
  973. /* If the mask clearing failed then we set
  974. * active_rxon back to what it was previously */
  975. if (rc) {
  976. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  977. IWL_ERROR("Error clearing ASSOC_MSK on current "
  978. "configuration (%d).\n", rc);
  979. return rc;
  980. }
  981. }
  982. IWL_DEBUG_INFO("Sending RXON\n"
  983. "* with%s RXON_FILTER_ASSOC_MSK\n"
  984. "* channel = %d\n"
  985. "* bssid = %s\n",
  986. ((priv->staging_rxon.filter_flags &
  987. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  988. le16_to_cpu(priv->staging_rxon.channel),
  989. print_mac(mac, priv->staging_rxon.bssid_addr));
  990. /* Apply the new configuration */
  991. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  992. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  993. if (rc) {
  994. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  995. return rc;
  996. }
  997. iwl4965_clear_stations_table(priv);
  998. #ifdef CONFIG_IWL4965_SENSITIVITY
  999. if (!priv->error_recovering)
  1000. priv->start_calib = 0;
  1001. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1002. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1003. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1004. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1005. /* If we issue a new RXON command which required a tune then we must
  1006. * send a new TXPOWER command or we won't be able to Tx any frames */
  1007. rc = iwl4965_hw_reg_send_txpower(priv);
  1008. if (rc) {
  1009. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1010. return rc;
  1011. }
  1012. /* Add the broadcast address so we can send broadcast frames */
  1013. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1014. IWL_INVALID_STATION) {
  1015. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1016. return -EIO;
  1017. }
  1018. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1019. * add the IWL_AP_ID to the station rate table */
  1020. if (iwl4965_is_associated(priv) &&
  1021. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1022. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1023. == IWL_INVALID_STATION) {
  1024. IWL_ERROR("Error adding AP address for transmit.\n");
  1025. return -EIO;
  1026. }
  1027. priv->assoc_station_added = 1;
  1028. }
  1029. return 0;
  1030. }
  1031. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1032. {
  1033. struct iwl4965_bt_cmd bt_cmd = {
  1034. .flags = 3,
  1035. .lead_time = 0xAA,
  1036. .max_kill = 1,
  1037. .kill_ack_mask = 0,
  1038. .kill_cts_mask = 0,
  1039. };
  1040. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1041. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1042. }
  1043. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1044. {
  1045. int rc = 0;
  1046. struct iwl4965_rx_packet *res;
  1047. struct iwl4965_host_cmd cmd = {
  1048. .id = REPLY_SCAN_ABORT_CMD,
  1049. .meta.flags = CMD_WANT_SKB,
  1050. };
  1051. /* If there isn't a scan actively going on in the hardware
  1052. * then we are in between scan bands and not actually
  1053. * actively scanning, so don't send the abort command */
  1054. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1055. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1056. return 0;
  1057. }
  1058. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1059. if (rc) {
  1060. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1061. return rc;
  1062. }
  1063. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1064. if (res->u.status != CAN_ABORT_STATUS) {
  1065. /* The scan abort will return 1 for success or
  1066. * 2 for "failure". A failure condition can be
  1067. * due to simply not being in an active scan which
  1068. * can occur if we send the scan abort before we
  1069. * the microcode has notified us that a scan is
  1070. * completed. */
  1071. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1072. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1073. clear_bit(STATUS_SCAN_HW, &priv->status);
  1074. }
  1075. dev_kfree_skb_any(cmd.meta.u.skb);
  1076. return rc;
  1077. }
  1078. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1079. struct iwl4965_cmd *cmd,
  1080. struct sk_buff *skb)
  1081. {
  1082. return 1;
  1083. }
  1084. /*
  1085. * CARD_STATE_CMD
  1086. *
  1087. * Use: Sets the device's internal card state to enable, disable, or halt
  1088. *
  1089. * When in the 'enable' state the card operates as normal.
  1090. * When in the 'disable' state, the card enters into a low power mode.
  1091. * When in the 'halt' state, the card is shut down and must be fully
  1092. * restarted to come back on.
  1093. */
  1094. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1095. {
  1096. struct iwl4965_host_cmd cmd = {
  1097. .id = REPLY_CARD_STATE_CMD,
  1098. .len = sizeof(u32),
  1099. .data = &flags,
  1100. .meta.flags = meta_flag,
  1101. };
  1102. if (meta_flag & CMD_ASYNC)
  1103. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1104. return iwl4965_send_cmd(priv, &cmd);
  1105. }
  1106. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1107. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1108. {
  1109. struct iwl4965_rx_packet *res = NULL;
  1110. if (!skb) {
  1111. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1112. return 1;
  1113. }
  1114. res = (struct iwl4965_rx_packet *)skb->data;
  1115. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1116. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1117. res->hdr.flags);
  1118. return 1;
  1119. }
  1120. switch (res->u.add_sta.status) {
  1121. case ADD_STA_SUCCESS_MSK:
  1122. break;
  1123. default:
  1124. break;
  1125. }
  1126. /* We didn't cache the SKB; let the caller free it */
  1127. return 1;
  1128. }
  1129. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1130. struct iwl4965_addsta_cmd *sta, u8 flags)
  1131. {
  1132. struct iwl4965_rx_packet *res = NULL;
  1133. int rc = 0;
  1134. struct iwl4965_host_cmd cmd = {
  1135. .id = REPLY_ADD_STA,
  1136. .len = sizeof(struct iwl4965_addsta_cmd),
  1137. .meta.flags = flags,
  1138. .data = sta,
  1139. };
  1140. if (flags & CMD_ASYNC)
  1141. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1142. else
  1143. cmd.meta.flags |= CMD_WANT_SKB;
  1144. rc = iwl4965_send_cmd(priv, &cmd);
  1145. if (rc || (flags & CMD_ASYNC))
  1146. return rc;
  1147. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1148. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1149. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1150. res->hdr.flags);
  1151. rc = -EIO;
  1152. }
  1153. if (rc == 0) {
  1154. switch (res->u.add_sta.status) {
  1155. case ADD_STA_SUCCESS_MSK:
  1156. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1157. break;
  1158. default:
  1159. rc = -EIO;
  1160. IWL_WARNING("REPLY_ADD_STA failed\n");
  1161. break;
  1162. }
  1163. }
  1164. priv->alloc_rxb_skb--;
  1165. dev_kfree_skb_any(cmd.meta.u.skb);
  1166. return rc;
  1167. }
  1168. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1169. struct ieee80211_key_conf *keyconf,
  1170. u8 sta_id)
  1171. {
  1172. unsigned long flags;
  1173. __le16 key_flags = 0;
  1174. switch (keyconf->alg) {
  1175. case ALG_CCMP:
  1176. key_flags |= STA_KEY_FLG_CCMP;
  1177. key_flags |= cpu_to_le16(
  1178. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1179. key_flags &= ~STA_KEY_FLG_INVALID;
  1180. break;
  1181. case ALG_TKIP:
  1182. case ALG_WEP:
  1183. default:
  1184. return -EINVAL;
  1185. }
  1186. spin_lock_irqsave(&priv->sta_lock, flags);
  1187. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1188. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1189. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1190. keyconf->keylen);
  1191. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1192. keyconf->keylen);
  1193. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1194. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1195. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1196. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1197. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1198. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1199. return 0;
  1200. }
  1201. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1202. {
  1203. unsigned long flags;
  1204. spin_lock_irqsave(&priv->sta_lock, flags);
  1205. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1206. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1207. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1208. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1209. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1210. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1211. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1212. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1213. return 0;
  1214. }
  1215. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1216. {
  1217. struct list_head *element;
  1218. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1219. priv->frames_count);
  1220. while (!list_empty(&priv->free_frames)) {
  1221. element = priv->free_frames.next;
  1222. list_del(element);
  1223. kfree(list_entry(element, struct iwl4965_frame, list));
  1224. priv->frames_count--;
  1225. }
  1226. if (priv->frames_count) {
  1227. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1228. priv->frames_count);
  1229. priv->frames_count = 0;
  1230. }
  1231. }
  1232. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1233. {
  1234. struct iwl4965_frame *frame;
  1235. struct list_head *element;
  1236. if (list_empty(&priv->free_frames)) {
  1237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1238. if (!frame) {
  1239. IWL_ERROR("Could not allocate frame!\n");
  1240. return NULL;
  1241. }
  1242. priv->frames_count++;
  1243. return frame;
  1244. }
  1245. element = priv->free_frames.next;
  1246. list_del(element);
  1247. return list_entry(element, struct iwl4965_frame, list);
  1248. }
  1249. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1250. {
  1251. memset(frame, 0, sizeof(*frame));
  1252. list_add(&frame->list, &priv->free_frames);
  1253. }
  1254. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1255. struct ieee80211_hdr *hdr,
  1256. const u8 *dest, int left)
  1257. {
  1258. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1259. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1260. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1261. return 0;
  1262. if (priv->ibss_beacon->len > left)
  1263. return 0;
  1264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1265. return priv->ibss_beacon->len;
  1266. }
  1267. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1268. {
  1269. u8 i;
  1270. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1271. i = iwl4965_rates[i].next_ieee) {
  1272. if (rate_mask & (1 << i))
  1273. return iwl4965_rates[i].plcp;
  1274. }
  1275. return IWL_RATE_INVALID;
  1276. }
  1277. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1278. {
  1279. struct iwl4965_frame *frame;
  1280. unsigned int frame_size;
  1281. int rc;
  1282. u8 rate;
  1283. frame = iwl4965_get_free_frame(priv);
  1284. if (!frame) {
  1285. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1286. "command.\n");
  1287. return -ENOMEM;
  1288. }
  1289. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1290. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1291. 0xFF0);
  1292. if (rate == IWL_INVALID_RATE)
  1293. rate = IWL_RATE_6M_PLCP;
  1294. } else {
  1295. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1296. if (rate == IWL_INVALID_RATE)
  1297. rate = IWL_RATE_1M_PLCP;
  1298. }
  1299. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1300. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1301. &frame->u.cmd[0]);
  1302. iwl4965_free_frame(priv, frame);
  1303. return rc;
  1304. }
  1305. /******************************************************************************
  1306. *
  1307. * Misc. internal state and helper functions
  1308. *
  1309. ******************************************************************************/
  1310. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1311. {
  1312. if (priv->hw_setting.shared_virt)
  1313. pci_free_consistent(priv->pci_dev,
  1314. sizeof(struct iwl4965_shared),
  1315. priv->hw_setting.shared_virt,
  1316. priv->hw_setting.shared_phys);
  1317. }
  1318. /**
  1319. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1320. *
  1321. * return : set the bit for each supported rate insert in ie
  1322. */
  1323. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1324. u16 basic_rate, int *left)
  1325. {
  1326. u16 ret_rates = 0, bit;
  1327. int i;
  1328. u8 *cnt = ie;
  1329. u8 *rates = ie + 1;
  1330. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1331. if (bit & supported_rate) {
  1332. ret_rates |= bit;
  1333. rates[*cnt] = iwl4965_rates[i].ieee |
  1334. ((bit & basic_rate) ? 0x80 : 0x00);
  1335. (*cnt)++;
  1336. (*left)--;
  1337. if ((*left <= 0) ||
  1338. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1339. break;
  1340. }
  1341. }
  1342. return ret_rates;
  1343. }
  1344. /**
  1345. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1346. */
  1347. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1348. enum ieee80211_band band,
  1349. struct ieee80211_mgmt *frame,
  1350. int left, int is_direct)
  1351. {
  1352. int len = 0;
  1353. u8 *pos = NULL;
  1354. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1355. #ifdef CONFIG_IWL4965_HT
  1356. const struct ieee80211_supported_band *sband =
  1357. iwl4965_get_hw_mode(priv, band);
  1358. #endif /* CONFIG_IWL4965_HT */
  1359. /* Make sure there is enough space for the probe request,
  1360. * two mandatory IEs and the data */
  1361. left -= 24;
  1362. if (left < 0)
  1363. return 0;
  1364. len += 24;
  1365. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1366. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1367. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1368. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1369. frame->seq_ctrl = 0;
  1370. /* fill in our indirect SSID IE */
  1371. /* ...next IE... */
  1372. left -= 2;
  1373. if (left < 0)
  1374. return 0;
  1375. len += 2;
  1376. pos = &(frame->u.probe_req.variable[0]);
  1377. *pos++ = WLAN_EID_SSID;
  1378. *pos++ = 0;
  1379. /* fill in our direct SSID IE... */
  1380. if (is_direct) {
  1381. /* ...next IE... */
  1382. left -= 2 + priv->essid_len;
  1383. if (left < 0)
  1384. return 0;
  1385. /* ... fill it in... */
  1386. *pos++ = WLAN_EID_SSID;
  1387. *pos++ = priv->essid_len;
  1388. memcpy(pos, priv->essid, priv->essid_len);
  1389. pos += priv->essid_len;
  1390. len += 2 + priv->essid_len;
  1391. }
  1392. /* fill in supported rate */
  1393. /* ...next IE... */
  1394. left -= 2;
  1395. if (left < 0)
  1396. return 0;
  1397. /* ... fill it in... */
  1398. *pos++ = WLAN_EID_SUPP_RATES;
  1399. *pos = 0;
  1400. /* exclude 60M rate */
  1401. active_rates = priv->rates_mask;
  1402. active_rates &= ~IWL_RATE_60M_MASK;
  1403. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1404. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1405. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1406. active_rate_basic, &left);
  1407. active_rates &= ~ret_rates;
  1408. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1409. active_rate_basic, &left);
  1410. active_rates &= ~ret_rates;
  1411. len += 2 + *pos;
  1412. pos += (*pos) + 1;
  1413. if (active_rates == 0)
  1414. goto fill_end;
  1415. /* fill in supported extended rate */
  1416. /* ...next IE... */
  1417. left -= 2;
  1418. if (left < 0)
  1419. return 0;
  1420. /* ... fill it in... */
  1421. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1422. *pos = 0;
  1423. iwl4965_supported_rate_to_ie(pos, active_rates,
  1424. active_rate_basic, &left);
  1425. if (*pos > 0)
  1426. len += 2 + *pos;
  1427. #ifdef CONFIG_IWL4965_HT
  1428. if (sband && sband->ht_info.ht_supported) {
  1429. struct ieee80211_ht_cap *ht_cap;
  1430. pos += (*pos) + 1;
  1431. *pos++ = WLAN_EID_HT_CAPABILITY;
  1432. *pos++ = sizeof(struct ieee80211_ht_cap);
  1433. ht_cap = (struct ieee80211_ht_cap *)pos;
  1434. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1435. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1436. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1437. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1438. ((sband->ht_info.ampdu_density << 2) &
  1439. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1440. len += 2 + sizeof(struct ieee80211_ht_cap);
  1441. }
  1442. #endif /*CONFIG_IWL4965_HT */
  1443. fill_end:
  1444. return (u16)len;
  1445. }
  1446. /*
  1447. * QoS support
  1448. */
  1449. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1450. struct iwl4965_qosparam_cmd *qos)
  1451. {
  1452. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1453. sizeof(struct iwl4965_qosparam_cmd), qos);
  1454. }
  1455. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1456. {
  1457. u16 cw_min = 15;
  1458. u16 cw_max = 1023;
  1459. u8 aifs = 2;
  1460. u8 is_legacy = 0;
  1461. unsigned long flags;
  1462. int i;
  1463. spin_lock_irqsave(&priv->lock, flags);
  1464. priv->qos_data.qos_active = 0;
  1465. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1466. if (priv->qos_data.qos_enable)
  1467. priv->qos_data.qos_active = 1;
  1468. if (!(priv->active_rate & 0xfff0)) {
  1469. cw_min = 31;
  1470. is_legacy = 1;
  1471. }
  1472. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1473. if (priv->qos_data.qos_enable)
  1474. priv->qos_data.qos_active = 1;
  1475. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1476. cw_min = 31;
  1477. is_legacy = 1;
  1478. }
  1479. if (priv->qos_data.qos_active)
  1480. aifs = 3;
  1481. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1482. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1483. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1484. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1485. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1486. if (priv->qos_data.qos_active) {
  1487. i = 1;
  1488. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1489. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1490. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1491. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1492. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1493. i = 2;
  1494. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1495. cpu_to_le16((cw_min + 1) / 2 - 1);
  1496. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1497. cpu_to_le16(cw_max);
  1498. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1499. if (is_legacy)
  1500. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1501. cpu_to_le16(6016);
  1502. else
  1503. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1504. cpu_to_le16(3008);
  1505. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1506. i = 3;
  1507. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1508. cpu_to_le16((cw_min + 1) / 4 - 1);
  1509. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1510. cpu_to_le16((cw_max + 1) / 2 - 1);
  1511. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1512. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1513. if (is_legacy)
  1514. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1515. cpu_to_le16(3264);
  1516. else
  1517. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1518. cpu_to_le16(1504);
  1519. } else {
  1520. for (i = 1; i < 4; i++) {
  1521. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1522. cpu_to_le16(cw_min);
  1523. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1524. cpu_to_le16(cw_max);
  1525. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1526. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1527. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1528. }
  1529. }
  1530. IWL_DEBUG_QOS("set QoS to default \n");
  1531. spin_unlock_irqrestore(&priv->lock, flags);
  1532. }
  1533. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1534. {
  1535. unsigned long flags;
  1536. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1537. return;
  1538. if (!priv->qos_data.qos_enable)
  1539. return;
  1540. spin_lock_irqsave(&priv->lock, flags);
  1541. priv->qos_data.def_qos_parm.qos_flags = 0;
  1542. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1543. !priv->qos_data.qos_cap.q_AP.txop_request)
  1544. priv->qos_data.def_qos_parm.qos_flags |=
  1545. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1546. if (priv->qos_data.qos_active)
  1547. priv->qos_data.def_qos_parm.qos_flags |=
  1548. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1549. #ifdef CONFIG_IWL4965_HT
  1550. if (priv->current_ht_config.is_ht)
  1551. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1552. #endif /* CONFIG_IWL4965_HT */
  1553. spin_unlock_irqrestore(&priv->lock, flags);
  1554. if (force || iwl4965_is_associated(priv)) {
  1555. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1556. priv->qos_data.qos_active,
  1557. priv->qos_data.def_qos_parm.qos_flags);
  1558. iwl4965_send_qos_params_command(priv,
  1559. &(priv->qos_data.def_qos_parm));
  1560. }
  1561. }
  1562. /*
  1563. * Power management (not Tx power!) functions
  1564. */
  1565. #define MSEC_TO_USEC 1024
  1566. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1567. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1568. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1569. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1570. __constant_cpu_to_le32(X1), \
  1571. __constant_cpu_to_le32(X2), \
  1572. __constant_cpu_to_le32(X3), \
  1573. __constant_cpu_to_le32(X4)}
  1574. /* default power management (not Tx power) table values */
  1575. /* for tim 0-10 */
  1576. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1577. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1578. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1579. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1580. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1581. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1582. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1583. };
  1584. /* for tim > 10 */
  1585. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1586. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1587. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1588. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1589. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1590. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1591. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1592. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1593. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1594. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1595. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1596. };
  1597. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1598. {
  1599. int rc = 0, i;
  1600. struct iwl4965_power_mgr *pow_data;
  1601. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1602. u16 pci_pm;
  1603. IWL_DEBUG_POWER("Initialize power \n");
  1604. pow_data = &(priv->power_data);
  1605. memset(pow_data, 0, sizeof(*pow_data));
  1606. pow_data->active_index = IWL_POWER_RANGE_0;
  1607. pow_data->dtim_val = 0xffff;
  1608. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1609. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1610. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1611. if (rc != 0)
  1612. return 0;
  1613. else {
  1614. struct iwl4965_powertable_cmd *cmd;
  1615. IWL_DEBUG_POWER("adjust power command flags\n");
  1616. for (i = 0; i < IWL_POWER_AC; i++) {
  1617. cmd = &pow_data->pwr_range_0[i].cmd;
  1618. if (pci_pm & 0x1)
  1619. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1620. else
  1621. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1622. }
  1623. }
  1624. return rc;
  1625. }
  1626. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1627. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1628. {
  1629. int rc = 0, i;
  1630. u8 skip;
  1631. u32 max_sleep = 0;
  1632. struct iwl4965_power_vec_entry *range;
  1633. u8 period = 0;
  1634. struct iwl4965_power_mgr *pow_data;
  1635. if (mode > IWL_POWER_INDEX_5) {
  1636. IWL_DEBUG_POWER("Error invalid power mode \n");
  1637. return -1;
  1638. }
  1639. pow_data = &(priv->power_data);
  1640. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1641. range = &pow_data->pwr_range_0[0];
  1642. else
  1643. range = &pow_data->pwr_range_1[1];
  1644. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1645. #ifdef IWL_MAC80211_DISABLE
  1646. if (priv->assoc_network != NULL) {
  1647. unsigned long flags;
  1648. period = priv->assoc_network->tim.tim_period;
  1649. }
  1650. #endif /*IWL_MAC80211_DISABLE */
  1651. skip = range[mode].no_dtim;
  1652. if (period == 0) {
  1653. period = 1;
  1654. skip = 0;
  1655. }
  1656. if (skip == 0) {
  1657. max_sleep = period;
  1658. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1659. } else {
  1660. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1661. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1662. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1663. }
  1664. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1665. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1666. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1667. }
  1668. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1669. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1670. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1671. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1672. le32_to_cpu(cmd->sleep_interval[0]),
  1673. le32_to_cpu(cmd->sleep_interval[1]),
  1674. le32_to_cpu(cmd->sleep_interval[2]),
  1675. le32_to_cpu(cmd->sleep_interval[3]),
  1676. le32_to_cpu(cmd->sleep_interval[4]));
  1677. return rc;
  1678. }
  1679. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1680. {
  1681. u32 uninitialized_var(final_mode);
  1682. int rc;
  1683. struct iwl4965_powertable_cmd cmd;
  1684. /* If on battery, set to 3,
  1685. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1686. * else user level */
  1687. switch (mode) {
  1688. case IWL_POWER_BATTERY:
  1689. final_mode = IWL_POWER_INDEX_3;
  1690. break;
  1691. case IWL_POWER_AC:
  1692. final_mode = IWL_POWER_MODE_CAM;
  1693. break;
  1694. default:
  1695. final_mode = mode;
  1696. break;
  1697. }
  1698. cmd.keep_alive_beacons = 0;
  1699. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1700. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1701. if (final_mode == IWL_POWER_MODE_CAM)
  1702. clear_bit(STATUS_POWER_PMI, &priv->status);
  1703. else
  1704. set_bit(STATUS_POWER_PMI, &priv->status);
  1705. return rc;
  1706. }
  1707. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1708. {
  1709. /* Filter incoming packets to determine if they are targeted toward
  1710. * this network, discarding packets coming from ourselves */
  1711. switch (priv->iw_mode) {
  1712. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1713. /* packets from our adapter are dropped (echo) */
  1714. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1715. return 0;
  1716. /* {broad,multi}cast packets to our IBSS go through */
  1717. if (is_multicast_ether_addr(header->addr1))
  1718. return !compare_ether_addr(header->addr3, priv->bssid);
  1719. /* packets to our adapter go through */
  1720. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1721. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1722. /* packets from our adapter are dropped (echo) */
  1723. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1724. return 0;
  1725. /* {broad,multi}cast packets to our BSS go through */
  1726. if (is_multicast_ether_addr(header->addr1))
  1727. return !compare_ether_addr(header->addr2, priv->bssid);
  1728. /* packets to our adapter go through */
  1729. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1730. }
  1731. return 1;
  1732. }
  1733. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1734. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1735. {
  1736. switch (status & TX_STATUS_MSK) {
  1737. case TX_STATUS_SUCCESS:
  1738. return "SUCCESS";
  1739. TX_STATUS_ENTRY(SHORT_LIMIT);
  1740. TX_STATUS_ENTRY(LONG_LIMIT);
  1741. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1742. TX_STATUS_ENTRY(MGMNT_ABORT);
  1743. TX_STATUS_ENTRY(NEXT_FRAG);
  1744. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1745. TX_STATUS_ENTRY(DEST_PS);
  1746. TX_STATUS_ENTRY(ABORTED);
  1747. TX_STATUS_ENTRY(BT_RETRY);
  1748. TX_STATUS_ENTRY(STA_INVALID);
  1749. TX_STATUS_ENTRY(FRAG_DROPPED);
  1750. TX_STATUS_ENTRY(TID_DISABLE);
  1751. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1752. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1753. TX_STATUS_ENTRY(TX_LOCKED);
  1754. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1755. }
  1756. return "UNKNOWN";
  1757. }
  1758. /**
  1759. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1760. *
  1761. * NOTE: priv->mutex is not required before calling this function
  1762. */
  1763. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1764. {
  1765. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1766. clear_bit(STATUS_SCANNING, &priv->status);
  1767. return 0;
  1768. }
  1769. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1770. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1771. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1772. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1773. queue_work(priv->workqueue, &priv->abort_scan);
  1774. } else
  1775. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1776. return test_bit(STATUS_SCANNING, &priv->status);
  1777. }
  1778. return 0;
  1779. }
  1780. /**
  1781. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1782. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1783. *
  1784. * NOTE: priv->mutex must be held before calling this function
  1785. */
  1786. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1787. {
  1788. unsigned long now = jiffies;
  1789. int ret;
  1790. ret = iwl4965_scan_cancel(priv);
  1791. if (ret && ms) {
  1792. mutex_unlock(&priv->mutex);
  1793. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1794. test_bit(STATUS_SCANNING, &priv->status))
  1795. msleep(1);
  1796. mutex_lock(&priv->mutex);
  1797. return test_bit(STATUS_SCANNING, &priv->status);
  1798. }
  1799. return ret;
  1800. }
  1801. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1802. {
  1803. /* Reset ieee stats */
  1804. /* We don't reset the net_device_stats (ieee->stats) on
  1805. * re-association */
  1806. priv->last_seq_num = -1;
  1807. priv->last_frag_num = -1;
  1808. priv->last_packet_time = 0;
  1809. iwl4965_scan_cancel(priv);
  1810. }
  1811. #define MAX_UCODE_BEACON_INTERVAL 4096
  1812. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1813. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1814. {
  1815. u16 new_val = 0;
  1816. u16 beacon_factor = 0;
  1817. beacon_factor =
  1818. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1819. / MAX_UCODE_BEACON_INTERVAL;
  1820. new_val = beacon_val / beacon_factor;
  1821. return cpu_to_le16(new_val);
  1822. }
  1823. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1824. {
  1825. u64 interval_tm_unit;
  1826. u64 tsf, result;
  1827. unsigned long flags;
  1828. struct ieee80211_conf *conf = NULL;
  1829. u16 beacon_int = 0;
  1830. conf = ieee80211_get_hw_conf(priv->hw);
  1831. spin_lock_irqsave(&priv->lock, flags);
  1832. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1833. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1834. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1835. tsf = priv->timestamp1;
  1836. tsf = ((tsf << 32) | priv->timestamp0);
  1837. beacon_int = priv->beacon_int;
  1838. spin_unlock_irqrestore(&priv->lock, flags);
  1839. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1840. if (beacon_int == 0) {
  1841. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1842. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1843. } else {
  1844. priv->rxon_timing.beacon_interval =
  1845. cpu_to_le16(beacon_int);
  1846. priv->rxon_timing.beacon_interval =
  1847. iwl4965_adjust_beacon_interval(
  1848. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1849. }
  1850. priv->rxon_timing.atim_window = 0;
  1851. } else {
  1852. priv->rxon_timing.beacon_interval =
  1853. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1854. /* TODO: we need to get atim_window from upper stack
  1855. * for now we set to 0 */
  1856. priv->rxon_timing.atim_window = 0;
  1857. }
  1858. interval_tm_unit =
  1859. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1860. result = do_div(tsf, interval_tm_unit);
  1861. priv->rxon_timing.beacon_init_val =
  1862. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1863. IWL_DEBUG_ASSOC
  1864. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1865. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1866. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1867. le16_to_cpu(priv->rxon_timing.atim_window));
  1868. }
  1869. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1870. {
  1871. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1872. IWL_ERROR("APs don't scan.\n");
  1873. return 0;
  1874. }
  1875. if (!iwl4965_is_ready_rf(priv)) {
  1876. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1877. return -EIO;
  1878. }
  1879. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1880. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1881. return -EAGAIN;
  1882. }
  1883. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1884. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1885. "Queuing.\n");
  1886. return -EAGAIN;
  1887. }
  1888. IWL_DEBUG_INFO("Starting scan...\n");
  1889. priv->scan_bands = 2;
  1890. set_bit(STATUS_SCANNING, &priv->status);
  1891. priv->scan_start = jiffies;
  1892. priv->scan_pass_start = priv->scan_start;
  1893. queue_work(priv->workqueue, &priv->request_scan);
  1894. return 0;
  1895. }
  1896. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1897. {
  1898. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1899. if (hw_decrypt)
  1900. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1901. else
  1902. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1903. return 0;
  1904. }
  1905. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  1906. enum ieee80211_band band)
  1907. {
  1908. if (band == IEEE80211_BAND_5GHZ) {
  1909. priv->staging_rxon.flags &=
  1910. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1911. | RXON_FLG_CCK_MSK);
  1912. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1913. } else {
  1914. /* Copied from iwl4965_bg_post_associate() */
  1915. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1916. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1917. else
  1918. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1919. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1920. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1921. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1922. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1923. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1924. }
  1925. }
  1926. /*
  1927. * initialize rxon structure with default values from eeprom
  1928. */
  1929. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  1930. {
  1931. const struct iwl4965_channel_info *ch_info;
  1932. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1933. switch (priv->iw_mode) {
  1934. case IEEE80211_IF_TYPE_AP:
  1935. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1936. break;
  1937. case IEEE80211_IF_TYPE_STA:
  1938. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1939. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1940. break;
  1941. case IEEE80211_IF_TYPE_IBSS:
  1942. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1943. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1944. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1945. RXON_FILTER_ACCEPT_GRP_MSK;
  1946. break;
  1947. case IEEE80211_IF_TYPE_MNTR:
  1948. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1949. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1950. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1951. break;
  1952. }
  1953. #if 0
  1954. /* TODO: Figure out when short_preamble would be set and cache from
  1955. * that */
  1956. if (!hw_to_local(priv->hw)->short_preamble)
  1957. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1958. else
  1959. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1960. #endif
  1961. ch_info = iwl4965_get_channel_info(priv, priv->band,
  1962. le16_to_cpu(priv->staging_rxon.channel));
  1963. if (!ch_info)
  1964. ch_info = &priv->channel_info[0];
  1965. /*
  1966. * in some case A channels are all non IBSS
  1967. * in this case force B/G channel
  1968. */
  1969. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1970. !(is_channel_ibss(ch_info)))
  1971. ch_info = &priv->channel_info[0];
  1972. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1973. priv->band = ch_info->band;
  1974. iwl4965_set_flags_for_phymode(priv, priv->band);
  1975. priv->staging_rxon.ofdm_basic_rates =
  1976. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1977. priv->staging_rxon.cck_basic_rates =
  1978. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1979. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1980. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1981. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1982. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1983. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1984. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1985. iwl4965_set_rxon_chain(priv);
  1986. }
  1987. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  1988. {
  1989. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1990. const struct iwl4965_channel_info *ch_info;
  1991. ch_info = iwl4965_get_channel_info(priv,
  1992. priv->band,
  1993. le16_to_cpu(priv->staging_rxon.channel));
  1994. if (!ch_info || !is_channel_ibss(ch_info)) {
  1995. IWL_ERROR("channel %d not IBSS channel\n",
  1996. le16_to_cpu(priv->staging_rxon.channel));
  1997. return -EINVAL;
  1998. }
  1999. }
  2000. priv->iw_mode = mode;
  2001. iwl4965_connection_init_rx_config(priv);
  2002. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2003. iwl4965_clear_stations_table(priv);
  2004. /* dont commit rxon if rf-kill is on*/
  2005. if (!iwl4965_is_ready_rf(priv))
  2006. return -EAGAIN;
  2007. cancel_delayed_work(&priv->scan_check);
  2008. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2009. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2010. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2011. return -EAGAIN;
  2012. }
  2013. iwl4965_commit_rxon(priv);
  2014. return 0;
  2015. }
  2016. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2017. struct ieee80211_tx_control *ctl,
  2018. struct iwl4965_cmd *cmd,
  2019. struct sk_buff *skb_frag,
  2020. int last_frag)
  2021. {
  2022. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2023. switch (keyinfo->alg) {
  2024. case ALG_CCMP:
  2025. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2026. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2027. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2028. break;
  2029. case ALG_TKIP:
  2030. #if 0
  2031. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2032. if (last_frag)
  2033. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2034. 8);
  2035. else
  2036. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2037. #endif
  2038. break;
  2039. case ALG_WEP:
  2040. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2041. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2042. if (keyinfo->keylen == 13)
  2043. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2044. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2045. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2046. "with key %d\n", ctl->key_idx);
  2047. break;
  2048. default:
  2049. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2050. break;
  2051. }
  2052. }
  2053. /*
  2054. * handle build REPLY_TX command notification.
  2055. */
  2056. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2057. struct iwl4965_cmd *cmd,
  2058. struct ieee80211_tx_control *ctrl,
  2059. struct ieee80211_hdr *hdr,
  2060. int is_unicast, u8 std_id)
  2061. {
  2062. __le16 *qc;
  2063. u16 fc = le16_to_cpu(hdr->frame_control);
  2064. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2065. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2066. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2067. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2068. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2069. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2070. if (ieee80211_is_probe_response(fc) &&
  2071. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2072. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2073. } else {
  2074. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2075. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2076. }
  2077. if (ieee80211_is_back_request(fc))
  2078. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2079. cmd->cmd.tx.sta_id = std_id;
  2080. if (ieee80211_get_morefrag(hdr))
  2081. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2082. qc = ieee80211_get_qos_ctrl(hdr);
  2083. if (qc) {
  2084. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2085. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2086. } else
  2087. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2088. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2089. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2090. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2091. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2092. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2093. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2094. }
  2095. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2096. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2097. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2098. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2099. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2100. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2101. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2102. else
  2103. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2104. } else
  2105. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2106. cmd->cmd.tx.driver_txop = 0;
  2107. cmd->cmd.tx.tx_flags = tx_flags;
  2108. cmd->cmd.tx.next_frame_len = 0;
  2109. }
  2110. /**
  2111. * iwl4965_get_sta_id - Find station's index within station table
  2112. *
  2113. * If new IBSS station, create new entry in station table
  2114. */
  2115. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2116. struct ieee80211_hdr *hdr)
  2117. {
  2118. int sta_id;
  2119. u16 fc = le16_to_cpu(hdr->frame_control);
  2120. DECLARE_MAC_BUF(mac);
  2121. /* If this frame is broadcast or management, use broadcast station id */
  2122. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2123. is_multicast_ether_addr(hdr->addr1))
  2124. return priv->hw_setting.bcast_sta_id;
  2125. switch (priv->iw_mode) {
  2126. /* If we are a client station in a BSS network, use the special
  2127. * AP station entry (that's the only station we communicate with) */
  2128. case IEEE80211_IF_TYPE_STA:
  2129. return IWL_AP_ID;
  2130. /* If we are an AP, then find the station, or use BCAST */
  2131. case IEEE80211_IF_TYPE_AP:
  2132. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2133. if (sta_id != IWL_INVALID_STATION)
  2134. return sta_id;
  2135. return priv->hw_setting.bcast_sta_id;
  2136. /* If this frame is going out to an IBSS network, find the station,
  2137. * or create a new station table entry */
  2138. case IEEE80211_IF_TYPE_IBSS:
  2139. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2140. if (sta_id != IWL_INVALID_STATION)
  2141. return sta_id;
  2142. /* Create new station table entry */
  2143. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2144. 0, CMD_ASYNC, NULL);
  2145. if (sta_id != IWL_INVALID_STATION)
  2146. return sta_id;
  2147. IWL_DEBUG_DROP("Station %s not in station map. "
  2148. "Defaulting to broadcast...\n",
  2149. print_mac(mac, hdr->addr1));
  2150. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2151. return priv->hw_setting.bcast_sta_id;
  2152. default:
  2153. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2154. return priv->hw_setting.bcast_sta_id;
  2155. }
  2156. }
  2157. /*
  2158. * start REPLY_TX command process
  2159. */
  2160. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2161. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2162. {
  2163. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2164. struct iwl4965_tfd_frame *tfd;
  2165. u32 *control_flags;
  2166. int txq_id = ctl->queue;
  2167. struct iwl4965_tx_queue *txq = NULL;
  2168. struct iwl4965_queue *q = NULL;
  2169. dma_addr_t phys_addr;
  2170. dma_addr_t txcmd_phys;
  2171. dma_addr_t scratch_phys;
  2172. struct iwl4965_cmd *out_cmd = NULL;
  2173. u16 len, idx, len_org;
  2174. u8 id, hdr_len, unicast;
  2175. u8 sta_id;
  2176. u16 seq_number = 0;
  2177. u16 fc;
  2178. __le16 *qc;
  2179. u8 wait_write_ptr = 0;
  2180. unsigned long flags;
  2181. int rc;
  2182. spin_lock_irqsave(&priv->lock, flags);
  2183. if (iwl4965_is_rfkill(priv)) {
  2184. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2185. goto drop_unlock;
  2186. }
  2187. if (!priv->vif) {
  2188. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2189. goto drop_unlock;
  2190. }
  2191. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2192. IWL_ERROR("ERROR: No TX rate available.\n");
  2193. goto drop_unlock;
  2194. }
  2195. unicast = !is_multicast_ether_addr(hdr->addr1);
  2196. id = 0;
  2197. fc = le16_to_cpu(hdr->frame_control);
  2198. #ifdef CONFIG_IWL4965_DEBUG
  2199. if (ieee80211_is_auth(fc))
  2200. IWL_DEBUG_TX("Sending AUTH frame\n");
  2201. else if (ieee80211_is_assoc_request(fc))
  2202. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2203. else if (ieee80211_is_reassoc_request(fc))
  2204. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2205. #endif
  2206. /* drop all data frame if we are not associated */
  2207. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2208. (!iwl4965_is_associated(priv) ||
  2209. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2210. !priv->assoc_station_added)) {
  2211. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2212. goto drop_unlock;
  2213. }
  2214. spin_unlock_irqrestore(&priv->lock, flags);
  2215. hdr_len = ieee80211_get_hdrlen(fc);
  2216. /* Find (or create) index into station table for destination station */
  2217. sta_id = iwl4965_get_sta_id(priv, hdr);
  2218. if (sta_id == IWL_INVALID_STATION) {
  2219. DECLARE_MAC_BUF(mac);
  2220. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2221. print_mac(mac, hdr->addr1));
  2222. goto drop;
  2223. }
  2224. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2225. qc = ieee80211_get_qos_ctrl(hdr);
  2226. if (qc) {
  2227. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2228. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2229. IEEE80211_SCTL_SEQ;
  2230. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2231. (hdr->seq_ctrl &
  2232. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2233. seq_number += 0x10;
  2234. #ifdef CONFIG_IWL4965_HT
  2235. /* aggregation is on for this <sta,tid> */
  2236. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2237. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2238. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2239. #endif /* CONFIG_IWL4965_HT */
  2240. }
  2241. /* Descriptor for chosen Tx queue */
  2242. txq = &priv->txq[txq_id];
  2243. q = &txq->q;
  2244. spin_lock_irqsave(&priv->lock, flags);
  2245. /* Set up first empty TFD within this queue's circular TFD buffer */
  2246. tfd = &txq->bd[q->write_ptr];
  2247. memset(tfd, 0, sizeof(*tfd));
  2248. control_flags = (u32 *) tfd;
  2249. idx = get_cmd_index(q, q->write_ptr, 0);
  2250. /* Set up driver data for this TFD */
  2251. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2252. txq->txb[q->write_ptr].skb[0] = skb;
  2253. memcpy(&(txq->txb[q->write_ptr].status.control),
  2254. ctl, sizeof(struct ieee80211_tx_control));
  2255. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2256. out_cmd = &txq->cmd[idx];
  2257. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2258. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2259. /*
  2260. * Set up the Tx-command (not MAC!) header.
  2261. * Store the chosen Tx queue and TFD index within the sequence field;
  2262. * after Tx, uCode's Tx response will return this value so driver can
  2263. * locate the frame within the tx queue and do post-tx processing.
  2264. */
  2265. out_cmd->hdr.cmd = REPLY_TX;
  2266. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2267. INDEX_TO_SEQ(q->write_ptr)));
  2268. /* Copy MAC header from skb into command buffer */
  2269. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2270. /*
  2271. * Use the first empty entry in this queue's command buffer array
  2272. * to contain the Tx command and MAC header concatenated together
  2273. * (payload data will be in another buffer).
  2274. * Size of this varies, due to varying MAC header length.
  2275. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2276. * of the MAC header (device reads on dword boundaries).
  2277. * We'll tell device about this padding later.
  2278. */
  2279. len = priv->hw_setting.tx_cmd_len +
  2280. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2281. len_org = len;
  2282. len = (len + 3) & ~3;
  2283. if (len_org != len)
  2284. len_org = 1;
  2285. else
  2286. len_org = 0;
  2287. /* Physical address of this Tx command's header (not MAC header!),
  2288. * within command buffer array. */
  2289. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2290. offsetof(struct iwl4965_cmd, hdr);
  2291. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2292. * first entry */
  2293. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2294. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2295. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2296. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2297. * if any (802.11 null frames have no payload). */
  2298. len = skb->len - hdr_len;
  2299. if (len) {
  2300. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2301. len, PCI_DMA_TODEVICE);
  2302. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2303. }
  2304. /* Tell 4965 about any 2-byte padding after MAC header */
  2305. if (len_org)
  2306. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2307. /* Total # bytes to be transmitted */
  2308. len = (u16)skb->len;
  2309. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2310. /* TODO need this for burst mode later on */
  2311. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2312. /* set is_hcca to 0; it probably will never be implemented */
  2313. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2314. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2315. offsetof(struct iwl4965_tx_cmd, scratch);
  2316. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2317. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2318. if (!ieee80211_get_morefrag(hdr)) {
  2319. txq->need_update = 1;
  2320. if (qc) {
  2321. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2322. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2323. }
  2324. } else {
  2325. wait_write_ptr = 1;
  2326. txq->need_update = 0;
  2327. }
  2328. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2329. sizeof(out_cmd->cmd.tx));
  2330. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2331. ieee80211_get_hdrlen(fc));
  2332. /* Set up entry for this TFD in Tx byte-count array */
  2333. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2334. /* Tell device the write index *just past* this latest filled TFD */
  2335. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  2336. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2337. spin_unlock_irqrestore(&priv->lock, flags);
  2338. if (rc)
  2339. return rc;
  2340. if ((iwl4965_queue_space(q) < q->high_mark)
  2341. && priv->mac80211_registered) {
  2342. if (wait_write_ptr) {
  2343. spin_lock_irqsave(&priv->lock, flags);
  2344. txq->need_update = 1;
  2345. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2346. spin_unlock_irqrestore(&priv->lock, flags);
  2347. }
  2348. ieee80211_stop_queue(priv->hw, ctl->queue);
  2349. }
  2350. return 0;
  2351. drop_unlock:
  2352. spin_unlock_irqrestore(&priv->lock, flags);
  2353. drop:
  2354. return -1;
  2355. }
  2356. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2357. {
  2358. const struct ieee80211_supported_band *hw = NULL;
  2359. struct ieee80211_rate *rate;
  2360. int i;
  2361. hw = iwl4965_get_hw_mode(priv, priv->band);
  2362. if (!hw) {
  2363. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2364. return;
  2365. }
  2366. priv->active_rate = 0;
  2367. priv->active_rate_basic = 0;
  2368. for (i = 0; i < hw->n_bitrates; i++) {
  2369. rate = &(hw->bitrates[i]);
  2370. if (rate->hw_value < IWL_RATE_COUNT)
  2371. priv->active_rate |= (1 << rate->hw_value);
  2372. }
  2373. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2374. priv->active_rate, priv->active_rate_basic);
  2375. /*
  2376. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2377. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2378. * OFDM
  2379. */
  2380. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2381. priv->staging_rxon.cck_basic_rates =
  2382. ((priv->active_rate_basic &
  2383. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2384. else
  2385. priv->staging_rxon.cck_basic_rates =
  2386. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2387. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2388. priv->staging_rxon.ofdm_basic_rates =
  2389. ((priv->active_rate_basic &
  2390. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2391. IWL_FIRST_OFDM_RATE) & 0xFF;
  2392. else
  2393. priv->staging_rxon.ofdm_basic_rates =
  2394. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2395. }
  2396. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2397. {
  2398. unsigned long flags;
  2399. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2400. return;
  2401. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2402. disable_radio ? "OFF" : "ON");
  2403. if (disable_radio) {
  2404. iwl4965_scan_cancel(priv);
  2405. /* FIXME: This is a workaround for AP */
  2406. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2407. spin_lock_irqsave(&priv->lock, flags);
  2408. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2409. CSR_UCODE_SW_BIT_RFKILL);
  2410. spin_unlock_irqrestore(&priv->lock, flags);
  2411. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2412. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2413. }
  2414. return;
  2415. }
  2416. spin_lock_irqsave(&priv->lock, flags);
  2417. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2418. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2419. spin_unlock_irqrestore(&priv->lock, flags);
  2420. /* wake up ucode */
  2421. msleep(10);
  2422. spin_lock_irqsave(&priv->lock, flags);
  2423. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2424. if (!iwl4965_grab_nic_access(priv))
  2425. iwl4965_release_nic_access(priv);
  2426. spin_unlock_irqrestore(&priv->lock, flags);
  2427. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2428. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2429. "disabled by HW switch\n");
  2430. return;
  2431. }
  2432. queue_work(priv->workqueue, &priv->restart);
  2433. return;
  2434. }
  2435. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2436. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2437. {
  2438. u16 fc =
  2439. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2440. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2441. return;
  2442. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2443. return;
  2444. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2445. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2446. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2447. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2448. RX_RES_STATUS_BAD_ICV_MIC)
  2449. stats->flag |= RX_FLAG_MMIC_ERROR;
  2450. case RX_RES_STATUS_SEC_TYPE_WEP:
  2451. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2452. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2453. RX_RES_STATUS_DECRYPT_OK) {
  2454. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2455. stats->flag |= RX_FLAG_DECRYPTED;
  2456. }
  2457. break;
  2458. default:
  2459. break;
  2460. }
  2461. }
  2462. #define IWL_PACKET_RETRY_TIME HZ
  2463. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2464. {
  2465. u16 sc = le16_to_cpu(header->seq_ctrl);
  2466. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2467. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2468. u16 *last_seq, *last_frag;
  2469. unsigned long *last_time;
  2470. switch (priv->iw_mode) {
  2471. case IEEE80211_IF_TYPE_IBSS:{
  2472. struct list_head *p;
  2473. struct iwl4965_ibss_seq *entry = NULL;
  2474. u8 *mac = header->addr2;
  2475. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2476. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2477. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2478. if (!compare_ether_addr(entry->mac, mac))
  2479. break;
  2480. }
  2481. if (p == &priv->ibss_mac_hash[index]) {
  2482. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2483. if (!entry) {
  2484. IWL_ERROR("Cannot malloc new mac entry\n");
  2485. return 0;
  2486. }
  2487. memcpy(entry->mac, mac, ETH_ALEN);
  2488. entry->seq_num = seq;
  2489. entry->frag_num = frag;
  2490. entry->packet_time = jiffies;
  2491. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2492. return 0;
  2493. }
  2494. last_seq = &entry->seq_num;
  2495. last_frag = &entry->frag_num;
  2496. last_time = &entry->packet_time;
  2497. break;
  2498. }
  2499. case IEEE80211_IF_TYPE_STA:
  2500. last_seq = &priv->last_seq_num;
  2501. last_frag = &priv->last_frag_num;
  2502. last_time = &priv->last_packet_time;
  2503. break;
  2504. default:
  2505. return 0;
  2506. }
  2507. if ((*last_seq == seq) &&
  2508. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2509. if (*last_frag == frag)
  2510. goto drop;
  2511. if (*last_frag + 1 != frag)
  2512. /* out-of-order fragment */
  2513. goto drop;
  2514. } else
  2515. *last_seq = seq;
  2516. *last_frag = frag;
  2517. *last_time = jiffies;
  2518. return 0;
  2519. drop:
  2520. return 1;
  2521. }
  2522. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2523. #include "iwl-spectrum.h"
  2524. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2525. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2526. #define TIME_UNIT 1024
  2527. /*
  2528. * extended beacon time format
  2529. * time in usec will be changed into a 32-bit value in 8:24 format
  2530. * the high 1 byte is the beacon counts
  2531. * the lower 3 bytes is the time in usec within one beacon interval
  2532. */
  2533. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2534. {
  2535. u32 quot;
  2536. u32 rem;
  2537. u32 interval = beacon_interval * 1024;
  2538. if (!interval || !usec)
  2539. return 0;
  2540. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2541. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2542. return (quot << 24) + rem;
  2543. }
  2544. /* base is usually what we get from ucode with each received frame,
  2545. * the same as HW timer counter counting down
  2546. */
  2547. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2548. {
  2549. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2550. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2551. u32 interval = beacon_interval * TIME_UNIT;
  2552. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2553. (addon & BEACON_TIME_MASK_HIGH);
  2554. if (base_low > addon_low)
  2555. res += base_low - addon_low;
  2556. else if (base_low < addon_low) {
  2557. res += interval + base_low - addon_low;
  2558. res += (1 << 24);
  2559. } else
  2560. res += (1 << 24);
  2561. return cpu_to_le32(res);
  2562. }
  2563. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2564. struct ieee80211_measurement_params *params,
  2565. u8 type)
  2566. {
  2567. struct iwl4965_spectrum_cmd spectrum;
  2568. struct iwl4965_rx_packet *res;
  2569. struct iwl4965_host_cmd cmd = {
  2570. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2571. .data = (void *)&spectrum,
  2572. .meta.flags = CMD_WANT_SKB,
  2573. };
  2574. u32 add_time = le64_to_cpu(params->start_time);
  2575. int rc;
  2576. int spectrum_resp_status;
  2577. int duration = le16_to_cpu(params->duration);
  2578. if (iwl4965_is_associated(priv))
  2579. add_time =
  2580. iwl4965_usecs_to_beacons(
  2581. le64_to_cpu(params->start_time) - priv->last_tsf,
  2582. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2583. memset(&spectrum, 0, sizeof(spectrum));
  2584. spectrum.channel_count = cpu_to_le16(1);
  2585. spectrum.flags =
  2586. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2587. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2588. cmd.len = sizeof(spectrum);
  2589. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2590. if (iwl4965_is_associated(priv))
  2591. spectrum.start_time =
  2592. iwl4965_add_beacon_time(priv->last_beacon_time,
  2593. add_time,
  2594. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2595. else
  2596. spectrum.start_time = 0;
  2597. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2598. spectrum.channels[0].channel = params->channel;
  2599. spectrum.channels[0].type = type;
  2600. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2601. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2602. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2603. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2604. if (rc)
  2605. return rc;
  2606. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2607. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2608. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2609. rc = -EIO;
  2610. }
  2611. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2612. switch (spectrum_resp_status) {
  2613. case 0: /* Command will be handled */
  2614. if (res->u.spectrum.id != 0xff) {
  2615. IWL_DEBUG_INFO
  2616. ("Replaced existing measurement: %d\n",
  2617. res->u.spectrum.id);
  2618. priv->measurement_status &= ~MEASUREMENT_READY;
  2619. }
  2620. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2621. rc = 0;
  2622. break;
  2623. case 1: /* Command will not be handled */
  2624. rc = -EAGAIN;
  2625. break;
  2626. }
  2627. dev_kfree_skb_any(cmd.meta.u.skb);
  2628. return rc;
  2629. }
  2630. #endif
  2631. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2632. struct iwl4965_tx_info *tx_sta)
  2633. {
  2634. tx_sta->status.ack_signal = 0;
  2635. tx_sta->status.excessive_retries = 0;
  2636. tx_sta->status.queue_length = 0;
  2637. tx_sta->status.queue_number = 0;
  2638. if (in_interrupt())
  2639. ieee80211_tx_status_irqsafe(priv->hw,
  2640. tx_sta->skb[0], &(tx_sta->status));
  2641. else
  2642. ieee80211_tx_status(priv->hw,
  2643. tx_sta->skb[0], &(tx_sta->status));
  2644. tx_sta->skb[0] = NULL;
  2645. }
  2646. /**
  2647. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2648. *
  2649. * When FW advances 'R' index, all entries between old and new 'R' index
  2650. * need to be reclaimed. As result, some free space forms. If there is
  2651. * enough free space (> low mark), wake the stack that feeds us.
  2652. */
  2653. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2654. {
  2655. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2656. struct iwl4965_queue *q = &txq->q;
  2657. int nfreed = 0;
  2658. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2659. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2660. "is out of range [0-%d] %d %d.\n", txq_id,
  2661. index, q->n_bd, q->write_ptr, q->read_ptr);
  2662. return 0;
  2663. }
  2664. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2665. q->read_ptr != index;
  2666. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2667. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2668. iwl4965_txstatus_to_ieee(priv,
  2669. &(txq->txb[txq->q.read_ptr]));
  2670. iwl4965_hw_txq_free_tfd(priv, txq);
  2671. } else if (nfreed > 1) {
  2672. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2673. q->write_ptr, q->read_ptr);
  2674. queue_work(priv->workqueue, &priv->restart);
  2675. }
  2676. nfreed++;
  2677. }
  2678. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2679. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2680. priv->mac80211_registered)
  2681. ieee80211_wake_queue(priv->hw, txq_id); */
  2682. return nfreed;
  2683. }
  2684. static int iwl4965_is_tx_success(u32 status)
  2685. {
  2686. status &= TX_STATUS_MSK;
  2687. return (status == TX_STATUS_SUCCESS)
  2688. || (status == TX_STATUS_DIRECT_DONE);
  2689. }
  2690. /******************************************************************************
  2691. *
  2692. * Generic RX handler implementations
  2693. *
  2694. ******************************************************************************/
  2695. #ifdef CONFIG_IWL4965_HT
  2696. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2697. struct ieee80211_hdr *hdr)
  2698. {
  2699. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2700. return IWL_AP_ID;
  2701. else {
  2702. u8 *da = ieee80211_get_DA(hdr);
  2703. return iwl4965_hw_find_station(priv, da);
  2704. }
  2705. }
  2706. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2707. struct iwl4965_priv *priv, int txq_id, int idx)
  2708. {
  2709. if (priv->txq[txq_id].txb[idx].skb[0])
  2710. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2711. txb[idx].skb[0]->data;
  2712. return NULL;
  2713. }
  2714. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2715. {
  2716. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2717. tx_resp->frame_count);
  2718. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2719. }
  2720. /**
  2721. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2722. */
  2723. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2724. struct iwl4965_ht_agg *agg,
  2725. struct iwl4965_tx_resp_agg *tx_resp,
  2726. u16 start_idx)
  2727. {
  2728. u16 status;
  2729. struct agg_tx_status *frame_status = &tx_resp->status;
  2730. struct ieee80211_tx_status *tx_status = NULL;
  2731. struct ieee80211_hdr *hdr = NULL;
  2732. int i, sh;
  2733. int txq_id, idx;
  2734. u16 seq;
  2735. if (agg->wait_for_ba)
  2736. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2737. agg->frame_count = tx_resp->frame_count;
  2738. agg->start_idx = start_idx;
  2739. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2740. agg->bitmap = 0;
  2741. /* # frames attempted by Tx command */
  2742. if (agg->frame_count == 1) {
  2743. /* Only one frame was attempted; no block-ack will arrive */
  2744. status = le16_to_cpu(frame_status[0].status);
  2745. seq = le16_to_cpu(frame_status[0].sequence);
  2746. idx = SEQ_TO_INDEX(seq);
  2747. txq_id = SEQ_TO_QUEUE(seq);
  2748. /* FIXME: code repetition */
  2749. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2750. agg->frame_count, agg->start_idx, idx);
  2751. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2752. tx_status->retry_count = tx_resp->failure_frame;
  2753. tx_status->queue_number = status & 0xff;
  2754. tx_status->queue_length = tx_resp->failure_rts;
  2755. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2756. tx_status->flags = iwl4965_is_tx_success(status)?
  2757. IEEE80211_TX_STATUS_ACK : 0;
  2758. iwl4965_hwrate_to_tx_control(priv,
  2759. le32_to_cpu(tx_resp->rate_n_flags),
  2760. &tx_status->control);
  2761. /* FIXME: code repetition end */
  2762. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2763. status & 0xff, tx_resp->failure_frame);
  2764. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2765. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2766. agg->wait_for_ba = 0;
  2767. } else {
  2768. /* Two or more frames were attempted; expect block-ack */
  2769. u64 bitmap = 0;
  2770. int start = agg->start_idx;
  2771. /* Construct bit-map of pending frames within Tx window */
  2772. for (i = 0; i < agg->frame_count; i++) {
  2773. u16 sc;
  2774. status = le16_to_cpu(frame_status[i].status);
  2775. seq = le16_to_cpu(frame_status[i].sequence);
  2776. idx = SEQ_TO_INDEX(seq);
  2777. txq_id = SEQ_TO_QUEUE(seq);
  2778. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2779. AGG_TX_STATE_ABORT_MSK))
  2780. continue;
  2781. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2782. agg->frame_count, txq_id, idx);
  2783. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2784. sc = le16_to_cpu(hdr->seq_ctrl);
  2785. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2786. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2787. " idx=%d, seq_idx=%d, seq=%d\n",
  2788. idx, SEQ_TO_SN(sc),
  2789. hdr->seq_ctrl);
  2790. return -1;
  2791. }
  2792. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2793. i, idx, SEQ_TO_SN(sc));
  2794. sh = idx - start;
  2795. if (sh > 64) {
  2796. sh = (start - idx) + 0xff;
  2797. bitmap = bitmap << sh;
  2798. sh = 0;
  2799. start = idx;
  2800. } else if (sh < -64)
  2801. sh = 0xff - (start - idx);
  2802. else if (sh < 0) {
  2803. sh = start - idx;
  2804. start = idx;
  2805. bitmap = bitmap << sh;
  2806. sh = 0;
  2807. }
  2808. bitmap |= (1 << sh);
  2809. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2810. start, (u32)(bitmap & 0xFFFFFFFF));
  2811. }
  2812. agg->bitmap = bitmap;
  2813. agg->start_idx = start;
  2814. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2815. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2816. agg->frame_count, agg->start_idx,
  2817. agg->bitmap);
  2818. if (bitmap)
  2819. agg->wait_for_ba = 1;
  2820. }
  2821. return 0;
  2822. }
  2823. #endif
  2824. /**
  2825. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2826. */
  2827. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2828. struct iwl4965_rx_mem_buffer *rxb)
  2829. {
  2830. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2831. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2832. int txq_id = SEQ_TO_QUEUE(sequence);
  2833. int index = SEQ_TO_INDEX(sequence);
  2834. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2835. struct ieee80211_tx_status *tx_status;
  2836. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2837. u32 status = le32_to_cpu(tx_resp->status);
  2838. #ifdef CONFIG_IWL4965_HT
  2839. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2840. struct ieee80211_hdr *hdr;
  2841. __le16 *qc;
  2842. #endif
  2843. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2844. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2845. "is out of range [0-%d] %d %d\n", txq_id,
  2846. index, txq->q.n_bd, txq->q.write_ptr,
  2847. txq->q.read_ptr);
  2848. return;
  2849. }
  2850. #ifdef CONFIG_IWL4965_HT
  2851. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2852. qc = ieee80211_get_qos_ctrl(hdr);
  2853. if (qc)
  2854. tid = le16_to_cpu(*qc) & 0xf;
  2855. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2856. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2857. IWL_ERROR("Station not known\n");
  2858. return;
  2859. }
  2860. if (txq->sched_retry) {
  2861. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2862. struct iwl4965_ht_agg *agg = NULL;
  2863. if (!qc)
  2864. return;
  2865. agg = &priv->stations[sta_id].tid[tid].agg;
  2866. iwl4965_tx_status_reply_tx(priv, agg,
  2867. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2868. if ((tx_resp->frame_count == 1) &&
  2869. !iwl4965_is_tx_success(status)) {
  2870. /* TODO: send BAR */
  2871. }
  2872. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2873. int freed;
  2874. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2875. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2876. "%d index %d\n", scd_ssn , index);
  2877. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2878. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2879. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2880. txq_id >= 0 && priv->mac80211_registered &&
  2881. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2882. ieee80211_wake_queue(priv->hw, txq_id);
  2883. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2884. }
  2885. } else {
  2886. #endif /* CONFIG_IWL4965_HT */
  2887. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2888. tx_status->retry_count = tx_resp->failure_frame;
  2889. tx_status->queue_number = status;
  2890. tx_status->queue_length = tx_resp->bt_kill_count;
  2891. tx_status->queue_length |= tx_resp->failure_rts;
  2892. tx_status->flags =
  2893. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2894. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2895. &tx_status->control);
  2896. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2897. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2898. status, le32_to_cpu(tx_resp->rate_n_flags),
  2899. tx_resp->failure_frame);
  2900. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2901. if (index != -1) {
  2902. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2903. #ifdef CONFIG_IWL4965_HT
  2904. if (tid != MAX_TID_COUNT)
  2905. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2906. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2907. (txq_id >= 0) &&
  2908. priv->mac80211_registered)
  2909. ieee80211_wake_queue(priv->hw, txq_id);
  2910. if (tid != MAX_TID_COUNT)
  2911. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2912. #endif
  2913. }
  2914. #ifdef CONFIG_IWL4965_HT
  2915. }
  2916. #endif /* CONFIG_IWL4965_HT */
  2917. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2918. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2919. }
  2920. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  2921. struct iwl4965_rx_mem_buffer *rxb)
  2922. {
  2923. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2924. struct iwl4965_alive_resp *palive;
  2925. struct delayed_work *pwork;
  2926. palive = &pkt->u.alive_frame;
  2927. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2928. "0x%01X 0x%01X\n",
  2929. palive->is_valid, palive->ver_type,
  2930. palive->ver_subtype);
  2931. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2932. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2933. memcpy(&priv->card_alive_init,
  2934. &pkt->u.alive_frame,
  2935. sizeof(struct iwl4965_init_alive_resp));
  2936. pwork = &priv->init_alive_start;
  2937. } else {
  2938. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2939. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2940. sizeof(struct iwl4965_alive_resp));
  2941. pwork = &priv->alive_start;
  2942. }
  2943. /* We delay the ALIVE response by 5ms to
  2944. * give the HW RF Kill time to activate... */
  2945. if (palive->is_valid == UCODE_VALID_OK)
  2946. queue_delayed_work(priv->workqueue, pwork,
  2947. msecs_to_jiffies(5));
  2948. else
  2949. IWL_WARNING("uCode did not respond OK.\n");
  2950. }
  2951. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  2952. struct iwl4965_rx_mem_buffer *rxb)
  2953. {
  2954. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2955. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2956. return;
  2957. }
  2958. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  2959. struct iwl4965_rx_mem_buffer *rxb)
  2960. {
  2961. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2962. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2963. "seq 0x%04X ser 0x%08X\n",
  2964. le32_to_cpu(pkt->u.err_resp.error_type),
  2965. get_cmd_string(pkt->u.err_resp.cmd_id),
  2966. pkt->u.err_resp.cmd_id,
  2967. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2968. le32_to_cpu(pkt->u.err_resp.error_info));
  2969. }
  2970. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2971. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2972. {
  2973. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2974. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2975. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2976. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2977. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2978. rxon->channel = csa->channel;
  2979. priv->staging_rxon.channel = csa->channel;
  2980. }
  2981. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  2982. struct iwl4965_rx_mem_buffer *rxb)
  2983. {
  2984. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2985. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2986. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2987. if (!report->state) {
  2988. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2989. "Spectrum Measure Notification: Start\n");
  2990. return;
  2991. }
  2992. memcpy(&priv->measure_report, report, sizeof(*report));
  2993. priv->measurement_status |= MEASUREMENT_READY;
  2994. #endif
  2995. }
  2996. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  2997. struct iwl4965_rx_mem_buffer *rxb)
  2998. {
  2999. #ifdef CONFIG_IWL4965_DEBUG
  3000. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3001. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3002. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3003. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3004. #endif
  3005. }
  3006. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3007. struct iwl4965_rx_mem_buffer *rxb)
  3008. {
  3009. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3010. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3011. "notification for %s:\n",
  3012. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3013. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3014. }
  3015. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3016. {
  3017. struct iwl4965_priv *priv =
  3018. container_of(work, struct iwl4965_priv, beacon_update);
  3019. struct sk_buff *beacon;
  3020. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3021. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3022. if (!beacon) {
  3023. IWL_ERROR("update beacon failed\n");
  3024. return;
  3025. }
  3026. mutex_lock(&priv->mutex);
  3027. /* new beacon skb is allocated every time; dispose previous.*/
  3028. if (priv->ibss_beacon)
  3029. dev_kfree_skb(priv->ibss_beacon);
  3030. priv->ibss_beacon = beacon;
  3031. mutex_unlock(&priv->mutex);
  3032. iwl4965_send_beacon_cmd(priv);
  3033. }
  3034. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3035. struct iwl4965_rx_mem_buffer *rxb)
  3036. {
  3037. #ifdef CONFIG_IWL4965_DEBUG
  3038. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3039. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3040. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3041. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3042. "tsf %d %d rate %d\n",
  3043. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3044. beacon->beacon_notify_hdr.failure_frame,
  3045. le32_to_cpu(beacon->ibss_mgr_status),
  3046. le32_to_cpu(beacon->high_tsf),
  3047. le32_to_cpu(beacon->low_tsf), rate);
  3048. #endif
  3049. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3050. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3051. queue_work(priv->workqueue, &priv->beacon_update);
  3052. }
  3053. /* Service response to REPLY_SCAN_CMD (0x80) */
  3054. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3055. struct iwl4965_rx_mem_buffer *rxb)
  3056. {
  3057. #ifdef CONFIG_IWL4965_DEBUG
  3058. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3059. struct iwl4965_scanreq_notification *notif =
  3060. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3061. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3062. #endif
  3063. }
  3064. /* Service SCAN_START_NOTIFICATION (0x82) */
  3065. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3066. struct iwl4965_rx_mem_buffer *rxb)
  3067. {
  3068. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3069. struct iwl4965_scanstart_notification *notif =
  3070. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3071. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3072. IWL_DEBUG_SCAN("Scan start: "
  3073. "%d [802.11%s] "
  3074. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3075. notif->channel,
  3076. notif->band ? "bg" : "a",
  3077. notif->tsf_high,
  3078. notif->tsf_low, notif->status, notif->beacon_timer);
  3079. }
  3080. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3081. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3082. struct iwl4965_rx_mem_buffer *rxb)
  3083. {
  3084. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3085. struct iwl4965_scanresults_notification *notif =
  3086. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3087. IWL_DEBUG_SCAN("Scan ch.res: "
  3088. "%d [802.11%s] "
  3089. "(TSF: 0x%08X:%08X) - %d "
  3090. "elapsed=%lu usec (%dms since last)\n",
  3091. notif->channel,
  3092. notif->band ? "bg" : "a",
  3093. le32_to_cpu(notif->tsf_high),
  3094. le32_to_cpu(notif->tsf_low),
  3095. le32_to_cpu(notif->statistics[0]),
  3096. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3097. jiffies_to_msecs(elapsed_jiffies
  3098. (priv->last_scan_jiffies, jiffies)));
  3099. priv->last_scan_jiffies = jiffies;
  3100. priv->next_scan_jiffies = 0;
  3101. }
  3102. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3103. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3104. struct iwl4965_rx_mem_buffer *rxb)
  3105. {
  3106. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3107. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3108. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3109. scan_notif->scanned_channels,
  3110. scan_notif->tsf_low,
  3111. scan_notif->tsf_high, scan_notif->status);
  3112. /* The HW is no longer scanning */
  3113. clear_bit(STATUS_SCAN_HW, &priv->status);
  3114. /* The scan completion notification came in, so kill that timer... */
  3115. cancel_delayed_work(&priv->scan_check);
  3116. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3117. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3118. jiffies_to_msecs(elapsed_jiffies
  3119. (priv->scan_pass_start, jiffies)));
  3120. /* Remove this scanned band from the list
  3121. * of pending bands to scan */
  3122. priv->scan_bands--;
  3123. /* If a request to abort was given, or the scan did not succeed
  3124. * then we reset the scan state machine and terminate,
  3125. * re-queuing another scan if one has been requested */
  3126. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3127. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3128. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3129. } else {
  3130. /* If there are more bands on this scan pass reschedule */
  3131. if (priv->scan_bands > 0)
  3132. goto reschedule;
  3133. }
  3134. priv->last_scan_jiffies = jiffies;
  3135. priv->next_scan_jiffies = 0;
  3136. IWL_DEBUG_INFO("Setting scan to off\n");
  3137. clear_bit(STATUS_SCANNING, &priv->status);
  3138. IWL_DEBUG_INFO("Scan took %dms\n",
  3139. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3140. queue_work(priv->workqueue, &priv->scan_completed);
  3141. return;
  3142. reschedule:
  3143. priv->scan_pass_start = jiffies;
  3144. queue_work(priv->workqueue, &priv->request_scan);
  3145. }
  3146. /* Handle notification from uCode that card's power state is changing
  3147. * due to software, hardware, or critical temperature RFKILL */
  3148. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3149. struct iwl4965_rx_mem_buffer *rxb)
  3150. {
  3151. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3152. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3153. unsigned long status = priv->status;
  3154. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3155. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3156. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3157. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3158. RF_CARD_DISABLED)) {
  3159. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3160. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3161. if (!iwl4965_grab_nic_access(priv)) {
  3162. iwl4965_write_direct32(
  3163. priv, HBUS_TARG_MBX_C,
  3164. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3165. iwl4965_release_nic_access(priv);
  3166. }
  3167. if (!(flags & RXON_CARD_DISABLED)) {
  3168. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3169. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3170. if (!iwl4965_grab_nic_access(priv)) {
  3171. iwl4965_write_direct32(
  3172. priv, HBUS_TARG_MBX_C,
  3173. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3174. iwl4965_release_nic_access(priv);
  3175. }
  3176. }
  3177. if (flags & RF_CARD_DISABLED) {
  3178. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3179. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3180. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3181. if (!iwl4965_grab_nic_access(priv))
  3182. iwl4965_release_nic_access(priv);
  3183. }
  3184. }
  3185. if (flags & HW_CARD_DISABLED)
  3186. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3187. else
  3188. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3189. if (flags & SW_CARD_DISABLED)
  3190. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3191. else
  3192. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3193. if (!(flags & RXON_CARD_DISABLED))
  3194. iwl4965_scan_cancel(priv);
  3195. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3196. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3197. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3198. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3199. queue_work(priv->workqueue, &priv->rf_kill);
  3200. else
  3201. wake_up_interruptible(&priv->wait_command_queue);
  3202. }
  3203. /**
  3204. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3205. *
  3206. * Setup the RX handlers for each of the reply types sent from the uCode
  3207. * to the host.
  3208. *
  3209. * This function chains into the hardware specific files for them to setup
  3210. * any hardware specific handlers as well.
  3211. */
  3212. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3213. {
  3214. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3215. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3216. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3217. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3218. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3219. iwl4965_rx_spectrum_measure_notif;
  3220. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3221. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3222. iwl4965_rx_pm_debug_statistics_notif;
  3223. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3224. /*
  3225. * The same handler is used for both the REPLY to a discrete
  3226. * statistics request from the host as well as for the periodic
  3227. * statistics notifications (after received beacons) from the uCode.
  3228. */
  3229. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3230. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3231. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3232. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3233. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3234. iwl4965_rx_scan_results_notif;
  3235. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3236. iwl4965_rx_scan_complete_notif;
  3237. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3238. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3239. /* Set up hardware specific Rx handlers */
  3240. iwl4965_hw_rx_handler_setup(priv);
  3241. }
  3242. /**
  3243. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3244. * @rxb: Rx buffer to reclaim
  3245. *
  3246. * If an Rx buffer has an async callback associated with it the callback
  3247. * will be executed. The attached skb (if present) will only be freed
  3248. * if the callback returns 1
  3249. */
  3250. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3251. struct iwl4965_rx_mem_buffer *rxb)
  3252. {
  3253. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3254. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3255. int txq_id = SEQ_TO_QUEUE(sequence);
  3256. int index = SEQ_TO_INDEX(sequence);
  3257. int huge = sequence & SEQ_HUGE_FRAME;
  3258. int cmd_index;
  3259. struct iwl4965_cmd *cmd;
  3260. /* If a Tx command is being handled and it isn't in the actual
  3261. * command queue then there a command routing bug has been introduced
  3262. * in the queue management code. */
  3263. if (txq_id != IWL_CMD_QUEUE_NUM)
  3264. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3265. txq_id, pkt->hdr.cmd);
  3266. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3267. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3268. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3269. /* Input error checking is done when commands are added to queue. */
  3270. if (cmd->meta.flags & CMD_WANT_SKB) {
  3271. cmd->meta.source->u.skb = rxb->skb;
  3272. rxb->skb = NULL;
  3273. } else if (cmd->meta.u.callback &&
  3274. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3275. rxb->skb = NULL;
  3276. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3277. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3278. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3279. wake_up_interruptible(&priv->wait_command_queue);
  3280. }
  3281. }
  3282. /************************** RX-FUNCTIONS ****************************/
  3283. /*
  3284. * Rx theory of operation
  3285. *
  3286. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3287. * each of which point to Receive Buffers to be filled by 4965. These get
  3288. * used not only for Rx frames, but for any command response or notification
  3289. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3290. * of indexes into the circular buffer.
  3291. *
  3292. * Rx Queue Indexes
  3293. * The host/firmware share two index registers for managing the Rx buffers.
  3294. *
  3295. * The READ index maps to the first position that the firmware may be writing
  3296. * to -- the driver can read up to (but not including) this position and get
  3297. * good data.
  3298. * The READ index is managed by the firmware once the card is enabled.
  3299. *
  3300. * The WRITE index maps to the last position the driver has read from -- the
  3301. * position preceding WRITE is the last slot the firmware can place a packet.
  3302. *
  3303. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3304. * WRITE = READ.
  3305. *
  3306. * During initialization, the host sets up the READ queue position to the first
  3307. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3308. *
  3309. * When the firmware places a packet in a buffer, it will advance the READ index
  3310. * and fire the RX interrupt. The driver can then query the READ index and
  3311. * process as many packets as possible, moving the WRITE index forward as it
  3312. * resets the Rx queue buffers with new memory.
  3313. *
  3314. * The management in the driver is as follows:
  3315. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3316. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3317. * to replenish the iwl->rxq->rx_free.
  3318. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3319. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3320. * 'processed' and 'read' driver indexes as well)
  3321. * + A received packet is processed and handed to the kernel network stack,
  3322. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3323. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3324. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3325. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3326. * were enough free buffers and RX_STALLED is set it is cleared.
  3327. *
  3328. *
  3329. * Driver sequence:
  3330. *
  3331. * iwl4965_rx_queue_alloc() Allocates rx_free
  3332. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3333. * iwl4965_rx_queue_restock
  3334. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3335. * queue, updates firmware pointers, and updates
  3336. * the WRITE index. If insufficient rx_free buffers
  3337. * are available, schedules iwl4965_rx_replenish
  3338. *
  3339. * -- enable interrupts --
  3340. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3341. * READ INDEX, detaching the SKB from the pool.
  3342. * Moves the packet buffer from queue to rx_used.
  3343. * Calls iwl4965_rx_queue_restock to refill any empty
  3344. * slots.
  3345. * ...
  3346. *
  3347. */
  3348. /**
  3349. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3350. */
  3351. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3352. {
  3353. int s = q->read - q->write;
  3354. if (s <= 0)
  3355. s += RX_QUEUE_SIZE;
  3356. /* keep some buffer to not confuse full and empty queue */
  3357. s -= 2;
  3358. if (s < 0)
  3359. s = 0;
  3360. return s;
  3361. }
  3362. /**
  3363. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3364. */
  3365. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3366. {
  3367. u32 reg = 0;
  3368. int rc = 0;
  3369. unsigned long flags;
  3370. spin_lock_irqsave(&q->lock, flags);
  3371. if (q->need_update == 0)
  3372. goto exit_unlock;
  3373. /* If power-saving is in use, make sure device is awake */
  3374. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3375. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3376. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3377. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3378. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3379. goto exit_unlock;
  3380. }
  3381. rc = iwl4965_grab_nic_access(priv);
  3382. if (rc)
  3383. goto exit_unlock;
  3384. /* Device expects a multiple of 8 */
  3385. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3386. q->write & ~0x7);
  3387. iwl4965_release_nic_access(priv);
  3388. /* Else device is assumed to be awake */
  3389. } else
  3390. /* Device expects a multiple of 8 */
  3391. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3392. q->need_update = 0;
  3393. exit_unlock:
  3394. spin_unlock_irqrestore(&q->lock, flags);
  3395. return rc;
  3396. }
  3397. /**
  3398. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3399. */
  3400. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3401. dma_addr_t dma_addr)
  3402. {
  3403. return cpu_to_le32((u32)(dma_addr >> 8));
  3404. }
  3405. /**
  3406. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3407. *
  3408. * If there are slots in the RX queue that need to be restocked,
  3409. * and we have free pre-allocated buffers, fill the ranks as much
  3410. * as we can, pulling from rx_free.
  3411. *
  3412. * This moves the 'write' index forward to catch up with 'processed', and
  3413. * also updates the memory address in the firmware to reference the new
  3414. * target buffer.
  3415. */
  3416. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3417. {
  3418. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3419. struct list_head *element;
  3420. struct iwl4965_rx_mem_buffer *rxb;
  3421. unsigned long flags;
  3422. int write, rc;
  3423. spin_lock_irqsave(&rxq->lock, flags);
  3424. write = rxq->write & ~0x7;
  3425. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3426. /* Get next free Rx buffer, remove from free list */
  3427. element = rxq->rx_free.next;
  3428. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3429. list_del(element);
  3430. /* Point to Rx buffer via next RBD in circular buffer */
  3431. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3432. rxq->queue[rxq->write] = rxb;
  3433. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3434. rxq->free_count--;
  3435. }
  3436. spin_unlock_irqrestore(&rxq->lock, flags);
  3437. /* If the pre-allocated buffer pool is dropping low, schedule to
  3438. * refill it */
  3439. if (rxq->free_count <= RX_LOW_WATERMARK)
  3440. queue_work(priv->workqueue, &priv->rx_replenish);
  3441. /* If we've added more space for the firmware to place data, tell it.
  3442. * Increment device's write pointer in multiples of 8. */
  3443. if ((write != (rxq->write & ~0x7))
  3444. || (abs(rxq->write - rxq->read) > 7)) {
  3445. spin_lock_irqsave(&rxq->lock, flags);
  3446. rxq->need_update = 1;
  3447. spin_unlock_irqrestore(&rxq->lock, flags);
  3448. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3449. if (rc)
  3450. return rc;
  3451. }
  3452. return 0;
  3453. }
  3454. /**
  3455. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3456. *
  3457. * When moving to rx_free an SKB is allocated for the slot.
  3458. *
  3459. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3460. * This is called as a scheduled work item (except for during initialization)
  3461. */
  3462. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3463. {
  3464. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3465. struct list_head *element;
  3466. struct iwl4965_rx_mem_buffer *rxb;
  3467. unsigned long flags;
  3468. spin_lock_irqsave(&rxq->lock, flags);
  3469. while (!list_empty(&rxq->rx_used)) {
  3470. element = rxq->rx_used.next;
  3471. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3472. /* Alloc a new receive buffer */
  3473. rxb->skb =
  3474. alloc_skb(priv->hw_setting.rx_buf_size,
  3475. __GFP_NOWARN | GFP_ATOMIC);
  3476. if (!rxb->skb) {
  3477. if (net_ratelimit())
  3478. printk(KERN_CRIT DRV_NAME
  3479. ": Can not allocate SKB buffers\n");
  3480. /* We don't reschedule replenish work here -- we will
  3481. * call the restock method and if it still needs
  3482. * more buffers it will schedule replenish */
  3483. break;
  3484. }
  3485. priv->alloc_rxb_skb++;
  3486. list_del(element);
  3487. /* Get physical address of RB/SKB */
  3488. rxb->dma_addr =
  3489. pci_map_single(priv->pci_dev, rxb->skb->data,
  3490. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3491. list_add_tail(&rxb->list, &rxq->rx_free);
  3492. rxq->free_count++;
  3493. }
  3494. spin_unlock_irqrestore(&rxq->lock, flags);
  3495. }
  3496. /*
  3497. * this should be called while priv->lock is locked
  3498. */
  3499. static void __iwl4965_rx_replenish(void *data)
  3500. {
  3501. struct iwl4965_priv *priv = data;
  3502. iwl4965_rx_allocate(priv);
  3503. iwl4965_rx_queue_restock(priv);
  3504. }
  3505. void iwl4965_rx_replenish(void *data)
  3506. {
  3507. struct iwl4965_priv *priv = data;
  3508. unsigned long flags;
  3509. iwl4965_rx_allocate(priv);
  3510. spin_lock_irqsave(&priv->lock, flags);
  3511. iwl4965_rx_queue_restock(priv);
  3512. spin_unlock_irqrestore(&priv->lock, flags);
  3513. }
  3514. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3515. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3516. * This free routine walks the list of POOL entries and if SKB is set to
  3517. * non NULL it is unmapped and freed
  3518. */
  3519. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3520. {
  3521. int i;
  3522. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3523. if (rxq->pool[i].skb != NULL) {
  3524. pci_unmap_single(priv->pci_dev,
  3525. rxq->pool[i].dma_addr,
  3526. priv->hw_setting.rx_buf_size,
  3527. PCI_DMA_FROMDEVICE);
  3528. dev_kfree_skb(rxq->pool[i].skb);
  3529. }
  3530. }
  3531. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3532. rxq->dma_addr);
  3533. rxq->bd = NULL;
  3534. }
  3535. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3536. {
  3537. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3538. struct pci_dev *dev = priv->pci_dev;
  3539. int i;
  3540. spin_lock_init(&rxq->lock);
  3541. INIT_LIST_HEAD(&rxq->rx_free);
  3542. INIT_LIST_HEAD(&rxq->rx_used);
  3543. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3544. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3545. if (!rxq->bd)
  3546. return -ENOMEM;
  3547. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3548. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3549. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3550. /* Set us so that we have processed and used all buffers, but have
  3551. * not restocked the Rx queue with fresh buffers */
  3552. rxq->read = rxq->write = 0;
  3553. rxq->free_count = 0;
  3554. rxq->need_update = 0;
  3555. return 0;
  3556. }
  3557. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3558. {
  3559. unsigned long flags;
  3560. int i;
  3561. spin_lock_irqsave(&rxq->lock, flags);
  3562. INIT_LIST_HEAD(&rxq->rx_free);
  3563. INIT_LIST_HEAD(&rxq->rx_used);
  3564. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3565. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3566. /* In the reset function, these buffers may have been allocated
  3567. * to an SKB, so we need to unmap and free potential storage */
  3568. if (rxq->pool[i].skb != NULL) {
  3569. pci_unmap_single(priv->pci_dev,
  3570. rxq->pool[i].dma_addr,
  3571. priv->hw_setting.rx_buf_size,
  3572. PCI_DMA_FROMDEVICE);
  3573. priv->alloc_rxb_skb--;
  3574. dev_kfree_skb(rxq->pool[i].skb);
  3575. rxq->pool[i].skb = NULL;
  3576. }
  3577. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3578. }
  3579. /* Set us so that we have processed and used all buffers, but have
  3580. * not restocked the Rx queue with fresh buffers */
  3581. rxq->read = rxq->write = 0;
  3582. rxq->free_count = 0;
  3583. spin_unlock_irqrestore(&rxq->lock, flags);
  3584. }
  3585. /* Convert linear signal-to-noise ratio into dB */
  3586. static u8 ratio2dB[100] = {
  3587. /* 0 1 2 3 4 5 6 7 8 9 */
  3588. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3589. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3590. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3591. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3592. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3593. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3594. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3595. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3596. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3597. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3598. };
  3599. /* Calculates a relative dB value from a ratio of linear
  3600. * (i.e. not dB) signal levels.
  3601. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3602. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3603. {
  3604. /* 1000:1 or higher just report as 60 dB */
  3605. if (sig_ratio >= 1000)
  3606. return 60;
  3607. /* 100:1 or higher, divide by 10 and use table,
  3608. * add 20 dB to make up for divide by 10 */
  3609. if (sig_ratio >= 100)
  3610. return (20 + (int)ratio2dB[sig_ratio/10]);
  3611. /* We shouldn't see this */
  3612. if (sig_ratio < 1)
  3613. return 0;
  3614. /* Use table for ratios 1:1 - 99:1 */
  3615. return (int)ratio2dB[sig_ratio];
  3616. }
  3617. #define PERFECT_RSSI (-20) /* dBm */
  3618. #define WORST_RSSI (-95) /* dBm */
  3619. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3620. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3621. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3622. * about formulas used below. */
  3623. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3624. {
  3625. int sig_qual;
  3626. int degradation = PERFECT_RSSI - rssi_dbm;
  3627. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3628. * as indicator; formula is (signal dbm - noise dbm).
  3629. * SNR at or above 40 is a great signal (100%).
  3630. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3631. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3632. if (noise_dbm) {
  3633. if (rssi_dbm - noise_dbm >= 40)
  3634. return 100;
  3635. else if (rssi_dbm < noise_dbm)
  3636. return 0;
  3637. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3638. /* Else use just the signal level.
  3639. * This formula is a least squares fit of data points collected and
  3640. * compared with a reference system that had a percentage (%) display
  3641. * for signal quality. */
  3642. } else
  3643. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3644. (15 * RSSI_RANGE + 62 * degradation)) /
  3645. (RSSI_RANGE * RSSI_RANGE);
  3646. if (sig_qual > 100)
  3647. sig_qual = 100;
  3648. else if (sig_qual < 1)
  3649. sig_qual = 0;
  3650. return sig_qual;
  3651. }
  3652. /**
  3653. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3654. *
  3655. * Uses the priv->rx_handlers callback function array to invoke
  3656. * the appropriate handlers, including command responses,
  3657. * frame-received notifications, and other notifications.
  3658. */
  3659. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3660. {
  3661. struct iwl4965_rx_mem_buffer *rxb;
  3662. struct iwl4965_rx_packet *pkt;
  3663. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3664. u32 r, i;
  3665. int reclaim;
  3666. unsigned long flags;
  3667. u8 fill_rx = 0;
  3668. u32 count = 8;
  3669. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3670. * buffer that the driver may process (last buffer filled by ucode). */
  3671. r = iwl4965_hw_get_rx_read(priv);
  3672. i = rxq->read;
  3673. /* Rx interrupt, but nothing sent from uCode */
  3674. if (i == r)
  3675. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3676. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3677. fill_rx = 1;
  3678. while (i != r) {
  3679. rxb = rxq->queue[i];
  3680. /* If an RXB doesn't have a Rx queue slot associated with it,
  3681. * then a bug has been introduced in the queue refilling
  3682. * routines -- catch it here */
  3683. BUG_ON(rxb == NULL);
  3684. rxq->queue[i] = NULL;
  3685. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3686. priv->hw_setting.rx_buf_size,
  3687. PCI_DMA_FROMDEVICE);
  3688. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3689. /* Reclaim a command buffer only if this packet is a response
  3690. * to a (driver-originated) command.
  3691. * If the packet (e.g. Rx frame) originated from uCode,
  3692. * there is no command buffer to reclaim.
  3693. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3694. * but apparently a few don't get set; catch them here. */
  3695. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3696. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3697. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3698. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3699. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3700. (pkt->hdr.cmd != REPLY_TX);
  3701. /* Based on type of command response or notification,
  3702. * handle those that need handling via function in
  3703. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3704. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3705. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3706. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3707. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3708. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3709. } else {
  3710. /* No handling needed */
  3711. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3712. "r %d i %d No handler needed for %s, 0x%02x\n",
  3713. r, i, get_cmd_string(pkt->hdr.cmd),
  3714. pkt->hdr.cmd);
  3715. }
  3716. if (reclaim) {
  3717. /* Invoke any callbacks, transfer the skb to caller, and
  3718. * fire off the (possibly) blocking iwl4965_send_cmd()
  3719. * as we reclaim the driver command queue */
  3720. if (rxb && rxb->skb)
  3721. iwl4965_tx_cmd_complete(priv, rxb);
  3722. else
  3723. IWL_WARNING("Claim null rxb?\n");
  3724. }
  3725. /* For now we just don't re-use anything. We can tweak this
  3726. * later to try and re-use notification packets and SKBs that
  3727. * fail to Rx correctly */
  3728. if (rxb->skb != NULL) {
  3729. priv->alloc_rxb_skb--;
  3730. dev_kfree_skb_any(rxb->skb);
  3731. rxb->skb = NULL;
  3732. }
  3733. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3734. priv->hw_setting.rx_buf_size,
  3735. PCI_DMA_FROMDEVICE);
  3736. spin_lock_irqsave(&rxq->lock, flags);
  3737. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3738. spin_unlock_irqrestore(&rxq->lock, flags);
  3739. i = (i + 1) & RX_QUEUE_MASK;
  3740. /* If there are a lot of unused frames,
  3741. * restock the Rx queue so ucode wont assert. */
  3742. if (fill_rx) {
  3743. count++;
  3744. if (count >= 8) {
  3745. priv->rxq.read = i;
  3746. __iwl4965_rx_replenish(priv);
  3747. count = 0;
  3748. }
  3749. }
  3750. }
  3751. /* Backtrack one entry */
  3752. priv->rxq.read = i;
  3753. iwl4965_rx_queue_restock(priv);
  3754. }
  3755. /**
  3756. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3757. */
  3758. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3759. struct iwl4965_tx_queue *txq)
  3760. {
  3761. u32 reg = 0;
  3762. int rc = 0;
  3763. int txq_id = txq->q.id;
  3764. if (txq->need_update == 0)
  3765. return rc;
  3766. /* if we're trying to save power */
  3767. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3768. /* wake up nic if it's powered down ...
  3769. * uCode will wake up, and interrupt us again, so next
  3770. * time we'll skip this part. */
  3771. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3772. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3773. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3774. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3775. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3776. return rc;
  3777. }
  3778. /* restore this queue's parameters in nic hardware. */
  3779. rc = iwl4965_grab_nic_access(priv);
  3780. if (rc)
  3781. return rc;
  3782. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3783. txq->q.write_ptr | (txq_id << 8));
  3784. iwl4965_release_nic_access(priv);
  3785. /* else not in power-save mode, uCode will never sleep when we're
  3786. * trying to tx (during RFKILL, we're not trying to tx). */
  3787. } else
  3788. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3789. txq->q.write_ptr | (txq_id << 8));
  3790. txq->need_update = 0;
  3791. return rc;
  3792. }
  3793. #ifdef CONFIG_IWL4965_DEBUG
  3794. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3795. {
  3796. DECLARE_MAC_BUF(mac);
  3797. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3798. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3799. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3800. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3801. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3802. le32_to_cpu(rxon->filter_flags));
  3803. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3804. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3805. rxon->ofdm_basic_rates);
  3806. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3807. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3808. print_mac(mac, rxon->node_addr));
  3809. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3810. print_mac(mac, rxon->bssid_addr));
  3811. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3812. }
  3813. #endif
  3814. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3815. {
  3816. IWL_DEBUG_ISR("Enabling interrupts\n");
  3817. set_bit(STATUS_INT_ENABLED, &priv->status);
  3818. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3819. }
  3820. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3821. {
  3822. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3823. /* disable interrupts from uCode/NIC to host */
  3824. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3825. /* acknowledge/clear/reset any interrupts still pending
  3826. * from uCode or flow handler (Rx/Tx DMA) */
  3827. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3828. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3829. IWL_DEBUG_ISR("Disabled interrupts\n");
  3830. }
  3831. static const char *desc_lookup(int i)
  3832. {
  3833. switch (i) {
  3834. case 1:
  3835. return "FAIL";
  3836. case 2:
  3837. return "BAD_PARAM";
  3838. case 3:
  3839. return "BAD_CHECKSUM";
  3840. case 4:
  3841. return "NMI_INTERRUPT";
  3842. case 5:
  3843. return "SYSASSERT";
  3844. case 6:
  3845. return "FATAL_ERROR";
  3846. }
  3847. return "UNKNOWN";
  3848. }
  3849. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3850. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3851. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3852. {
  3853. u32 data2, line;
  3854. u32 desc, time, count, base, data1;
  3855. u32 blink1, blink2, ilink1, ilink2;
  3856. int rc;
  3857. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3858. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3859. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3860. return;
  3861. }
  3862. rc = iwl4965_grab_nic_access(priv);
  3863. if (rc) {
  3864. IWL_WARNING("Can not read from adapter at this time.\n");
  3865. return;
  3866. }
  3867. count = iwl4965_read_targ_mem(priv, base);
  3868. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3869. IWL_ERROR("Start IWL Error Log Dump:\n");
  3870. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3871. }
  3872. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3873. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3874. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3875. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3876. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3877. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3878. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3879. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3880. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3881. IWL_ERROR("Desc Time "
  3882. "data1 data2 line\n");
  3883. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3884. desc_lookup(desc), desc, time, data1, data2, line);
  3885. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3886. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3887. ilink1, ilink2);
  3888. iwl4965_release_nic_access(priv);
  3889. }
  3890. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3891. /**
  3892. * iwl4965_print_event_log - Dump error event log to syslog
  3893. *
  3894. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3895. */
  3896. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3897. u32 num_events, u32 mode)
  3898. {
  3899. u32 i;
  3900. u32 base; /* SRAM byte address of event log header */
  3901. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3902. u32 ptr; /* SRAM byte address of log data */
  3903. u32 ev, time, data; /* event log data */
  3904. if (num_events == 0)
  3905. return;
  3906. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3907. if (mode == 0)
  3908. event_size = 2 * sizeof(u32);
  3909. else
  3910. event_size = 3 * sizeof(u32);
  3911. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3912. /* "time" is actually "data" for mode 0 (no timestamp).
  3913. * place event id # at far right for easier visual parsing. */
  3914. for (i = 0; i < num_events; i++) {
  3915. ev = iwl4965_read_targ_mem(priv, ptr);
  3916. ptr += sizeof(u32);
  3917. time = iwl4965_read_targ_mem(priv, ptr);
  3918. ptr += sizeof(u32);
  3919. if (mode == 0)
  3920. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3921. else {
  3922. data = iwl4965_read_targ_mem(priv, ptr);
  3923. ptr += sizeof(u32);
  3924. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3925. }
  3926. }
  3927. }
  3928. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  3929. {
  3930. int rc;
  3931. u32 base; /* SRAM byte address of event log header */
  3932. u32 capacity; /* event log capacity in # entries */
  3933. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3934. u32 num_wraps; /* # times uCode wrapped to top of log */
  3935. u32 next_entry; /* index of next entry to be written by uCode */
  3936. u32 size; /* # entries that we'll print */
  3937. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3938. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3939. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3940. return;
  3941. }
  3942. rc = iwl4965_grab_nic_access(priv);
  3943. if (rc) {
  3944. IWL_WARNING("Can not read from adapter at this time.\n");
  3945. return;
  3946. }
  3947. /* event log header */
  3948. capacity = iwl4965_read_targ_mem(priv, base);
  3949. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3950. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3951. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3952. size = num_wraps ? capacity : next_entry;
  3953. /* bail out if nothing in log */
  3954. if (size == 0) {
  3955. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3956. iwl4965_release_nic_access(priv);
  3957. return;
  3958. }
  3959. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3960. size, num_wraps);
  3961. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3962. * i.e the next one that uCode would fill. */
  3963. if (num_wraps)
  3964. iwl4965_print_event_log(priv, next_entry,
  3965. capacity - next_entry, mode);
  3966. /* (then/else) start at top of log */
  3967. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3968. iwl4965_release_nic_access(priv);
  3969. }
  3970. /**
  3971. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3972. */
  3973. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  3974. {
  3975. /* Set the FW error flag -- cleared on iwl4965_down */
  3976. set_bit(STATUS_FW_ERROR, &priv->status);
  3977. /* Cancel currently queued command. */
  3978. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3979. #ifdef CONFIG_IWL4965_DEBUG
  3980. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  3981. iwl4965_dump_nic_error_log(priv);
  3982. iwl4965_dump_nic_event_log(priv);
  3983. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3984. }
  3985. #endif
  3986. wake_up_interruptible(&priv->wait_command_queue);
  3987. /* Keep the restart process from trying to send host
  3988. * commands by clearing the INIT status bit */
  3989. clear_bit(STATUS_READY, &priv->status);
  3990. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3991. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3992. "Restarting adapter due to uCode error.\n");
  3993. if (iwl4965_is_associated(priv)) {
  3994. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3995. sizeof(priv->recovery_rxon));
  3996. priv->error_recovering = 1;
  3997. }
  3998. queue_work(priv->workqueue, &priv->restart);
  3999. }
  4000. }
  4001. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4002. {
  4003. unsigned long flags;
  4004. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4005. sizeof(priv->staging_rxon));
  4006. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4007. iwl4965_commit_rxon(priv);
  4008. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4009. spin_lock_irqsave(&priv->lock, flags);
  4010. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4011. priv->error_recovering = 0;
  4012. spin_unlock_irqrestore(&priv->lock, flags);
  4013. }
  4014. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4015. {
  4016. u32 inta, handled = 0;
  4017. u32 inta_fh;
  4018. unsigned long flags;
  4019. #ifdef CONFIG_IWL4965_DEBUG
  4020. u32 inta_mask;
  4021. #endif
  4022. spin_lock_irqsave(&priv->lock, flags);
  4023. /* Ack/clear/reset pending uCode interrupts.
  4024. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4025. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4026. inta = iwl4965_read32(priv, CSR_INT);
  4027. iwl4965_write32(priv, CSR_INT, inta);
  4028. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4029. * Any new interrupts that happen after this, either while we're
  4030. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4031. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4032. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4033. #ifdef CONFIG_IWL4965_DEBUG
  4034. if (iwl4965_debug_level & IWL_DL_ISR) {
  4035. /* just for debug */
  4036. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4037. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4038. inta, inta_mask, inta_fh);
  4039. }
  4040. #endif
  4041. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4042. * atomic, make sure that inta covers all the interrupts that
  4043. * we've discovered, even if FH interrupt came in just after
  4044. * reading CSR_INT. */
  4045. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4046. inta |= CSR_INT_BIT_FH_RX;
  4047. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4048. inta |= CSR_INT_BIT_FH_TX;
  4049. /* Now service all interrupt bits discovered above. */
  4050. if (inta & CSR_INT_BIT_HW_ERR) {
  4051. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4052. /* Tell the device to stop sending interrupts */
  4053. iwl4965_disable_interrupts(priv);
  4054. iwl4965_irq_handle_error(priv);
  4055. handled |= CSR_INT_BIT_HW_ERR;
  4056. spin_unlock_irqrestore(&priv->lock, flags);
  4057. return;
  4058. }
  4059. #ifdef CONFIG_IWL4965_DEBUG
  4060. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4061. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4062. if (inta & CSR_INT_BIT_SCD)
  4063. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4064. "the frame/frames.\n");
  4065. /* Alive notification via Rx interrupt will do the real work */
  4066. if (inta & CSR_INT_BIT_ALIVE)
  4067. IWL_DEBUG_ISR("Alive interrupt\n");
  4068. }
  4069. #endif
  4070. /* Safely ignore these bits for debug checks below */
  4071. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4072. /* HW RF KILL switch toggled */
  4073. if (inta & CSR_INT_BIT_RF_KILL) {
  4074. int hw_rf_kill = 0;
  4075. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4076. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4077. hw_rf_kill = 1;
  4078. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4079. "RF_KILL bit toggled to %s.\n",
  4080. hw_rf_kill ? "disable radio":"enable radio");
  4081. /* Queue restart only if RF_KILL switch was set to "kill"
  4082. * when we loaded driver, and is now set to "enable".
  4083. * After we're Alive, RF_KILL gets handled by
  4084. * iwl4965_rx_card_state_notif() */
  4085. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4086. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4087. queue_work(priv->workqueue, &priv->restart);
  4088. }
  4089. handled |= CSR_INT_BIT_RF_KILL;
  4090. }
  4091. /* Chip got too hot and stopped itself */
  4092. if (inta & CSR_INT_BIT_CT_KILL) {
  4093. IWL_ERROR("Microcode CT kill error detected.\n");
  4094. handled |= CSR_INT_BIT_CT_KILL;
  4095. }
  4096. /* Error detected by uCode */
  4097. if (inta & CSR_INT_BIT_SW_ERR) {
  4098. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4099. inta);
  4100. iwl4965_irq_handle_error(priv);
  4101. handled |= CSR_INT_BIT_SW_ERR;
  4102. }
  4103. /* uCode wakes up after power-down sleep */
  4104. if (inta & CSR_INT_BIT_WAKEUP) {
  4105. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4106. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4107. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4108. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4109. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4110. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4111. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4112. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4113. handled |= CSR_INT_BIT_WAKEUP;
  4114. }
  4115. /* All uCode command responses, including Tx command responses,
  4116. * Rx "responses" (frame-received notification), and other
  4117. * notifications from uCode come through here*/
  4118. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4119. iwl4965_rx_handle(priv);
  4120. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4121. }
  4122. if (inta & CSR_INT_BIT_FH_TX) {
  4123. IWL_DEBUG_ISR("Tx interrupt\n");
  4124. handled |= CSR_INT_BIT_FH_TX;
  4125. }
  4126. if (inta & ~handled)
  4127. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4128. if (inta & ~CSR_INI_SET_MASK) {
  4129. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4130. inta & ~CSR_INI_SET_MASK);
  4131. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4132. }
  4133. /* Re-enable all interrupts */
  4134. iwl4965_enable_interrupts(priv);
  4135. #ifdef CONFIG_IWL4965_DEBUG
  4136. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4137. inta = iwl4965_read32(priv, CSR_INT);
  4138. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4139. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4140. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4141. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4142. }
  4143. #endif
  4144. spin_unlock_irqrestore(&priv->lock, flags);
  4145. }
  4146. static irqreturn_t iwl4965_isr(int irq, void *data)
  4147. {
  4148. struct iwl4965_priv *priv = data;
  4149. u32 inta, inta_mask;
  4150. u32 inta_fh;
  4151. if (!priv)
  4152. return IRQ_NONE;
  4153. spin_lock(&priv->lock);
  4154. /* Disable (but don't clear!) interrupts here to avoid
  4155. * back-to-back ISRs and sporadic interrupts from our NIC.
  4156. * If we have something to service, the tasklet will re-enable ints.
  4157. * If we *don't* have something, we'll re-enable before leaving here. */
  4158. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4159. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4160. /* Discover which interrupts are active/pending */
  4161. inta = iwl4965_read32(priv, CSR_INT);
  4162. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4163. /* Ignore interrupt if there's nothing in NIC to service.
  4164. * This may be due to IRQ shared with another device,
  4165. * or due to sporadic interrupts thrown from our NIC. */
  4166. if (!inta && !inta_fh) {
  4167. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4168. goto none;
  4169. }
  4170. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4171. /* Hardware disappeared. It might have already raised
  4172. * an interrupt */
  4173. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4174. goto unplugged;
  4175. }
  4176. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4177. inta, inta_mask, inta_fh);
  4178. inta &= ~CSR_INT_BIT_SCD;
  4179. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4180. if (likely(inta || inta_fh))
  4181. tasklet_schedule(&priv->irq_tasklet);
  4182. unplugged:
  4183. spin_unlock(&priv->lock);
  4184. return IRQ_HANDLED;
  4185. none:
  4186. /* re-enable interrupts here since we don't have anything to service. */
  4187. iwl4965_enable_interrupts(priv);
  4188. spin_unlock(&priv->lock);
  4189. return IRQ_NONE;
  4190. }
  4191. /************************** EEPROM BANDS ****************************
  4192. *
  4193. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4194. * EEPROM contents to the specific channel number supported for each
  4195. * band.
  4196. *
  4197. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4198. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4199. * The specific geography and calibration information for that channel
  4200. * is contained in the eeprom map itself.
  4201. *
  4202. * During init, we copy the eeprom information and channel map
  4203. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4204. *
  4205. * channel_map_24/52 provides the index in the channel_info array for a
  4206. * given channel. We have to have two separate maps as there is channel
  4207. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4208. * band_2
  4209. *
  4210. * A value of 0xff stored in the channel_map indicates that the channel
  4211. * is not supported by the hardware at all.
  4212. *
  4213. * A value of 0xfe in the channel_map indicates that the channel is not
  4214. * valid for Tx with the current hardware. This means that
  4215. * while the system can tune and receive on a given channel, it may not
  4216. * be able to associate or transmit any frames on that
  4217. * channel. There is no corresponding channel information for that
  4218. * entry.
  4219. *
  4220. *********************************************************************/
  4221. /* 2.4 GHz */
  4222. static const u8 iwl4965_eeprom_band_1[14] = {
  4223. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4224. };
  4225. /* 5.2 GHz bands */
  4226. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4227. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4228. };
  4229. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4230. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4231. };
  4232. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4233. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4234. };
  4235. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4236. 145, 149, 153, 157, 161, 165
  4237. };
  4238. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4239. 1, 2, 3, 4, 5, 6, 7
  4240. };
  4241. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4242. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4243. };
  4244. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4245. int band,
  4246. int *eeprom_ch_count,
  4247. const struct iwl4965_eeprom_channel
  4248. **eeprom_ch_info,
  4249. const u8 **eeprom_ch_index)
  4250. {
  4251. switch (band) {
  4252. case 1: /* 2.4GHz band */
  4253. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4254. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4255. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4256. break;
  4257. case 2: /* 4.9GHz band */
  4258. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4259. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4260. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4261. break;
  4262. case 3: /* 5.2GHz band */
  4263. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4264. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4265. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4266. break;
  4267. case 4: /* 5.5GHz band */
  4268. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4269. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4270. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4271. break;
  4272. case 5: /* 5.7GHz band */
  4273. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4274. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4275. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4276. break;
  4277. case 6: /* 2.4GHz FAT channels */
  4278. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4279. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4280. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4281. break;
  4282. case 7: /* 5 GHz FAT channels */
  4283. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4284. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4285. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4286. break;
  4287. default:
  4288. BUG();
  4289. return;
  4290. }
  4291. }
  4292. /**
  4293. * iwl4965_get_channel_info - Find driver's private channel info
  4294. *
  4295. * Based on band and channel number.
  4296. */
  4297. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4298. enum ieee80211_band band, u16 channel)
  4299. {
  4300. int i;
  4301. switch (band) {
  4302. case IEEE80211_BAND_5GHZ:
  4303. for (i = 14; i < priv->channel_count; i++) {
  4304. if (priv->channel_info[i].channel == channel)
  4305. return &priv->channel_info[i];
  4306. }
  4307. break;
  4308. case IEEE80211_BAND_2GHZ:
  4309. if (channel >= 1 && channel <= 14)
  4310. return &priv->channel_info[channel - 1];
  4311. break;
  4312. default:
  4313. BUG();
  4314. }
  4315. return NULL;
  4316. }
  4317. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4318. ? # x " " : "")
  4319. /**
  4320. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4321. */
  4322. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4323. {
  4324. int eeprom_ch_count = 0;
  4325. const u8 *eeprom_ch_index = NULL;
  4326. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4327. int band, ch;
  4328. struct iwl4965_channel_info *ch_info;
  4329. if (priv->channel_count) {
  4330. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4331. return 0;
  4332. }
  4333. if (priv->eeprom.version < 0x2f) {
  4334. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4335. priv->eeprom.version);
  4336. return -EINVAL;
  4337. }
  4338. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4339. priv->channel_count =
  4340. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4341. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4342. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4343. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4344. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4345. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4346. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4347. priv->channel_count, GFP_KERNEL);
  4348. if (!priv->channel_info) {
  4349. IWL_ERROR("Could not allocate channel_info\n");
  4350. priv->channel_count = 0;
  4351. return -ENOMEM;
  4352. }
  4353. ch_info = priv->channel_info;
  4354. /* Loop through the 5 EEPROM bands adding them in order to the
  4355. * channel map we maintain (that contains additional information than
  4356. * what just in the EEPROM) */
  4357. for (band = 1; band <= 5; band++) {
  4358. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4359. &eeprom_ch_info, &eeprom_ch_index);
  4360. /* Loop through each band adding each of the channels */
  4361. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4362. ch_info->channel = eeprom_ch_index[ch];
  4363. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4364. IEEE80211_BAND_5GHZ;
  4365. /* permanently store EEPROM's channel regulatory flags
  4366. * and max power in channel info database. */
  4367. ch_info->eeprom = eeprom_ch_info[ch];
  4368. /* Copy the run-time flags so they are there even on
  4369. * invalid channels */
  4370. ch_info->flags = eeprom_ch_info[ch].flags;
  4371. if (!(is_channel_valid(ch_info))) {
  4372. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4373. "No traffic\n",
  4374. ch_info->channel,
  4375. ch_info->flags,
  4376. is_channel_a_band(ch_info) ?
  4377. "5.2" : "2.4");
  4378. ch_info++;
  4379. continue;
  4380. }
  4381. /* Initialize regulatory-based run-time data */
  4382. ch_info->max_power_avg = ch_info->curr_txpow =
  4383. eeprom_ch_info[ch].max_power_avg;
  4384. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4385. ch_info->min_power = 0;
  4386. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4387. " %ddBm): Ad-Hoc %ssupported\n",
  4388. ch_info->channel,
  4389. is_channel_a_band(ch_info) ?
  4390. "5.2" : "2.4",
  4391. CHECK_AND_PRINT(VALID),
  4392. CHECK_AND_PRINT(IBSS),
  4393. CHECK_AND_PRINT(ACTIVE),
  4394. CHECK_AND_PRINT(RADAR),
  4395. CHECK_AND_PRINT(WIDE),
  4396. CHECK_AND_PRINT(NARROW),
  4397. CHECK_AND_PRINT(DFS),
  4398. eeprom_ch_info[ch].flags,
  4399. eeprom_ch_info[ch].max_power_avg,
  4400. ((eeprom_ch_info[ch].
  4401. flags & EEPROM_CHANNEL_IBSS)
  4402. && !(eeprom_ch_info[ch].
  4403. flags & EEPROM_CHANNEL_RADAR))
  4404. ? "" : "not ");
  4405. /* Set the user_txpower_limit to the highest power
  4406. * supported by any channel */
  4407. if (eeprom_ch_info[ch].max_power_avg >
  4408. priv->user_txpower_limit)
  4409. priv->user_txpower_limit =
  4410. eeprom_ch_info[ch].max_power_avg;
  4411. ch_info++;
  4412. }
  4413. }
  4414. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4415. for (band = 6; band <= 7; band++) {
  4416. enum ieee80211_band ieeeband;
  4417. u8 fat_extension_chan;
  4418. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4419. &eeprom_ch_info, &eeprom_ch_index);
  4420. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4421. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4422. /* Loop through each band adding each of the channels */
  4423. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4424. if ((band == 6) &&
  4425. ((eeprom_ch_index[ch] == 5) ||
  4426. (eeprom_ch_index[ch] == 6) ||
  4427. (eeprom_ch_index[ch] == 7)))
  4428. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4429. else
  4430. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4431. /* Set up driver's info for lower half */
  4432. iwl4965_set_fat_chan_info(priv, ieeeband,
  4433. eeprom_ch_index[ch],
  4434. &(eeprom_ch_info[ch]),
  4435. fat_extension_chan);
  4436. /* Set up driver's info for upper half */
  4437. iwl4965_set_fat_chan_info(priv, ieeeband,
  4438. (eeprom_ch_index[ch] + 4),
  4439. &(eeprom_ch_info[ch]),
  4440. HT_IE_EXT_CHANNEL_BELOW);
  4441. }
  4442. }
  4443. return 0;
  4444. }
  4445. /*
  4446. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4447. */
  4448. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4449. {
  4450. kfree(priv->channel_info);
  4451. priv->channel_count = 0;
  4452. }
  4453. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4454. * sending probe req. This should be set long enough to hear probe responses
  4455. * from more than one AP. */
  4456. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4457. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4458. /* For faster active scanning, scan will move to the next channel if fewer than
  4459. * PLCP_QUIET_THRESH packets are heard on this channel within
  4460. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4461. * time if it's a quiet channel (nothing responded to our probe, and there's
  4462. * no other traffic).
  4463. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4464. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4465. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4466. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4467. * Must be set longer than active dwell time.
  4468. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4469. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4470. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4471. #define IWL_PASSIVE_DWELL_BASE (100)
  4472. #define IWL_CHANNEL_TUNE_TIME 5
  4473. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4474. enum ieee80211_band band)
  4475. {
  4476. if (band == IEEE80211_BAND_5GHZ)
  4477. return IWL_ACTIVE_DWELL_TIME_52;
  4478. else
  4479. return IWL_ACTIVE_DWELL_TIME_24;
  4480. }
  4481. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4482. enum ieee80211_band band)
  4483. {
  4484. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4485. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4486. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4487. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4488. if (iwl4965_is_associated(priv)) {
  4489. /* If we're associated, we clamp the maximum passive
  4490. * dwell time to be 98% of the beacon interval (minus
  4491. * 2 * channel tune time) */
  4492. passive = priv->beacon_int;
  4493. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4494. passive = IWL_PASSIVE_DWELL_BASE;
  4495. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4496. }
  4497. if (passive <= active)
  4498. passive = active + 1;
  4499. return passive;
  4500. }
  4501. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4502. enum ieee80211_band band,
  4503. u8 is_active, u8 direct_mask,
  4504. struct iwl4965_scan_channel *scan_ch)
  4505. {
  4506. const struct ieee80211_channel *channels = NULL;
  4507. const struct ieee80211_supported_band *sband;
  4508. const struct iwl4965_channel_info *ch_info;
  4509. u16 passive_dwell = 0;
  4510. u16 active_dwell = 0;
  4511. int added, i;
  4512. sband = iwl4965_get_hw_mode(priv, band);
  4513. if (!sband)
  4514. return 0;
  4515. channels = sband->channels;
  4516. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4517. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4518. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4519. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4520. le16_to_cpu(priv->active_rxon.channel)) {
  4521. if (iwl4965_is_associated(priv)) {
  4522. IWL_DEBUG_SCAN
  4523. ("Skipping current channel %d\n",
  4524. le16_to_cpu(priv->active_rxon.channel));
  4525. continue;
  4526. }
  4527. } else if (priv->only_active_channel)
  4528. continue;
  4529. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4530. ch_info = iwl4965_get_channel_info(priv, band,
  4531. scan_ch->channel);
  4532. if (!is_channel_valid(ch_info)) {
  4533. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4534. scan_ch->channel);
  4535. continue;
  4536. }
  4537. if (!is_active || is_channel_passive(ch_info) ||
  4538. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4539. scan_ch->type = 0; /* passive */
  4540. else
  4541. scan_ch->type = 1; /* active */
  4542. if (scan_ch->type & 1)
  4543. scan_ch->type |= (direct_mask << 1);
  4544. if (is_channel_narrow(ch_info))
  4545. scan_ch->type |= (1 << 7);
  4546. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4547. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4548. /* Set txpower levels to defaults */
  4549. scan_ch->tpc.dsp_atten = 110;
  4550. /* scan_pwr_info->tpc.dsp_atten; */
  4551. /*scan_pwr_info->tpc.tx_gain; */
  4552. if (band == IEEE80211_BAND_5GHZ)
  4553. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4554. else {
  4555. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4556. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4557. * power level:
  4558. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4559. */
  4560. }
  4561. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4562. scan_ch->channel,
  4563. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4564. (scan_ch->type & 1) ?
  4565. active_dwell : passive_dwell);
  4566. scan_ch++;
  4567. added++;
  4568. }
  4569. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4570. return added;
  4571. }
  4572. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4573. struct ieee80211_rate *rates)
  4574. {
  4575. int i;
  4576. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4577. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4578. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4579. rates[i].hw_value_short = i;
  4580. rates[i].flags = 0;
  4581. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4582. /*
  4583. * If CCK != 1M then set short preamble rate flag.
  4584. */
  4585. rates[i].flags |=
  4586. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  4587. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4588. }
  4589. }
  4590. }
  4591. /**
  4592. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4593. */
  4594. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4595. {
  4596. struct iwl4965_channel_info *ch;
  4597. struct ieee80211_supported_band *sband;
  4598. struct ieee80211_channel *channels;
  4599. struct ieee80211_channel *geo_ch;
  4600. struct ieee80211_rate *rates;
  4601. int i = 0;
  4602. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4603. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4604. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4605. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4606. return 0;
  4607. }
  4608. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4609. priv->channel_count, GFP_KERNEL);
  4610. if (!channels)
  4611. return -ENOMEM;
  4612. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4613. GFP_KERNEL);
  4614. if (!rates) {
  4615. kfree(channels);
  4616. return -ENOMEM;
  4617. }
  4618. /* 5.2GHz channels start after the 2.4GHz channels */
  4619. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4620. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4621. /* just OFDM */
  4622. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4623. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4624. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4625. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4626. sband->channels = channels;
  4627. /* OFDM & CCK */
  4628. sband->bitrates = rates;
  4629. sband->n_bitrates = IWL_RATE_COUNT;
  4630. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4631. priv->ieee_channels = channels;
  4632. priv->ieee_rates = rates;
  4633. iwl4965_init_hw_rates(priv, rates);
  4634. for (i = 0; i < priv->channel_count; i++) {
  4635. ch = &priv->channel_info[i];
  4636. /* FIXME: might be removed if scan is OK */
  4637. if (!is_channel_valid(ch))
  4638. continue;
  4639. if (is_channel_a_band(ch))
  4640. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4641. else
  4642. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4643. geo_ch = &sband->channels[sband->n_channels++];
  4644. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4645. geo_ch->max_power = ch->max_power_avg;
  4646. geo_ch->max_antenna_gain = 0xff;
  4647. geo_ch->hw_value = ch->channel;
  4648. if (is_channel_valid(ch)) {
  4649. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4650. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4651. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4652. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4653. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4654. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4655. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4656. priv->max_channel_txpower_limit =
  4657. ch->max_power_avg;
  4658. } else {
  4659. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4660. }
  4661. /* Save flags for reg domain usage */
  4662. geo_ch->orig_flags = geo_ch->flags;
  4663. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4664. ch->channel, geo_ch->center_freq,
  4665. is_channel_a_band(ch) ? "5.2" : "2.4",
  4666. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4667. "restricted" : "valid",
  4668. geo_ch->flags);
  4669. }
  4670. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4671. priv->cfg->sku & IWL_SKU_A) {
  4672. printk(KERN_INFO DRV_NAME
  4673. ": Incorrectly detected BG card as ABG. Please send "
  4674. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4675. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4676. priv->cfg->sku &= ~IWL_SKU_A;
  4677. }
  4678. printk(KERN_INFO DRV_NAME
  4679. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4680. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4681. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4682. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4683. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4684. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4685. return 0;
  4686. }
  4687. /*
  4688. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4689. */
  4690. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4691. {
  4692. kfree(priv->ieee_channels);
  4693. kfree(priv->ieee_rates);
  4694. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4695. }
  4696. /******************************************************************************
  4697. *
  4698. * uCode download functions
  4699. *
  4700. ******************************************************************************/
  4701. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4702. {
  4703. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4704. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4705. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4706. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4707. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4708. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4709. }
  4710. /**
  4711. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4712. * looking at all data.
  4713. */
  4714. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4715. u32 len)
  4716. {
  4717. u32 val;
  4718. u32 save_len = len;
  4719. int rc = 0;
  4720. u32 errcnt;
  4721. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4722. rc = iwl4965_grab_nic_access(priv);
  4723. if (rc)
  4724. return rc;
  4725. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4726. errcnt = 0;
  4727. for (; len > 0; len -= sizeof(u32), image++) {
  4728. /* read data comes through single port, auto-incr addr */
  4729. /* NOTE: Use the debugless read so we don't flood kernel log
  4730. * if IWL_DL_IO is set */
  4731. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4732. if (val != le32_to_cpu(*image)) {
  4733. IWL_ERROR("uCode INST section is invalid at "
  4734. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4735. save_len - len, val, le32_to_cpu(*image));
  4736. rc = -EIO;
  4737. errcnt++;
  4738. if (errcnt >= 20)
  4739. break;
  4740. }
  4741. }
  4742. iwl4965_release_nic_access(priv);
  4743. if (!errcnt)
  4744. IWL_DEBUG_INFO
  4745. ("ucode image in INSTRUCTION memory is good\n");
  4746. return rc;
  4747. }
  4748. /**
  4749. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4750. * using sample data 100 bytes apart. If these sample points are good,
  4751. * it's a pretty good bet that everything between them is good, too.
  4752. */
  4753. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4754. {
  4755. u32 val;
  4756. int rc = 0;
  4757. u32 errcnt = 0;
  4758. u32 i;
  4759. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4760. rc = iwl4965_grab_nic_access(priv);
  4761. if (rc)
  4762. return rc;
  4763. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4764. /* read data comes through single port, auto-incr addr */
  4765. /* NOTE: Use the debugless read so we don't flood kernel log
  4766. * if IWL_DL_IO is set */
  4767. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4768. i + RTC_INST_LOWER_BOUND);
  4769. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4770. if (val != le32_to_cpu(*image)) {
  4771. #if 0 /* Enable this if you want to see details */
  4772. IWL_ERROR("uCode INST section is invalid at "
  4773. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4774. i, val, *image);
  4775. #endif
  4776. rc = -EIO;
  4777. errcnt++;
  4778. if (errcnt >= 3)
  4779. break;
  4780. }
  4781. }
  4782. iwl4965_release_nic_access(priv);
  4783. return rc;
  4784. }
  4785. /**
  4786. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4787. * and verify its contents
  4788. */
  4789. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4790. {
  4791. __le32 *image;
  4792. u32 len;
  4793. int rc = 0;
  4794. /* Try bootstrap */
  4795. image = (__le32 *)priv->ucode_boot.v_addr;
  4796. len = priv->ucode_boot.len;
  4797. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4798. if (rc == 0) {
  4799. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4800. return 0;
  4801. }
  4802. /* Try initialize */
  4803. image = (__le32 *)priv->ucode_init.v_addr;
  4804. len = priv->ucode_init.len;
  4805. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4806. if (rc == 0) {
  4807. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4808. return 0;
  4809. }
  4810. /* Try runtime/protocol */
  4811. image = (__le32 *)priv->ucode_code.v_addr;
  4812. len = priv->ucode_code.len;
  4813. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4814. if (rc == 0) {
  4815. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4816. return 0;
  4817. }
  4818. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4819. /* Since nothing seems to match, show first several data entries in
  4820. * instruction SRAM, so maybe visual inspection will give a clue.
  4821. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4822. image = (__le32 *)priv->ucode_boot.v_addr;
  4823. len = priv->ucode_boot.len;
  4824. rc = iwl4965_verify_inst_full(priv, image, len);
  4825. return rc;
  4826. }
  4827. /* check contents of special bootstrap uCode SRAM */
  4828. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4829. {
  4830. __le32 *image = priv->ucode_boot.v_addr;
  4831. u32 len = priv->ucode_boot.len;
  4832. u32 reg;
  4833. u32 val;
  4834. IWL_DEBUG_INFO("Begin verify bsm\n");
  4835. /* verify BSM SRAM contents */
  4836. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4837. for (reg = BSM_SRAM_LOWER_BOUND;
  4838. reg < BSM_SRAM_LOWER_BOUND + len;
  4839. reg += sizeof(u32), image ++) {
  4840. val = iwl4965_read_prph(priv, reg);
  4841. if (val != le32_to_cpu(*image)) {
  4842. IWL_ERROR("BSM uCode verification failed at "
  4843. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4844. BSM_SRAM_LOWER_BOUND,
  4845. reg - BSM_SRAM_LOWER_BOUND, len,
  4846. val, le32_to_cpu(*image));
  4847. return -EIO;
  4848. }
  4849. }
  4850. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4851. return 0;
  4852. }
  4853. /**
  4854. * iwl4965_load_bsm - Load bootstrap instructions
  4855. *
  4856. * BSM operation:
  4857. *
  4858. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4859. * in special SRAM that does not power down during RFKILL. When powering back
  4860. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4861. * the bootstrap program into the on-board processor, and starts it.
  4862. *
  4863. * The bootstrap program loads (via DMA) instructions and data for a new
  4864. * program from host DRAM locations indicated by the host driver in the
  4865. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4866. * automatically.
  4867. *
  4868. * When initializing the NIC, the host driver points the BSM to the
  4869. * "initialize" uCode image. This uCode sets up some internal data, then
  4870. * notifies host via "initialize alive" that it is complete.
  4871. *
  4872. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4873. * normal runtime uCode instructions and a backup uCode data cache buffer
  4874. * (filled initially with starting data values for the on-board processor),
  4875. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4876. * which begins normal operation.
  4877. *
  4878. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4879. * the backup data cache in DRAM before SRAM is powered down.
  4880. *
  4881. * When powering back up, the BSM loads the bootstrap program. This reloads
  4882. * the runtime uCode instructions and the backup data cache into SRAM,
  4883. * and re-launches the runtime uCode from where it left off.
  4884. */
  4885. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4886. {
  4887. __le32 *image = priv->ucode_boot.v_addr;
  4888. u32 len = priv->ucode_boot.len;
  4889. dma_addr_t pinst;
  4890. dma_addr_t pdata;
  4891. u32 inst_len;
  4892. u32 data_len;
  4893. int rc;
  4894. int i;
  4895. u32 done;
  4896. u32 reg_offset;
  4897. IWL_DEBUG_INFO("Begin load bsm\n");
  4898. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4899. if (len > IWL_MAX_BSM_SIZE)
  4900. return -EINVAL;
  4901. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4902. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4903. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4904. * after the "initialize" uCode has run, to point to
  4905. * runtime/protocol instructions and backup data cache. */
  4906. pinst = priv->ucode_init.p_addr >> 4;
  4907. pdata = priv->ucode_init_data.p_addr >> 4;
  4908. inst_len = priv->ucode_init.len;
  4909. data_len = priv->ucode_init_data.len;
  4910. rc = iwl4965_grab_nic_access(priv);
  4911. if (rc)
  4912. return rc;
  4913. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4914. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4915. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4916. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4917. /* Fill BSM memory with bootstrap instructions */
  4918. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4919. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4920. reg_offset += sizeof(u32), image++)
  4921. _iwl4965_write_prph(priv, reg_offset,
  4922. le32_to_cpu(*image));
  4923. rc = iwl4965_verify_bsm(priv);
  4924. if (rc) {
  4925. iwl4965_release_nic_access(priv);
  4926. return rc;
  4927. }
  4928. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4929. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4930. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  4931. RTC_INST_LOWER_BOUND);
  4932. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4933. /* Load bootstrap code into instruction SRAM now,
  4934. * to prepare to load "initialize" uCode */
  4935. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4936. BSM_WR_CTRL_REG_BIT_START);
  4937. /* Wait for load of bootstrap uCode to finish */
  4938. for (i = 0; i < 100; i++) {
  4939. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  4940. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4941. break;
  4942. udelay(10);
  4943. }
  4944. if (i < 100)
  4945. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4946. else {
  4947. IWL_ERROR("BSM write did not complete!\n");
  4948. return -EIO;
  4949. }
  4950. /* Enable future boot loads whenever power management unit triggers it
  4951. * (e.g. when powering back up after power-save shutdown) */
  4952. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  4953. BSM_WR_CTRL_REG_BIT_START_EN);
  4954. iwl4965_release_nic_access(priv);
  4955. return 0;
  4956. }
  4957. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  4958. {
  4959. /* Remove all resets to allow NIC to operate */
  4960. iwl4965_write32(priv, CSR_RESET, 0);
  4961. }
  4962. /**
  4963. * iwl4965_read_ucode - Read uCode images from disk file.
  4964. *
  4965. * Copy into buffers for card to fetch via bus-mastering
  4966. */
  4967. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  4968. {
  4969. struct iwl4965_ucode *ucode;
  4970. int ret;
  4971. const struct firmware *ucode_raw;
  4972. const char *name = priv->cfg->fw_name;
  4973. u8 *src;
  4974. size_t len;
  4975. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4976. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4977. * request_firmware() is synchronous, file is in memory on return. */
  4978. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4979. if (ret < 0) {
  4980. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4981. name, ret);
  4982. goto error;
  4983. }
  4984. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4985. name, ucode_raw->size);
  4986. /* Make sure that we got at least our header! */
  4987. if (ucode_raw->size < sizeof(*ucode)) {
  4988. IWL_ERROR("File size way too small!\n");
  4989. ret = -EINVAL;
  4990. goto err_release;
  4991. }
  4992. /* Data from ucode file: header followed by uCode images */
  4993. ucode = (void *)ucode_raw->data;
  4994. ver = le32_to_cpu(ucode->ver);
  4995. inst_size = le32_to_cpu(ucode->inst_size);
  4996. data_size = le32_to_cpu(ucode->data_size);
  4997. init_size = le32_to_cpu(ucode->init_size);
  4998. init_data_size = le32_to_cpu(ucode->init_data_size);
  4999. boot_size = le32_to_cpu(ucode->boot_size);
  5000. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5001. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5002. inst_size);
  5003. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5004. data_size);
  5005. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5006. init_size);
  5007. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5008. init_data_size);
  5009. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5010. boot_size);
  5011. /* Verify size of file vs. image size info in file's header */
  5012. if (ucode_raw->size < sizeof(*ucode) +
  5013. inst_size + data_size + init_size +
  5014. init_data_size + boot_size) {
  5015. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5016. (int)ucode_raw->size);
  5017. ret = -EINVAL;
  5018. goto err_release;
  5019. }
  5020. /* Verify that uCode images will fit in card's SRAM */
  5021. if (inst_size > IWL_MAX_INST_SIZE) {
  5022. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5023. inst_size);
  5024. ret = -EINVAL;
  5025. goto err_release;
  5026. }
  5027. if (data_size > IWL_MAX_DATA_SIZE) {
  5028. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5029. data_size);
  5030. ret = -EINVAL;
  5031. goto err_release;
  5032. }
  5033. if (init_size > IWL_MAX_INST_SIZE) {
  5034. IWL_DEBUG_INFO
  5035. ("uCode init instr len %d too large to fit in\n",
  5036. init_size);
  5037. ret = -EINVAL;
  5038. goto err_release;
  5039. }
  5040. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5041. IWL_DEBUG_INFO
  5042. ("uCode init data len %d too large to fit in\n",
  5043. init_data_size);
  5044. ret = -EINVAL;
  5045. goto err_release;
  5046. }
  5047. if (boot_size > IWL_MAX_BSM_SIZE) {
  5048. IWL_DEBUG_INFO
  5049. ("uCode boot instr len %d too large to fit in\n",
  5050. boot_size);
  5051. ret = -EINVAL;
  5052. goto err_release;
  5053. }
  5054. /* Allocate ucode buffers for card's bus-master loading ... */
  5055. /* Runtime instructions and 2 copies of data:
  5056. * 1) unmodified from disk
  5057. * 2) backup cache for save/restore during power-downs */
  5058. priv->ucode_code.len = inst_size;
  5059. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5060. priv->ucode_data.len = data_size;
  5061. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5062. priv->ucode_data_backup.len = data_size;
  5063. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5064. /* Initialization instructions and data */
  5065. if (init_size && init_data_size) {
  5066. priv->ucode_init.len = init_size;
  5067. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5068. priv->ucode_init_data.len = init_data_size;
  5069. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5070. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5071. goto err_pci_alloc;
  5072. }
  5073. /* Bootstrap (instructions only, no data) */
  5074. if (boot_size) {
  5075. priv->ucode_boot.len = boot_size;
  5076. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5077. if (!priv->ucode_boot.v_addr)
  5078. goto err_pci_alloc;
  5079. }
  5080. /* Copy images into buffers for card's bus-master reads ... */
  5081. /* Runtime instructions (first block of data in file) */
  5082. src = &ucode->data[0];
  5083. len = priv->ucode_code.len;
  5084. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5085. memcpy(priv->ucode_code.v_addr, src, len);
  5086. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5087. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5088. /* Runtime data (2nd block)
  5089. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5090. src = &ucode->data[inst_size];
  5091. len = priv->ucode_data.len;
  5092. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5093. memcpy(priv->ucode_data.v_addr, src, len);
  5094. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5095. /* Initialization instructions (3rd block) */
  5096. if (init_size) {
  5097. src = &ucode->data[inst_size + data_size];
  5098. len = priv->ucode_init.len;
  5099. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5100. len);
  5101. memcpy(priv->ucode_init.v_addr, src, len);
  5102. }
  5103. /* Initialization data (4th block) */
  5104. if (init_data_size) {
  5105. src = &ucode->data[inst_size + data_size + init_size];
  5106. len = priv->ucode_init_data.len;
  5107. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5108. len);
  5109. memcpy(priv->ucode_init_data.v_addr, src, len);
  5110. }
  5111. /* Bootstrap instructions (5th block) */
  5112. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5113. len = priv->ucode_boot.len;
  5114. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5115. memcpy(priv->ucode_boot.v_addr, src, len);
  5116. /* We have our copies now, allow OS release its copies */
  5117. release_firmware(ucode_raw);
  5118. return 0;
  5119. err_pci_alloc:
  5120. IWL_ERROR("failed to allocate pci memory\n");
  5121. ret = -ENOMEM;
  5122. iwl4965_dealloc_ucode_pci(priv);
  5123. err_release:
  5124. release_firmware(ucode_raw);
  5125. error:
  5126. return ret;
  5127. }
  5128. /**
  5129. * iwl4965_set_ucode_ptrs - Set uCode address location
  5130. *
  5131. * Tell initialization uCode where to find runtime uCode.
  5132. *
  5133. * BSM registers initially contain pointers to initialization uCode.
  5134. * We need to replace them to load runtime uCode inst and data,
  5135. * and to save runtime data when powering down.
  5136. */
  5137. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5138. {
  5139. dma_addr_t pinst;
  5140. dma_addr_t pdata;
  5141. int rc = 0;
  5142. unsigned long flags;
  5143. /* bits 35:4 for 4965 */
  5144. pinst = priv->ucode_code.p_addr >> 4;
  5145. pdata = priv->ucode_data_backup.p_addr >> 4;
  5146. spin_lock_irqsave(&priv->lock, flags);
  5147. rc = iwl4965_grab_nic_access(priv);
  5148. if (rc) {
  5149. spin_unlock_irqrestore(&priv->lock, flags);
  5150. return rc;
  5151. }
  5152. /* Tell bootstrap uCode where to find image to load */
  5153. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5154. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5155. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5156. priv->ucode_data.len);
  5157. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5158. * that all new ptr/size info is in place */
  5159. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5160. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5161. iwl4965_release_nic_access(priv);
  5162. spin_unlock_irqrestore(&priv->lock, flags);
  5163. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5164. return rc;
  5165. }
  5166. /**
  5167. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5168. *
  5169. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5170. *
  5171. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5172. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5173. * (3945 does not contain this data).
  5174. *
  5175. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5176. */
  5177. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5178. {
  5179. /* Check alive response for "valid" sign from uCode */
  5180. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5181. /* We had an error bringing up the hardware, so take it
  5182. * all the way back down so we can try again */
  5183. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5184. goto restart;
  5185. }
  5186. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5187. * This is a paranoid check, because we would not have gotten the
  5188. * "initialize" alive if code weren't properly loaded. */
  5189. if (iwl4965_verify_ucode(priv)) {
  5190. /* Runtime instruction load was bad;
  5191. * take it all the way back down so we can try again */
  5192. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5193. goto restart;
  5194. }
  5195. /* Calculate temperature */
  5196. priv->temperature = iwl4965_get_temperature(priv);
  5197. /* Send pointers to protocol/runtime uCode image ... init code will
  5198. * load and launch runtime uCode, which will send us another "Alive"
  5199. * notification. */
  5200. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5201. if (iwl4965_set_ucode_ptrs(priv)) {
  5202. /* Runtime instruction load won't happen;
  5203. * take it all the way back down so we can try again */
  5204. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5205. goto restart;
  5206. }
  5207. return;
  5208. restart:
  5209. queue_work(priv->workqueue, &priv->restart);
  5210. }
  5211. /**
  5212. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5213. * from protocol/runtime uCode (initialization uCode's
  5214. * Alive gets handled by iwl4965_init_alive_start()).
  5215. */
  5216. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5217. {
  5218. int rc = 0;
  5219. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5220. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5221. /* We had an error bringing up the hardware, so take it
  5222. * all the way back down so we can try again */
  5223. IWL_DEBUG_INFO("Alive failed.\n");
  5224. goto restart;
  5225. }
  5226. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5227. * This is a paranoid check, because we would not have gotten the
  5228. * "runtime" alive if code weren't properly loaded. */
  5229. if (iwl4965_verify_ucode(priv)) {
  5230. /* Runtime instruction load was bad;
  5231. * take it all the way back down so we can try again */
  5232. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5233. goto restart;
  5234. }
  5235. iwl4965_clear_stations_table(priv);
  5236. rc = iwl4965_alive_notify(priv);
  5237. if (rc) {
  5238. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5239. rc);
  5240. goto restart;
  5241. }
  5242. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5243. set_bit(STATUS_ALIVE, &priv->status);
  5244. /* Clear out the uCode error bit if it is set */
  5245. clear_bit(STATUS_FW_ERROR, &priv->status);
  5246. if (iwl4965_is_rfkill(priv))
  5247. return;
  5248. ieee80211_start_queues(priv->hw);
  5249. priv->active_rate = priv->rates_mask;
  5250. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5251. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5252. if (iwl4965_is_associated(priv)) {
  5253. struct iwl4965_rxon_cmd *active_rxon =
  5254. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5255. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5256. sizeof(priv->staging_rxon));
  5257. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5258. } else {
  5259. /* Initialize our rx_config data */
  5260. iwl4965_connection_init_rx_config(priv);
  5261. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5262. }
  5263. /* Configure Bluetooth device coexistence support */
  5264. iwl4965_send_bt_config(priv);
  5265. /* Configure the adapter for unassociated operation */
  5266. iwl4965_commit_rxon(priv);
  5267. /* At this point, the NIC is initialized and operational */
  5268. priv->notif_missed_beacons = 0;
  5269. set_bit(STATUS_READY, &priv->status);
  5270. iwl4965_rf_kill_ct_config(priv);
  5271. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5272. wake_up_interruptible(&priv->wait_command_queue);
  5273. if (priv->error_recovering)
  5274. iwl4965_error_recovery(priv);
  5275. return;
  5276. restart:
  5277. queue_work(priv->workqueue, &priv->restart);
  5278. }
  5279. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5280. static void __iwl4965_down(struct iwl4965_priv *priv)
  5281. {
  5282. unsigned long flags;
  5283. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5284. struct ieee80211_conf *conf = NULL;
  5285. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5286. conf = ieee80211_get_hw_conf(priv->hw);
  5287. if (!exit_pending)
  5288. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5289. iwl4965_clear_stations_table(priv);
  5290. /* Unblock any waiting calls */
  5291. wake_up_interruptible_all(&priv->wait_command_queue);
  5292. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5293. * exiting the module */
  5294. if (!exit_pending)
  5295. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5296. /* stop and reset the on-board processor */
  5297. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5298. /* tell the device to stop sending interrupts */
  5299. iwl4965_disable_interrupts(priv);
  5300. if (priv->mac80211_registered)
  5301. ieee80211_stop_queues(priv->hw);
  5302. /* If we have not previously called iwl4965_init() then
  5303. * clear all bits but the RF Kill and SUSPEND bits and return */
  5304. if (!iwl4965_is_init(priv)) {
  5305. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5306. STATUS_RF_KILL_HW |
  5307. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5308. STATUS_RF_KILL_SW |
  5309. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5310. STATUS_GEO_CONFIGURED |
  5311. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5312. STATUS_IN_SUSPEND;
  5313. goto exit;
  5314. }
  5315. /* ...otherwise clear out all the status bits but the RF Kill and
  5316. * SUSPEND bits and continue taking the NIC down. */
  5317. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5318. STATUS_RF_KILL_HW |
  5319. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5320. STATUS_RF_KILL_SW |
  5321. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5322. STATUS_GEO_CONFIGURED |
  5323. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5324. STATUS_IN_SUSPEND |
  5325. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5326. STATUS_FW_ERROR;
  5327. spin_lock_irqsave(&priv->lock, flags);
  5328. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5329. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5330. spin_unlock_irqrestore(&priv->lock, flags);
  5331. iwl4965_hw_txq_ctx_stop(priv);
  5332. iwl4965_hw_rxq_stop(priv);
  5333. spin_lock_irqsave(&priv->lock, flags);
  5334. if (!iwl4965_grab_nic_access(priv)) {
  5335. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5336. APMG_CLK_VAL_DMA_CLK_RQT);
  5337. iwl4965_release_nic_access(priv);
  5338. }
  5339. spin_unlock_irqrestore(&priv->lock, flags);
  5340. udelay(5);
  5341. iwl4965_hw_nic_stop_master(priv);
  5342. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5343. iwl4965_hw_nic_reset(priv);
  5344. exit:
  5345. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5346. if (priv->ibss_beacon)
  5347. dev_kfree_skb(priv->ibss_beacon);
  5348. priv->ibss_beacon = NULL;
  5349. /* clear out any free frames */
  5350. iwl4965_clear_free_frames(priv);
  5351. }
  5352. static void iwl4965_down(struct iwl4965_priv *priv)
  5353. {
  5354. mutex_lock(&priv->mutex);
  5355. __iwl4965_down(priv);
  5356. mutex_unlock(&priv->mutex);
  5357. iwl4965_cancel_deferred_work(priv);
  5358. }
  5359. #define MAX_HW_RESTARTS 5
  5360. static int __iwl4965_up(struct iwl4965_priv *priv)
  5361. {
  5362. int rc, i;
  5363. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5364. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5365. return -EIO;
  5366. }
  5367. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5368. IWL_WARNING("Radio disabled by SW RF kill (module "
  5369. "parameter)\n");
  5370. return -ENODEV;
  5371. }
  5372. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5373. IWL_ERROR("ucode not available for device bringup\n");
  5374. return -EIO;
  5375. }
  5376. /* If platform's RF_KILL switch is NOT set to KILL */
  5377. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5378. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5379. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5380. else {
  5381. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5382. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5383. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5384. return -ENODEV;
  5385. }
  5386. }
  5387. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5388. rc = iwl4965_hw_nic_init(priv);
  5389. if (rc) {
  5390. IWL_ERROR("Unable to int nic\n");
  5391. return rc;
  5392. }
  5393. /* make sure rfkill handshake bits are cleared */
  5394. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5395. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5396. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5397. /* clear (again), then enable host interrupts */
  5398. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5399. iwl4965_enable_interrupts(priv);
  5400. /* really make sure rfkill handshake bits are cleared */
  5401. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5402. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5403. /* Copy original ucode data image from disk into backup cache.
  5404. * This will be used to initialize the on-board processor's
  5405. * data SRAM for a clean start when the runtime program first loads. */
  5406. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5407. priv->ucode_data.len);
  5408. /* We return success when we resume from suspend and rf_kill is on. */
  5409. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5410. return 0;
  5411. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5412. iwl4965_clear_stations_table(priv);
  5413. /* load bootstrap state machine,
  5414. * load bootstrap program into processor's memory,
  5415. * prepare to load the "initialize" uCode */
  5416. rc = iwl4965_load_bsm(priv);
  5417. if (rc) {
  5418. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5419. continue;
  5420. }
  5421. /* start card; "initialize" will load runtime ucode */
  5422. iwl4965_nic_start(priv);
  5423. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5424. return 0;
  5425. }
  5426. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5427. __iwl4965_down(priv);
  5428. /* tried to restart and config the device for as long as our
  5429. * patience could withstand */
  5430. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5431. return -EIO;
  5432. }
  5433. /*****************************************************************************
  5434. *
  5435. * Workqueue callbacks
  5436. *
  5437. *****************************************************************************/
  5438. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5439. {
  5440. struct iwl4965_priv *priv =
  5441. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5442. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5443. return;
  5444. mutex_lock(&priv->mutex);
  5445. iwl4965_init_alive_start(priv);
  5446. mutex_unlock(&priv->mutex);
  5447. }
  5448. static void iwl4965_bg_alive_start(struct work_struct *data)
  5449. {
  5450. struct iwl4965_priv *priv =
  5451. container_of(data, struct iwl4965_priv, alive_start.work);
  5452. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5453. return;
  5454. mutex_lock(&priv->mutex);
  5455. iwl4965_alive_start(priv);
  5456. mutex_unlock(&priv->mutex);
  5457. }
  5458. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5459. {
  5460. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5461. wake_up_interruptible(&priv->wait_command_queue);
  5462. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5463. return;
  5464. mutex_lock(&priv->mutex);
  5465. if (!iwl4965_is_rfkill(priv)) {
  5466. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5467. "HW and/or SW RF Kill no longer active, restarting "
  5468. "device\n");
  5469. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5470. queue_work(priv->workqueue, &priv->restart);
  5471. } else {
  5472. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5473. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5474. "disabled by SW switch\n");
  5475. else
  5476. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5477. "Kill switch must be turned off for "
  5478. "wireless networking to work.\n");
  5479. }
  5480. mutex_unlock(&priv->mutex);
  5481. }
  5482. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5483. static void iwl4965_bg_scan_check(struct work_struct *data)
  5484. {
  5485. struct iwl4965_priv *priv =
  5486. container_of(data, struct iwl4965_priv, scan_check.work);
  5487. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5488. return;
  5489. mutex_lock(&priv->mutex);
  5490. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5491. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5492. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5493. "Scan completion watchdog resetting adapter (%dms)\n",
  5494. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5495. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5496. iwl4965_send_scan_abort(priv);
  5497. }
  5498. mutex_unlock(&priv->mutex);
  5499. }
  5500. static void iwl4965_bg_request_scan(struct work_struct *data)
  5501. {
  5502. struct iwl4965_priv *priv =
  5503. container_of(data, struct iwl4965_priv, request_scan);
  5504. struct iwl4965_host_cmd cmd = {
  5505. .id = REPLY_SCAN_CMD,
  5506. .len = sizeof(struct iwl4965_scan_cmd),
  5507. .meta.flags = CMD_SIZE_HUGE,
  5508. };
  5509. int rc = 0;
  5510. struct iwl4965_scan_cmd *scan;
  5511. struct ieee80211_conf *conf = NULL;
  5512. u16 cmd_len;
  5513. enum ieee80211_band band;
  5514. u8 direct_mask;
  5515. conf = ieee80211_get_hw_conf(priv->hw);
  5516. mutex_lock(&priv->mutex);
  5517. if (!iwl4965_is_ready(priv)) {
  5518. IWL_WARNING("request scan called when driver not ready.\n");
  5519. goto done;
  5520. }
  5521. /* Make sure the scan wasn't cancelled before this queued work
  5522. * was given the chance to run... */
  5523. if (!test_bit(STATUS_SCANNING, &priv->status))
  5524. goto done;
  5525. /* This should never be called or scheduled if there is currently
  5526. * a scan active in the hardware. */
  5527. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5528. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5529. "Ignoring second request.\n");
  5530. rc = -EIO;
  5531. goto done;
  5532. }
  5533. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5534. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5535. goto done;
  5536. }
  5537. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5538. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5539. goto done;
  5540. }
  5541. if (iwl4965_is_rfkill(priv)) {
  5542. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5543. goto done;
  5544. }
  5545. if (!test_bit(STATUS_READY, &priv->status)) {
  5546. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5547. goto done;
  5548. }
  5549. if (!priv->scan_bands) {
  5550. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5551. goto done;
  5552. }
  5553. if (!priv->scan) {
  5554. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5555. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5556. if (!priv->scan) {
  5557. rc = -ENOMEM;
  5558. goto done;
  5559. }
  5560. }
  5561. scan = priv->scan;
  5562. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5563. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5564. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5565. if (iwl4965_is_associated(priv)) {
  5566. u16 interval = 0;
  5567. u32 extra;
  5568. u32 suspend_time = 100;
  5569. u32 scan_suspend_time = 100;
  5570. unsigned long flags;
  5571. IWL_DEBUG_INFO("Scanning while associated...\n");
  5572. spin_lock_irqsave(&priv->lock, flags);
  5573. interval = priv->beacon_int;
  5574. spin_unlock_irqrestore(&priv->lock, flags);
  5575. scan->suspend_time = 0;
  5576. scan->max_out_time = cpu_to_le32(200 * 1024);
  5577. if (!interval)
  5578. interval = suspend_time;
  5579. extra = (suspend_time / interval) << 22;
  5580. scan_suspend_time = (extra |
  5581. ((suspend_time % interval) * 1024));
  5582. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5583. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5584. scan_suspend_time, interval);
  5585. }
  5586. /* We should add the ability for user to lock to PASSIVE ONLY */
  5587. if (priv->one_direct_scan) {
  5588. IWL_DEBUG_SCAN
  5589. ("Kicking off one direct scan for '%s'\n",
  5590. iwl4965_escape_essid(priv->direct_ssid,
  5591. priv->direct_ssid_len));
  5592. scan->direct_scan[0].id = WLAN_EID_SSID;
  5593. scan->direct_scan[0].len = priv->direct_ssid_len;
  5594. memcpy(scan->direct_scan[0].ssid,
  5595. priv->direct_ssid, priv->direct_ssid_len);
  5596. direct_mask = 1;
  5597. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5598. scan->direct_scan[0].id = WLAN_EID_SSID;
  5599. scan->direct_scan[0].len = priv->essid_len;
  5600. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5601. direct_mask = 1;
  5602. } else
  5603. direct_mask = 0;
  5604. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5605. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5606. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5607. switch (priv->scan_bands) {
  5608. case 2:
  5609. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5610. scan->tx_cmd.rate_n_flags =
  5611. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5612. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5613. scan->good_CRC_th = 0;
  5614. band = IEEE80211_BAND_2GHZ;
  5615. break;
  5616. case 1:
  5617. scan->tx_cmd.rate_n_flags =
  5618. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5619. RATE_MCS_ANT_B_MSK);
  5620. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5621. band = IEEE80211_BAND_5GHZ;
  5622. break;
  5623. default:
  5624. IWL_WARNING("Invalid scan band count\n");
  5625. goto done;
  5626. }
  5627. /* We don't build a direct scan probe request; the uCode will do
  5628. * that based on the direct_mask added to each channel entry */
  5629. cmd_len = iwl4965_fill_probe_req(priv, band,
  5630. (struct ieee80211_mgmt *)scan->data,
  5631. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5632. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5633. /* select Rx chains */
  5634. /* Force use of chains B and C (0x6) for scan Rx.
  5635. * Avoid A (0x1) because of its off-channel reception on A-band.
  5636. * MIMO is not used here, but value is required to make uCode happy. */
  5637. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5638. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5639. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5640. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5641. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5642. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5643. if (direct_mask) {
  5644. IWL_DEBUG_SCAN
  5645. ("Initiating direct scan for %s.\n",
  5646. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5647. scan->channel_count =
  5648. iwl4965_get_channels_for_scan(
  5649. priv, band, 1, /* active */
  5650. direct_mask,
  5651. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5652. } else {
  5653. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5654. scan->channel_count =
  5655. iwl4965_get_channels_for_scan(
  5656. priv, band, 0, /* passive */
  5657. direct_mask,
  5658. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5659. }
  5660. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5661. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5662. cmd.data = scan;
  5663. scan->len = cpu_to_le16(cmd.len);
  5664. set_bit(STATUS_SCAN_HW, &priv->status);
  5665. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5666. if (rc)
  5667. goto done;
  5668. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5669. IWL_SCAN_CHECK_WATCHDOG);
  5670. mutex_unlock(&priv->mutex);
  5671. return;
  5672. done:
  5673. /* inform mac80211 scan aborted */
  5674. queue_work(priv->workqueue, &priv->scan_completed);
  5675. mutex_unlock(&priv->mutex);
  5676. }
  5677. static void iwl4965_bg_up(struct work_struct *data)
  5678. {
  5679. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5680. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5681. return;
  5682. mutex_lock(&priv->mutex);
  5683. __iwl4965_up(priv);
  5684. mutex_unlock(&priv->mutex);
  5685. }
  5686. static void iwl4965_bg_restart(struct work_struct *data)
  5687. {
  5688. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5689. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5690. return;
  5691. iwl4965_down(priv);
  5692. queue_work(priv->workqueue, &priv->up);
  5693. }
  5694. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5695. {
  5696. struct iwl4965_priv *priv =
  5697. container_of(data, struct iwl4965_priv, rx_replenish);
  5698. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5699. return;
  5700. mutex_lock(&priv->mutex);
  5701. iwl4965_rx_replenish(priv);
  5702. mutex_unlock(&priv->mutex);
  5703. }
  5704. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5705. static void iwl4965_bg_post_associate(struct work_struct *data)
  5706. {
  5707. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5708. post_associate.work);
  5709. int rc = 0;
  5710. struct ieee80211_conf *conf = NULL;
  5711. DECLARE_MAC_BUF(mac);
  5712. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5713. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5714. return;
  5715. }
  5716. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5717. priv->assoc_id,
  5718. print_mac(mac, priv->active_rxon.bssid_addr));
  5719. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5720. return;
  5721. mutex_lock(&priv->mutex);
  5722. if (!priv->vif || !priv->is_open) {
  5723. mutex_unlock(&priv->mutex);
  5724. return;
  5725. }
  5726. iwl4965_scan_cancel_timeout(priv, 200);
  5727. conf = ieee80211_get_hw_conf(priv->hw);
  5728. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5729. iwl4965_commit_rxon(priv);
  5730. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5731. iwl4965_setup_rxon_timing(priv);
  5732. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5733. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5734. if (rc)
  5735. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5736. "Attempting to continue.\n");
  5737. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5738. #ifdef CONFIG_IWL4965_HT
  5739. if (priv->current_ht_config.is_ht)
  5740. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5741. #endif /* CONFIG_IWL4965_HT*/
  5742. iwl4965_set_rxon_chain(priv);
  5743. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5744. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5745. priv->assoc_id, priv->beacon_int);
  5746. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5747. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5748. else
  5749. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5750. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5751. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5752. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5753. else
  5754. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5755. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5756. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5757. }
  5758. iwl4965_commit_rxon(priv);
  5759. switch (priv->iw_mode) {
  5760. case IEEE80211_IF_TYPE_STA:
  5761. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5762. break;
  5763. case IEEE80211_IF_TYPE_IBSS:
  5764. /* clear out the station table */
  5765. iwl4965_clear_stations_table(priv);
  5766. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5767. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5768. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5769. iwl4965_send_beacon_cmd(priv);
  5770. break;
  5771. default:
  5772. IWL_ERROR("%s Should not be called in %d mode\n",
  5773. __FUNCTION__, priv->iw_mode);
  5774. break;
  5775. }
  5776. iwl4965_sequence_reset(priv);
  5777. #ifdef CONFIG_IWL4965_SENSITIVITY
  5778. /* Enable Rx differential gain and sensitivity calibrations */
  5779. iwl4965_chain_noise_reset(priv);
  5780. priv->start_calib = 1;
  5781. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5782. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5783. priv->assoc_station_added = 1;
  5784. iwl4965_activate_qos(priv, 0);
  5785. /* we have just associated, don't start scan too early */
  5786. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5787. mutex_unlock(&priv->mutex);
  5788. }
  5789. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5790. {
  5791. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5792. if (!iwl4965_is_ready(priv))
  5793. return;
  5794. mutex_lock(&priv->mutex);
  5795. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5796. iwl4965_send_scan_abort(priv);
  5797. mutex_unlock(&priv->mutex);
  5798. }
  5799. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5800. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5801. {
  5802. struct iwl4965_priv *priv =
  5803. container_of(work, struct iwl4965_priv, scan_completed);
  5804. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5805. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5806. return;
  5807. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5808. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5809. ieee80211_scan_completed(priv->hw);
  5810. /* Since setting the TXPOWER may have been deferred while
  5811. * performing the scan, fire one off */
  5812. mutex_lock(&priv->mutex);
  5813. iwl4965_hw_reg_send_txpower(priv);
  5814. mutex_unlock(&priv->mutex);
  5815. }
  5816. /*****************************************************************************
  5817. *
  5818. * mac80211 entry point functions
  5819. *
  5820. *****************************************************************************/
  5821. #define UCODE_READY_TIMEOUT (2 * HZ)
  5822. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5823. {
  5824. struct iwl4965_priv *priv = hw->priv;
  5825. int ret;
  5826. IWL_DEBUG_MAC80211("enter\n");
  5827. if (pci_enable_device(priv->pci_dev)) {
  5828. IWL_ERROR("Fail to pci_enable_device\n");
  5829. return -ENODEV;
  5830. }
  5831. pci_restore_state(priv->pci_dev);
  5832. pci_enable_msi(priv->pci_dev);
  5833. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5834. DRV_NAME, priv);
  5835. if (ret) {
  5836. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5837. goto out_disable_msi;
  5838. }
  5839. /* we should be verifying the device is ready to be opened */
  5840. mutex_lock(&priv->mutex);
  5841. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5842. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5843. * ucode filename and max sizes are card-specific. */
  5844. if (!priv->ucode_code.len) {
  5845. ret = iwl4965_read_ucode(priv);
  5846. if (ret) {
  5847. IWL_ERROR("Could not read microcode: %d\n", ret);
  5848. mutex_unlock(&priv->mutex);
  5849. goto out_release_irq;
  5850. }
  5851. }
  5852. ret = __iwl4965_up(priv);
  5853. mutex_unlock(&priv->mutex);
  5854. if (ret)
  5855. goto out_release_irq;
  5856. IWL_DEBUG_INFO("Start UP work done.\n");
  5857. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5858. return 0;
  5859. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5860. * mac80211 will not be run successfully. */
  5861. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5862. test_bit(STATUS_READY, &priv->status),
  5863. UCODE_READY_TIMEOUT);
  5864. if (!ret) {
  5865. if (!test_bit(STATUS_READY, &priv->status)) {
  5866. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5867. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5868. ret = -ETIMEDOUT;
  5869. goto out_release_irq;
  5870. }
  5871. }
  5872. priv->is_open = 1;
  5873. IWL_DEBUG_MAC80211("leave\n");
  5874. return 0;
  5875. out_release_irq:
  5876. free_irq(priv->pci_dev->irq, priv);
  5877. out_disable_msi:
  5878. pci_disable_msi(priv->pci_dev);
  5879. pci_disable_device(priv->pci_dev);
  5880. priv->is_open = 0;
  5881. IWL_DEBUG_MAC80211("leave - failed\n");
  5882. return ret;
  5883. }
  5884. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5885. {
  5886. struct iwl4965_priv *priv = hw->priv;
  5887. IWL_DEBUG_MAC80211("enter\n");
  5888. if (!priv->is_open) {
  5889. IWL_DEBUG_MAC80211("leave - skip\n");
  5890. return;
  5891. }
  5892. priv->is_open = 0;
  5893. if (iwl4965_is_ready_rf(priv)) {
  5894. /* stop mac, cancel any scan request and clear
  5895. * RXON_FILTER_ASSOC_MSK BIT
  5896. */
  5897. mutex_lock(&priv->mutex);
  5898. iwl4965_scan_cancel_timeout(priv, 100);
  5899. cancel_delayed_work(&priv->post_associate);
  5900. mutex_unlock(&priv->mutex);
  5901. }
  5902. iwl4965_down(priv);
  5903. flush_workqueue(priv->workqueue);
  5904. free_irq(priv->pci_dev->irq, priv);
  5905. pci_disable_msi(priv->pci_dev);
  5906. pci_save_state(priv->pci_dev);
  5907. pci_disable_device(priv->pci_dev);
  5908. IWL_DEBUG_MAC80211("leave\n");
  5909. }
  5910. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5911. struct ieee80211_tx_control *ctl)
  5912. {
  5913. struct iwl4965_priv *priv = hw->priv;
  5914. IWL_DEBUG_MAC80211("enter\n");
  5915. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5916. IWL_DEBUG_MAC80211("leave - monitor\n");
  5917. return -1;
  5918. }
  5919. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5920. ctl->tx_rate->bitrate);
  5921. if (iwl4965_tx_skb(priv, skb, ctl))
  5922. dev_kfree_skb_any(skb);
  5923. IWL_DEBUG_MAC80211("leave\n");
  5924. return 0;
  5925. }
  5926. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5927. struct ieee80211_if_init_conf *conf)
  5928. {
  5929. struct iwl4965_priv *priv = hw->priv;
  5930. unsigned long flags;
  5931. DECLARE_MAC_BUF(mac);
  5932. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5933. if (priv->vif) {
  5934. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5935. return -EOPNOTSUPP;
  5936. }
  5937. spin_lock_irqsave(&priv->lock, flags);
  5938. priv->vif = conf->vif;
  5939. spin_unlock_irqrestore(&priv->lock, flags);
  5940. mutex_lock(&priv->mutex);
  5941. if (conf->mac_addr) {
  5942. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5943. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5944. }
  5945. if (iwl4965_is_ready(priv))
  5946. iwl4965_set_mode(priv, conf->type);
  5947. mutex_unlock(&priv->mutex);
  5948. IWL_DEBUG_MAC80211("leave\n");
  5949. return 0;
  5950. }
  5951. /**
  5952. * iwl4965_mac_config - mac80211 config callback
  5953. *
  5954. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5955. * be set inappropriately and the driver currently sets the hardware up to
  5956. * use it whenever needed.
  5957. */
  5958. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5959. {
  5960. struct iwl4965_priv *priv = hw->priv;
  5961. const struct iwl4965_channel_info *ch_info;
  5962. unsigned long flags;
  5963. int ret = 0;
  5964. mutex_lock(&priv->mutex);
  5965. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5966. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5967. if (!iwl4965_is_ready(priv)) {
  5968. IWL_DEBUG_MAC80211("leave - not ready\n");
  5969. ret = -EIO;
  5970. goto out;
  5971. }
  5972. if (unlikely(!iwl4965_param_disable_hw_scan &&
  5973. test_bit(STATUS_SCANNING, &priv->status))) {
  5974. IWL_DEBUG_MAC80211("leave - scanning\n");
  5975. set_bit(STATUS_CONF_PENDING, &priv->status);
  5976. mutex_unlock(&priv->mutex);
  5977. return 0;
  5978. }
  5979. spin_lock_irqsave(&priv->lock, flags);
  5980. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  5981. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5982. if (!is_channel_valid(ch_info)) {
  5983. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5984. spin_unlock_irqrestore(&priv->lock, flags);
  5985. ret = -EINVAL;
  5986. goto out;
  5987. }
  5988. #ifdef CONFIG_IWL4965_HT
  5989. /* if we are switching from ht to 2.4 clear flags
  5990. * from any ht related info since 2.4 does not
  5991. * support ht */
  5992. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5993. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5994. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5995. #endif
  5996. )
  5997. priv->staging_rxon.flags = 0;
  5998. #endif /* CONFIG_IWL4965_HT */
  5999. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6000. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6001. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6002. /* The list of supported rates and rate mask can be different
  6003. * for each band; since the band may have changed, reset
  6004. * the rate mask to what mac80211 lists */
  6005. iwl4965_set_rate(priv);
  6006. spin_unlock_irqrestore(&priv->lock, flags);
  6007. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6008. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6009. iwl4965_hw_channel_switch(priv, conf->channel);
  6010. goto out;
  6011. }
  6012. #endif
  6013. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6014. if (!conf->radio_enabled) {
  6015. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6016. goto out;
  6017. }
  6018. if (iwl4965_is_rfkill(priv)) {
  6019. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6020. ret = -EIO;
  6021. goto out;
  6022. }
  6023. iwl4965_set_rate(priv);
  6024. if (memcmp(&priv->active_rxon,
  6025. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6026. iwl4965_commit_rxon(priv);
  6027. else
  6028. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6029. IWL_DEBUG_MAC80211("leave\n");
  6030. out:
  6031. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6032. mutex_unlock(&priv->mutex);
  6033. return ret;
  6034. }
  6035. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6036. {
  6037. int rc = 0;
  6038. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6039. return;
  6040. /* The following should be done only at AP bring up */
  6041. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6042. /* RXON - unassoc (to set timing command) */
  6043. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6044. iwl4965_commit_rxon(priv);
  6045. /* RXON Timing */
  6046. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6047. iwl4965_setup_rxon_timing(priv);
  6048. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6049. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6050. if (rc)
  6051. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6052. "Attempting to continue.\n");
  6053. iwl4965_set_rxon_chain(priv);
  6054. /* FIXME: what should be the assoc_id for AP? */
  6055. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6056. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6057. priv->staging_rxon.flags |=
  6058. RXON_FLG_SHORT_PREAMBLE_MSK;
  6059. else
  6060. priv->staging_rxon.flags &=
  6061. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6062. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6063. if (priv->assoc_capability &
  6064. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6065. priv->staging_rxon.flags |=
  6066. RXON_FLG_SHORT_SLOT_MSK;
  6067. else
  6068. priv->staging_rxon.flags &=
  6069. ~RXON_FLG_SHORT_SLOT_MSK;
  6070. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6071. priv->staging_rxon.flags &=
  6072. ~RXON_FLG_SHORT_SLOT_MSK;
  6073. }
  6074. /* restore RXON assoc */
  6075. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6076. iwl4965_commit_rxon(priv);
  6077. iwl4965_activate_qos(priv, 1);
  6078. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6079. }
  6080. iwl4965_send_beacon_cmd(priv);
  6081. /* FIXME - we need to add code here to detect a totally new
  6082. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6083. * clear sta table, add BCAST sta... */
  6084. }
  6085. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6086. struct ieee80211_vif *vif,
  6087. struct ieee80211_if_conf *conf)
  6088. {
  6089. struct iwl4965_priv *priv = hw->priv;
  6090. DECLARE_MAC_BUF(mac);
  6091. unsigned long flags;
  6092. int rc;
  6093. if (conf == NULL)
  6094. return -EIO;
  6095. if (priv->vif != vif) {
  6096. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6097. mutex_unlock(&priv->mutex);
  6098. return 0;
  6099. }
  6100. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6101. (!conf->beacon || !conf->ssid_len)) {
  6102. IWL_DEBUG_MAC80211
  6103. ("Leaving in AP mode because HostAPD is not ready.\n");
  6104. return 0;
  6105. }
  6106. if (!iwl4965_is_alive(priv))
  6107. return -EAGAIN;
  6108. mutex_lock(&priv->mutex);
  6109. if (conf->bssid)
  6110. IWL_DEBUG_MAC80211("bssid: %s\n",
  6111. print_mac(mac, conf->bssid));
  6112. /*
  6113. * very dubious code was here; the probe filtering flag is never set:
  6114. *
  6115. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6116. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6117. */
  6118. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6119. if (!conf->bssid) {
  6120. conf->bssid = priv->mac_addr;
  6121. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6122. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6123. print_mac(mac, conf->bssid));
  6124. }
  6125. if (priv->ibss_beacon)
  6126. dev_kfree_skb(priv->ibss_beacon);
  6127. priv->ibss_beacon = conf->beacon;
  6128. }
  6129. if (iwl4965_is_rfkill(priv))
  6130. goto done;
  6131. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6132. !is_multicast_ether_addr(conf->bssid)) {
  6133. /* If there is currently a HW scan going on in the background
  6134. * then we need to cancel it else the RXON below will fail. */
  6135. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6136. IWL_WARNING("Aborted scan still in progress "
  6137. "after 100ms\n");
  6138. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6139. mutex_unlock(&priv->mutex);
  6140. return -EAGAIN;
  6141. }
  6142. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6143. /* TODO: Audit driver for usage of these members and see
  6144. * if mac80211 deprecates them (priv->bssid looks like it
  6145. * shouldn't be there, but I haven't scanned the IBSS code
  6146. * to verify) - jpk */
  6147. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6148. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6149. iwl4965_config_ap(priv);
  6150. else {
  6151. rc = iwl4965_commit_rxon(priv);
  6152. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6153. iwl4965_rxon_add_station(
  6154. priv, priv->active_rxon.bssid_addr, 1);
  6155. }
  6156. } else {
  6157. iwl4965_scan_cancel_timeout(priv, 100);
  6158. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6159. iwl4965_commit_rxon(priv);
  6160. }
  6161. done:
  6162. spin_lock_irqsave(&priv->lock, flags);
  6163. if (!conf->ssid_len)
  6164. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6165. else
  6166. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6167. priv->essid_len = conf->ssid_len;
  6168. spin_unlock_irqrestore(&priv->lock, flags);
  6169. IWL_DEBUG_MAC80211("leave\n");
  6170. mutex_unlock(&priv->mutex);
  6171. return 0;
  6172. }
  6173. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6174. unsigned int changed_flags,
  6175. unsigned int *total_flags,
  6176. int mc_count, struct dev_addr_list *mc_list)
  6177. {
  6178. /*
  6179. * XXX: dummy
  6180. * see also iwl4965_connection_init_rx_config
  6181. */
  6182. *total_flags = 0;
  6183. }
  6184. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6185. struct ieee80211_if_init_conf *conf)
  6186. {
  6187. struct iwl4965_priv *priv = hw->priv;
  6188. IWL_DEBUG_MAC80211("enter\n");
  6189. mutex_lock(&priv->mutex);
  6190. if (iwl4965_is_ready_rf(priv)) {
  6191. iwl4965_scan_cancel_timeout(priv, 100);
  6192. cancel_delayed_work(&priv->post_associate);
  6193. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6194. iwl4965_commit_rxon(priv);
  6195. }
  6196. if (priv->vif == conf->vif) {
  6197. priv->vif = NULL;
  6198. memset(priv->bssid, 0, ETH_ALEN);
  6199. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6200. priv->essid_len = 0;
  6201. }
  6202. mutex_unlock(&priv->mutex);
  6203. IWL_DEBUG_MAC80211("leave\n");
  6204. }
  6205. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6206. struct ieee80211_vif *vif,
  6207. struct ieee80211_bss_conf *bss_conf,
  6208. u32 changes)
  6209. {
  6210. struct iwl4965_priv *priv = hw->priv;
  6211. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6212. if (bss_conf->use_short_preamble)
  6213. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6214. else
  6215. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6216. }
  6217. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6218. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6219. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6220. else
  6221. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6222. }
  6223. if (changes & BSS_CHANGED_ASSOC) {
  6224. /*
  6225. * TODO:
  6226. * do stuff instead of sniffing assoc resp
  6227. */
  6228. }
  6229. if (iwl4965_is_associated(priv))
  6230. iwl4965_send_rxon_assoc(priv);
  6231. }
  6232. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6233. {
  6234. int rc = 0;
  6235. unsigned long flags;
  6236. struct iwl4965_priv *priv = hw->priv;
  6237. IWL_DEBUG_MAC80211("enter\n");
  6238. mutex_lock(&priv->mutex);
  6239. spin_lock_irqsave(&priv->lock, flags);
  6240. if (!iwl4965_is_ready_rf(priv)) {
  6241. rc = -EIO;
  6242. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6243. goto out_unlock;
  6244. }
  6245. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6246. rc = -EIO;
  6247. IWL_ERROR("ERROR: APs don't scan\n");
  6248. goto out_unlock;
  6249. }
  6250. /* we don't schedule scan within next_scan_jiffies period */
  6251. if (priv->next_scan_jiffies &&
  6252. time_after(priv->next_scan_jiffies, jiffies)) {
  6253. rc = -EAGAIN;
  6254. goto out_unlock;
  6255. }
  6256. /* if we just finished scan ask for delay */
  6257. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6258. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6259. rc = -EAGAIN;
  6260. goto out_unlock;
  6261. }
  6262. if (len) {
  6263. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6264. iwl4965_escape_essid(ssid, len), (int)len);
  6265. priv->one_direct_scan = 1;
  6266. priv->direct_ssid_len = (u8)
  6267. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6268. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6269. } else
  6270. priv->one_direct_scan = 0;
  6271. rc = iwl4965_scan_initiate(priv);
  6272. IWL_DEBUG_MAC80211("leave\n");
  6273. out_unlock:
  6274. spin_unlock_irqrestore(&priv->lock, flags);
  6275. mutex_unlock(&priv->mutex);
  6276. return rc;
  6277. }
  6278. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6279. const u8 *local_addr, const u8 *addr,
  6280. struct ieee80211_key_conf *key)
  6281. {
  6282. struct iwl4965_priv *priv = hw->priv;
  6283. DECLARE_MAC_BUF(mac);
  6284. int rc = 0;
  6285. u8 sta_id;
  6286. IWL_DEBUG_MAC80211("enter\n");
  6287. if (!iwl4965_param_hwcrypto) {
  6288. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6289. return -EOPNOTSUPP;
  6290. }
  6291. if (is_zero_ether_addr(addr))
  6292. /* only support pairwise keys */
  6293. return -EOPNOTSUPP;
  6294. sta_id = iwl4965_hw_find_station(priv, addr);
  6295. if (sta_id == IWL_INVALID_STATION) {
  6296. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6297. print_mac(mac, addr));
  6298. return -EINVAL;
  6299. }
  6300. mutex_lock(&priv->mutex);
  6301. iwl4965_scan_cancel_timeout(priv, 100);
  6302. switch (cmd) {
  6303. case SET_KEY:
  6304. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6305. if (!rc) {
  6306. iwl4965_set_rxon_hwcrypto(priv, 1);
  6307. iwl4965_commit_rxon(priv);
  6308. key->hw_key_idx = sta_id;
  6309. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6310. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6311. }
  6312. break;
  6313. case DISABLE_KEY:
  6314. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6315. if (!rc) {
  6316. iwl4965_set_rxon_hwcrypto(priv, 0);
  6317. iwl4965_commit_rxon(priv);
  6318. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6319. }
  6320. break;
  6321. default:
  6322. rc = -EINVAL;
  6323. }
  6324. IWL_DEBUG_MAC80211("leave\n");
  6325. mutex_unlock(&priv->mutex);
  6326. return rc;
  6327. }
  6328. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6329. const struct ieee80211_tx_queue_params *params)
  6330. {
  6331. struct iwl4965_priv *priv = hw->priv;
  6332. unsigned long flags;
  6333. int q;
  6334. IWL_DEBUG_MAC80211("enter\n");
  6335. if (!iwl4965_is_ready_rf(priv)) {
  6336. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6337. return -EIO;
  6338. }
  6339. if (queue >= AC_NUM) {
  6340. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6341. return 0;
  6342. }
  6343. if (!priv->qos_data.qos_enable) {
  6344. priv->qos_data.qos_active = 0;
  6345. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6346. return 0;
  6347. }
  6348. q = AC_NUM - 1 - queue;
  6349. spin_lock_irqsave(&priv->lock, flags);
  6350. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6351. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6352. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6353. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6354. cpu_to_le16((params->txop * 32));
  6355. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6356. priv->qos_data.qos_active = 1;
  6357. spin_unlock_irqrestore(&priv->lock, flags);
  6358. mutex_lock(&priv->mutex);
  6359. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6360. iwl4965_activate_qos(priv, 1);
  6361. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6362. iwl4965_activate_qos(priv, 0);
  6363. mutex_unlock(&priv->mutex);
  6364. IWL_DEBUG_MAC80211("leave\n");
  6365. return 0;
  6366. }
  6367. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6368. struct ieee80211_tx_queue_stats *stats)
  6369. {
  6370. struct iwl4965_priv *priv = hw->priv;
  6371. int i, avail;
  6372. struct iwl4965_tx_queue *txq;
  6373. struct iwl4965_queue *q;
  6374. unsigned long flags;
  6375. IWL_DEBUG_MAC80211("enter\n");
  6376. if (!iwl4965_is_ready_rf(priv)) {
  6377. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6378. return -EIO;
  6379. }
  6380. spin_lock_irqsave(&priv->lock, flags);
  6381. for (i = 0; i < AC_NUM; i++) {
  6382. txq = &priv->txq[i];
  6383. q = &txq->q;
  6384. avail = iwl4965_queue_space(q);
  6385. stats->data[i].len = q->n_window - avail;
  6386. stats->data[i].limit = q->n_window - q->high_mark;
  6387. stats->data[i].count = q->n_window;
  6388. }
  6389. spin_unlock_irqrestore(&priv->lock, flags);
  6390. IWL_DEBUG_MAC80211("leave\n");
  6391. return 0;
  6392. }
  6393. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6394. struct ieee80211_low_level_stats *stats)
  6395. {
  6396. IWL_DEBUG_MAC80211("enter\n");
  6397. IWL_DEBUG_MAC80211("leave\n");
  6398. return 0;
  6399. }
  6400. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6401. {
  6402. IWL_DEBUG_MAC80211("enter\n");
  6403. IWL_DEBUG_MAC80211("leave\n");
  6404. return 0;
  6405. }
  6406. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6407. {
  6408. struct iwl4965_priv *priv = hw->priv;
  6409. unsigned long flags;
  6410. mutex_lock(&priv->mutex);
  6411. IWL_DEBUG_MAC80211("enter\n");
  6412. priv->lq_mngr.lq_ready = 0;
  6413. #ifdef CONFIG_IWL4965_HT
  6414. spin_lock_irqsave(&priv->lock, flags);
  6415. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6416. spin_unlock_irqrestore(&priv->lock, flags);
  6417. #endif /* CONFIG_IWL4965_HT */
  6418. iwl4965_reset_qos(priv);
  6419. cancel_delayed_work(&priv->post_associate);
  6420. spin_lock_irqsave(&priv->lock, flags);
  6421. priv->assoc_id = 0;
  6422. priv->assoc_capability = 0;
  6423. priv->call_post_assoc_from_beacon = 0;
  6424. priv->assoc_station_added = 0;
  6425. /* new association get rid of ibss beacon skb */
  6426. if (priv->ibss_beacon)
  6427. dev_kfree_skb(priv->ibss_beacon);
  6428. priv->ibss_beacon = NULL;
  6429. priv->beacon_int = priv->hw->conf.beacon_int;
  6430. priv->timestamp1 = 0;
  6431. priv->timestamp0 = 0;
  6432. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6433. priv->beacon_int = 0;
  6434. spin_unlock_irqrestore(&priv->lock, flags);
  6435. if (!iwl4965_is_ready_rf(priv)) {
  6436. IWL_DEBUG_MAC80211("leave - not ready\n");
  6437. mutex_unlock(&priv->mutex);
  6438. return;
  6439. }
  6440. /* we are restarting association process
  6441. * clear RXON_FILTER_ASSOC_MSK bit
  6442. */
  6443. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6444. iwl4965_scan_cancel_timeout(priv, 100);
  6445. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6446. iwl4965_commit_rxon(priv);
  6447. }
  6448. /* Per mac80211.h: This is only used in IBSS mode... */
  6449. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6450. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6451. mutex_unlock(&priv->mutex);
  6452. return;
  6453. }
  6454. priv->only_active_channel = 0;
  6455. iwl4965_set_rate(priv);
  6456. mutex_unlock(&priv->mutex);
  6457. IWL_DEBUG_MAC80211("leave\n");
  6458. }
  6459. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6460. struct ieee80211_tx_control *control)
  6461. {
  6462. struct iwl4965_priv *priv = hw->priv;
  6463. unsigned long flags;
  6464. mutex_lock(&priv->mutex);
  6465. IWL_DEBUG_MAC80211("enter\n");
  6466. if (!iwl4965_is_ready_rf(priv)) {
  6467. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6468. mutex_unlock(&priv->mutex);
  6469. return -EIO;
  6470. }
  6471. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6472. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6473. mutex_unlock(&priv->mutex);
  6474. return -EIO;
  6475. }
  6476. spin_lock_irqsave(&priv->lock, flags);
  6477. if (priv->ibss_beacon)
  6478. dev_kfree_skb(priv->ibss_beacon);
  6479. priv->ibss_beacon = skb;
  6480. priv->assoc_id = 0;
  6481. IWL_DEBUG_MAC80211("leave\n");
  6482. spin_unlock_irqrestore(&priv->lock, flags);
  6483. iwl4965_reset_qos(priv);
  6484. queue_work(priv->workqueue, &priv->post_associate.work);
  6485. mutex_unlock(&priv->mutex);
  6486. return 0;
  6487. }
  6488. #ifdef CONFIG_IWL4965_HT
  6489. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6490. struct iwl4965_priv *priv)
  6491. {
  6492. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6493. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6494. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6495. IWL_DEBUG_MAC80211("enter: \n");
  6496. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6497. iwl_conf->is_ht = 0;
  6498. return;
  6499. }
  6500. iwl_conf->is_ht = 1;
  6501. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6502. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6503. iwl_conf->sgf |= 0x1;
  6504. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6505. iwl_conf->sgf |= 0x2;
  6506. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6507. iwl_conf->max_amsdu_size =
  6508. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6509. iwl_conf->supported_chan_width =
  6510. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6511. iwl_conf->extension_chan_offset =
  6512. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6513. /* If no above or below channel supplied disable FAT channel */
  6514. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6515. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6516. iwl_conf->supported_chan_width = 0;
  6517. iwl_conf->tx_mimo_ps_mode =
  6518. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6519. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6520. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6521. iwl_conf->tx_chan_width =
  6522. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6523. iwl_conf->ht_protection =
  6524. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6525. iwl_conf->non_GF_STA_present =
  6526. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6527. IWL_DEBUG_MAC80211("control channel %d\n",
  6528. iwl_conf->control_channel);
  6529. IWL_DEBUG_MAC80211("leave\n");
  6530. }
  6531. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6532. struct ieee80211_conf *conf)
  6533. {
  6534. struct iwl4965_priv *priv = hw->priv;
  6535. IWL_DEBUG_MAC80211("enter: \n");
  6536. iwl4965_ht_info_fill(conf, priv);
  6537. iwl4965_set_rxon_chain(priv);
  6538. if (priv && priv->assoc_id &&
  6539. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6540. unsigned long flags;
  6541. spin_lock_irqsave(&priv->lock, flags);
  6542. if (priv->beacon_int)
  6543. queue_work(priv->workqueue, &priv->post_associate.work);
  6544. else
  6545. priv->call_post_assoc_from_beacon = 1;
  6546. spin_unlock_irqrestore(&priv->lock, flags);
  6547. }
  6548. IWL_DEBUG_MAC80211("leave:\n");
  6549. return 0;
  6550. }
  6551. #endif /*CONFIG_IWL4965_HT*/
  6552. /*****************************************************************************
  6553. *
  6554. * sysfs attributes
  6555. *
  6556. *****************************************************************************/
  6557. #ifdef CONFIG_IWL4965_DEBUG
  6558. /*
  6559. * The following adds a new attribute to the sysfs representation
  6560. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6561. * used for controlling the debug level.
  6562. *
  6563. * See the level definitions in iwl for details.
  6564. */
  6565. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6566. {
  6567. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6568. }
  6569. static ssize_t store_debug_level(struct device_driver *d,
  6570. const char *buf, size_t count)
  6571. {
  6572. char *p = (char *)buf;
  6573. u32 val;
  6574. val = simple_strtoul(p, &p, 0);
  6575. if (p == buf)
  6576. printk(KERN_INFO DRV_NAME
  6577. ": %s is not in hex or decimal form.\n", buf);
  6578. else
  6579. iwl4965_debug_level = val;
  6580. return strnlen(buf, count);
  6581. }
  6582. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6583. show_debug_level, store_debug_level);
  6584. #endif /* CONFIG_IWL4965_DEBUG */
  6585. static ssize_t show_rf_kill(struct device *d,
  6586. struct device_attribute *attr, char *buf)
  6587. {
  6588. /*
  6589. * 0 - RF kill not enabled
  6590. * 1 - SW based RF kill active (sysfs)
  6591. * 2 - HW based RF kill active
  6592. * 3 - Both HW and SW based RF kill active
  6593. */
  6594. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6595. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6596. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6597. return sprintf(buf, "%i\n", val);
  6598. }
  6599. static ssize_t store_rf_kill(struct device *d,
  6600. struct device_attribute *attr,
  6601. const char *buf, size_t count)
  6602. {
  6603. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6604. mutex_lock(&priv->mutex);
  6605. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6606. mutex_unlock(&priv->mutex);
  6607. return count;
  6608. }
  6609. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6610. static ssize_t show_temperature(struct device *d,
  6611. struct device_attribute *attr, char *buf)
  6612. {
  6613. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6614. if (!iwl4965_is_alive(priv))
  6615. return -EAGAIN;
  6616. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6617. }
  6618. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6619. static ssize_t show_rs_window(struct device *d,
  6620. struct device_attribute *attr,
  6621. char *buf)
  6622. {
  6623. struct iwl4965_priv *priv = d->driver_data;
  6624. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6625. }
  6626. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6627. static ssize_t show_tx_power(struct device *d,
  6628. struct device_attribute *attr, char *buf)
  6629. {
  6630. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6631. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6632. }
  6633. static ssize_t store_tx_power(struct device *d,
  6634. struct device_attribute *attr,
  6635. const char *buf, size_t count)
  6636. {
  6637. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6638. char *p = (char *)buf;
  6639. u32 val;
  6640. val = simple_strtoul(p, &p, 10);
  6641. if (p == buf)
  6642. printk(KERN_INFO DRV_NAME
  6643. ": %s is not in decimal form.\n", buf);
  6644. else
  6645. iwl4965_hw_reg_set_txpower(priv, val);
  6646. return count;
  6647. }
  6648. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6649. static ssize_t show_flags(struct device *d,
  6650. struct device_attribute *attr, char *buf)
  6651. {
  6652. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6653. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6654. }
  6655. static ssize_t store_flags(struct device *d,
  6656. struct device_attribute *attr,
  6657. const char *buf, size_t count)
  6658. {
  6659. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6660. u32 flags = simple_strtoul(buf, NULL, 0);
  6661. mutex_lock(&priv->mutex);
  6662. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6663. /* Cancel any currently running scans... */
  6664. if (iwl4965_scan_cancel_timeout(priv, 100))
  6665. IWL_WARNING("Could not cancel scan.\n");
  6666. else {
  6667. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6668. flags);
  6669. priv->staging_rxon.flags = cpu_to_le32(flags);
  6670. iwl4965_commit_rxon(priv);
  6671. }
  6672. }
  6673. mutex_unlock(&priv->mutex);
  6674. return count;
  6675. }
  6676. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6677. static ssize_t show_filter_flags(struct device *d,
  6678. struct device_attribute *attr, char *buf)
  6679. {
  6680. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6681. return sprintf(buf, "0x%04X\n",
  6682. le32_to_cpu(priv->active_rxon.filter_flags));
  6683. }
  6684. static ssize_t store_filter_flags(struct device *d,
  6685. struct device_attribute *attr,
  6686. const char *buf, size_t count)
  6687. {
  6688. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6689. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6690. mutex_lock(&priv->mutex);
  6691. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6692. /* Cancel any currently running scans... */
  6693. if (iwl4965_scan_cancel_timeout(priv, 100))
  6694. IWL_WARNING("Could not cancel scan.\n");
  6695. else {
  6696. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6697. "0x%04X\n", filter_flags);
  6698. priv->staging_rxon.filter_flags =
  6699. cpu_to_le32(filter_flags);
  6700. iwl4965_commit_rxon(priv);
  6701. }
  6702. }
  6703. mutex_unlock(&priv->mutex);
  6704. return count;
  6705. }
  6706. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6707. store_filter_flags);
  6708. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6709. static ssize_t show_measurement(struct device *d,
  6710. struct device_attribute *attr, char *buf)
  6711. {
  6712. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6713. struct iwl4965_spectrum_notification measure_report;
  6714. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6715. u8 *data = (u8 *) & measure_report;
  6716. unsigned long flags;
  6717. spin_lock_irqsave(&priv->lock, flags);
  6718. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6719. spin_unlock_irqrestore(&priv->lock, flags);
  6720. return 0;
  6721. }
  6722. memcpy(&measure_report, &priv->measure_report, size);
  6723. priv->measurement_status = 0;
  6724. spin_unlock_irqrestore(&priv->lock, flags);
  6725. while (size && (PAGE_SIZE - len)) {
  6726. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6727. PAGE_SIZE - len, 1);
  6728. len = strlen(buf);
  6729. if (PAGE_SIZE - len)
  6730. buf[len++] = '\n';
  6731. ofs += 16;
  6732. size -= min(size, 16U);
  6733. }
  6734. return len;
  6735. }
  6736. static ssize_t store_measurement(struct device *d,
  6737. struct device_attribute *attr,
  6738. const char *buf, size_t count)
  6739. {
  6740. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6741. struct ieee80211_measurement_params params = {
  6742. .channel = le16_to_cpu(priv->active_rxon.channel),
  6743. .start_time = cpu_to_le64(priv->last_tsf),
  6744. .duration = cpu_to_le16(1),
  6745. };
  6746. u8 type = IWL_MEASURE_BASIC;
  6747. u8 buffer[32];
  6748. u8 channel;
  6749. if (count) {
  6750. char *p = buffer;
  6751. strncpy(buffer, buf, min(sizeof(buffer), count));
  6752. channel = simple_strtoul(p, NULL, 0);
  6753. if (channel)
  6754. params.channel = channel;
  6755. p = buffer;
  6756. while (*p && *p != ' ')
  6757. p++;
  6758. if (*p)
  6759. type = simple_strtoul(p + 1, NULL, 0);
  6760. }
  6761. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6762. "channel %d (for '%s')\n", type, params.channel, buf);
  6763. iwl4965_get_measurement(priv, &params, type);
  6764. return count;
  6765. }
  6766. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6767. show_measurement, store_measurement);
  6768. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6769. static ssize_t store_retry_rate(struct device *d,
  6770. struct device_attribute *attr,
  6771. const char *buf, size_t count)
  6772. {
  6773. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6774. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6775. if (priv->retry_rate <= 0)
  6776. priv->retry_rate = 1;
  6777. return count;
  6778. }
  6779. static ssize_t show_retry_rate(struct device *d,
  6780. struct device_attribute *attr, char *buf)
  6781. {
  6782. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6783. return sprintf(buf, "%d", priv->retry_rate);
  6784. }
  6785. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6786. store_retry_rate);
  6787. static ssize_t store_power_level(struct device *d,
  6788. struct device_attribute *attr,
  6789. const char *buf, size_t count)
  6790. {
  6791. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6792. int rc;
  6793. int mode;
  6794. mode = simple_strtoul(buf, NULL, 0);
  6795. mutex_lock(&priv->mutex);
  6796. if (!iwl4965_is_ready(priv)) {
  6797. rc = -EAGAIN;
  6798. goto out;
  6799. }
  6800. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6801. mode = IWL_POWER_AC;
  6802. else
  6803. mode |= IWL_POWER_ENABLED;
  6804. if (mode != priv->power_mode) {
  6805. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6806. if (rc) {
  6807. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6808. goto out;
  6809. }
  6810. priv->power_mode = mode;
  6811. }
  6812. rc = count;
  6813. out:
  6814. mutex_unlock(&priv->mutex);
  6815. return rc;
  6816. }
  6817. #define MAX_WX_STRING 80
  6818. /* Values are in microsecond */
  6819. static const s32 timeout_duration[] = {
  6820. 350000,
  6821. 250000,
  6822. 75000,
  6823. 37000,
  6824. 25000,
  6825. };
  6826. static const s32 period_duration[] = {
  6827. 400000,
  6828. 700000,
  6829. 1000000,
  6830. 1000000,
  6831. 1000000
  6832. };
  6833. static ssize_t show_power_level(struct device *d,
  6834. struct device_attribute *attr, char *buf)
  6835. {
  6836. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6837. int level = IWL_POWER_LEVEL(priv->power_mode);
  6838. char *p = buf;
  6839. p += sprintf(p, "%d ", level);
  6840. switch (level) {
  6841. case IWL_POWER_MODE_CAM:
  6842. case IWL_POWER_AC:
  6843. p += sprintf(p, "(AC)");
  6844. break;
  6845. case IWL_POWER_BATTERY:
  6846. p += sprintf(p, "(BATTERY)");
  6847. break;
  6848. default:
  6849. p += sprintf(p,
  6850. "(Timeout %dms, Period %dms)",
  6851. timeout_duration[level - 1] / 1000,
  6852. period_duration[level - 1] / 1000);
  6853. }
  6854. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6855. p += sprintf(p, " OFF\n");
  6856. else
  6857. p += sprintf(p, " \n");
  6858. return (p - buf + 1);
  6859. }
  6860. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6861. store_power_level);
  6862. static ssize_t show_channels(struct device *d,
  6863. struct device_attribute *attr, char *buf)
  6864. {
  6865. /* all this shit doesn't belong into sysfs anyway */
  6866. return 0;
  6867. }
  6868. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6869. static ssize_t show_statistics(struct device *d,
  6870. struct device_attribute *attr, char *buf)
  6871. {
  6872. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6873. u32 size = sizeof(struct iwl4965_notif_statistics);
  6874. u32 len = 0, ofs = 0;
  6875. u8 *data = (u8 *) & priv->statistics;
  6876. int rc = 0;
  6877. if (!iwl4965_is_alive(priv))
  6878. return -EAGAIN;
  6879. mutex_lock(&priv->mutex);
  6880. rc = iwl4965_send_statistics_request(priv);
  6881. mutex_unlock(&priv->mutex);
  6882. if (rc) {
  6883. len = sprintf(buf,
  6884. "Error sending statistics request: 0x%08X\n", rc);
  6885. return len;
  6886. }
  6887. while (size && (PAGE_SIZE - len)) {
  6888. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6889. PAGE_SIZE - len, 1);
  6890. len = strlen(buf);
  6891. if (PAGE_SIZE - len)
  6892. buf[len++] = '\n';
  6893. ofs += 16;
  6894. size -= min(size, 16U);
  6895. }
  6896. return len;
  6897. }
  6898. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6899. static ssize_t show_antenna(struct device *d,
  6900. struct device_attribute *attr, char *buf)
  6901. {
  6902. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6903. if (!iwl4965_is_alive(priv))
  6904. return -EAGAIN;
  6905. return sprintf(buf, "%d\n", priv->antenna);
  6906. }
  6907. static ssize_t store_antenna(struct device *d,
  6908. struct device_attribute *attr,
  6909. const char *buf, size_t count)
  6910. {
  6911. int ant;
  6912. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6913. if (count == 0)
  6914. return 0;
  6915. if (sscanf(buf, "%1i", &ant) != 1) {
  6916. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6917. return count;
  6918. }
  6919. if ((ant >= 0) && (ant <= 2)) {
  6920. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6921. priv->antenna = (enum iwl4965_antenna)ant;
  6922. } else
  6923. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6924. return count;
  6925. }
  6926. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6927. static ssize_t show_status(struct device *d,
  6928. struct device_attribute *attr, char *buf)
  6929. {
  6930. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6931. if (!iwl4965_is_alive(priv))
  6932. return -EAGAIN;
  6933. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6934. }
  6935. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6936. static ssize_t dump_error_log(struct device *d,
  6937. struct device_attribute *attr,
  6938. const char *buf, size_t count)
  6939. {
  6940. char *p = (char *)buf;
  6941. if (p[0] == '1')
  6942. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  6943. return strnlen(buf, count);
  6944. }
  6945. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6946. static ssize_t dump_event_log(struct device *d,
  6947. struct device_attribute *attr,
  6948. const char *buf, size_t count)
  6949. {
  6950. char *p = (char *)buf;
  6951. if (p[0] == '1')
  6952. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  6953. return strnlen(buf, count);
  6954. }
  6955. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6956. /*****************************************************************************
  6957. *
  6958. * driver setup and teardown
  6959. *
  6960. *****************************************************************************/
  6961. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  6962. {
  6963. priv->workqueue = create_workqueue(DRV_NAME);
  6964. init_waitqueue_head(&priv->wait_command_queue);
  6965. INIT_WORK(&priv->up, iwl4965_bg_up);
  6966. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6967. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6968. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6969. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6970. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6971. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6972. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6973. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6974. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6975. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6976. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6977. iwl4965_hw_setup_deferred_work(priv);
  6978. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6979. iwl4965_irq_tasklet, (unsigned long)priv);
  6980. }
  6981. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  6982. {
  6983. iwl4965_hw_cancel_deferred_work(priv);
  6984. cancel_delayed_work_sync(&priv->init_alive_start);
  6985. cancel_delayed_work(&priv->scan_check);
  6986. cancel_delayed_work(&priv->alive_start);
  6987. cancel_delayed_work(&priv->post_associate);
  6988. cancel_work_sync(&priv->beacon_update);
  6989. }
  6990. static struct attribute *iwl4965_sysfs_entries[] = {
  6991. &dev_attr_antenna.attr,
  6992. &dev_attr_channels.attr,
  6993. &dev_attr_dump_errors.attr,
  6994. &dev_attr_dump_events.attr,
  6995. &dev_attr_flags.attr,
  6996. &dev_attr_filter_flags.attr,
  6997. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6998. &dev_attr_measurement.attr,
  6999. #endif
  7000. &dev_attr_power_level.attr,
  7001. &dev_attr_retry_rate.attr,
  7002. &dev_attr_rf_kill.attr,
  7003. &dev_attr_rs_window.attr,
  7004. &dev_attr_statistics.attr,
  7005. &dev_attr_status.attr,
  7006. &dev_attr_temperature.attr,
  7007. &dev_attr_tx_power.attr,
  7008. NULL
  7009. };
  7010. static struct attribute_group iwl4965_attribute_group = {
  7011. .name = NULL, /* put in device directory */
  7012. .attrs = iwl4965_sysfs_entries,
  7013. };
  7014. static struct ieee80211_ops iwl4965_hw_ops = {
  7015. .tx = iwl4965_mac_tx,
  7016. .start = iwl4965_mac_start,
  7017. .stop = iwl4965_mac_stop,
  7018. .add_interface = iwl4965_mac_add_interface,
  7019. .remove_interface = iwl4965_mac_remove_interface,
  7020. .config = iwl4965_mac_config,
  7021. .config_interface = iwl4965_mac_config_interface,
  7022. .configure_filter = iwl4965_configure_filter,
  7023. .set_key = iwl4965_mac_set_key,
  7024. .get_stats = iwl4965_mac_get_stats,
  7025. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7026. .conf_tx = iwl4965_mac_conf_tx,
  7027. .get_tsf = iwl4965_mac_get_tsf,
  7028. .reset_tsf = iwl4965_mac_reset_tsf,
  7029. .beacon_update = iwl4965_mac_beacon_update,
  7030. .bss_info_changed = iwl4965_bss_info_changed,
  7031. #ifdef CONFIG_IWL4965_HT
  7032. .conf_ht = iwl4965_mac_conf_ht,
  7033. .ampdu_action = iwl4965_mac_ampdu_action,
  7034. #endif /* CONFIG_IWL4965_HT */
  7035. .hw_scan = iwl4965_mac_hw_scan
  7036. };
  7037. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7038. {
  7039. int err = 0;
  7040. struct iwl4965_priv *priv;
  7041. struct ieee80211_hw *hw;
  7042. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7043. int i;
  7044. DECLARE_MAC_BUF(mac);
  7045. /* Disabling hardware scan means that mac80211 will perform scans
  7046. * "the hard way", rather than using device's scan. */
  7047. if (iwl4965_param_disable_hw_scan) {
  7048. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7049. iwl4965_hw_ops.hw_scan = NULL;
  7050. }
  7051. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7052. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7053. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7054. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7055. err = -EINVAL;
  7056. goto out;
  7057. }
  7058. /* mac80211 allocates memory for this device instance, including
  7059. * space for this driver's private structure */
  7060. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7061. if (hw == NULL) {
  7062. IWL_ERROR("Can not allocate network device\n");
  7063. err = -ENOMEM;
  7064. goto out;
  7065. }
  7066. SET_IEEE80211_DEV(hw, &pdev->dev);
  7067. hw->rate_control_algorithm = "iwl-4965-rs";
  7068. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7069. priv = hw->priv;
  7070. priv->hw = hw;
  7071. priv->cfg = cfg;
  7072. priv->pci_dev = pdev;
  7073. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7074. #ifdef CONFIG_IWL4965_DEBUG
  7075. iwl4965_debug_level = iwl4965_param_debug;
  7076. atomic_set(&priv->restrict_refcnt, 0);
  7077. #endif
  7078. priv->retry_rate = 1;
  7079. priv->ibss_beacon = NULL;
  7080. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7081. * the range of signal quality values that we'll provide.
  7082. * Negative values for level/noise indicate that we'll provide dBm.
  7083. * For WE, at least, non-0 values here *enable* display of values
  7084. * in app (iwconfig). */
  7085. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7086. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7087. hw->max_signal = 100; /* link quality indication (%) */
  7088. /* Tell mac80211 our Tx characteristics */
  7089. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7090. /* Default value; 4 EDCA QOS priorities */
  7091. hw->queues = 4;
  7092. #ifdef CONFIG_IWL4965_HT
  7093. /* Enhanced value; more queues, to support 11n aggregation */
  7094. hw->queues = 16;
  7095. #endif /* CONFIG_IWL4965_HT */
  7096. spin_lock_init(&priv->lock);
  7097. spin_lock_init(&priv->power_data.lock);
  7098. spin_lock_init(&priv->sta_lock);
  7099. spin_lock_init(&priv->hcmd_lock);
  7100. spin_lock_init(&priv->lq_mngr.lock);
  7101. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7102. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7103. INIT_LIST_HEAD(&priv->free_frames);
  7104. mutex_init(&priv->mutex);
  7105. if (pci_enable_device(pdev)) {
  7106. err = -ENODEV;
  7107. goto out_ieee80211_free_hw;
  7108. }
  7109. pci_set_master(pdev);
  7110. /* Clear the driver's (not device's) station table */
  7111. iwl4965_clear_stations_table(priv);
  7112. priv->data_retry_limit = -1;
  7113. priv->ieee_channels = NULL;
  7114. priv->ieee_rates = NULL;
  7115. priv->band = IEEE80211_BAND_2GHZ;
  7116. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7117. if (!err)
  7118. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7119. if (err) {
  7120. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7121. goto out_pci_disable_device;
  7122. }
  7123. pci_set_drvdata(pdev, priv);
  7124. err = pci_request_regions(pdev, DRV_NAME);
  7125. if (err)
  7126. goto out_pci_disable_device;
  7127. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7128. * PCI Tx retries from interfering with C3 CPU state */
  7129. pci_write_config_byte(pdev, 0x41, 0x00);
  7130. priv->hw_base = pci_iomap(pdev, 0, 0);
  7131. if (!priv->hw_base) {
  7132. err = -ENODEV;
  7133. goto out_pci_release_regions;
  7134. }
  7135. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7136. (unsigned long long) pci_resource_len(pdev, 0));
  7137. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7138. /* Initialize module parameter values here */
  7139. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7140. if (iwl4965_param_disable) {
  7141. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7142. IWL_DEBUG_INFO("Radio disabled.\n");
  7143. }
  7144. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7145. priv->ps_mode = 0;
  7146. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7147. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7148. priv->ps_mode = IWL_MIMO_PS_NONE;
  7149. /* Choose which receivers/antennas to use */
  7150. iwl4965_set_rxon_chain(priv);
  7151. printk(KERN_INFO DRV_NAME
  7152. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7153. /* Device-specific setup */
  7154. if (iwl4965_hw_set_hw_setting(priv)) {
  7155. IWL_ERROR("failed to set hw settings\n");
  7156. goto out_iounmap;
  7157. }
  7158. if (iwl4965_param_qos_enable)
  7159. priv->qos_data.qos_enable = 1;
  7160. iwl4965_reset_qos(priv);
  7161. priv->qos_data.qos_active = 0;
  7162. priv->qos_data.qos_cap.val = 0;
  7163. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7164. iwl4965_setup_deferred_work(priv);
  7165. iwl4965_setup_rx_handlers(priv);
  7166. priv->rates_mask = IWL_RATES_MASK;
  7167. /* If power management is turned on, default to AC mode */
  7168. priv->power_mode = IWL_POWER_AC;
  7169. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7170. iwl4965_disable_interrupts(priv);
  7171. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7172. if (err) {
  7173. IWL_ERROR("failed to create sysfs device attributes\n");
  7174. goto out_release_irq;
  7175. }
  7176. /* nic init */
  7177. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7178. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7179. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7180. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7181. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7182. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7183. if (err < 0) {
  7184. IWL_DEBUG_INFO("Failed to init the card\n");
  7185. goto out_remove_sysfs;
  7186. }
  7187. /* Read the EEPROM */
  7188. err = iwl_eeprom_init(priv);
  7189. if (err) {
  7190. IWL_ERROR("Unable to init EEPROM\n");
  7191. goto out_remove_sysfs;
  7192. }
  7193. /* MAC Address location in EEPROM same for 3945/4965 */
  7194. iwl_eeprom_get_mac(priv, priv->mac_addr);
  7195. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7196. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7197. err = iwl4965_init_channel_map(priv);
  7198. if (err) {
  7199. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7200. goto out_remove_sysfs;
  7201. }
  7202. err = iwl4965_init_geos(priv);
  7203. if (err) {
  7204. IWL_ERROR("initializing geos failed: %d\n", err);
  7205. goto out_free_channel_map;
  7206. }
  7207. iwl4965_rate_control_register(priv->hw);
  7208. err = ieee80211_register_hw(priv->hw);
  7209. if (err) {
  7210. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7211. goto out_free_geos;
  7212. }
  7213. priv->hw->conf.beacon_int = 100;
  7214. priv->mac80211_registered = 1;
  7215. pci_save_state(pdev);
  7216. pci_disable_device(pdev);
  7217. return 0;
  7218. out_free_geos:
  7219. iwl4965_free_geos(priv);
  7220. out_free_channel_map:
  7221. iwl4965_free_channel_map(priv);
  7222. out_remove_sysfs:
  7223. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7224. out_release_irq:
  7225. destroy_workqueue(priv->workqueue);
  7226. priv->workqueue = NULL;
  7227. iwl4965_unset_hw_setting(priv);
  7228. out_iounmap:
  7229. pci_iounmap(pdev, priv->hw_base);
  7230. out_pci_release_regions:
  7231. pci_release_regions(pdev);
  7232. out_pci_disable_device:
  7233. pci_disable_device(pdev);
  7234. pci_set_drvdata(pdev, NULL);
  7235. out_ieee80211_free_hw:
  7236. ieee80211_free_hw(priv->hw);
  7237. out:
  7238. return err;
  7239. }
  7240. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7241. {
  7242. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7243. struct list_head *p, *q;
  7244. int i;
  7245. if (!priv)
  7246. return;
  7247. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7248. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7249. iwl4965_down(priv);
  7250. /* Free MAC hash list for ADHOC */
  7251. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7252. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7253. list_del(p);
  7254. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7255. }
  7256. }
  7257. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7258. iwl4965_dealloc_ucode_pci(priv);
  7259. if (priv->rxq.bd)
  7260. iwl4965_rx_queue_free(priv, &priv->rxq);
  7261. iwl4965_hw_txq_ctx_free(priv);
  7262. iwl4965_unset_hw_setting(priv);
  7263. iwl4965_clear_stations_table(priv);
  7264. if (priv->mac80211_registered) {
  7265. ieee80211_unregister_hw(priv->hw);
  7266. iwl4965_rate_control_unregister(priv->hw);
  7267. }
  7268. /*netif_stop_queue(dev); */
  7269. flush_workqueue(priv->workqueue);
  7270. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7271. * priv->workqueue... so we can't take down the workqueue
  7272. * until now... */
  7273. destroy_workqueue(priv->workqueue);
  7274. priv->workqueue = NULL;
  7275. pci_iounmap(pdev, priv->hw_base);
  7276. pci_release_regions(pdev);
  7277. pci_disable_device(pdev);
  7278. pci_set_drvdata(pdev, NULL);
  7279. iwl4965_free_channel_map(priv);
  7280. iwl4965_free_geos(priv);
  7281. if (priv->ibss_beacon)
  7282. dev_kfree_skb(priv->ibss_beacon);
  7283. ieee80211_free_hw(priv->hw);
  7284. }
  7285. #ifdef CONFIG_PM
  7286. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7287. {
  7288. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7289. if (priv->is_open) {
  7290. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7291. iwl4965_mac_stop(priv->hw);
  7292. priv->is_open = 1;
  7293. }
  7294. pci_set_power_state(pdev, PCI_D3hot);
  7295. return 0;
  7296. }
  7297. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7298. {
  7299. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7300. pci_set_power_state(pdev, PCI_D0);
  7301. if (priv->is_open)
  7302. iwl4965_mac_start(priv->hw);
  7303. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7304. return 0;
  7305. }
  7306. #endif /* CONFIG_PM */
  7307. /*****************************************************************************
  7308. *
  7309. * driver and module entry point
  7310. *
  7311. *****************************************************************************/
  7312. static struct pci_driver iwl4965_driver = {
  7313. .name = DRV_NAME,
  7314. .id_table = iwl4965_hw_card_ids,
  7315. .probe = iwl4965_pci_probe,
  7316. .remove = __devexit_p(iwl4965_pci_remove),
  7317. #ifdef CONFIG_PM
  7318. .suspend = iwl4965_pci_suspend,
  7319. .resume = iwl4965_pci_resume,
  7320. #endif
  7321. };
  7322. static int __init iwl4965_init(void)
  7323. {
  7324. int ret;
  7325. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7326. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7327. ret = pci_register_driver(&iwl4965_driver);
  7328. if (ret) {
  7329. IWL_ERROR("Unable to initialize PCI module\n");
  7330. return ret;
  7331. }
  7332. #ifdef CONFIG_IWL4965_DEBUG
  7333. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7334. if (ret) {
  7335. IWL_ERROR("Unable to create driver sysfs file\n");
  7336. pci_unregister_driver(&iwl4965_driver);
  7337. return ret;
  7338. }
  7339. #endif
  7340. return ret;
  7341. }
  7342. static void __exit iwl4965_exit(void)
  7343. {
  7344. #ifdef CONFIG_IWL4965_DEBUG
  7345. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7346. #endif
  7347. pci_unregister_driver(&iwl4965_driver);
  7348. }
  7349. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7350. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7351. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7352. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7353. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7354. MODULE_PARM_DESC(hwcrypto,
  7355. "using hardware crypto engine (default 0 [software])\n");
  7356. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7357. MODULE_PARM_DESC(debug, "debug output mask");
  7358. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7359. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7360. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7361. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7362. /* QoS */
  7363. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7364. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7365. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7366. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7367. module_exit(iwl4965_exit);
  7368. module_init(iwl4965_init);