jr.c 14 KB

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  1. /*
  2. * CAAM/SEC 4.x transport/backend driver
  3. * JobR backend functionality
  4. *
  5. * Copyright 2008-2012 Freescale Semiconductor, Inc.
  6. */
  7. #include <linux/of_irq.h>
  8. #include "compat.h"
  9. #include "regs.h"
  10. #include "jr.h"
  11. #include "desc.h"
  12. #include "intern.h"
  13. struct jr_driver_data {
  14. /* List of Physical JobR's with the Driver */
  15. struct list_head jr_list;
  16. spinlock_t jr_alloc_lock; /* jr_list lock */
  17. } ____cacheline_aligned;
  18. static struct jr_driver_data driver_data;
  19. static int caam_reset_hw_jr(struct device *dev)
  20. {
  21. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  22. unsigned int timeout = 100000;
  23. /*
  24. * mask interrupts since we are going to poll
  25. * for reset completion status
  26. */
  27. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  28. /* initiate flush (required prior to reset) */
  29. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  30. while (((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) ==
  31. JRINT_ERR_HALT_INPROGRESS) && --timeout)
  32. cpu_relax();
  33. if ((rd_reg32(&jrp->rregs->jrintstatus) & JRINT_ERR_HALT_MASK) !=
  34. JRINT_ERR_HALT_COMPLETE || timeout == 0) {
  35. dev_err(dev, "failed to flush job ring %d\n", jrp->ridx);
  36. return -EIO;
  37. }
  38. /* initiate reset */
  39. timeout = 100000;
  40. wr_reg32(&jrp->rregs->jrcommand, JRCR_RESET);
  41. while ((rd_reg32(&jrp->rregs->jrcommand) & JRCR_RESET) && --timeout)
  42. cpu_relax();
  43. if (timeout == 0) {
  44. dev_err(dev, "failed to reset job ring %d\n", jrp->ridx);
  45. return -EIO;
  46. }
  47. /* unmask interrupts */
  48. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  49. return 0;
  50. }
  51. /*
  52. * Shutdown JobR independent of platform property code
  53. */
  54. int caam_jr_shutdown(struct device *dev)
  55. {
  56. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  57. dma_addr_t inpbusaddr, outbusaddr;
  58. int ret;
  59. ret = caam_reset_hw_jr(dev);
  60. tasklet_kill(&jrp->irqtask);
  61. /* Release interrupt */
  62. free_irq(jrp->irq, dev);
  63. /* Free rings */
  64. inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
  65. outbusaddr = rd_reg64(&jrp->rregs->outring_base);
  66. dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  67. jrp->inpring, inpbusaddr);
  68. dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
  69. jrp->outring, outbusaddr);
  70. kfree(jrp->entinfo);
  71. return ret;
  72. }
  73. static int caam_jr_remove(struct platform_device *pdev)
  74. {
  75. int ret;
  76. struct device *jrdev;
  77. struct caam_drv_private_jr *jrpriv;
  78. jrdev = &pdev->dev;
  79. jrpriv = dev_get_drvdata(jrdev);
  80. /*
  81. * Return EBUSY if job ring already allocated.
  82. */
  83. if (atomic_read(&jrpriv->tfm_count)) {
  84. dev_err(jrdev, "Device is busy\n");
  85. return -EBUSY;
  86. }
  87. /* Remove the node from Physical JobR list maintained by driver */
  88. spin_lock(&driver_data.jr_alloc_lock);
  89. list_del(&jrpriv->list_node);
  90. spin_unlock(&driver_data.jr_alloc_lock);
  91. /* Release ring */
  92. ret = caam_jr_shutdown(jrdev);
  93. if (ret)
  94. dev_err(jrdev, "Failed to shut down job ring\n");
  95. irq_dispose_mapping(jrpriv->irq);
  96. return ret;
  97. }
  98. /* Main per-ring interrupt handler */
  99. static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
  100. {
  101. struct device *dev = st_dev;
  102. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  103. u32 irqstate;
  104. /*
  105. * Check the output ring for ready responses, kick
  106. * tasklet if jobs done.
  107. */
  108. irqstate = rd_reg32(&jrp->rregs->jrintstatus);
  109. if (!irqstate)
  110. return IRQ_NONE;
  111. /*
  112. * If JobR error, we got more development work to do
  113. * Flag a bug now, but we really need to shut down and
  114. * restart the queue (and fix code).
  115. */
  116. if (irqstate & JRINT_JR_ERROR) {
  117. dev_err(dev, "job ring error: irqstate: %08x\n", irqstate);
  118. BUG();
  119. }
  120. /* mask valid interrupts */
  121. setbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  122. /* Have valid interrupt at this point, just ACK and trigger */
  123. wr_reg32(&jrp->rregs->jrintstatus, irqstate);
  124. preempt_disable();
  125. tasklet_schedule(&jrp->irqtask);
  126. preempt_enable();
  127. return IRQ_HANDLED;
  128. }
  129. /* Deferred service handler, run as interrupt-fired tasklet */
  130. static void caam_jr_dequeue(unsigned long devarg)
  131. {
  132. int hw_idx, sw_idx, i, head, tail;
  133. struct device *dev = (struct device *)devarg;
  134. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  135. void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
  136. u32 *userdesc, userstatus;
  137. void *userarg;
  138. while (rd_reg32(&jrp->rregs->outring_used)) {
  139. head = ACCESS_ONCE(jrp->head);
  140. spin_lock(&jrp->outlock);
  141. sw_idx = tail = jrp->tail;
  142. hw_idx = jrp->out_ring_read_index;
  143. for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
  144. sw_idx = (tail + i) & (JOBR_DEPTH - 1);
  145. smp_read_barrier_depends();
  146. if (jrp->outring[hw_idx].desc ==
  147. jrp->entinfo[sw_idx].desc_addr_dma)
  148. break; /* found */
  149. }
  150. /* we should never fail to find a matching descriptor */
  151. BUG_ON(CIRC_CNT(head, tail + i, JOBR_DEPTH) <= 0);
  152. /* Unmap just-run descriptor so we can post-process */
  153. dma_unmap_single(dev, jrp->outring[hw_idx].desc,
  154. jrp->entinfo[sw_idx].desc_size,
  155. DMA_TO_DEVICE);
  156. /* mark completed, avoid matching on a recycled desc addr */
  157. jrp->entinfo[sw_idx].desc_addr_dma = 0;
  158. /* Stash callback params for use outside of lock */
  159. usercall = jrp->entinfo[sw_idx].callbk;
  160. userarg = jrp->entinfo[sw_idx].cbkarg;
  161. userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
  162. userstatus = jrp->outring[hw_idx].jrstatus;
  163. /* set done */
  164. wr_reg32(&jrp->rregs->outring_rmvd, 1);
  165. jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
  166. (JOBR_DEPTH - 1);
  167. /*
  168. * if this job completed out-of-order, do not increment
  169. * the tail. Otherwise, increment tail by 1 plus the
  170. * number of subsequent jobs already completed out-of-order
  171. */
  172. if (sw_idx == tail) {
  173. do {
  174. tail = (tail + 1) & (JOBR_DEPTH - 1);
  175. smp_read_barrier_depends();
  176. } while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
  177. jrp->entinfo[tail].desc_addr_dma == 0);
  178. jrp->tail = tail;
  179. }
  180. spin_unlock(&jrp->outlock);
  181. /* Finally, execute user's callback */
  182. usercall(dev, userdesc, userstatus, userarg);
  183. }
  184. /* reenable / unmask IRQs */
  185. clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
  186. }
  187. /**
  188. * caam_jr_alloc() - Alloc a job ring for someone to use as needed.
  189. *
  190. * returns : pointer to the newly allocated physical
  191. * JobR dev can be written to if successful.
  192. **/
  193. struct device *caam_jr_alloc(void)
  194. {
  195. struct caam_drv_private_jr *jrpriv, *min_jrpriv = NULL;
  196. struct device *dev = NULL;
  197. int min_tfm_cnt = INT_MAX;
  198. int tfm_cnt;
  199. spin_lock(&driver_data.jr_alloc_lock);
  200. if (list_empty(&driver_data.jr_list)) {
  201. spin_unlock(&driver_data.jr_alloc_lock);
  202. return ERR_PTR(-ENODEV);
  203. }
  204. list_for_each_entry(jrpriv, &driver_data.jr_list, list_node) {
  205. tfm_cnt = atomic_read(&jrpriv->tfm_count);
  206. if (tfm_cnt < min_tfm_cnt) {
  207. min_tfm_cnt = tfm_cnt;
  208. min_jrpriv = jrpriv;
  209. }
  210. if (!min_tfm_cnt)
  211. break;
  212. }
  213. if (min_jrpriv) {
  214. atomic_inc(&min_jrpriv->tfm_count);
  215. dev = min_jrpriv->dev;
  216. }
  217. spin_unlock(&driver_data.jr_alloc_lock);
  218. return dev;
  219. }
  220. EXPORT_SYMBOL(caam_jr_alloc);
  221. /**
  222. * caam_jr_free() - Free the Job Ring
  223. * @rdev - points to the dev that identifies the Job ring to
  224. * be released.
  225. **/
  226. void caam_jr_free(struct device *rdev)
  227. {
  228. struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
  229. atomic_dec(&jrpriv->tfm_count);
  230. }
  231. EXPORT_SYMBOL(caam_jr_free);
  232. /**
  233. * caam_jr_enqueue() - Enqueue a job descriptor head. Returns 0 if OK,
  234. * -EBUSY if the queue is full, -EIO if it cannot map the caller's
  235. * descriptor.
  236. * @dev: device of the job ring to be used. This device should have
  237. * been assigned prior by caam_jr_register().
  238. * @desc: points to a job descriptor that execute our request. All
  239. * descriptors (and all referenced data) must be in a DMAable
  240. * region, and all data references must be physical addresses
  241. * accessible to CAAM (i.e. within a PAMU window granted
  242. * to it).
  243. * @cbk: pointer to a callback function to be invoked upon completion
  244. * of this request. This has the form:
  245. * callback(struct device *dev, u32 *desc, u32 stat, void *arg)
  246. * where:
  247. * @dev: contains the job ring device that processed this
  248. * response.
  249. * @desc: descriptor that initiated the request, same as
  250. * "desc" being argued to caam_jr_enqueue().
  251. * @status: untranslated status received from CAAM. See the
  252. * reference manual for a detailed description of
  253. * error meaning, or see the JRSTA definitions in the
  254. * register header file
  255. * @areq: optional pointer to an argument passed with the
  256. * original request
  257. * @areq: optional pointer to a user argument for use at callback
  258. * time.
  259. **/
  260. int caam_jr_enqueue(struct device *dev, u32 *desc,
  261. void (*cbk)(struct device *dev, u32 *desc,
  262. u32 status, void *areq),
  263. void *areq)
  264. {
  265. struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
  266. struct caam_jrentry_info *head_entry;
  267. int head, tail, desc_size;
  268. dma_addr_t desc_dma;
  269. desc_size = (*desc & HDR_JD_LENGTH_MASK) * sizeof(u32);
  270. desc_dma = dma_map_single(dev, desc, desc_size, DMA_TO_DEVICE);
  271. if (dma_mapping_error(dev, desc_dma)) {
  272. dev_err(dev, "caam_jr_enqueue(): can't map jobdesc\n");
  273. return -EIO;
  274. }
  275. spin_lock_bh(&jrp->inplock);
  276. head = jrp->head;
  277. tail = ACCESS_ONCE(jrp->tail);
  278. if (!rd_reg32(&jrp->rregs->inpring_avail) ||
  279. CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
  280. spin_unlock_bh(&jrp->inplock);
  281. dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
  282. return -EBUSY;
  283. }
  284. head_entry = &jrp->entinfo[head];
  285. head_entry->desc_addr_virt = desc;
  286. head_entry->desc_size = desc_size;
  287. head_entry->callbk = (void *)cbk;
  288. head_entry->cbkarg = areq;
  289. head_entry->desc_addr_dma = desc_dma;
  290. jrp->inpring[jrp->inp_ring_write_index] = desc_dma;
  291. smp_wmb();
  292. jrp->inp_ring_write_index = (jrp->inp_ring_write_index + 1) &
  293. (JOBR_DEPTH - 1);
  294. jrp->head = (head + 1) & (JOBR_DEPTH - 1);
  295. wr_reg32(&jrp->rregs->inpring_jobadd, 1);
  296. spin_unlock_bh(&jrp->inplock);
  297. return 0;
  298. }
  299. EXPORT_SYMBOL(caam_jr_enqueue);
  300. /*
  301. * Init JobR independent of platform property detection
  302. */
  303. static int caam_jr_init(struct device *dev)
  304. {
  305. struct caam_drv_private_jr *jrp;
  306. dma_addr_t inpbusaddr, outbusaddr;
  307. int i, error;
  308. jrp = dev_get_drvdata(dev);
  309. tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
  310. /* Connect job ring interrupt handler. */
  311. error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
  312. dev_name(dev), dev);
  313. if (error) {
  314. dev_err(dev, "can't connect JobR %d interrupt (%d)\n",
  315. jrp->ridx, jrp->irq);
  316. irq_dispose_mapping(jrp->irq);
  317. jrp->irq = 0;
  318. return -EINVAL;
  319. }
  320. error = caam_reset_hw_jr(dev);
  321. if (error)
  322. return error;
  323. jrp->inpring = dma_alloc_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
  324. &inpbusaddr, GFP_KERNEL);
  325. jrp->outring = dma_alloc_coherent(dev, sizeof(struct jr_outentry) *
  326. JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
  327. jrp->entinfo = kzalloc(sizeof(struct caam_jrentry_info) * JOBR_DEPTH,
  328. GFP_KERNEL);
  329. if ((jrp->inpring == NULL) || (jrp->outring == NULL) ||
  330. (jrp->entinfo == NULL)) {
  331. dev_err(dev, "can't allocate job rings for %d\n",
  332. jrp->ridx);
  333. return -ENOMEM;
  334. }
  335. for (i = 0; i < JOBR_DEPTH; i++)
  336. jrp->entinfo[i].desc_addr_dma = !0;
  337. /* Setup rings */
  338. jrp->inp_ring_write_index = 0;
  339. jrp->out_ring_read_index = 0;
  340. jrp->head = 0;
  341. jrp->tail = 0;
  342. wr_reg64(&jrp->rregs->inpring_base, inpbusaddr);
  343. wr_reg64(&jrp->rregs->outring_base, outbusaddr);
  344. wr_reg32(&jrp->rregs->inpring_size, JOBR_DEPTH);
  345. wr_reg32(&jrp->rregs->outring_size, JOBR_DEPTH);
  346. jrp->ringsize = JOBR_DEPTH;
  347. spin_lock_init(&jrp->inplock);
  348. spin_lock_init(&jrp->outlock);
  349. /* Select interrupt coalescing parameters */
  350. setbits32(&jrp->rregs->rconfig_lo, JOBR_INTC |
  351. (JOBR_INTC_COUNT_THLD << JRCFG_ICDCT_SHIFT) |
  352. (JOBR_INTC_TIME_THLD << JRCFG_ICTT_SHIFT));
  353. return 0;
  354. }
  355. /*
  356. * Probe routine for each detected JobR subsystem.
  357. */
  358. static int caam_jr_probe(struct platform_device *pdev)
  359. {
  360. struct device *jrdev;
  361. struct device_node *nprop;
  362. struct caam_job_ring __iomem *ctrl;
  363. struct caam_drv_private_jr *jrpriv;
  364. static int total_jobrs;
  365. int error;
  366. jrdev = &pdev->dev;
  367. jrpriv = kmalloc(sizeof(struct caam_drv_private_jr),
  368. GFP_KERNEL);
  369. if (!jrpriv)
  370. return -ENOMEM;
  371. dev_set_drvdata(jrdev, jrpriv);
  372. /* save ring identity relative to detection */
  373. jrpriv->ridx = total_jobrs++;
  374. nprop = pdev->dev.of_node;
  375. /* Get configuration properties from device tree */
  376. /* First, get register page */
  377. ctrl = of_iomap(nprop, 0);
  378. if (!ctrl) {
  379. dev_err(jrdev, "of_iomap() failed\n");
  380. return -ENOMEM;
  381. }
  382. jrpriv->rregs = (struct caam_job_ring __force *)ctrl;
  383. if (sizeof(dma_addr_t) == sizeof(u64))
  384. if (of_device_is_compatible(nprop, "fsl,sec-v5.0-job-ring"))
  385. dma_set_mask(jrdev, DMA_BIT_MASK(40));
  386. else
  387. dma_set_mask(jrdev, DMA_BIT_MASK(36));
  388. else
  389. dma_set_mask(jrdev, DMA_BIT_MASK(32));
  390. /* Identify the interrupt */
  391. jrpriv->irq = irq_of_parse_and_map(nprop, 0);
  392. /* Now do the platform independent part */
  393. error = caam_jr_init(jrdev); /* now turn on hardware */
  394. if (error) {
  395. kfree(jrpriv);
  396. return error;
  397. }
  398. jrpriv->dev = jrdev;
  399. spin_lock(&driver_data.jr_alloc_lock);
  400. list_add_tail(&jrpriv->list_node, &driver_data.jr_list);
  401. spin_unlock(&driver_data.jr_alloc_lock);
  402. atomic_set(&jrpriv->tfm_count, 0);
  403. return 0;
  404. }
  405. static struct of_device_id caam_jr_match[] = {
  406. {
  407. .compatible = "fsl,sec-v4.0-job-ring",
  408. },
  409. {
  410. .compatible = "fsl,sec4.0-job-ring",
  411. },
  412. {},
  413. };
  414. MODULE_DEVICE_TABLE(of, caam_jr_match);
  415. static struct platform_driver caam_jr_driver = {
  416. .driver = {
  417. .name = "caam_jr",
  418. .owner = THIS_MODULE,
  419. .of_match_table = caam_jr_match,
  420. },
  421. .probe = caam_jr_probe,
  422. .remove = caam_jr_remove,
  423. };
  424. static int __init jr_driver_init(void)
  425. {
  426. spin_lock_init(&driver_data.jr_alloc_lock);
  427. INIT_LIST_HEAD(&driver_data.jr_list);
  428. return platform_driver_register(&caam_jr_driver);
  429. }
  430. static void __exit jr_driver_exit(void)
  431. {
  432. platform_driver_unregister(&caam_jr_driver);
  433. }
  434. module_init(jr_driver_init);
  435. module_exit(jr_driver_exit);
  436. MODULE_LICENSE("GPL");
  437. MODULE_DESCRIPTION("FSL CAAM JR request backend");
  438. MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");