anatop.c 2.3 KB

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  1. /*
  2. * Copyright (C) 2013 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. #include <linux/err.h>
  12. #include <linux/io.h>
  13. #include <linux/of.h>
  14. #include <linux/of_address.h>
  15. #include <linux/mfd/syscon.h>
  16. #include <linux/regmap.h>
  17. #define REG_SET 0x4
  18. #define REG_CLR 0x8
  19. #define ANADIG_REG_2P5 0x130
  20. #define ANADIG_REG_CORE 0x140
  21. #define ANADIG_ANA_MISC0 0x150
  22. #define ANADIG_USB1_CHRG_DETECT 0x1b0
  23. #define ANADIG_USB2_CHRG_DETECT 0x210
  24. #define ANADIG_DIGPROG 0x260
  25. #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG 0x40000
  26. #define BM_ANADIG_REG_CORE_FET_ODRIVE 0x20000000
  27. #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG 0x1000
  28. #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x80000
  29. #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x100000
  30. static struct regmap *anatop;
  31. static void imx_anatop_enable_weak2p5(bool enable)
  32. {
  33. u32 reg, val;
  34. regmap_read(anatop, ANADIG_ANA_MISC0, &val);
  35. /* can only be enabled when stop_mode_config is clear. */
  36. reg = ANADIG_REG_2P5;
  37. reg += (enable && (val & BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG) == 0) ?
  38. REG_SET : REG_CLR;
  39. regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG);
  40. }
  41. static void imx_anatop_enable_fet_odrive(bool enable)
  42. {
  43. regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR),
  44. BM_ANADIG_REG_CORE_FET_ODRIVE);
  45. }
  46. void imx_anatop_pre_suspend(void)
  47. {
  48. imx_anatop_enable_weak2p5(true);
  49. imx_anatop_enable_fet_odrive(true);
  50. }
  51. void imx_anatop_post_resume(void)
  52. {
  53. imx_anatop_enable_fet_odrive(false);
  54. imx_anatop_enable_weak2p5(false);
  55. }
  56. void imx_anatop_usb_chrg_detect_disable(void)
  57. {
  58. regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
  59. BM_ANADIG_USB_CHRG_DETECT_EN_B
  60. | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
  61. regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
  62. BM_ANADIG_USB_CHRG_DETECT_EN_B |
  63. BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
  64. }
  65. u32 imx_anatop_get_digprog(void)
  66. {
  67. u32 val;
  68. regmap_read(anatop, ANADIG_DIGPROG, &val);
  69. return val;
  70. }
  71. void __init imx_anatop_init(void)
  72. {
  73. anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
  74. if (IS_ERR(anatop)) {
  75. pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
  76. return;
  77. }
  78. }