qdio_main.c 45 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include "cio.h"
  22. #include "css.h"
  23. #include "device.h"
  24. #include "qdio.h"
  25. #include "qdio_debug.h"
  26. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  27. "Jan Glauber <jang@linux.vnet.ibm.com>");
  28. MODULE_DESCRIPTION("QDIO base support");
  29. MODULE_LICENSE("GPL");
  30. static inline int do_siga_sync(unsigned long schid,
  31. unsigned int out_mask, unsigned int in_mask,
  32. unsigned int fc)
  33. {
  34. register unsigned long __fc asm ("0") = fc;
  35. register unsigned long __schid asm ("1") = schid;
  36. register unsigned long out asm ("2") = out_mask;
  37. register unsigned long in asm ("3") = in_mask;
  38. int cc;
  39. asm volatile(
  40. " siga 0\n"
  41. " ipm %0\n"
  42. " srl %0,28\n"
  43. : "=d" (cc)
  44. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  45. return cc;
  46. }
  47. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  48. unsigned int fc)
  49. {
  50. register unsigned long __fc asm ("0") = fc;
  51. register unsigned long __schid asm ("1") = schid;
  52. register unsigned long __mask asm ("2") = mask;
  53. int cc;
  54. asm volatile(
  55. " siga 0\n"
  56. " ipm %0\n"
  57. " srl %0,28\n"
  58. : "=d" (cc)
  59. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  60. return cc;
  61. }
  62. /**
  63. * do_siga_output - perform SIGA-w/wt function
  64. * @schid: subchannel id or in case of QEBSM the subchannel token
  65. * @mask: which output queues to process
  66. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  67. * @fc: function code to perform
  68. *
  69. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  70. * Note: For IQDC unicast queues only the highest priority queue is processed.
  71. */
  72. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  73. unsigned int *bb, unsigned int fc,
  74. unsigned long aob)
  75. {
  76. register unsigned long __fc asm("0") = fc;
  77. register unsigned long __schid asm("1") = schid;
  78. register unsigned long __mask asm("2") = mask;
  79. register unsigned long __aob asm("3") = aob;
  80. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  81. asm volatile(
  82. " siga 0\n"
  83. "0: ipm %0\n"
  84. " srl %0,28\n"
  85. "1:\n"
  86. EX_TABLE(0b, 1b)
  87. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask),
  88. "+d" (__aob)
  89. : : "cc", "memory");
  90. *bb = ((unsigned int) __fc) >> 31;
  91. return cc;
  92. }
  93. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  94. {
  95. /* all done or next buffer state different */
  96. if (ccq == 0 || ccq == 32)
  97. return 0;
  98. /* no buffer processed */
  99. if (ccq == 97)
  100. return 1;
  101. /* not all buffers processed */
  102. if (ccq == 96)
  103. return 2;
  104. /* notify devices immediately */
  105. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  106. return -EIO;
  107. }
  108. /**
  109. * qdio_do_eqbs - extract buffer states for QEBSM
  110. * @q: queue to manipulate
  111. * @state: state of the extracted buffers
  112. * @start: buffer number to start at
  113. * @count: count of buffers to examine
  114. * @auto_ack: automatically acknowledge buffers
  115. *
  116. * Returns the number of successfully extracted equal buffer states.
  117. * Stops processing if a state is different from the last buffers state.
  118. */
  119. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  120. int start, int count, int auto_ack)
  121. {
  122. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  123. unsigned int ccq = 0;
  124. BUG_ON(!q->irq_ptr->sch_token);
  125. qperf_inc(q, eqbs);
  126. if (!q->is_input_q)
  127. nr += q->irq_ptr->nr_input_qs;
  128. again:
  129. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  130. auto_ack);
  131. rc = qdio_check_ccq(q, ccq);
  132. if (!rc)
  133. return count - tmp_count;
  134. if (rc == 1) {
  135. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  136. goto again;
  137. }
  138. if (rc == 2) {
  139. BUG_ON(tmp_count == count);
  140. qperf_inc(q, eqbs_partial);
  141. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  142. tmp_count);
  143. /*
  144. * Retry once, if that fails bail out and process the
  145. * extracted buffers before trying again.
  146. */
  147. if (!retried++)
  148. goto again;
  149. else
  150. return count - tmp_count;
  151. }
  152. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  153. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  154. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  155. 0, -1, -1, q->irq_ptr->int_parm);
  156. return 0;
  157. }
  158. /**
  159. * qdio_do_sqbs - set buffer states for QEBSM
  160. * @q: queue to manipulate
  161. * @state: new state of the buffers
  162. * @start: first buffer number to change
  163. * @count: how many buffers to change
  164. *
  165. * Returns the number of successfully changed buffers.
  166. * Does retrying until the specified count of buffer states is set or an
  167. * error occurs.
  168. */
  169. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  170. int count)
  171. {
  172. unsigned int ccq = 0;
  173. int tmp_count = count, tmp_start = start;
  174. int nr = q->nr;
  175. int rc;
  176. if (!count)
  177. return 0;
  178. BUG_ON(!q->irq_ptr->sch_token);
  179. qperf_inc(q, sqbs);
  180. if (!q->is_input_q)
  181. nr += q->irq_ptr->nr_input_qs;
  182. again:
  183. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  184. rc = qdio_check_ccq(q, ccq);
  185. if (!rc) {
  186. WARN_ON(tmp_count);
  187. return count - tmp_count;
  188. }
  189. if (rc == 1 || rc == 2) {
  190. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  191. qperf_inc(q, sqbs_partial);
  192. goto again;
  193. }
  194. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  195. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  196. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  197. 0, -1, -1, q->irq_ptr->int_parm);
  198. return 0;
  199. }
  200. /* returns number of examined buffers and their common state in *state */
  201. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  202. unsigned char *state, unsigned int count,
  203. int auto_ack, int merge_pending)
  204. {
  205. unsigned char __state = 0;
  206. int i;
  207. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  208. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  209. if (is_qebsm(q))
  210. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  211. for (i = 0; i < count; i++) {
  212. if (!__state) {
  213. __state = q->slsb.val[bufnr];
  214. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  215. __state = SLSB_P_OUTPUT_EMPTY;
  216. } else if (merge_pending) {
  217. if ((q->slsb.val[bufnr] & __state) != __state)
  218. break;
  219. } else if (q->slsb.val[bufnr] != __state)
  220. break;
  221. bufnr = next_buf(bufnr);
  222. }
  223. *state = __state;
  224. return i;
  225. }
  226. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  227. unsigned char *state, int auto_ack)
  228. {
  229. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  230. }
  231. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  232. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  233. unsigned char state, int count)
  234. {
  235. int i;
  236. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  237. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  238. if (is_qebsm(q))
  239. return qdio_do_sqbs(q, state, bufnr, count);
  240. for (i = 0; i < count; i++) {
  241. xchg(&q->slsb.val[bufnr], state);
  242. bufnr = next_buf(bufnr);
  243. }
  244. return count;
  245. }
  246. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  247. unsigned char state)
  248. {
  249. return set_buf_states(q, bufnr, state, 1);
  250. }
  251. /* set slsb states to initial state */
  252. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  253. {
  254. struct qdio_q *q;
  255. int i;
  256. for_each_input_queue(irq_ptr, q, i)
  257. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  258. QDIO_MAX_BUFFERS_PER_Q);
  259. for_each_output_queue(irq_ptr, q, i)
  260. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  261. QDIO_MAX_BUFFERS_PER_Q);
  262. }
  263. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  264. unsigned int input)
  265. {
  266. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  267. unsigned int fc = QDIO_SIGA_SYNC;
  268. int cc;
  269. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  270. qperf_inc(q, siga_sync);
  271. if (is_qebsm(q)) {
  272. schid = q->irq_ptr->sch_token;
  273. fc |= QDIO_SIGA_QEBSM_FLAG;
  274. }
  275. cc = do_siga_sync(schid, output, input, fc);
  276. if (unlikely(cc))
  277. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  278. return cc;
  279. }
  280. static inline int qdio_siga_sync_q(struct qdio_q *q)
  281. {
  282. if (q->is_input_q)
  283. return qdio_siga_sync(q, 0, q->mask);
  284. else
  285. return qdio_siga_sync(q, q->mask, 0);
  286. }
  287. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  288. unsigned long aob)
  289. {
  290. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  291. unsigned int fc = QDIO_SIGA_WRITE;
  292. u64 start_time = 0;
  293. int retries = 0, cc;
  294. unsigned long laob = 0;
  295. if (q->u.out.use_cq && aob != 0) {
  296. fc = QDIO_SIGA_WRITEQ;
  297. laob = aob;
  298. }
  299. if (is_qebsm(q)) {
  300. schid = q->irq_ptr->sch_token;
  301. fc |= QDIO_SIGA_QEBSM_FLAG;
  302. }
  303. again:
  304. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  305. (aob && fc != QDIO_SIGA_WRITEQ));
  306. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  307. /* hipersocket busy condition */
  308. if (unlikely(*busy_bit)) {
  309. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  310. retries++;
  311. if (!start_time) {
  312. start_time = get_clock();
  313. goto again;
  314. }
  315. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  316. goto again;
  317. }
  318. if (retries) {
  319. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  320. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  321. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  322. }
  323. return cc;
  324. }
  325. static inline int qdio_siga_input(struct qdio_q *q)
  326. {
  327. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  328. unsigned int fc = QDIO_SIGA_READ;
  329. int cc;
  330. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  331. qperf_inc(q, siga_read);
  332. if (is_qebsm(q)) {
  333. schid = q->irq_ptr->sch_token;
  334. fc |= QDIO_SIGA_QEBSM_FLAG;
  335. }
  336. cc = do_siga_input(schid, q->mask, fc);
  337. if (unlikely(cc))
  338. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  339. return cc;
  340. }
  341. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  342. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  343. static inline void qdio_sync_queues(struct qdio_q *q)
  344. {
  345. /* PCI capable outbound queues will also be scanned so sync them too */
  346. if (pci_out_supported(q))
  347. qdio_siga_sync_all(q);
  348. else
  349. qdio_siga_sync_q(q);
  350. }
  351. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  352. unsigned char *state)
  353. {
  354. if (need_siga_sync(q))
  355. qdio_siga_sync_q(q);
  356. return get_buf_states(q, bufnr, state, 1, 0, 0);
  357. }
  358. static inline void qdio_stop_polling(struct qdio_q *q)
  359. {
  360. if (!q->u.in.polling)
  361. return;
  362. q->u.in.polling = 0;
  363. qperf_inc(q, stop_polling);
  364. /* show the card that we are not polling anymore */
  365. if (is_qebsm(q)) {
  366. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  367. q->u.in.ack_count);
  368. q->u.in.ack_count = 0;
  369. } else
  370. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  371. }
  372. static inline void account_sbals(struct qdio_q *q, int count)
  373. {
  374. int pos = 0;
  375. q->q_stats.nr_sbal_total += count;
  376. if (count == QDIO_MAX_BUFFERS_MASK) {
  377. q->q_stats.nr_sbals[7]++;
  378. return;
  379. }
  380. while (count >>= 1)
  381. pos++;
  382. q->q_stats.nr_sbals[pos]++;
  383. }
  384. static void process_buffer_error(struct qdio_q *q, int count)
  385. {
  386. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  387. SLSB_P_OUTPUT_NOT_INIT;
  388. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  389. /* special handling for no target buffer empty */
  390. if ((!q->is_input_q &&
  391. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  392. qperf_inc(q, target_full);
  393. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  394. q->first_to_check);
  395. return;
  396. }
  397. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  398. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  399. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  400. DBF_ERROR("F14:%2x F15:%2x",
  401. q->sbal[q->first_to_check]->element[14].sflags,
  402. q->sbal[q->first_to_check]->element[15].sflags);
  403. /*
  404. * Interrupts may be avoided as long as the error is present
  405. * so change the buffer state immediately to avoid starvation.
  406. */
  407. set_buf_states(q, q->first_to_check, state, count);
  408. }
  409. static inline void inbound_primed(struct qdio_q *q, int count)
  410. {
  411. int new;
  412. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  413. /* for QEBSM the ACK was already set by EQBS */
  414. if (is_qebsm(q)) {
  415. if (!q->u.in.polling) {
  416. q->u.in.polling = 1;
  417. q->u.in.ack_count = count;
  418. q->u.in.ack_start = q->first_to_check;
  419. return;
  420. }
  421. /* delete the previous ACK's */
  422. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  423. q->u.in.ack_count);
  424. q->u.in.ack_count = count;
  425. q->u.in.ack_start = q->first_to_check;
  426. return;
  427. }
  428. /*
  429. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  430. * or by the next inbound run.
  431. */
  432. new = add_buf(q->first_to_check, count - 1);
  433. if (q->u.in.polling) {
  434. /* reset the previous ACK but first set the new one */
  435. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  436. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  437. } else {
  438. q->u.in.polling = 1;
  439. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  440. }
  441. q->u.in.ack_start = new;
  442. count--;
  443. if (!count)
  444. return;
  445. /* need to change ALL buffers to get more interrupts */
  446. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  447. }
  448. static int get_inbound_buffer_frontier(struct qdio_q *q)
  449. {
  450. int count, stop;
  451. unsigned char state = 0;
  452. q->timestamp = get_clock_fast();
  453. /*
  454. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  455. * would return 0.
  456. */
  457. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  458. stop = add_buf(q->first_to_check, count);
  459. if (q->first_to_check == stop)
  460. goto out;
  461. /*
  462. * No siga sync here, as a PCI or we after a thin interrupt
  463. * already sync'ed the queues.
  464. */
  465. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  466. if (!count)
  467. goto out;
  468. switch (state) {
  469. case SLSB_P_INPUT_PRIMED:
  470. inbound_primed(q, count);
  471. q->first_to_check = add_buf(q->first_to_check, count);
  472. if (atomic_sub(count, &q->nr_buf_used) == 0)
  473. qperf_inc(q, inbound_queue_full);
  474. if (q->irq_ptr->perf_stat_enabled)
  475. account_sbals(q, count);
  476. break;
  477. case SLSB_P_INPUT_ERROR:
  478. process_buffer_error(q, count);
  479. q->first_to_check = add_buf(q->first_to_check, count);
  480. atomic_sub(count, &q->nr_buf_used);
  481. if (q->irq_ptr->perf_stat_enabled)
  482. account_sbals_error(q, count);
  483. break;
  484. case SLSB_CU_INPUT_EMPTY:
  485. case SLSB_P_INPUT_NOT_INIT:
  486. case SLSB_P_INPUT_ACK:
  487. if (q->irq_ptr->perf_stat_enabled)
  488. q->q_stats.nr_sbal_nop++;
  489. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  490. break;
  491. default:
  492. BUG();
  493. }
  494. out:
  495. return q->first_to_check;
  496. }
  497. static int qdio_inbound_q_moved(struct qdio_q *q)
  498. {
  499. int bufnr;
  500. bufnr = get_inbound_buffer_frontier(q);
  501. if ((bufnr != q->last_move) || q->qdio_error) {
  502. q->last_move = bufnr;
  503. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  504. q->u.in.timestamp = get_clock();
  505. return 1;
  506. } else
  507. return 0;
  508. }
  509. static inline int qdio_inbound_q_done(struct qdio_q *q)
  510. {
  511. unsigned char state = 0;
  512. if (!atomic_read(&q->nr_buf_used))
  513. return 1;
  514. if (need_siga_sync(q))
  515. qdio_siga_sync_q(q);
  516. get_buf_state(q, q->first_to_check, &state, 0);
  517. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  518. /* more work coming */
  519. return 0;
  520. if (is_thinint_irq(q->irq_ptr))
  521. return 1;
  522. /* don't poll under z/VM */
  523. if (MACHINE_IS_VM)
  524. return 1;
  525. /*
  526. * At this point we know, that inbound first_to_check
  527. * has (probably) not moved (see qdio_inbound_processing).
  528. */
  529. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  530. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  531. q->first_to_check);
  532. return 1;
  533. } else
  534. return 0;
  535. }
  536. static inline int contains_aobs(struct qdio_q *q)
  537. {
  538. return !q->is_input_q && q->u.out.use_cq;
  539. }
  540. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  541. int i, struct qaob *aob)
  542. {
  543. int tmp;
  544. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  545. (unsigned long) virt_to_phys(aob));
  546. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  547. (unsigned long) aob->res0[0]);
  548. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  549. (unsigned long) aob->res0[1]);
  550. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  551. (unsigned long) aob->res0[2]);
  552. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  553. (unsigned long) aob->res0[3]);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  555. (unsigned long) aob->res0[4]);
  556. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  557. (unsigned long) aob->res0[5]);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  559. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  562. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  563. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  564. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  565. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  566. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  567. (unsigned long) aob->sba[tmp]);
  568. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  569. (unsigned long) q->sbal[i]->element[tmp].addr);
  570. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  571. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  572. q->sbal[i]->element[tmp].length);
  573. }
  574. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  575. for (tmp = 0; tmp < 2; ++tmp) {
  576. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  577. (unsigned long) aob->res4[tmp]);
  578. }
  579. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  580. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  581. }
  582. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  583. {
  584. unsigned char state = 0;
  585. int j, b = start;
  586. if (!contains_aobs(q))
  587. return;
  588. for (j = 0; j < count; ++j) {
  589. get_buf_state(q, b, &state, 0);
  590. if (state == SLSB_P_OUTPUT_PENDING) {
  591. struct qaob *aob = q->u.out.aobs[b];
  592. if (aob == NULL)
  593. continue;
  594. BUG_ON(q->u.out.sbal_state == NULL);
  595. q->u.out.sbal_state[b].flags |=
  596. QDIO_OUTBUF_STATE_FLAG_PENDING;
  597. q->u.out.aobs[b] = NULL;
  598. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  599. BUG_ON(q->u.out.sbal_state == NULL);
  600. q->u.out.sbal_state[b].aob = NULL;
  601. }
  602. b = next_buf(b);
  603. }
  604. }
  605. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  606. int bufnr)
  607. {
  608. unsigned long phys_aob = 0;
  609. if (!q->use_cq)
  610. goto out;
  611. if (!q->aobs[bufnr]) {
  612. struct qaob *aob = qdio_allocate_aob();
  613. q->aobs[bufnr] = aob;
  614. }
  615. if (q->aobs[bufnr]) {
  616. BUG_ON(q->sbal_state == NULL);
  617. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  618. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  619. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  620. phys_aob = virt_to_phys(q->aobs[bufnr]);
  621. BUG_ON(phys_aob & 0xFF);
  622. }
  623. out:
  624. return phys_aob;
  625. }
  626. static void qdio_kick_handler(struct qdio_q *q)
  627. {
  628. int start = q->first_to_kick;
  629. int end = q->first_to_check;
  630. int count;
  631. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  632. return;
  633. count = sub_buf(end, start);
  634. if (q->is_input_q) {
  635. qperf_inc(q, inbound_handler);
  636. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  637. } else {
  638. qperf_inc(q, outbound_handler);
  639. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  640. start, count);
  641. }
  642. qdio_handle_aobs(q, start, count);
  643. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  644. q->irq_ptr->int_parm);
  645. /* for the next time */
  646. q->first_to_kick = end;
  647. q->qdio_error = 0;
  648. }
  649. static void __qdio_inbound_processing(struct qdio_q *q)
  650. {
  651. qperf_inc(q, tasklet_inbound);
  652. if (!qdio_inbound_q_moved(q))
  653. return;
  654. qdio_kick_handler(q);
  655. if (!qdio_inbound_q_done(q)) {
  656. /* means poll time is not yet over */
  657. qperf_inc(q, tasklet_inbound_resched);
  658. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  659. tasklet_schedule(&q->tasklet);
  660. return;
  661. }
  662. }
  663. qdio_stop_polling(q);
  664. /*
  665. * We need to check again to not lose initiative after
  666. * resetting the ACK state.
  667. */
  668. if (!qdio_inbound_q_done(q)) {
  669. qperf_inc(q, tasklet_inbound_resched2);
  670. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  671. tasklet_schedule(&q->tasklet);
  672. }
  673. }
  674. void qdio_inbound_processing(unsigned long data)
  675. {
  676. struct qdio_q *q = (struct qdio_q *)data;
  677. __qdio_inbound_processing(q);
  678. }
  679. static int get_outbound_buffer_frontier(struct qdio_q *q)
  680. {
  681. int count, stop;
  682. unsigned char state = 0;
  683. q->timestamp = get_clock_fast();
  684. if (need_siga_sync(q))
  685. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  686. !pci_out_supported(q)) ||
  687. (queue_type(q) == QDIO_IQDIO_QFMT &&
  688. multicast_outbound(q)))
  689. qdio_siga_sync_q(q);
  690. /*
  691. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  692. * would return 0.
  693. */
  694. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  695. stop = add_buf(q->first_to_check, count);
  696. if (q->first_to_check == stop)
  697. goto out;
  698. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  699. if (!count)
  700. goto out;
  701. switch (state) {
  702. case SLSB_P_OUTPUT_PENDING:
  703. BUG();
  704. case SLSB_P_OUTPUT_EMPTY:
  705. /* the adapter got it */
  706. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  707. "out empty:%1d %02x", q->nr, count);
  708. atomic_sub(count, &q->nr_buf_used);
  709. q->first_to_check = add_buf(q->first_to_check, count);
  710. if (q->irq_ptr->perf_stat_enabled)
  711. account_sbals(q, count);
  712. break;
  713. case SLSB_P_OUTPUT_ERROR:
  714. process_buffer_error(q, count);
  715. q->first_to_check = add_buf(q->first_to_check, count);
  716. atomic_sub(count, &q->nr_buf_used);
  717. if (q->irq_ptr->perf_stat_enabled)
  718. account_sbals_error(q, count);
  719. break;
  720. case SLSB_CU_OUTPUT_PRIMED:
  721. /* the adapter has not fetched the output yet */
  722. if (q->irq_ptr->perf_stat_enabled)
  723. q->q_stats.nr_sbal_nop++;
  724. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  725. q->nr);
  726. break;
  727. case SLSB_P_OUTPUT_NOT_INIT:
  728. case SLSB_P_OUTPUT_HALTED:
  729. break;
  730. default:
  731. BUG();
  732. }
  733. out:
  734. return q->first_to_check;
  735. }
  736. /* all buffers processed? */
  737. static inline int qdio_outbound_q_done(struct qdio_q *q)
  738. {
  739. return atomic_read(&q->nr_buf_used) == 0;
  740. }
  741. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  742. {
  743. int bufnr;
  744. bufnr = get_outbound_buffer_frontier(q);
  745. if ((bufnr != q->last_move) || q->qdio_error) {
  746. q->last_move = bufnr;
  747. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  748. return 1;
  749. } else
  750. return 0;
  751. }
  752. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  753. {
  754. int retries = 0, cc;
  755. unsigned int busy_bit;
  756. if (!need_siga_out(q))
  757. return 0;
  758. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  759. retry:
  760. qperf_inc(q, siga_write);
  761. cc = qdio_siga_output(q, &busy_bit, aob);
  762. switch (cc) {
  763. case 0:
  764. break;
  765. case 2:
  766. if (busy_bit) {
  767. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  768. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  769. goto retry;
  770. }
  771. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  772. cc |= QDIO_ERROR_SIGA_BUSY;
  773. } else
  774. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  775. break;
  776. case 1:
  777. case 3:
  778. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  779. break;
  780. }
  781. if (retries) {
  782. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  783. DBF_ERROR("count:%u", retries);
  784. }
  785. return cc;
  786. }
  787. static void __qdio_outbound_processing(struct qdio_q *q)
  788. {
  789. qperf_inc(q, tasklet_outbound);
  790. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  791. if (qdio_outbound_q_moved(q))
  792. qdio_kick_handler(q);
  793. if (queue_type(q) == QDIO_ZFCP_QFMT)
  794. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  795. goto sched;
  796. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  797. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  798. goto sched;
  799. if (q->u.out.pci_out_enabled)
  800. return;
  801. /*
  802. * Now we know that queue type is either qeth without pci enabled
  803. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  804. * is noticed and outbound_handler is called after some time.
  805. */
  806. if (qdio_outbound_q_done(q))
  807. del_timer(&q->u.out.timer);
  808. else
  809. if (!timer_pending(&q->u.out.timer))
  810. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  811. return;
  812. sched:
  813. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  814. return;
  815. tasklet_schedule(&q->tasklet);
  816. }
  817. /* outbound tasklet */
  818. void qdio_outbound_processing(unsigned long data)
  819. {
  820. struct qdio_q *q = (struct qdio_q *)data;
  821. __qdio_outbound_processing(q);
  822. }
  823. void qdio_outbound_timer(unsigned long data)
  824. {
  825. struct qdio_q *q = (struct qdio_q *)data;
  826. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  827. return;
  828. tasklet_schedule(&q->tasklet);
  829. }
  830. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  831. {
  832. struct qdio_q *out;
  833. int i;
  834. if (!pci_out_supported(q))
  835. return;
  836. for_each_output_queue(q->irq_ptr, out, i)
  837. if (!qdio_outbound_q_done(out))
  838. tasklet_schedule(&out->tasklet);
  839. }
  840. static void __tiqdio_inbound_processing(struct qdio_q *q)
  841. {
  842. qperf_inc(q, tasklet_inbound);
  843. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  844. qdio_sync_queues(q);
  845. /*
  846. * The interrupt could be caused by a PCI request. Check the
  847. * PCI capable outbound queues.
  848. */
  849. qdio_check_outbound_after_thinint(q);
  850. if (!qdio_inbound_q_moved(q))
  851. return;
  852. qdio_kick_handler(q);
  853. if (!qdio_inbound_q_done(q)) {
  854. qperf_inc(q, tasklet_inbound_resched);
  855. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  856. tasklet_schedule(&q->tasklet);
  857. return;
  858. }
  859. }
  860. qdio_stop_polling(q);
  861. /*
  862. * We need to check again to not lose initiative after
  863. * resetting the ACK state.
  864. */
  865. if (!qdio_inbound_q_done(q)) {
  866. qperf_inc(q, tasklet_inbound_resched2);
  867. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  868. tasklet_schedule(&q->tasklet);
  869. }
  870. }
  871. void tiqdio_inbound_processing(unsigned long data)
  872. {
  873. struct qdio_q *q = (struct qdio_q *)data;
  874. __tiqdio_inbound_processing(q);
  875. }
  876. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  877. enum qdio_irq_states state)
  878. {
  879. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  880. irq_ptr->state = state;
  881. mb();
  882. }
  883. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  884. {
  885. if (irb->esw.esw0.erw.cons) {
  886. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  887. DBF_ERROR_HEX(irb, 64);
  888. DBF_ERROR_HEX(irb->ecw, 64);
  889. }
  890. }
  891. /* PCI interrupt handler */
  892. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  893. {
  894. int i;
  895. struct qdio_q *q;
  896. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  897. return;
  898. for_each_input_queue(irq_ptr, q, i) {
  899. if (q->u.in.queue_start_poll) {
  900. /* skip if polling is enabled or already in work */
  901. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  902. &q->u.in.queue_irq_state)) {
  903. qperf_inc(q, int_discarded);
  904. continue;
  905. }
  906. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  907. q->irq_ptr->int_parm);
  908. } else {
  909. tasklet_schedule(&q->tasklet);
  910. }
  911. }
  912. if (!pci_out_supported(q))
  913. return;
  914. for_each_output_queue(irq_ptr, q, i) {
  915. if (qdio_outbound_q_done(q))
  916. continue;
  917. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  918. qdio_siga_sync_q(q);
  919. tasklet_schedule(&q->tasklet);
  920. }
  921. }
  922. static void qdio_handle_activate_check(struct ccw_device *cdev,
  923. unsigned long intparm, int cstat, int dstat)
  924. {
  925. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  926. struct qdio_q *q;
  927. int count;
  928. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  929. DBF_ERROR("intp :%lx", intparm);
  930. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  931. if (irq_ptr->nr_input_qs) {
  932. q = irq_ptr->input_qs[0];
  933. } else if (irq_ptr->nr_output_qs) {
  934. q = irq_ptr->output_qs[0];
  935. } else {
  936. dump_stack();
  937. goto no_handler;
  938. }
  939. count = sub_buf(q->first_to_check, q->first_to_kick);
  940. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  941. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  942. no_handler:
  943. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  944. }
  945. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  946. int dstat)
  947. {
  948. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  949. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  950. if (cstat)
  951. goto error;
  952. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  953. goto error;
  954. if (!(dstat & DEV_STAT_DEV_END))
  955. goto error;
  956. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  957. return;
  958. error:
  959. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  960. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  961. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  962. }
  963. /* qdio interrupt handler */
  964. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  965. struct irb *irb)
  966. {
  967. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  968. int cstat, dstat;
  969. if (!intparm || !irq_ptr) {
  970. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  971. return;
  972. }
  973. if (irq_ptr->perf_stat_enabled)
  974. irq_ptr->perf_stat.qdio_int++;
  975. if (IS_ERR(irb)) {
  976. switch (PTR_ERR(irb)) {
  977. case -EIO:
  978. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  979. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  980. wake_up(&cdev->private->wait_q);
  981. return;
  982. default:
  983. WARN_ON(1);
  984. return;
  985. }
  986. }
  987. qdio_irq_check_sense(irq_ptr, irb);
  988. cstat = irb->scsw.cmd.cstat;
  989. dstat = irb->scsw.cmd.dstat;
  990. switch (irq_ptr->state) {
  991. case QDIO_IRQ_STATE_INACTIVE:
  992. qdio_establish_handle_irq(cdev, cstat, dstat);
  993. break;
  994. case QDIO_IRQ_STATE_CLEANUP:
  995. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  996. break;
  997. case QDIO_IRQ_STATE_ESTABLISHED:
  998. case QDIO_IRQ_STATE_ACTIVE:
  999. if (cstat & SCHN_STAT_PCI) {
  1000. qdio_int_handler_pci(irq_ptr);
  1001. return;
  1002. }
  1003. if (cstat || dstat)
  1004. qdio_handle_activate_check(cdev, intparm, cstat,
  1005. dstat);
  1006. break;
  1007. case QDIO_IRQ_STATE_STOPPED:
  1008. break;
  1009. default:
  1010. WARN_ON(1);
  1011. }
  1012. wake_up(&cdev->private->wait_q);
  1013. }
  1014. /**
  1015. * qdio_get_ssqd_desc - get qdio subchannel description
  1016. * @cdev: ccw device to get description for
  1017. * @data: where to store the ssqd
  1018. *
  1019. * Returns 0 or an error code. The results of the chsc are stored in the
  1020. * specified structure.
  1021. */
  1022. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1023. struct qdio_ssqd_desc *data)
  1024. {
  1025. if (!cdev || !cdev->private)
  1026. return -EINVAL;
  1027. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1028. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1029. }
  1030. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1031. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1032. {
  1033. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1034. struct qdio_q *q;
  1035. int i;
  1036. for_each_input_queue(irq_ptr, q, i)
  1037. tasklet_kill(&q->tasklet);
  1038. for_each_output_queue(irq_ptr, q, i) {
  1039. del_timer(&q->u.out.timer);
  1040. tasklet_kill(&q->tasklet);
  1041. }
  1042. }
  1043. /**
  1044. * qdio_shutdown - shut down a qdio subchannel
  1045. * @cdev: associated ccw device
  1046. * @how: use halt or clear to shutdown
  1047. */
  1048. int qdio_shutdown(struct ccw_device *cdev, int how)
  1049. {
  1050. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1051. int rc;
  1052. unsigned long flags;
  1053. if (!irq_ptr)
  1054. return -ENODEV;
  1055. BUG_ON(irqs_disabled());
  1056. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1057. mutex_lock(&irq_ptr->setup_mutex);
  1058. /*
  1059. * Subchannel was already shot down. We cannot prevent being called
  1060. * twice since cio may trigger a shutdown asynchronously.
  1061. */
  1062. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1063. mutex_unlock(&irq_ptr->setup_mutex);
  1064. return 0;
  1065. }
  1066. /*
  1067. * Indicate that the device is going down. Scheduling the queue
  1068. * tasklets is forbidden from here on.
  1069. */
  1070. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1071. tiqdio_remove_input_queues(irq_ptr);
  1072. qdio_shutdown_queues(cdev);
  1073. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1074. /* cleanup subchannel */
  1075. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1076. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1077. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1078. else
  1079. /* default behaviour is halt */
  1080. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1081. if (rc) {
  1082. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1083. DBF_ERROR("rc:%4d", rc);
  1084. goto no_cleanup;
  1085. }
  1086. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1087. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1088. wait_event_interruptible_timeout(cdev->private->wait_q,
  1089. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1090. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1091. 10 * HZ);
  1092. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1093. no_cleanup:
  1094. qdio_shutdown_thinint(irq_ptr);
  1095. /* restore interrupt handler */
  1096. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1097. cdev->handler = irq_ptr->orig_handler;
  1098. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1099. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1100. mutex_unlock(&irq_ptr->setup_mutex);
  1101. if (rc)
  1102. return rc;
  1103. return 0;
  1104. }
  1105. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1106. /**
  1107. * qdio_free - free data structures for a qdio subchannel
  1108. * @cdev: associated ccw device
  1109. */
  1110. int qdio_free(struct ccw_device *cdev)
  1111. {
  1112. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1113. if (!irq_ptr)
  1114. return -ENODEV;
  1115. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1116. mutex_lock(&irq_ptr->setup_mutex);
  1117. if (irq_ptr->debug_area != NULL) {
  1118. debug_unregister(irq_ptr->debug_area);
  1119. irq_ptr->debug_area = NULL;
  1120. }
  1121. cdev->private->qdio_data = NULL;
  1122. mutex_unlock(&irq_ptr->setup_mutex);
  1123. qdio_release_memory(irq_ptr);
  1124. return 0;
  1125. }
  1126. EXPORT_SYMBOL_GPL(qdio_free);
  1127. /**
  1128. * qdio_allocate - allocate qdio queues and associated data
  1129. * @init_data: initialization data
  1130. */
  1131. int qdio_allocate(struct qdio_initialize *init_data)
  1132. {
  1133. struct qdio_irq *irq_ptr;
  1134. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1135. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1136. (init_data->no_output_qs && !init_data->output_handler))
  1137. return -EINVAL;
  1138. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1139. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1140. return -EINVAL;
  1141. if ((!init_data->input_sbal_addr_array) ||
  1142. (!init_data->output_sbal_addr_array))
  1143. return -EINVAL;
  1144. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1145. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1146. if (!irq_ptr)
  1147. goto out_err;
  1148. mutex_init(&irq_ptr->setup_mutex);
  1149. qdio_allocate_dbf(init_data, irq_ptr);
  1150. /*
  1151. * Allocate a page for the chsc calls in qdio_establish.
  1152. * Must be pre-allocated since a zfcp recovery will call
  1153. * qdio_establish. In case of low memory and swap on a zfcp disk
  1154. * we may not be able to allocate memory otherwise.
  1155. */
  1156. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1157. if (!irq_ptr->chsc_page)
  1158. goto out_rel;
  1159. /* qdr is used in ccw1.cda which is u32 */
  1160. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1161. if (!irq_ptr->qdr)
  1162. goto out_rel;
  1163. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1164. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1165. init_data->no_output_qs))
  1166. goto out_rel;
  1167. init_data->cdev->private->qdio_data = irq_ptr;
  1168. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1169. return 0;
  1170. out_rel:
  1171. qdio_release_memory(irq_ptr);
  1172. out_err:
  1173. return -ENOMEM;
  1174. }
  1175. EXPORT_SYMBOL_GPL(qdio_allocate);
  1176. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1177. {
  1178. struct qdio_q *q = irq_ptr->input_qs[0];
  1179. int i, use_cq = 0;
  1180. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1181. use_cq = 1;
  1182. for_each_output_queue(irq_ptr, q, i) {
  1183. if (use_cq) {
  1184. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1185. use_cq = 0;
  1186. continue;
  1187. }
  1188. } else
  1189. qdio_disable_async_operation(&q->u.out);
  1190. }
  1191. DBF_EVENT("use_cq:%d", use_cq);
  1192. }
  1193. /**
  1194. * qdio_establish - establish queues on a qdio subchannel
  1195. * @init_data: initialization data
  1196. */
  1197. int qdio_establish(struct qdio_initialize *init_data)
  1198. {
  1199. struct qdio_irq *irq_ptr;
  1200. struct ccw_device *cdev = init_data->cdev;
  1201. unsigned long saveflags;
  1202. int rc;
  1203. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1204. irq_ptr = cdev->private->qdio_data;
  1205. if (!irq_ptr)
  1206. return -ENODEV;
  1207. if (cdev->private->state != DEV_STATE_ONLINE)
  1208. return -EINVAL;
  1209. mutex_lock(&irq_ptr->setup_mutex);
  1210. qdio_setup_irq(init_data);
  1211. rc = qdio_establish_thinint(irq_ptr);
  1212. if (rc) {
  1213. mutex_unlock(&irq_ptr->setup_mutex);
  1214. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1215. return rc;
  1216. }
  1217. /* establish q */
  1218. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1219. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1220. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1221. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1222. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1223. ccw_device_set_options_mask(cdev, 0);
  1224. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1225. if (rc) {
  1226. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1227. DBF_ERROR("rc:%4x", rc);
  1228. }
  1229. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1230. if (rc) {
  1231. mutex_unlock(&irq_ptr->setup_mutex);
  1232. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1233. return rc;
  1234. }
  1235. wait_event_interruptible_timeout(cdev->private->wait_q,
  1236. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1237. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1238. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1239. mutex_unlock(&irq_ptr->setup_mutex);
  1240. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1241. return -EIO;
  1242. }
  1243. qdio_setup_ssqd_info(irq_ptr);
  1244. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1245. qdio_detect_hsicq(irq_ptr);
  1246. /* qebsm is now setup if available, initialize buffer states */
  1247. qdio_init_buf_states(irq_ptr);
  1248. mutex_unlock(&irq_ptr->setup_mutex);
  1249. qdio_print_subchannel_info(irq_ptr, cdev);
  1250. qdio_setup_debug_entries(irq_ptr, cdev);
  1251. return 0;
  1252. }
  1253. EXPORT_SYMBOL_GPL(qdio_establish);
  1254. /**
  1255. * qdio_activate - activate queues on a qdio subchannel
  1256. * @cdev: associated cdev
  1257. */
  1258. int qdio_activate(struct ccw_device *cdev)
  1259. {
  1260. struct qdio_irq *irq_ptr;
  1261. int rc;
  1262. unsigned long saveflags;
  1263. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1264. irq_ptr = cdev->private->qdio_data;
  1265. if (!irq_ptr)
  1266. return -ENODEV;
  1267. if (cdev->private->state != DEV_STATE_ONLINE)
  1268. return -EINVAL;
  1269. mutex_lock(&irq_ptr->setup_mutex);
  1270. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1271. rc = -EBUSY;
  1272. goto out;
  1273. }
  1274. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1275. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1276. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1277. irq_ptr->ccw.cda = 0;
  1278. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1279. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1280. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1281. 0, DOIO_DENY_PREFETCH);
  1282. if (rc) {
  1283. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1284. DBF_ERROR("rc:%4x", rc);
  1285. }
  1286. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1287. if (rc)
  1288. goto out;
  1289. if (is_thinint_irq(irq_ptr))
  1290. tiqdio_add_input_queues(irq_ptr);
  1291. /* wait for subchannel to become active */
  1292. msleep(5);
  1293. switch (irq_ptr->state) {
  1294. case QDIO_IRQ_STATE_STOPPED:
  1295. case QDIO_IRQ_STATE_ERR:
  1296. rc = -EIO;
  1297. break;
  1298. default:
  1299. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1300. rc = 0;
  1301. }
  1302. out:
  1303. mutex_unlock(&irq_ptr->setup_mutex);
  1304. return rc;
  1305. }
  1306. EXPORT_SYMBOL_GPL(qdio_activate);
  1307. static inline int buf_in_between(int bufnr, int start, int count)
  1308. {
  1309. int end = add_buf(start, count);
  1310. if (end > start) {
  1311. if (bufnr >= start && bufnr < end)
  1312. return 1;
  1313. else
  1314. return 0;
  1315. }
  1316. /* wrap-around case */
  1317. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1318. (bufnr < end))
  1319. return 1;
  1320. else
  1321. return 0;
  1322. }
  1323. /**
  1324. * handle_inbound - reset processed input buffers
  1325. * @q: queue containing the buffers
  1326. * @callflags: flags
  1327. * @bufnr: first buffer to process
  1328. * @count: how many buffers are emptied
  1329. */
  1330. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1331. int bufnr, int count)
  1332. {
  1333. int used, diff;
  1334. qperf_inc(q, inbound_call);
  1335. if (!q->u.in.polling)
  1336. goto set;
  1337. /* protect against stop polling setting an ACK for an emptied slsb */
  1338. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1339. /* overwriting everything, just delete polling status */
  1340. q->u.in.polling = 0;
  1341. q->u.in.ack_count = 0;
  1342. goto set;
  1343. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1344. if (is_qebsm(q)) {
  1345. /* partial overwrite, just update ack_start */
  1346. diff = add_buf(bufnr, count);
  1347. diff = sub_buf(diff, q->u.in.ack_start);
  1348. q->u.in.ack_count -= diff;
  1349. if (q->u.in.ack_count <= 0) {
  1350. q->u.in.polling = 0;
  1351. q->u.in.ack_count = 0;
  1352. goto set;
  1353. }
  1354. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1355. }
  1356. else
  1357. /* the only ACK will be deleted, so stop polling */
  1358. q->u.in.polling = 0;
  1359. }
  1360. set:
  1361. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1362. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1363. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1364. if (need_siga_in(q))
  1365. return qdio_siga_input(q);
  1366. return 0;
  1367. }
  1368. /**
  1369. * handle_outbound - process filled outbound buffers
  1370. * @q: queue containing the buffers
  1371. * @callflags: flags
  1372. * @bufnr: first buffer to process
  1373. * @count: how many buffers are filled
  1374. */
  1375. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1376. int bufnr, int count)
  1377. {
  1378. unsigned char state = 0;
  1379. int used, rc = 0;
  1380. qperf_inc(q, outbound_call);
  1381. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1382. used = atomic_add_return(count, &q->nr_buf_used);
  1383. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1384. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1385. qperf_inc(q, outbound_queue_full);
  1386. if (callflags & QDIO_FLAG_PCI_OUT) {
  1387. q->u.out.pci_out_enabled = 1;
  1388. qperf_inc(q, pci_request_int);
  1389. } else
  1390. q->u.out.pci_out_enabled = 0;
  1391. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1392. unsigned long phys_aob = 0;
  1393. /* One SIGA-W per buffer required for unicast HSI */
  1394. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1395. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1396. rc = qdio_kick_outbound_q(q, phys_aob);
  1397. } else if (need_siga_sync(q)) {
  1398. rc = qdio_siga_sync_q(q);
  1399. } else {
  1400. /* try to fast requeue buffers */
  1401. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1402. if (state != SLSB_CU_OUTPUT_PRIMED)
  1403. rc = qdio_kick_outbound_q(q, 0);
  1404. else
  1405. qperf_inc(q, fast_requeue);
  1406. }
  1407. /* in case of SIGA errors we must process the error immediately */
  1408. if (used >= q->u.out.scan_threshold || rc)
  1409. tasklet_schedule(&q->tasklet);
  1410. else
  1411. /* free the SBALs in case of no further traffic */
  1412. if (!timer_pending(&q->u.out.timer))
  1413. mod_timer(&q->u.out.timer, jiffies + HZ);
  1414. return rc;
  1415. }
  1416. /**
  1417. * do_QDIO - process input or output buffers
  1418. * @cdev: associated ccw_device for the qdio subchannel
  1419. * @callflags: input or output and special flags from the program
  1420. * @q_nr: queue number
  1421. * @bufnr: buffer number
  1422. * @count: how many buffers to process
  1423. */
  1424. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1425. int q_nr, unsigned int bufnr, unsigned int count)
  1426. {
  1427. struct qdio_irq *irq_ptr;
  1428. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1429. return -EINVAL;
  1430. irq_ptr = cdev->private->qdio_data;
  1431. if (!irq_ptr)
  1432. return -ENODEV;
  1433. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1434. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1435. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1436. return -EBUSY;
  1437. if (!count)
  1438. return 0;
  1439. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1440. return handle_inbound(irq_ptr->input_qs[q_nr],
  1441. callflags, bufnr, count);
  1442. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1443. return handle_outbound(irq_ptr->output_qs[q_nr],
  1444. callflags, bufnr, count);
  1445. return -EINVAL;
  1446. }
  1447. EXPORT_SYMBOL_GPL(do_QDIO);
  1448. /**
  1449. * qdio_start_irq - process input buffers
  1450. * @cdev: associated ccw_device for the qdio subchannel
  1451. * @nr: input queue number
  1452. *
  1453. * Return codes
  1454. * 0 - success
  1455. * 1 - irqs not started since new data is available
  1456. */
  1457. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1458. {
  1459. struct qdio_q *q;
  1460. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1461. if (!irq_ptr)
  1462. return -ENODEV;
  1463. q = irq_ptr->input_qs[nr];
  1464. WARN_ON(queue_irqs_enabled(q));
  1465. if (!shared_ind(q))
  1466. xchg(q->irq_ptr->dsci, 0);
  1467. qdio_stop_polling(q);
  1468. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1469. /*
  1470. * We need to check again to not lose initiative after
  1471. * resetting the ACK state.
  1472. */
  1473. if (!shared_ind(q) && *q->irq_ptr->dsci)
  1474. goto rescan;
  1475. if (!qdio_inbound_q_done(q))
  1476. goto rescan;
  1477. return 0;
  1478. rescan:
  1479. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1480. &q->u.in.queue_irq_state))
  1481. return 0;
  1482. else
  1483. return 1;
  1484. }
  1485. EXPORT_SYMBOL(qdio_start_irq);
  1486. /**
  1487. * qdio_get_next_buffers - process input buffers
  1488. * @cdev: associated ccw_device for the qdio subchannel
  1489. * @nr: input queue number
  1490. * @bufnr: first filled buffer number
  1491. * @error: buffers are in error state
  1492. *
  1493. * Return codes
  1494. * < 0 - error
  1495. * = 0 - no new buffers found
  1496. * > 0 - number of processed buffers
  1497. */
  1498. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1499. int *error)
  1500. {
  1501. struct qdio_q *q;
  1502. int start, end;
  1503. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1504. if (!irq_ptr)
  1505. return -ENODEV;
  1506. q = irq_ptr->input_qs[nr];
  1507. WARN_ON(queue_irqs_enabled(q));
  1508. /*
  1509. * Cannot rely on automatic sync after interrupt since queues may
  1510. * also be examined without interrupt.
  1511. */
  1512. if (need_siga_sync(q))
  1513. qdio_sync_queues(q);
  1514. /* check the PCI capable outbound queues. */
  1515. qdio_check_outbound_after_thinint(q);
  1516. if (!qdio_inbound_q_moved(q))
  1517. return 0;
  1518. /* Note: upper-layer MUST stop processing immediately here ... */
  1519. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1520. return -EIO;
  1521. start = q->first_to_kick;
  1522. end = q->first_to_check;
  1523. *bufnr = start;
  1524. *error = q->qdio_error;
  1525. /* for the next time */
  1526. q->first_to_kick = end;
  1527. q->qdio_error = 0;
  1528. return sub_buf(end, start);
  1529. }
  1530. EXPORT_SYMBOL(qdio_get_next_buffers);
  1531. /**
  1532. * qdio_stop_irq - disable interrupt processing for the device
  1533. * @cdev: associated ccw_device for the qdio subchannel
  1534. * @nr: input queue number
  1535. *
  1536. * Return codes
  1537. * 0 - interrupts were already disabled
  1538. * 1 - interrupts successfully disabled
  1539. */
  1540. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1541. {
  1542. struct qdio_q *q;
  1543. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1544. if (!irq_ptr)
  1545. return -ENODEV;
  1546. q = irq_ptr->input_qs[nr];
  1547. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1548. &q->u.in.queue_irq_state))
  1549. return 0;
  1550. else
  1551. return 1;
  1552. }
  1553. EXPORT_SYMBOL(qdio_stop_irq);
  1554. static int __init init_QDIO(void)
  1555. {
  1556. int rc;
  1557. rc = qdio_debug_init();
  1558. if (rc)
  1559. return rc;
  1560. rc = qdio_setup_init();
  1561. if (rc)
  1562. goto out_debug;
  1563. rc = tiqdio_allocate_memory();
  1564. if (rc)
  1565. goto out_cache;
  1566. rc = tiqdio_register_thinints();
  1567. if (rc)
  1568. goto out_ti;
  1569. return 0;
  1570. out_ti:
  1571. tiqdio_free_memory();
  1572. out_cache:
  1573. qdio_setup_exit();
  1574. out_debug:
  1575. qdio_debug_exit();
  1576. return rc;
  1577. }
  1578. static void __exit exit_QDIO(void)
  1579. {
  1580. tiqdio_unregister_thinints();
  1581. tiqdio_free_memory();
  1582. qdio_setup_exit();
  1583. qdio_debug_exit();
  1584. }
  1585. module_init(init_QDIO);
  1586. module_exit(exit_QDIO);