trx.c 27 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../base.h"
  32. #include "reg.h"
  33. #include "def.h"
  34. #include "phy.h"
  35. #include "trx.h"
  36. #include "led.h"
  37. static enum rtl_desc_qsel _rtl92ce_map_hwqueue_to_fwqueue(u16 fc,
  38. unsigned int
  39. skb_queue)
  40. {
  41. enum rtl_desc_qsel qsel;
  42. if (unlikely(ieee80211_is_beacon(fc))) {
  43. qsel = QSLT_BEACON;
  44. return qsel;
  45. }
  46. if (ieee80211_is_mgmt(fc)) {
  47. qsel = QSLT_MGNT;
  48. return qsel;
  49. }
  50. switch (skb_queue) {
  51. case VO_QUEUE:
  52. qsel = QSLT_VO;
  53. break;
  54. case VI_QUEUE:
  55. qsel = QSLT_VI;
  56. break;
  57. case BE_QUEUE:
  58. qsel = QSLT_BE;
  59. break;
  60. case BK_QUEUE:
  61. qsel = QSLT_BK;
  62. break;
  63. default:
  64. qsel = QSLT_BE;
  65. RT_ASSERT(false, ("BE queue, skb_queue:%d,"
  66. " set qsel = 0x%X\n", skb_queue, QSLT_BE));
  67. break;
  68. }
  69. return qsel;
  70. }
  71. static int _rtl92ce_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu)
  72. {
  73. int rate_idx;
  74. if (first_ampdu) {
  75. if (false == isht) {
  76. switch (desc_rate) {
  77. case DESC92C_RATE1M:
  78. rate_idx = 0;
  79. break;
  80. case DESC92C_RATE2M:
  81. rate_idx = 1;
  82. break;
  83. case DESC92C_RATE5_5M:
  84. rate_idx = 2;
  85. break;
  86. case DESC92C_RATE11M:
  87. rate_idx = 3;
  88. break;
  89. case DESC92C_RATE6M:
  90. rate_idx = 4;
  91. break;
  92. case DESC92C_RATE9M:
  93. rate_idx = 5;
  94. break;
  95. case DESC92C_RATE12M:
  96. rate_idx = 6;
  97. break;
  98. case DESC92C_RATE18M:
  99. rate_idx = 7;
  100. break;
  101. case DESC92C_RATE24M:
  102. rate_idx = 8;
  103. break;
  104. case DESC92C_RATE36M:
  105. rate_idx = 9;
  106. break;
  107. case DESC92C_RATE48M:
  108. rate_idx = 10;
  109. break;
  110. case DESC92C_RATE54M:
  111. rate_idx = 11;
  112. break;
  113. default:
  114. rate_idx = 0;
  115. break;
  116. }
  117. } else {
  118. rate_idx = 11;
  119. }
  120. return rate_idx;
  121. }
  122. switch (desc_rate) {
  123. case DESC92C_RATE1M:
  124. rate_idx = 0;
  125. break;
  126. case DESC92C_RATE2M:
  127. rate_idx = 1;
  128. break;
  129. case DESC92C_RATE5_5M:
  130. rate_idx = 2;
  131. break;
  132. case DESC92C_RATE11M:
  133. rate_idx = 3;
  134. break;
  135. case DESC92C_RATE6M:
  136. rate_idx = 4;
  137. break;
  138. case DESC92C_RATE9M:
  139. rate_idx = 5;
  140. break;
  141. case DESC92C_RATE12M:
  142. rate_idx = 6;
  143. break;
  144. case DESC92C_RATE18M:
  145. rate_idx = 7;
  146. break;
  147. case DESC92C_RATE24M:
  148. rate_idx = 8;
  149. break;
  150. case DESC92C_RATE36M:
  151. rate_idx = 9;
  152. break;
  153. case DESC92C_RATE48M:
  154. rate_idx = 10;
  155. break;
  156. case DESC92C_RATE54M:
  157. rate_idx = 11;
  158. break;
  159. default:
  160. rate_idx = 11;
  161. break;
  162. }
  163. return rate_idx;
  164. }
  165. static u8 _rtl92c_query_rxpwrpercentage(char antpower)
  166. {
  167. if ((antpower <= -100) || (antpower >= 20))
  168. return 0;
  169. else if (antpower >= 0)
  170. return 100;
  171. else
  172. return 100 + antpower;
  173. }
  174. static u8 _rtl92c_evm_db_to_percentage(char value)
  175. {
  176. char ret_val;
  177. ret_val = value;
  178. if (ret_val >= 0)
  179. ret_val = 0;
  180. if (ret_val <= -33)
  181. ret_val = -33;
  182. ret_val = 0 - ret_val;
  183. ret_val *= 3;
  184. if (ret_val == 99)
  185. ret_val = 100;
  186. return ret_val;
  187. }
  188. static long _rtl92ce_translate_todbm(struct ieee80211_hw *hw,
  189. u8 signal_strength_index)
  190. {
  191. long signal_power;
  192. signal_power = (long)((signal_strength_index + 1) >> 1);
  193. signal_power -= 95;
  194. return signal_power;
  195. }
  196. static long _rtl92ce_signal_scale_mapping(struct ieee80211_hw *hw,
  197. long currsig)
  198. {
  199. long retsig;
  200. if (currsig >= 61 && currsig <= 100)
  201. retsig = 90 + ((currsig - 60) / 4);
  202. else if (currsig >= 41 && currsig <= 60)
  203. retsig = 78 + ((currsig - 40) / 2);
  204. else if (currsig >= 31 && currsig <= 40)
  205. retsig = 66 + (currsig - 30);
  206. else if (currsig >= 21 && currsig <= 30)
  207. retsig = 54 + (currsig - 20);
  208. else if (currsig >= 5 && currsig <= 20)
  209. retsig = 42 + (((currsig - 5) * 2) / 3);
  210. else if (currsig == 4)
  211. retsig = 36;
  212. else if (currsig == 3)
  213. retsig = 27;
  214. else if (currsig == 2)
  215. retsig = 18;
  216. else if (currsig == 1)
  217. retsig = 9;
  218. else
  219. retsig = currsig;
  220. return retsig;
  221. }
  222. static void _rtl92ce_query_rxphystatus(struct ieee80211_hw *hw,
  223. struct rtl_stats *pstats,
  224. struct rx_desc_92c *pdesc,
  225. struct rx_fwinfo_92c *p_drvinfo,
  226. bool bpacket_match_bssid,
  227. bool bpacket_toself,
  228. bool b_packet_beacon)
  229. {
  230. struct rtl_priv *rtlpriv = rtl_priv(hw);
  231. struct phy_sts_cck_8192s_t *cck_buf;
  232. s8 rx_pwr_all, rx_pwr[4];
  233. u8 rf_rx_num, evm, pwdb_all;
  234. u8 i, max_spatial_stream;
  235. u32 rssi, total_rssi;
  236. bool is_cck_rate;
  237. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  238. pstats->b_packet_matchbssid = bpacket_match_bssid;
  239. pstats->b_packet_toself = bpacket_toself;
  240. pstats->b_is_cck = is_cck_rate;
  241. pstats->b_packet_beacon = b_packet_beacon;
  242. pstats->b_is_cck = is_cck_rate;
  243. pstats->rx_mimo_signalquality[0] = -1;
  244. pstats->rx_mimo_signalquality[1] = -1;
  245. if (is_cck_rate) {
  246. u8 report, cck_highpwr;
  247. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  248. cck_highpwr = (u8) rtl_get_bbreg(hw,
  249. RFPGA0_XA_HSSIPARAMETER2,
  250. BIT(9));
  251. if (!cck_highpwr) {
  252. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  253. report = cck_buf->cck_agc_rpt & 0xc0;
  254. report = report >> 6;
  255. switch (report) {
  256. case 0x3:
  257. rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
  258. break;
  259. case 0x2:
  260. rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
  261. break;
  262. case 0x1:
  263. rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
  264. break;
  265. case 0x0:
  266. rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
  267. break;
  268. }
  269. } else {
  270. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  271. report = p_drvinfo->cfosho[0] & 0x60;
  272. report = report >> 5;
  273. switch (report) {
  274. case 0x3:
  275. rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
  276. break;
  277. case 0x2:
  278. rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
  279. break;
  280. case 0x1:
  281. rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
  282. break;
  283. case 0x0:
  284. rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
  285. break;
  286. }
  287. }
  288. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  289. pstats->rx_pwdb_all = pwdb_all;
  290. pstats->recvsignalpower = rx_pwr_all;
  291. if (bpacket_match_bssid) {
  292. u8 sq;
  293. if (pstats->rx_pwdb_all > 40)
  294. sq = 100;
  295. else {
  296. sq = cck_buf->sq_rpt;
  297. if (sq > 64)
  298. sq = 0;
  299. else if (sq < 20)
  300. sq = 100;
  301. else
  302. sq = ((64 - sq) * 100) / 44;
  303. }
  304. pstats->signalquality = sq;
  305. pstats->rx_mimo_signalquality[0] = sq;
  306. pstats->rx_mimo_signalquality[1] = -1;
  307. }
  308. } else {
  309. rtlpriv->dm.brfpath_rxenable[0] =
  310. rtlpriv->dm.brfpath_rxenable[1] = true;
  311. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  312. if (rtlpriv->dm.brfpath_rxenable[i])
  313. rf_rx_num++;
  314. rx_pwr[i] =
  315. ((p_drvinfo->gain_trsw[i] & 0x3f) * 2) - 110;
  316. rssi = _rtl92c_query_rxpwrpercentage(rx_pwr[i]);
  317. total_rssi += rssi;
  318. rtlpriv->stats.rx_snr_db[i] =
  319. (long)(p_drvinfo->rxsnr[i] / 2);
  320. if (bpacket_match_bssid)
  321. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  322. }
  323. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  324. pwdb_all = _rtl92c_query_rxpwrpercentage(rx_pwr_all);
  325. pstats->rx_pwdb_all = pwdb_all;
  326. pstats->rxpower = rx_pwr_all;
  327. pstats->recvsignalpower = rx_pwr_all;
  328. if (pdesc->rxht && pdesc->rxmcs >= DESC92C_RATEMCS8 &&
  329. pdesc->rxmcs <= DESC92C_RATEMCS15)
  330. max_spatial_stream = 2;
  331. else
  332. max_spatial_stream = 1;
  333. for (i = 0; i < max_spatial_stream; i++) {
  334. evm = _rtl92c_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  335. if (bpacket_match_bssid) {
  336. if (i == 0)
  337. pstats->signalquality =
  338. (u8) (evm & 0xff);
  339. pstats->rx_mimo_signalquality[i] =
  340. (u8) (evm & 0xff);
  341. }
  342. }
  343. }
  344. if (is_cck_rate)
  345. pstats->signalstrength =
  346. (u8) (_rtl92ce_signal_scale_mapping(hw, pwdb_all));
  347. else if (rf_rx_num != 0)
  348. pstats->signalstrength =
  349. (u8) (_rtl92ce_signal_scale_mapping
  350. (hw, total_rssi /= rf_rx_num));
  351. }
  352. static void _rtl92ce_process_ui_rssi(struct ieee80211_hw *hw,
  353. struct rtl_stats *pstats)
  354. {
  355. struct rtl_priv *rtlpriv = rtl_priv(hw);
  356. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  357. u8 rfpath;
  358. u32 last_rssi, tmpval;
  359. if (pstats->b_packet_toself || pstats->b_packet_beacon) {
  360. rtlpriv->stats.rssi_calculate_cnt++;
  361. if (rtlpriv->stats.ui_rssi.total_num++ >=
  362. PHY_RSSI_SLID_WIN_MAX) {
  363. rtlpriv->stats.ui_rssi.total_num =
  364. PHY_RSSI_SLID_WIN_MAX;
  365. last_rssi =
  366. rtlpriv->stats.ui_rssi.elements[rtlpriv->
  367. stats.ui_rssi.index];
  368. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  369. }
  370. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  371. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.
  372. index++] =
  373. pstats->signalstrength;
  374. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  375. rtlpriv->stats.ui_rssi.index = 0;
  376. tmpval = rtlpriv->stats.ui_rssi.total_val /
  377. rtlpriv->stats.ui_rssi.total_num;
  378. rtlpriv->stats.signal_strength =
  379. _rtl92ce_translate_todbm(hw, (u8) tmpval);
  380. pstats->rssi = rtlpriv->stats.signal_strength;
  381. }
  382. if (!pstats->b_is_cck && pstats->b_packet_toself) {
  383. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  384. rfpath++) {
  385. if (!rtl8192_phy_check_is_legal_rfpath(hw, rfpath))
  386. continue;
  387. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  388. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  389. pstats->rx_mimo_signalstrength[rfpath];
  390. }
  391. if (pstats->rx_mimo_signalstrength[rfpath] >
  392. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  393. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  394. ((rtlpriv->stats.
  395. rx_rssi_percentage[rfpath] *
  396. (RX_SMOOTH_FACTOR - 1)) +
  397. (pstats->rx_mimo_signalstrength[rfpath])) /
  398. (RX_SMOOTH_FACTOR);
  399. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  400. rtlpriv->stats.rx_rssi_percentage[rfpath] +
  401. 1;
  402. } else {
  403. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  404. ((rtlpriv->stats.
  405. rx_rssi_percentage[rfpath] *
  406. (RX_SMOOTH_FACTOR - 1)) +
  407. (pstats->rx_mimo_signalstrength[rfpath])) /
  408. (RX_SMOOTH_FACTOR);
  409. }
  410. }
  411. }
  412. }
  413. static void _rtl92ce_update_rxsignalstatistics(struct ieee80211_hw *hw,
  414. struct rtl_stats *pstats)
  415. {
  416. struct rtl_priv *rtlpriv = rtl_priv(hw);
  417. int weighting;
  418. if (rtlpriv->stats.recv_signal_power == 0)
  419. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  420. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  421. weighting = 5;
  422. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  423. weighting = (-5);
  424. rtlpriv->stats.recv_signal_power =
  425. (rtlpriv->stats.recv_signal_power * 5 +
  426. pstats->recvsignalpower + weighting) / 6;
  427. }
  428. static void _rtl92ce_process_pwdb(struct ieee80211_hw *hw,
  429. struct rtl_stats *pstats)
  430. {
  431. struct rtl_priv *rtlpriv = rtl_priv(hw);
  432. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  433. long undecorated_smoothed_pwdb;
  434. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  435. return;
  436. } else {
  437. undecorated_smoothed_pwdb =
  438. rtlpriv->dm.undecorated_smoothed_pwdb;
  439. }
  440. if (pstats->b_packet_toself || pstats->b_packet_beacon) {
  441. if (undecorated_smoothed_pwdb < 0)
  442. undecorated_smoothed_pwdb = pstats->rx_pwdb_all;
  443. if (pstats->rx_pwdb_all > (u32) undecorated_smoothed_pwdb) {
  444. undecorated_smoothed_pwdb =
  445. (((undecorated_smoothed_pwdb) *
  446. (RX_SMOOTH_FACTOR - 1)) +
  447. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  448. undecorated_smoothed_pwdb = undecorated_smoothed_pwdb
  449. + 1;
  450. } else {
  451. undecorated_smoothed_pwdb =
  452. (((undecorated_smoothed_pwdb) *
  453. (RX_SMOOTH_FACTOR - 1)) +
  454. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  455. }
  456. rtlpriv->dm.undecorated_smoothed_pwdb =
  457. undecorated_smoothed_pwdb;
  458. _rtl92ce_update_rxsignalstatistics(hw, pstats);
  459. }
  460. }
  461. static void _rtl92ce_process_ui_link_quality(struct ieee80211_hw *hw,
  462. struct rtl_stats *pstats)
  463. {
  464. struct rtl_priv *rtlpriv = rtl_priv(hw);
  465. u32 last_evm, n_spatialstream, tmpval;
  466. if (pstats->signalquality != 0) {
  467. if (pstats->b_packet_toself || pstats->b_packet_beacon) {
  468. if (rtlpriv->stats.ui_link_quality.total_num++ >=
  469. PHY_LINKQUALITY_SLID_WIN_MAX) {
  470. rtlpriv->stats.ui_link_quality.total_num =
  471. PHY_LINKQUALITY_SLID_WIN_MAX;
  472. last_evm =
  473. rtlpriv->stats.
  474. ui_link_quality.elements[rtlpriv->
  475. stats.ui_link_quality.
  476. index];
  477. rtlpriv->stats.ui_link_quality.total_val -=
  478. last_evm;
  479. }
  480. rtlpriv->stats.ui_link_quality.total_val +=
  481. pstats->signalquality;
  482. rtlpriv->stats.ui_link_quality.elements[rtlpriv->stats.
  483. ui_link_quality.
  484. index++] =
  485. pstats->signalquality;
  486. if (rtlpriv->stats.ui_link_quality.index >=
  487. PHY_LINKQUALITY_SLID_WIN_MAX)
  488. rtlpriv->stats.ui_link_quality.index = 0;
  489. tmpval = rtlpriv->stats.ui_link_quality.total_val /
  490. rtlpriv->stats.ui_link_quality.total_num;
  491. rtlpriv->stats.signal_quality = tmpval;
  492. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  493. for (n_spatialstream = 0; n_spatialstream < 2;
  494. n_spatialstream++) {
  495. if (pstats->
  496. rx_mimo_signalquality[n_spatialstream] !=
  497. -1) {
  498. if (rtlpriv->stats.
  499. rx_evm_percentage[n_spatialstream]
  500. == 0) {
  501. rtlpriv->stats.
  502. rx_evm_percentage
  503. [n_spatialstream] =
  504. pstats->rx_mimo_signalquality
  505. [n_spatialstream];
  506. }
  507. rtlpriv->stats.
  508. rx_evm_percentage[n_spatialstream] =
  509. ((rtlpriv->
  510. stats.rx_evm_percentage
  511. [n_spatialstream] *
  512. (RX_SMOOTH_FACTOR - 1)) +
  513. (pstats->
  514. rx_mimo_signalquality
  515. [n_spatialstream] * 1)) /
  516. (RX_SMOOTH_FACTOR);
  517. }
  518. }
  519. }
  520. } else {
  521. ;
  522. }
  523. }
  524. static void _rtl92ce_process_phyinfo(struct ieee80211_hw *hw,
  525. u8 *buffer,
  526. struct rtl_stats *pcurrent_stats)
  527. {
  528. if (!pcurrent_stats->b_packet_matchbssid &&
  529. !pcurrent_stats->b_packet_beacon)
  530. return;
  531. _rtl92ce_process_ui_rssi(hw, pcurrent_stats);
  532. _rtl92ce_process_pwdb(hw, pcurrent_stats);
  533. _rtl92ce_process_ui_link_quality(hw, pcurrent_stats);
  534. }
  535. static void _rtl92ce_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  536. struct sk_buff *skb,
  537. struct rtl_stats *pstats,
  538. struct rx_desc_92c *pdesc,
  539. struct rx_fwinfo_92c *p_drvinfo)
  540. {
  541. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  542. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  543. struct ieee80211_hdr *hdr;
  544. u8 *tmp_buf;
  545. u8 *praddr;
  546. u8 *psaddr;
  547. u16 fc, type;
  548. bool b_packet_matchbssid, b_packet_toself, b_packet_beacon;
  549. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  550. hdr = (struct ieee80211_hdr *)tmp_buf;
  551. fc = le16_to_cpu(hdr->frame_control);
  552. type = WLAN_FC_GET_TYPE(fc);
  553. praddr = hdr->addr1;
  554. psaddr = hdr->addr2;
  555. b_packet_matchbssid =
  556. ((IEEE80211_FTYPE_CTL != type) &&
  557. (!compare_ether_addr(mac->bssid,
  558. (fc & IEEE80211_FCTL_TODS) ?
  559. hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
  560. hdr->addr2 : hdr->addr3)) &&
  561. (!pstats->b_hwerror) && (!pstats->b_crc) && (!pstats->b_icv));
  562. b_packet_toself = b_packet_matchbssid &&
  563. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  564. if (ieee80211_is_beacon(fc))
  565. b_packet_beacon = true;
  566. _rtl92ce_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  567. b_packet_matchbssid, b_packet_toself,
  568. b_packet_beacon);
  569. _rtl92ce_process_phyinfo(hw, tmp_buf, pstats);
  570. }
  571. bool rtl92ce_rx_query_desc(struct ieee80211_hw *hw,
  572. struct rtl_stats *stats,
  573. struct ieee80211_rx_status *rx_status,
  574. u8 *p_desc, struct sk_buff *skb)
  575. {
  576. struct rx_fwinfo_92c *p_drvinfo;
  577. struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
  578. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  579. stats->length = (u16) GET_RX_DESC_PKT_LEN(pdesc);
  580. stats->rx_drvinfo_size = (u8) GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  581. RX_DRV_INFO_SIZE_UNIT;
  582. stats->rx_bufshift = (u8) (GET_RX_DESC_SHIFT(pdesc) & 0x03);
  583. stats->b_icv = (u16) GET_RX_DESC_ICV(pdesc);
  584. stats->b_crc = (u16) GET_RX_DESC_CRC32(pdesc);
  585. stats->b_hwerror = (stats->b_crc | stats->b_icv);
  586. stats->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  587. stats->rate = (u8) GET_RX_DESC_RXMCS(pdesc);
  588. stats->b_shortpreamble = (u16) GET_RX_DESC_SPLCP(pdesc);
  589. stats->b_isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
  590. stats->b_isampdu = (bool) ((GET_RX_DESC_PAGGR(pdesc) == 1)
  591. && (GET_RX_DESC_FAGGR(pdesc) == 1));
  592. stats->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  593. stats->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
  594. rx_status->freq = hw->conf.channel->center_freq;
  595. rx_status->band = hw->conf.channel->band;
  596. if (GET_RX_DESC_CRC32(pdesc))
  597. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  598. if (!GET_RX_DESC_SWDEC(pdesc))
  599. rx_status->flag |= RX_FLAG_DECRYPTED;
  600. if (GET_RX_DESC_BW(pdesc))
  601. rx_status->flag |= RX_FLAG_40MHZ;
  602. if (GET_RX_DESC_RXHT(pdesc))
  603. rx_status->flag |= RX_FLAG_HT;
  604. rx_status->flag |= RX_FLAG_TSFT;
  605. if (stats->decrypted)
  606. rx_status->flag |= RX_FLAG_DECRYPTED;
  607. rx_status->rate_idx = _rtl92ce_rate_mapping((bool)
  608. GET_RX_DESC_RXHT(pdesc),
  609. (u8)
  610. GET_RX_DESC_RXMCS(pdesc),
  611. (bool)
  612. GET_RX_DESC_PAGGR(pdesc));
  613. rx_status->mactime = GET_RX_DESC_TSFL(pdesc);
  614. if (phystatus == true) {
  615. p_drvinfo = (struct rx_fwinfo_92c *)(skb->data +
  616. stats->rx_bufshift);
  617. _rtl92ce_translate_rx_signal_stuff(hw,
  618. skb, stats, pdesc,
  619. p_drvinfo);
  620. }
  621. /*rx_status->qual = stats->signal; */
  622. rx_status->signal = stats->rssi + 10;
  623. /*rx_status->noise = -stats->noise; */
  624. return true;
  625. }
  626. void rtl92ce_tx_fill_desc(struct ieee80211_hw *hw,
  627. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  628. struct ieee80211_tx_info *info, struct sk_buff *skb,
  629. unsigned int queue_index)
  630. {
  631. struct rtl_priv *rtlpriv = rtl_priv(hw);
  632. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  633. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  634. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  635. bool b_defaultadapter = true;
  636. struct ieee80211_sta *sta = ieee80211_find_sta(mac->vif, mac->bssid);
  637. u8 *pdesc = (u8 *) pdesc_tx;
  638. struct rtl_tcb_desc tcb_desc;
  639. u8 *qc = ieee80211_get_qos_ctl(hdr);
  640. u8 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  641. u16 seq_number;
  642. u16 fc = le16_to_cpu(hdr->frame_control);
  643. u8 rate_flag = info->control.rates[0].flags;
  644. enum rtl_desc_qsel fw_qsel =
  645. _rtl92ce_map_hwqueue_to_fwqueue(le16_to_cpu(hdr->frame_control),
  646. queue_index);
  647. bool b_firstseg = ((hdr->seq_ctrl &
  648. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  649. bool b_lastseg = ((hdr->frame_control &
  650. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  651. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  652. skb->data, skb->len,
  653. PCI_DMA_TODEVICE);
  654. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  655. rtl_get_tcb_desc(hw, info, skb, &tcb_desc);
  656. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_92c));
  657. if (b_firstseg) {
  658. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  659. SET_TX_DESC_TX_RATE(pdesc, tcb_desc.hw_rate);
  660. if (tcb_desc.use_shortgi || tcb_desc.use_shortpreamble)
  661. SET_TX_DESC_DATA_SHORTGI(pdesc, 1);
  662. if (mac->tids[tid].agg.agg_state == RTL_AGG_ON &&
  663. info->flags & IEEE80211_TX_CTL_AMPDU) {
  664. SET_TX_DESC_AGG_BREAK(pdesc, 1);
  665. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  666. }
  667. SET_TX_DESC_SEQ(pdesc, seq_number);
  668. SET_TX_DESC_RTS_ENABLE(pdesc, ((tcb_desc.b_rts_enable &&
  669. !tcb_desc.
  670. b_cts_enable) ? 1 : 0));
  671. SET_TX_DESC_HW_RTS_ENABLE(pdesc,
  672. ((tcb_desc.b_rts_enable
  673. || tcb_desc.b_cts_enable) ? 1 : 0));
  674. SET_TX_DESC_CTS2SELF(pdesc, ((tcb_desc.b_cts_enable) ? 1 : 0));
  675. SET_TX_DESC_RTS_STBC(pdesc, ((tcb_desc.b_rts_stbc) ? 1 : 0));
  676. SET_TX_DESC_RTS_RATE(pdesc, tcb_desc.rts_rate);
  677. SET_TX_DESC_RTS_BW(pdesc, 0);
  678. SET_TX_DESC_RTS_SC(pdesc, tcb_desc.rts_sc);
  679. SET_TX_DESC_RTS_SHORT(pdesc,
  680. ((tcb_desc.rts_rate <= DESC92C_RATE54M) ?
  681. (tcb_desc.b_rts_use_shortpreamble ? 1 : 0)
  682. : (tcb_desc.b_rts_use_shortgi ? 1 : 0)));
  683. if (mac->bw_40) {
  684. if (tcb_desc.b_packet_bw) {
  685. SET_TX_DESC_DATA_BW(pdesc, 1);
  686. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  687. } else {
  688. SET_TX_DESC_DATA_BW(pdesc, 0);
  689. if (rate_flag & IEEE80211_TX_RC_DUP_DATA) {
  690. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  691. mac->cur_40_prime_sc);
  692. }
  693. }
  694. } else {
  695. SET_TX_DESC_DATA_BW(pdesc, 0);
  696. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  697. }
  698. SET_TX_DESC_LINIP(pdesc, 0);
  699. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
  700. if (sta) {
  701. u8 ampdu_density = sta->ht_cap.ampdu_density;
  702. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  703. }
  704. if (info->control.hw_key) {
  705. struct ieee80211_key_conf *keyconf =
  706. info->control.hw_key;
  707. switch (keyconf->cipher) {
  708. case WLAN_CIPHER_SUITE_WEP40:
  709. case WLAN_CIPHER_SUITE_WEP104:
  710. case WLAN_CIPHER_SUITE_TKIP:
  711. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  712. break;
  713. case WLAN_CIPHER_SUITE_CCMP:
  714. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  715. break;
  716. default:
  717. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  718. break;
  719. }
  720. }
  721. SET_TX_DESC_PKT_ID(pdesc, 0);
  722. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  723. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  724. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  725. SET_TX_DESC_DISABLE_FB(pdesc, 0);
  726. SET_TX_DESC_USE_RATE(pdesc, tcb_desc.use_driver_rate ? 1 : 0);
  727. if (ieee80211_is_data_qos(fc)) {
  728. if (mac->rdg_en) {
  729. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  730. ("Enable RDG function.\n"));
  731. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  732. SET_TX_DESC_HTC(pdesc, 1);
  733. }
  734. }
  735. }
  736. SET_TX_DESC_FIRST_SEG(pdesc, (b_firstseg ? 1 : 0));
  737. SET_TX_DESC_LAST_SEG(pdesc, (b_lastseg ? 1 : 0));
  738. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
  739. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
  740. if (rtlpriv->dm.b_useramask) {
  741. SET_TX_DESC_RATE_ID(pdesc, tcb_desc.ratr_index);
  742. SET_TX_DESC_MACID(pdesc, tcb_desc.mac_id);
  743. } else {
  744. SET_TX_DESC_RATE_ID(pdesc, 0xC + tcb_desc.ratr_index);
  745. SET_TX_DESC_MACID(pdesc, tcb_desc.ratr_index);
  746. }
  747. if ((!ieee80211_is_data_qos(fc)) && ppsc->b_leisure_ps &&
  748. ppsc->b_fwctrl_lps) {
  749. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  750. SET_TX_DESC_PKT_ID(pdesc, 8);
  751. if (!b_defaultadapter)
  752. SET_TX_DESC_QOS(pdesc, 1);
  753. }
  754. SET_TX_DESC_MORE_FRAG(pdesc, (b_lastseg ? 0 : 1));
  755. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  756. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  757. SET_TX_DESC_BMC(pdesc, 1);
  758. }
  759. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, ("\n"));
  760. }
  761. void rtl92ce_tx_fill_cmddesc(struct ieee80211_hw *hw,
  762. u8 *pdesc, bool b_firstseg,
  763. bool b_lastseg, struct sk_buff *skb)
  764. {
  765. struct rtl_priv *rtlpriv = rtl_priv(hw);
  766. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  767. u8 fw_queue = QSLT_BEACON;
  768. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  769. skb->data, skb->len,
  770. PCI_DMA_TODEVICE);
  771. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  772. u16 fc = le16_to_cpu(hdr->frame_control);
  773. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  774. if (b_firstseg)
  775. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  776. SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
  777. SET_TX_DESC_SEQ(pdesc, 0);
  778. SET_TX_DESC_LINIP(pdesc, 0);
  779. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  780. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  781. SET_TX_DESC_LAST_SEG(pdesc, 1);
  782. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) (skb->len));
  783. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
  784. SET_TX_DESC_RATE_ID(pdesc, 7);
  785. SET_TX_DESC_MACID(pdesc, 0);
  786. SET_TX_DESC_OWN(pdesc, 1);
  787. SET_TX_DESC_PKT_SIZE((u8 *) pdesc, (u16) (skb->len));
  788. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  789. SET_TX_DESC_LAST_SEG(pdesc, 1);
  790. SET_TX_DESC_OFFSET(pdesc, 0x20);
  791. SET_TX_DESC_USE_RATE(pdesc, 1);
  792. if (!ieee80211_is_data_qos(fc)) {
  793. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  794. SET_TX_DESC_PKT_ID(pdesc, 8);
  795. }
  796. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  797. "H2C Tx Cmd Content\n",
  798. pdesc, TX_DESC_SIZE);
  799. }
  800. void rtl92ce_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
  801. {
  802. if (istx == true) {
  803. switch (desc_name) {
  804. case HW_DESC_OWN:
  805. SET_TX_DESC_OWN(pdesc, 1);
  806. break;
  807. case HW_DESC_TX_NEXTDESC_ADDR:
  808. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  809. break;
  810. default:
  811. RT_ASSERT(false, ("ERR txdesc :%d"
  812. " not process\n", desc_name));
  813. break;
  814. }
  815. } else {
  816. switch (desc_name) {
  817. case HW_DESC_RXOWN:
  818. SET_RX_DESC_OWN(pdesc, 1);
  819. break;
  820. case HW_DESC_RXBUFF_ADDR:
  821. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  822. break;
  823. case HW_DESC_RXPKT_LEN:
  824. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *) val);
  825. break;
  826. case HW_DESC_RXERO:
  827. SET_RX_DESC_EOR(pdesc, 1);
  828. break;
  829. default:
  830. RT_ASSERT(false, ("ERR rxdesc :%d "
  831. "not process\n", desc_name));
  832. break;
  833. }
  834. }
  835. }
  836. u32 rtl92ce_get_desc(u8 *p_desc, bool istx, u8 desc_name)
  837. {
  838. u32 ret = 0;
  839. if (istx == true) {
  840. switch (desc_name) {
  841. case HW_DESC_OWN:
  842. ret = GET_TX_DESC_OWN(p_desc);
  843. break;
  844. case HW_DESC_TXBUFF_ADDR:
  845. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(p_desc);
  846. break;
  847. default:
  848. RT_ASSERT(false, ("ERR txdesc :%d "
  849. "not process\n", desc_name));
  850. break;
  851. }
  852. } else {
  853. struct rx_desc_92c *pdesc = (struct rx_desc_92c *)p_desc;
  854. switch (desc_name) {
  855. case HW_DESC_OWN:
  856. ret = GET_RX_DESC_OWN(pdesc);
  857. break;
  858. case HW_DESC_RXPKT_LEN:
  859. ret = GET_RX_DESC_PKT_LEN(pdesc);
  860. break;
  861. default:
  862. RT_ASSERT(false, ("ERR rxdesc :%d "
  863. "not process\n", desc_name));
  864. break;
  865. }
  866. }
  867. return ret;
  868. }
  869. void rtl92ce_tx_polling(struct ieee80211_hw *hw, unsigned int hw_queue)
  870. {
  871. struct rtl_priv *rtlpriv = rtl_priv(hw);
  872. if (hw_queue == BEACON_QUEUE) {
  873. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  874. } else {
  875. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  876. BIT(0) << (hw_queue));
  877. }
  878. }
  879. bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  880. struct sk_buff *skb)
  881. {
  882. struct rtl_priv *rtlpriv = rtl_priv(hw);
  883. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  884. struct rtl8192_tx_ring *ring;
  885. struct rtl_tx_desc *pdesc;
  886. u8 own;
  887. unsigned long flags;
  888. struct sk_buff *pskb = NULL;
  889. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  890. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  891. pskb = __skb_dequeue(&ring->queue);
  892. if (pskb)
  893. kfree_skb(pskb);
  894. pdesc = &ring->desc[0];
  895. own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc, true, HW_DESC_OWN);
  896. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  897. __skb_queue_tail(&ring->queue, skb);
  898. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  899. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  900. return true;
  901. }