cputable.c 63 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125
  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. struct cpu_spec* cur_cpu_spec = NULL;
  22. EXPORT_SYMBOL(cur_cpu_spec);
  23. /* The platform string corresponding to the real PVR */
  24. const char *powerpc_base_platform;
  25. /* NOTE:
  26. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  27. * the responsibility of the appropriate CPU save/restore functions to
  28. * eventually copy these settings over. Those save/restore aren't yet
  29. * part of the cputable though. That has to be fixed for both ppc32
  30. * and ppc64
  31. */
  32. #ifdef CONFIG_PPC32
  33. extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
  46. extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
  47. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  48. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  49. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  50. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  51. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  53. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  54. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  55. #endif /* CONFIG_PPC32 */
  56. #ifdef CONFIG_PPC64
  57. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  58. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  59. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  60. extern void __restore_cpu_pa6t(void);
  61. extern void __restore_cpu_ppc970(void);
  62. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  63. extern void __restore_cpu_power7(void);
  64. #endif /* CONFIG_PPC64 */
  65. #if defined(CONFIG_E500)
  66. extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
  67. extern void __restore_cpu_e5500(void);
  68. #endif /* CONFIG_E500 */
  69. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  70. * ones as well...
  71. */
  72. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  73. PPC_FEATURE_HAS_MMU)
  74. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  75. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  76. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  77. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  78. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  79. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  80. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  81. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  82. PPC_FEATURE_TRUE_LE | \
  83. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  84. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  85. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  86. PPC_FEATURE_TRUE_LE | \
  87. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  88. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  89. PPC_FEATURE_TRUE_LE | \
  90. PPC_FEATURE_HAS_ALTIVEC_COMP)
  91. #ifdef CONFIG_PPC_BOOK3E_64
  92. #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
  93. #else
  94. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  95. PPC_FEATURE_BOOKE)
  96. #endif
  97. static struct cpu_spec __initdata cpu_specs[] = {
  98. #ifdef CONFIG_PPC_BOOK3S_64
  99. { /* Power3 */
  100. .pvr_mask = 0xffff0000,
  101. .pvr_value = 0x00400000,
  102. .cpu_name = "POWER3 (630)",
  103. .cpu_features = CPU_FTRS_POWER3,
  104. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  105. .mmu_features = MMU_FTR_HPTE_TABLE,
  106. .icache_bsize = 128,
  107. .dcache_bsize = 128,
  108. .num_pmcs = 8,
  109. .pmc_type = PPC_PMC_IBM,
  110. .oprofile_cpu_type = "ppc64/power3",
  111. .oprofile_type = PPC_OPROFILE_RS64,
  112. .machine_check = machine_check_generic,
  113. .platform = "power3",
  114. },
  115. { /* Power3+ */
  116. .pvr_mask = 0xffff0000,
  117. .pvr_value = 0x00410000,
  118. .cpu_name = "POWER3 (630+)",
  119. .cpu_features = CPU_FTRS_POWER3,
  120. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  121. .mmu_features = MMU_FTR_HPTE_TABLE,
  122. .icache_bsize = 128,
  123. .dcache_bsize = 128,
  124. .num_pmcs = 8,
  125. .pmc_type = PPC_PMC_IBM,
  126. .oprofile_cpu_type = "ppc64/power3",
  127. .oprofile_type = PPC_OPROFILE_RS64,
  128. .machine_check = machine_check_generic,
  129. .platform = "power3",
  130. },
  131. { /* Northstar */
  132. .pvr_mask = 0xffff0000,
  133. .pvr_value = 0x00330000,
  134. .cpu_name = "RS64-II (northstar)",
  135. .cpu_features = CPU_FTRS_RS64,
  136. .cpu_user_features = COMMON_USER_PPC64,
  137. .mmu_features = MMU_FTR_HPTE_TABLE,
  138. .icache_bsize = 128,
  139. .dcache_bsize = 128,
  140. .num_pmcs = 8,
  141. .pmc_type = PPC_PMC_IBM,
  142. .oprofile_cpu_type = "ppc64/rs64",
  143. .oprofile_type = PPC_OPROFILE_RS64,
  144. .machine_check = machine_check_generic,
  145. .platform = "rs64",
  146. },
  147. { /* Pulsar */
  148. .pvr_mask = 0xffff0000,
  149. .pvr_value = 0x00340000,
  150. .cpu_name = "RS64-III (pulsar)",
  151. .cpu_features = CPU_FTRS_RS64,
  152. .cpu_user_features = COMMON_USER_PPC64,
  153. .mmu_features = MMU_FTR_HPTE_TABLE,
  154. .icache_bsize = 128,
  155. .dcache_bsize = 128,
  156. .num_pmcs = 8,
  157. .pmc_type = PPC_PMC_IBM,
  158. .oprofile_cpu_type = "ppc64/rs64",
  159. .oprofile_type = PPC_OPROFILE_RS64,
  160. .machine_check = machine_check_generic,
  161. .platform = "rs64",
  162. },
  163. { /* I-star */
  164. .pvr_mask = 0xffff0000,
  165. .pvr_value = 0x00360000,
  166. .cpu_name = "RS64-III (icestar)",
  167. .cpu_features = CPU_FTRS_RS64,
  168. .cpu_user_features = COMMON_USER_PPC64,
  169. .mmu_features = MMU_FTR_HPTE_TABLE,
  170. .icache_bsize = 128,
  171. .dcache_bsize = 128,
  172. .num_pmcs = 8,
  173. .pmc_type = PPC_PMC_IBM,
  174. .oprofile_cpu_type = "ppc64/rs64",
  175. .oprofile_type = PPC_OPROFILE_RS64,
  176. .machine_check = machine_check_generic,
  177. .platform = "rs64",
  178. },
  179. { /* S-star */
  180. .pvr_mask = 0xffff0000,
  181. .pvr_value = 0x00370000,
  182. .cpu_name = "RS64-IV (sstar)",
  183. .cpu_features = CPU_FTRS_RS64,
  184. .cpu_user_features = COMMON_USER_PPC64,
  185. .mmu_features = MMU_FTR_HPTE_TABLE,
  186. .icache_bsize = 128,
  187. .dcache_bsize = 128,
  188. .num_pmcs = 8,
  189. .pmc_type = PPC_PMC_IBM,
  190. .oprofile_cpu_type = "ppc64/rs64",
  191. .oprofile_type = PPC_OPROFILE_RS64,
  192. .machine_check = machine_check_generic,
  193. .platform = "rs64",
  194. },
  195. { /* Power4 */
  196. .pvr_mask = 0xffff0000,
  197. .pvr_value = 0x00350000,
  198. .cpu_name = "POWER4 (gp)",
  199. .cpu_features = CPU_FTRS_POWER4,
  200. .cpu_user_features = COMMON_USER_POWER4,
  201. .mmu_features = MMU_FTR_HPTE_TABLE,
  202. .icache_bsize = 128,
  203. .dcache_bsize = 128,
  204. .num_pmcs = 8,
  205. .pmc_type = PPC_PMC_IBM,
  206. .oprofile_cpu_type = "ppc64/power4",
  207. .oprofile_type = PPC_OPROFILE_POWER4,
  208. .machine_check = machine_check_generic,
  209. .platform = "power4",
  210. },
  211. { /* Power4+ */
  212. .pvr_mask = 0xffff0000,
  213. .pvr_value = 0x00380000,
  214. .cpu_name = "POWER4+ (gq)",
  215. .cpu_features = CPU_FTRS_POWER4,
  216. .cpu_user_features = COMMON_USER_POWER4,
  217. .mmu_features = MMU_FTR_HPTE_TABLE,
  218. .icache_bsize = 128,
  219. .dcache_bsize = 128,
  220. .num_pmcs = 8,
  221. .pmc_type = PPC_PMC_IBM,
  222. .oprofile_cpu_type = "ppc64/power4",
  223. .oprofile_type = PPC_OPROFILE_POWER4,
  224. .machine_check = machine_check_generic,
  225. .platform = "power4",
  226. },
  227. { /* PPC970 */
  228. .pvr_mask = 0xffff0000,
  229. .pvr_value = 0x00390000,
  230. .cpu_name = "PPC970",
  231. .cpu_features = CPU_FTRS_PPC970,
  232. .cpu_user_features = COMMON_USER_POWER4 |
  233. PPC_FEATURE_HAS_ALTIVEC_COMP,
  234. .mmu_features = MMU_FTR_HPTE_TABLE,
  235. .icache_bsize = 128,
  236. .dcache_bsize = 128,
  237. .num_pmcs = 8,
  238. .pmc_type = PPC_PMC_IBM,
  239. .cpu_setup = __setup_cpu_ppc970,
  240. .cpu_restore = __restore_cpu_ppc970,
  241. .oprofile_cpu_type = "ppc64/970",
  242. .oprofile_type = PPC_OPROFILE_POWER4,
  243. .machine_check = machine_check_generic,
  244. .platform = "ppc970",
  245. },
  246. { /* PPC970FX */
  247. .pvr_mask = 0xffff0000,
  248. .pvr_value = 0x003c0000,
  249. .cpu_name = "PPC970FX",
  250. .cpu_features = CPU_FTRS_PPC970,
  251. .cpu_user_features = COMMON_USER_POWER4 |
  252. PPC_FEATURE_HAS_ALTIVEC_COMP,
  253. .mmu_features = MMU_FTR_HPTE_TABLE,
  254. .icache_bsize = 128,
  255. .dcache_bsize = 128,
  256. .num_pmcs = 8,
  257. .pmc_type = PPC_PMC_IBM,
  258. .cpu_setup = __setup_cpu_ppc970,
  259. .cpu_restore = __restore_cpu_ppc970,
  260. .oprofile_cpu_type = "ppc64/970",
  261. .oprofile_type = PPC_OPROFILE_POWER4,
  262. .machine_check = machine_check_generic,
  263. .platform = "ppc970",
  264. },
  265. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  266. .pvr_mask = 0xffffffff,
  267. .pvr_value = 0x00440100,
  268. .cpu_name = "PPC970MP",
  269. .cpu_features = CPU_FTRS_PPC970,
  270. .cpu_user_features = COMMON_USER_POWER4 |
  271. PPC_FEATURE_HAS_ALTIVEC_COMP,
  272. .mmu_features = MMU_FTR_HPTE_TABLE,
  273. .icache_bsize = 128,
  274. .dcache_bsize = 128,
  275. .num_pmcs = 8,
  276. .pmc_type = PPC_PMC_IBM,
  277. .cpu_setup = __setup_cpu_ppc970,
  278. .cpu_restore = __restore_cpu_ppc970,
  279. .oprofile_cpu_type = "ppc64/970MP",
  280. .oprofile_type = PPC_OPROFILE_POWER4,
  281. .machine_check = machine_check_generic,
  282. .platform = "ppc970",
  283. },
  284. { /* PPC970MP */
  285. .pvr_mask = 0xffff0000,
  286. .pvr_value = 0x00440000,
  287. .cpu_name = "PPC970MP",
  288. .cpu_features = CPU_FTRS_PPC970,
  289. .cpu_user_features = COMMON_USER_POWER4 |
  290. PPC_FEATURE_HAS_ALTIVEC_COMP,
  291. .mmu_features = MMU_FTR_HPTE_TABLE,
  292. .icache_bsize = 128,
  293. .dcache_bsize = 128,
  294. .num_pmcs = 8,
  295. .pmc_type = PPC_PMC_IBM,
  296. .cpu_setup = __setup_cpu_ppc970MP,
  297. .cpu_restore = __restore_cpu_ppc970,
  298. .oprofile_cpu_type = "ppc64/970MP",
  299. .oprofile_type = PPC_OPROFILE_POWER4,
  300. .machine_check = machine_check_generic,
  301. .platform = "ppc970",
  302. },
  303. { /* PPC970GX */
  304. .pvr_mask = 0xffff0000,
  305. .pvr_value = 0x00450000,
  306. .cpu_name = "PPC970GX",
  307. .cpu_features = CPU_FTRS_PPC970,
  308. .cpu_user_features = COMMON_USER_POWER4 |
  309. PPC_FEATURE_HAS_ALTIVEC_COMP,
  310. .mmu_features = MMU_FTR_HPTE_TABLE,
  311. .icache_bsize = 128,
  312. .dcache_bsize = 128,
  313. .num_pmcs = 8,
  314. .pmc_type = PPC_PMC_IBM,
  315. .cpu_setup = __setup_cpu_ppc970,
  316. .oprofile_cpu_type = "ppc64/970",
  317. .oprofile_type = PPC_OPROFILE_POWER4,
  318. .machine_check = machine_check_generic,
  319. .platform = "ppc970",
  320. },
  321. { /* Power5 GR */
  322. .pvr_mask = 0xffff0000,
  323. .pvr_value = 0x003a0000,
  324. .cpu_name = "POWER5 (gr)",
  325. .cpu_features = CPU_FTRS_POWER5,
  326. .cpu_user_features = COMMON_USER_POWER5,
  327. .mmu_features = MMU_FTR_HPTE_TABLE,
  328. .icache_bsize = 128,
  329. .dcache_bsize = 128,
  330. .num_pmcs = 6,
  331. .pmc_type = PPC_PMC_IBM,
  332. .oprofile_cpu_type = "ppc64/power5",
  333. .oprofile_type = PPC_OPROFILE_POWER4,
  334. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  335. * and above but only works on POWER5 and above
  336. */
  337. .oprofile_mmcra_sihv = MMCRA_SIHV,
  338. .oprofile_mmcra_sipr = MMCRA_SIPR,
  339. .machine_check = machine_check_generic,
  340. .platform = "power5",
  341. },
  342. { /* Power5++ */
  343. .pvr_mask = 0xffffff00,
  344. .pvr_value = 0x003b0300,
  345. .cpu_name = "POWER5+ (gs)",
  346. .cpu_features = CPU_FTRS_POWER5,
  347. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  348. .mmu_features = MMU_FTR_HPTE_TABLE,
  349. .icache_bsize = 128,
  350. .dcache_bsize = 128,
  351. .num_pmcs = 6,
  352. .oprofile_cpu_type = "ppc64/power5++",
  353. .oprofile_type = PPC_OPROFILE_POWER4,
  354. .oprofile_mmcra_sihv = MMCRA_SIHV,
  355. .oprofile_mmcra_sipr = MMCRA_SIPR,
  356. .machine_check = machine_check_generic,
  357. .platform = "power5+",
  358. },
  359. { /* Power5 GS */
  360. .pvr_mask = 0xffff0000,
  361. .pvr_value = 0x003b0000,
  362. .cpu_name = "POWER5+ (gs)",
  363. .cpu_features = CPU_FTRS_POWER5,
  364. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  365. .mmu_features = MMU_FTR_HPTE_TABLE,
  366. .icache_bsize = 128,
  367. .dcache_bsize = 128,
  368. .num_pmcs = 6,
  369. .pmc_type = PPC_PMC_IBM,
  370. .oprofile_cpu_type = "ppc64/power5+",
  371. .oprofile_type = PPC_OPROFILE_POWER4,
  372. .oprofile_mmcra_sihv = MMCRA_SIHV,
  373. .oprofile_mmcra_sipr = MMCRA_SIPR,
  374. .machine_check = machine_check_generic,
  375. .platform = "power5+",
  376. },
  377. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  378. .pvr_mask = 0xffffffff,
  379. .pvr_value = 0x0f000001,
  380. .cpu_name = "POWER5+",
  381. .cpu_features = CPU_FTRS_POWER5,
  382. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  383. .mmu_features = MMU_FTR_HPTE_TABLE,
  384. .icache_bsize = 128,
  385. .dcache_bsize = 128,
  386. .machine_check = machine_check_generic,
  387. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  388. .oprofile_type = PPC_OPROFILE_POWER4,
  389. .platform = "power5+",
  390. },
  391. { /* Power6 */
  392. .pvr_mask = 0xffff0000,
  393. .pvr_value = 0x003e0000,
  394. .cpu_name = "POWER6 (raw)",
  395. .cpu_features = CPU_FTRS_POWER6,
  396. .cpu_user_features = COMMON_USER_POWER6 |
  397. PPC_FEATURE_POWER6_EXT,
  398. .mmu_features = MMU_FTR_HPTE_TABLE,
  399. .icache_bsize = 128,
  400. .dcache_bsize = 128,
  401. .num_pmcs = 6,
  402. .pmc_type = PPC_PMC_IBM,
  403. .oprofile_cpu_type = "ppc64/power6",
  404. .oprofile_type = PPC_OPROFILE_POWER4,
  405. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  406. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  407. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  408. POWER6_MMCRA_OTHER,
  409. .machine_check = machine_check_generic,
  410. .platform = "power6x",
  411. },
  412. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  413. .pvr_mask = 0xffffffff,
  414. .pvr_value = 0x0f000002,
  415. .cpu_name = "POWER6 (architected)",
  416. .cpu_features = CPU_FTRS_POWER6,
  417. .cpu_user_features = COMMON_USER_POWER6,
  418. .mmu_features = MMU_FTR_HPTE_TABLE,
  419. .icache_bsize = 128,
  420. .dcache_bsize = 128,
  421. .machine_check = machine_check_generic,
  422. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  423. .oprofile_type = PPC_OPROFILE_POWER4,
  424. .platform = "power6",
  425. },
  426. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  427. .pvr_mask = 0xffffffff,
  428. .pvr_value = 0x0f000003,
  429. .cpu_name = "POWER7 (architected)",
  430. .cpu_features = CPU_FTRS_POWER7,
  431. .cpu_user_features = COMMON_USER_POWER7,
  432. .mmu_features = MMU_FTR_HPTE_TABLE |
  433. MMU_FTR_TLBIE_206,
  434. .icache_bsize = 128,
  435. .dcache_bsize = 128,
  436. .machine_check = machine_check_generic,
  437. .oprofile_type = PPC_OPROFILE_POWER4,
  438. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  439. .platform = "power7",
  440. },
  441. { /* Power7 */
  442. .pvr_mask = 0xffff0000,
  443. .pvr_value = 0x003f0000,
  444. .cpu_name = "POWER7 (raw)",
  445. .cpu_features = CPU_FTRS_POWER7,
  446. .cpu_user_features = COMMON_USER_POWER7,
  447. .mmu_features = MMU_FTR_HPTE_TABLE |
  448. MMU_FTR_TLBIE_206,
  449. .icache_bsize = 128,
  450. .dcache_bsize = 128,
  451. .num_pmcs = 6,
  452. .pmc_type = PPC_PMC_IBM,
  453. .oprofile_cpu_type = "ppc64/power7",
  454. .oprofile_type = PPC_OPROFILE_POWER4,
  455. .platform = "power7",
  456. },
  457. { /* Power7+ */
  458. .pvr_mask = 0xffff0000,
  459. .pvr_value = 0x004A0000,
  460. .cpu_name = "POWER7+ (raw)",
  461. .cpu_features = CPU_FTRS_POWER7,
  462. .cpu_user_features = COMMON_USER_POWER7,
  463. .mmu_features = MMU_FTR_HPTE_TABLE |
  464. MMU_FTR_TLBIE_206,
  465. .icache_bsize = 128,
  466. .dcache_bsize = 128,
  467. .num_pmcs = 6,
  468. .pmc_type = PPC_PMC_IBM,
  469. .oprofile_cpu_type = "ppc64/power7",
  470. .oprofile_type = PPC_OPROFILE_POWER4,
  471. .platform = "power7+",
  472. },
  473. { /* Cell Broadband Engine */
  474. .pvr_mask = 0xffff0000,
  475. .pvr_value = 0x00700000,
  476. .cpu_name = "Cell Broadband Engine",
  477. .cpu_features = CPU_FTRS_CELL,
  478. .cpu_user_features = COMMON_USER_PPC64 |
  479. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  480. PPC_FEATURE_SMT,
  481. .mmu_features = MMU_FTR_HPTE_TABLE,
  482. .icache_bsize = 128,
  483. .dcache_bsize = 128,
  484. .num_pmcs = 4,
  485. .pmc_type = PPC_PMC_IBM,
  486. .oprofile_cpu_type = "ppc64/cell-be",
  487. .oprofile_type = PPC_OPROFILE_CELL,
  488. .machine_check = machine_check_generic,
  489. .platform = "ppc-cell-be",
  490. },
  491. { /* PA Semi PA6T */
  492. .pvr_mask = 0x7fff0000,
  493. .pvr_value = 0x00900000,
  494. .cpu_name = "PA6T",
  495. .cpu_features = CPU_FTRS_PA6T,
  496. .cpu_user_features = COMMON_USER_PA6T,
  497. .mmu_features = MMU_FTR_HPTE_TABLE,
  498. .icache_bsize = 64,
  499. .dcache_bsize = 64,
  500. .num_pmcs = 6,
  501. .pmc_type = PPC_PMC_PA6T,
  502. .cpu_setup = __setup_cpu_pa6t,
  503. .cpu_restore = __restore_cpu_pa6t,
  504. .oprofile_cpu_type = "ppc64/pa6t",
  505. .oprofile_type = PPC_OPROFILE_PA6T,
  506. .machine_check = machine_check_generic,
  507. .platform = "pa6t",
  508. },
  509. { /* default match */
  510. .pvr_mask = 0x00000000,
  511. .pvr_value = 0x00000000,
  512. .cpu_name = "POWER4 (compatible)",
  513. .cpu_features = CPU_FTRS_COMPATIBLE,
  514. .cpu_user_features = COMMON_USER_PPC64,
  515. .mmu_features = MMU_FTR_HPTE_TABLE,
  516. .icache_bsize = 128,
  517. .dcache_bsize = 128,
  518. .num_pmcs = 6,
  519. .pmc_type = PPC_PMC_IBM,
  520. .machine_check = machine_check_generic,
  521. .platform = "power4",
  522. }
  523. #endif /* CONFIG_PPC_BOOK3S_64 */
  524. #ifdef CONFIG_PPC32
  525. #if CLASSIC_PPC
  526. { /* 601 */
  527. .pvr_mask = 0xffff0000,
  528. .pvr_value = 0x00010000,
  529. .cpu_name = "601",
  530. .cpu_features = CPU_FTRS_PPC601,
  531. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  532. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  533. .mmu_features = MMU_FTR_HPTE_TABLE,
  534. .icache_bsize = 32,
  535. .dcache_bsize = 32,
  536. .machine_check = machine_check_generic,
  537. .platform = "ppc601",
  538. },
  539. { /* 603 */
  540. .pvr_mask = 0xffff0000,
  541. .pvr_value = 0x00030000,
  542. .cpu_name = "603",
  543. .cpu_features = CPU_FTRS_603,
  544. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  545. .mmu_features = 0,
  546. .icache_bsize = 32,
  547. .dcache_bsize = 32,
  548. .cpu_setup = __setup_cpu_603,
  549. .machine_check = machine_check_generic,
  550. .platform = "ppc603",
  551. },
  552. { /* 603e */
  553. .pvr_mask = 0xffff0000,
  554. .pvr_value = 0x00060000,
  555. .cpu_name = "603e",
  556. .cpu_features = CPU_FTRS_603,
  557. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  558. .mmu_features = 0,
  559. .icache_bsize = 32,
  560. .dcache_bsize = 32,
  561. .cpu_setup = __setup_cpu_603,
  562. .machine_check = machine_check_generic,
  563. .platform = "ppc603",
  564. },
  565. { /* 603ev */
  566. .pvr_mask = 0xffff0000,
  567. .pvr_value = 0x00070000,
  568. .cpu_name = "603ev",
  569. .cpu_features = CPU_FTRS_603,
  570. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  571. .mmu_features = 0,
  572. .icache_bsize = 32,
  573. .dcache_bsize = 32,
  574. .cpu_setup = __setup_cpu_603,
  575. .machine_check = machine_check_generic,
  576. .platform = "ppc603",
  577. },
  578. { /* 604 */
  579. .pvr_mask = 0xffff0000,
  580. .pvr_value = 0x00040000,
  581. .cpu_name = "604",
  582. .cpu_features = CPU_FTRS_604,
  583. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  584. .mmu_features = MMU_FTR_HPTE_TABLE,
  585. .icache_bsize = 32,
  586. .dcache_bsize = 32,
  587. .num_pmcs = 2,
  588. .cpu_setup = __setup_cpu_604,
  589. .machine_check = machine_check_generic,
  590. .platform = "ppc604",
  591. },
  592. { /* 604e */
  593. .pvr_mask = 0xfffff000,
  594. .pvr_value = 0x00090000,
  595. .cpu_name = "604e",
  596. .cpu_features = CPU_FTRS_604,
  597. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  598. .mmu_features = MMU_FTR_HPTE_TABLE,
  599. .icache_bsize = 32,
  600. .dcache_bsize = 32,
  601. .num_pmcs = 4,
  602. .cpu_setup = __setup_cpu_604,
  603. .machine_check = machine_check_generic,
  604. .platform = "ppc604",
  605. },
  606. { /* 604r */
  607. .pvr_mask = 0xffff0000,
  608. .pvr_value = 0x00090000,
  609. .cpu_name = "604r",
  610. .cpu_features = CPU_FTRS_604,
  611. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  612. .mmu_features = MMU_FTR_HPTE_TABLE,
  613. .icache_bsize = 32,
  614. .dcache_bsize = 32,
  615. .num_pmcs = 4,
  616. .cpu_setup = __setup_cpu_604,
  617. .machine_check = machine_check_generic,
  618. .platform = "ppc604",
  619. },
  620. { /* 604ev */
  621. .pvr_mask = 0xffff0000,
  622. .pvr_value = 0x000a0000,
  623. .cpu_name = "604ev",
  624. .cpu_features = CPU_FTRS_604,
  625. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  626. .mmu_features = MMU_FTR_HPTE_TABLE,
  627. .icache_bsize = 32,
  628. .dcache_bsize = 32,
  629. .num_pmcs = 4,
  630. .cpu_setup = __setup_cpu_604,
  631. .machine_check = machine_check_generic,
  632. .platform = "ppc604",
  633. },
  634. { /* 740/750 (0x4202, don't support TAU ?) */
  635. .pvr_mask = 0xffffffff,
  636. .pvr_value = 0x00084202,
  637. .cpu_name = "740/750",
  638. .cpu_features = CPU_FTRS_740_NOTAU,
  639. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  640. .mmu_features = MMU_FTR_HPTE_TABLE,
  641. .icache_bsize = 32,
  642. .dcache_bsize = 32,
  643. .num_pmcs = 4,
  644. .cpu_setup = __setup_cpu_750,
  645. .machine_check = machine_check_generic,
  646. .platform = "ppc750",
  647. },
  648. { /* 750CX (80100 and 8010x?) */
  649. .pvr_mask = 0xfffffff0,
  650. .pvr_value = 0x00080100,
  651. .cpu_name = "750CX",
  652. .cpu_features = CPU_FTRS_750,
  653. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  654. .mmu_features = MMU_FTR_HPTE_TABLE,
  655. .icache_bsize = 32,
  656. .dcache_bsize = 32,
  657. .num_pmcs = 4,
  658. .cpu_setup = __setup_cpu_750cx,
  659. .machine_check = machine_check_generic,
  660. .platform = "ppc750",
  661. },
  662. { /* 750CX (82201 and 82202) */
  663. .pvr_mask = 0xfffffff0,
  664. .pvr_value = 0x00082200,
  665. .cpu_name = "750CX",
  666. .cpu_features = CPU_FTRS_750,
  667. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  668. .mmu_features = MMU_FTR_HPTE_TABLE,
  669. .icache_bsize = 32,
  670. .dcache_bsize = 32,
  671. .num_pmcs = 4,
  672. .pmc_type = PPC_PMC_IBM,
  673. .cpu_setup = __setup_cpu_750cx,
  674. .machine_check = machine_check_generic,
  675. .platform = "ppc750",
  676. },
  677. { /* 750CXe (82214) */
  678. .pvr_mask = 0xfffffff0,
  679. .pvr_value = 0x00082210,
  680. .cpu_name = "750CXe",
  681. .cpu_features = CPU_FTRS_750,
  682. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  683. .mmu_features = MMU_FTR_HPTE_TABLE,
  684. .icache_bsize = 32,
  685. .dcache_bsize = 32,
  686. .num_pmcs = 4,
  687. .pmc_type = PPC_PMC_IBM,
  688. .cpu_setup = __setup_cpu_750cx,
  689. .machine_check = machine_check_generic,
  690. .platform = "ppc750",
  691. },
  692. { /* 750CXe "Gekko" (83214) */
  693. .pvr_mask = 0xffffffff,
  694. .pvr_value = 0x00083214,
  695. .cpu_name = "750CXe",
  696. .cpu_features = CPU_FTRS_750,
  697. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  698. .mmu_features = MMU_FTR_HPTE_TABLE,
  699. .icache_bsize = 32,
  700. .dcache_bsize = 32,
  701. .num_pmcs = 4,
  702. .pmc_type = PPC_PMC_IBM,
  703. .cpu_setup = __setup_cpu_750cx,
  704. .machine_check = machine_check_generic,
  705. .platform = "ppc750",
  706. },
  707. { /* 750CL (and "Broadway") */
  708. .pvr_mask = 0xfffff0e0,
  709. .pvr_value = 0x00087000,
  710. .cpu_name = "750CL",
  711. .cpu_features = CPU_FTRS_750CL,
  712. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  713. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  714. .icache_bsize = 32,
  715. .dcache_bsize = 32,
  716. .num_pmcs = 4,
  717. .pmc_type = PPC_PMC_IBM,
  718. .cpu_setup = __setup_cpu_750,
  719. .machine_check = machine_check_generic,
  720. .platform = "ppc750",
  721. .oprofile_cpu_type = "ppc/750",
  722. .oprofile_type = PPC_OPROFILE_G4,
  723. },
  724. { /* 745/755 */
  725. .pvr_mask = 0xfffff000,
  726. .pvr_value = 0x00083000,
  727. .cpu_name = "745/755",
  728. .cpu_features = CPU_FTRS_750,
  729. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  730. .mmu_features = MMU_FTR_HPTE_TABLE,
  731. .icache_bsize = 32,
  732. .dcache_bsize = 32,
  733. .num_pmcs = 4,
  734. .pmc_type = PPC_PMC_IBM,
  735. .cpu_setup = __setup_cpu_750,
  736. .machine_check = machine_check_generic,
  737. .platform = "ppc750",
  738. },
  739. { /* 750FX rev 1.x */
  740. .pvr_mask = 0xffffff00,
  741. .pvr_value = 0x70000100,
  742. .cpu_name = "750FX",
  743. .cpu_features = CPU_FTRS_750FX1,
  744. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  745. .mmu_features = MMU_FTR_HPTE_TABLE,
  746. .icache_bsize = 32,
  747. .dcache_bsize = 32,
  748. .num_pmcs = 4,
  749. .pmc_type = PPC_PMC_IBM,
  750. .cpu_setup = __setup_cpu_750,
  751. .machine_check = machine_check_generic,
  752. .platform = "ppc750",
  753. .oprofile_cpu_type = "ppc/750",
  754. .oprofile_type = PPC_OPROFILE_G4,
  755. },
  756. { /* 750FX rev 2.0 must disable HID0[DPM] */
  757. .pvr_mask = 0xffffffff,
  758. .pvr_value = 0x70000200,
  759. .cpu_name = "750FX",
  760. .cpu_features = CPU_FTRS_750FX2,
  761. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  762. .mmu_features = MMU_FTR_HPTE_TABLE,
  763. .icache_bsize = 32,
  764. .dcache_bsize = 32,
  765. .num_pmcs = 4,
  766. .pmc_type = PPC_PMC_IBM,
  767. .cpu_setup = __setup_cpu_750,
  768. .machine_check = machine_check_generic,
  769. .platform = "ppc750",
  770. .oprofile_cpu_type = "ppc/750",
  771. .oprofile_type = PPC_OPROFILE_G4,
  772. },
  773. { /* 750FX (All revs except 2.0) */
  774. .pvr_mask = 0xffff0000,
  775. .pvr_value = 0x70000000,
  776. .cpu_name = "750FX",
  777. .cpu_features = CPU_FTRS_750FX,
  778. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  779. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  780. .icache_bsize = 32,
  781. .dcache_bsize = 32,
  782. .num_pmcs = 4,
  783. .pmc_type = PPC_PMC_IBM,
  784. .cpu_setup = __setup_cpu_750fx,
  785. .machine_check = machine_check_generic,
  786. .platform = "ppc750",
  787. .oprofile_cpu_type = "ppc/750",
  788. .oprofile_type = PPC_OPROFILE_G4,
  789. },
  790. { /* 750GX */
  791. .pvr_mask = 0xffff0000,
  792. .pvr_value = 0x70020000,
  793. .cpu_name = "750GX",
  794. .cpu_features = CPU_FTRS_750GX,
  795. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  796. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  797. .icache_bsize = 32,
  798. .dcache_bsize = 32,
  799. .num_pmcs = 4,
  800. .pmc_type = PPC_PMC_IBM,
  801. .cpu_setup = __setup_cpu_750fx,
  802. .machine_check = machine_check_generic,
  803. .platform = "ppc750",
  804. .oprofile_cpu_type = "ppc/750",
  805. .oprofile_type = PPC_OPROFILE_G4,
  806. },
  807. { /* 740/750 (L2CR bit need fixup for 740) */
  808. .pvr_mask = 0xffff0000,
  809. .pvr_value = 0x00080000,
  810. .cpu_name = "740/750",
  811. .cpu_features = CPU_FTRS_740,
  812. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  813. .mmu_features = MMU_FTR_HPTE_TABLE,
  814. .icache_bsize = 32,
  815. .dcache_bsize = 32,
  816. .num_pmcs = 4,
  817. .pmc_type = PPC_PMC_IBM,
  818. .cpu_setup = __setup_cpu_750,
  819. .machine_check = machine_check_generic,
  820. .platform = "ppc750",
  821. },
  822. { /* 7400 rev 1.1 ? (no TAU) */
  823. .pvr_mask = 0xffffffff,
  824. .pvr_value = 0x000c1101,
  825. .cpu_name = "7400 (1.1)",
  826. .cpu_features = CPU_FTRS_7400_NOTAU,
  827. .cpu_user_features = COMMON_USER |
  828. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  829. .mmu_features = MMU_FTR_HPTE_TABLE,
  830. .icache_bsize = 32,
  831. .dcache_bsize = 32,
  832. .num_pmcs = 4,
  833. .pmc_type = PPC_PMC_G4,
  834. .cpu_setup = __setup_cpu_7400,
  835. .machine_check = machine_check_generic,
  836. .platform = "ppc7400",
  837. },
  838. { /* 7400 */
  839. .pvr_mask = 0xffff0000,
  840. .pvr_value = 0x000c0000,
  841. .cpu_name = "7400",
  842. .cpu_features = CPU_FTRS_7400,
  843. .cpu_user_features = COMMON_USER |
  844. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  845. .mmu_features = MMU_FTR_HPTE_TABLE,
  846. .icache_bsize = 32,
  847. .dcache_bsize = 32,
  848. .num_pmcs = 4,
  849. .pmc_type = PPC_PMC_G4,
  850. .cpu_setup = __setup_cpu_7400,
  851. .machine_check = machine_check_generic,
  852. .platform = "ppc7400",
  853. },
  854. { /* 7410 */
  855. .pvr_mask = 0xffff0000,
  856. .pvr_value = 0x800c0000,
  857. .cpu_name = "7410",
  858. .cpu_features = CPU_FTRS_7400,
  859. .cpu_user_features = COMMON_USER |
  860. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  861. .mmu_features = MMU_FTR_HPTE_TABLE,
  862. .icache_bsize = 32,
  863. .dcache_bsize = 32,
  864. .num_pmcs = 4,
  865. .pmc_type = PPC_PMC_G4,
  866. .cpu_setup = __setup_cpu_7410,
  867. .machine_check = machine_check_generic,
  868. .platform = "ppc7400",
  869. },
  870. { /* 7450 2.0 - no doze/nap */
  871. .pvr_mask = 0xffffffff,
  872. .pvr_value = 0x80000200,
  873. .cpu_name = "7450",
  874. .cpu_features = CPU_FTRS_7450_20,
  875. .cpu_user_features = COMMON_USER |
  876. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  877. .mmu_features = MMU_FTR_HPTE_TABLE,
  878. .icache_bsize = 32,
  879. .dcache_bsize = 32,
  880. .num_pmcs = 6,
  881. .pmc_type = PPC_PMC_G4,
  882. .cpu_setup = __setup_cpu_745x,
  883. .oprofile_cpu_type = "ppc/7450",
  884. .oprofile_type = PPC_OPROFILE_G4,
  885. .machine_check = machine_check_generic,
  886. .platform = "ppc7450",
  887. },
  888. { /* 7450 2.1 */
  889. .pvr_mask = 0xffffffff,
  890. .pvr_value = 0x80000201,
  891. .cpu_name = "7450",
  892. .cpu_features = CPU_FTRS_7450_21,
  893. .cpu_user_features = COMMON_USER |
  894. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  895. .mmu_features = MMU_FTR_HPTE_TABLE,
  896. .icache_bsize = 32,
  897. .dcache_bsize = 32,
  898. .num_pmcs = 6,
  899. .pmc_type = PPC_PMC_G4,
  900. .cpu_setup = __setup_cpu_745x,
  901. .oprofile_cpu_type = "ppc/7450",
  902. .oprofile_type = PPC_OPROFILE_G4,
  903. .machine_check = machine_check_generic,
  904. .platform = "ppc7450",
  905. },
  906. { /* 7450 2.3 and newer */
  907. .pvr_mask = 0xffff0000,
  908. .pvr_value = 0x80000000,
  909. .cpu_name = "7450",
  910. .cpu_features = CPU_FTRS_7450_23,
  911. .cpu_user_features = COMMON_USER |
  912. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  913. .mmu_features = MMU_FTR_HPTE_TABLE,
  914. .icache_bsize = 32,
  915. .dcache_bsize = 32,
  916. .num_pmcs = 6,
  917. .pmc_type = PPC_PMC_G4,
  918. .cpu_setup = __setup_cpu_745x,
  919. .oprofile_cpu_type = "ppc/7450",
  920. .oprofile_type = PPC_OPROFILE_G4,
  921. .machine_check = machine_check_generic,
  922. .platform = "ppc7450",
  923. },
  924. { /* 7455 rev 1.x */
  925. .pvr_mask = 0xffffff00,
  926. .pvr_value = 0x80010100,
  927. .cpu_name = "7455",
  928. .cpu_features = CPU_FTRS_7455_1,
  929. .cpu_user_features = COMMON_USER |
  930. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  931. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  932. .icache_bsize = 32,
  933. .dcache_bsize = 32,
  934. .num_pmcs = 6,
  935. .pmc_type = PPC_PMC_G4,
  936. .cpu_setup = __setup_cpu_745x,
  937. .oprofile_cpu_type = "ppc/7450",
  938. .oprofile_type = PPC_OPROFILE_G4,
  939. .machine_check = machine_check_generic,
  940. .platform = "ppc7450",
  941. },
  942. { /* 7455 rev 2.0 */
  943. .pvr_mask = 0xffffffff,
  944. .pvr_value = 0x80010200,
  945. .cpu_name = "7455",
  946. .cpu_features = CPU_FTRS_7455_20,
  947. .cpu_user_features = COMMON_USER |
  948. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  949. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  950. .icache_bsize = 32,
  951. .dcache_bsize = 32,
  952. .num_pmcs = 6,
  953. .pmc_type = PPC_PMC_G4,
  954. .cpu_setup = __setup_cpu_745x,
  955. .oprofile_cpu_type = "ppc/7450",
  956. .oprofile_type = PPC_OPROFILE_G4,
  957. .machine_check = machine_check_generic,
  958. .platform = "ppc7450",
  959. },
  960. { /* 7455 others */
  961. .pvr_mask = 0xffff0000,
  962. .pvr_value = 0x80010000,
  963. .cpu_name = "7455",
  964. .cpu_features = CPU_FTRS_7455,
  965. .cpu_user_features = COMMON_USER |
  966. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  967. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  968. .icache_bsize = 32,
  969. .dcache_bsize = 32,
  970. .num_pmcs = 6,
  971. .pmc_type = PPC_PMC_G4,
  972. .cpu_setup = __setup_cpu_745x,
  973. .oprofile_cpu_type = "ppc/7450",
  974. .oprofile_type = PPC_OPROFILE_G4,
  975. .machine_check = machine_check_generic,
  976. .platform = "ppc7450",
  977. },
  978. { /* 7447/7457 Rev 1.0 */
  979. .pvr_mask = 0xffffffff,
  980. .pvr_value = 0x80020100,
  981. .cpu_name = "7447/7457",
  982. .cpu_features = CPU_FTRS_7447_10,
  983. .cpu_user_features = COMMON_USER |
  984. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  985. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  986. .icache_bsize = 32,
  987. .dcache_bsize = 32,
  988. .num_pmcs = 6,
  989. .pmc_type = PPC_PMC_G4,
  990. .cpu_setup = __setup_cpu_745x,
  991. .oprofile_cpu_type = "ppc/7450",
  992. .oprofile_type = PPC_OPROFILE_G4,
  993. .machine_check = machine_check_generic,
  994. .platform = "ppc7450",
  995. },
  996. { /* 7447/7457 Rev 1.1 */
  997. .pvr_mask = 0xffffffff,
  998. .pvr_value = 0x80020101,
  999. .cpu_name = "7447/7457",
  1000. .cpu_features = CPU_FTRS_7447_10,
  1001. .cpu_user_features = COMMON_USER |
  1002. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1003. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1004. .icache_bsize = 32,
  1005. .dcache_bsize = 32,
  1006. .num_pmcs = 6,
  1007. .pmc_type = PPC_PMC_G4,
  1008. .cpu_setup = __setup_cpu_745x,
  1009. .oprofile_cpu_type = "ppc/7450",
  1010. .oprofile_type = PPC_OPROFILE_G4,
  1011. .machine_check = machine_check_generic,
  1012. .platform = "ppc7450",
  1013. },
  1014. { /* 7447/7457 Rev 1.2 and later */
  1015. .pvr_mask = 0xffff0000,
  1016. .pvr_value = 0x80020000,
  1017. .cpu_name = "7447/7457",
  1018. .cpu_features = CPU_FTRS_7447,
  1019. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1020. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1021. .icache_bsize = 32,
  1022. .dcache_bsize = 32,
  1023. .num_pmcs = 6,
  1024. .pmc_type = PPC_PMC_G4,
  1025. .cpu_setup = __setup_cpu_745x,
  1026. .oprofile_cpu_type = "ppc/7450",
  1027. .oprofile_type = PPC_OPROFILE_G4,
  1028. .machine_check = machine_check_generic,
  1029. .platform = "ppc7450",
  1030. },
  1031. { /* 7447A */
  1032. .pvr_mask = 0xffff0000,
  1033. .pvr_value = 0x80030000,
  1034. .cpu_name = "7447A",
  1035. .cpu_features = CPU_FTRS_7447A,
  1036. .cpu_user_features = COMMON_USER |
  1037. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1038. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1039. .icache_bsize = 32,
  1040. .dcache_bsize = 32,
  1041. .num_pmcs = 6,
  1042. .pmc_type = PPC_PMC_G4,
  1043. .cpu_setup = __setup_cpu_745x,
  1044. .oprofile_cpu_type = "ppc/7450",
  1045. .oprofile_type = PPC_OPROFILE_G4,
  1046. .machine_check = machine_check_generic,
  1047. .platform = "ppc7450",
  1048. },
  1049. { /* 7448 */
  1050. .pvr_mask = 0xffff0000,
  1051. .pvr_value = 0x80040000,
  1052. .cpu_name = "7448",
  1053. .cpu_features = CPU_FTRS_7448,
  1054. .cpu_user_features = COMMON_USER |
  1055. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1056. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1057. .icache_bsize = 32,
  1058. .dcache_bsize = 32,
  1059. .num_pmcs = 6,
  1060. .pmc_type = PPC_PMC_G4,
  1061. .cpu_setup = __setup_cpu_745x,
  1062. .oprofile_cpu_type = "ppc/7450",
  1063. .oprofile_type = PPC_OPROFILE_G4,
  1064. .machine_check = machine_check_generic,
  1065. .platform = "ppc7450",
  1066. },
  1067. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1068. .pvr_mask = 0x7fff0000,
  1069. .pvr_value = 0x00810000,
  1070. .cpu_name = "82xx",
  1071. .cpu_features = CPU_FTRS_82XX,
  1072. .cpu_user_features = COMMON_USER,
  1073. .mmu_features = 0,
  1074. .icache_bsize = 32,
  1075. .dcache_bsize = 32,
  1076. .cpu_setup = __setup_cpu_603,
  1077. .machine_check = machine_check_generic,
  1078. .platform = "ppc603",
  1079. },
  1080. { /* All G2_LE (603e core, plus some) have the same pvr */
  1081. .pvr_mask = 0x7fff0000,
  1082. .pvr_value = 0x00820000,
  1083. .cpu_name = "G2_LE",
  1084. .cpu_features = CPU_FTRS_G2_LE,
  1085. .cpu_user_features = COMMON_USER,
  1086. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1087. .icache_bsize = 32,
  1088. .dcache_bsize = 32,
  1089. .cpu_setup = __setup_cpu_603,
  1090. .machine_check = machine_check_generic,
  1091. .platform = "ppc603",
  1092. },
  1093. { /* e300c1 (a 603e core, plus some) on 83xx */
  1094. .pvr_mask = 0x7fff0000,
  1095. .pvr_value = 0x00830000,
  1096. .cpu_name = "e300c1",
  1097. .cpu_features = CPU_FTRS_E300,
  1098. .cpu_user_features = COMMON_USER,
  1099. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1100. .icache_bsize = 32,
  1101. .dcache_bsize = 32,
  1102. .cpu_setup = __setup_cpu_603,
  1103. .machine_check = machine_check_generic,
  1104. .platform = "ppc603",
  1105. },
  1106. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1107. .pvr_mask = 0x7fff0000,
  1108. .pvr_value = 0x00840000,
  1109. .cpu_name = "e300c2",
  1110. .cpu_features = CPU_FTRS_E300C2,
  1111. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1112. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1113. MMU_FTR_NEED_DTLB_SW_LRU,
  1114. .icache_bsize = 32,
  1115. .dcache_bsize = 32,
  1116. .cpu_setup = __setup_cpu_603,
  1117. .machine_check = machine_check_generic,
  1118. .platform = "ppc603",
  1119. },
  1120. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1121. .pvr_mask = 0x7fff0000,
  1122. .pvr_value = 0x00850000,
  1123. .cpu_name = "e300c3",
  1124. .cpu_features = CPU_FTRS_E300,
  1125. .cpu_user_features = COMMON_USER,
  1126. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1127. MMU_FTR_NEED_DTLB_SW_LRU,
  1128. .icache_bsize = 32,
  1129. .dcache_bsize = 32,
  1130. .cpu_setup = __setup_cpu_603,
  1131. .num_pmcs = 4,
  1132. .oprofile_cpu_type = "ppc/e300",
  1133. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1134. .platform = "ppc603",
  1135. },
  1136. { /* e300c4 (e300c1, plus one IU) */
  1137. .pvr_mask = 0x7fff0000,
  1138. .pvr_value = 0x00860000,
  1139. .cpu_name = "e300c4",
  1140. .cpu_features = CPU_FTRS_E300,
  1141. .cpu_user_features = COMMON_USER,
  1142. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1143. MMU_FTR_NEED_DTLB_SW_LRU,
  1144. .icache_bsize = 32,
  1145. .dcache_bsize = 32,
  1146. .cpu_setup = __setup_cpu_603,
  1147. .machine_check = machine_check_generic,
  1148. .num_pmcs = 4,
  1149. .oprofile_cpu_type = "ppc/e300",
  1150. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1151. .platform = "ppc603",
  1152. },
  1153. { /* default match, we assume split I/D cache & TB (non-601)... */
  1154. .pvr_mask = 0x00000000,
  1155. .pvr_value = 0x00000000,
  1156. .cpu_name = "(generic PPC)",
  1157. .cpu_features = CPU_FTRS_CLASSIC32,
  1158. .cpu_user_features = COMMON_USER,
  1159. .mmu_features = MMU_FTR_HPTE_TABLE,
  1160. .icache_bsize = 32,
  1161. .dcache_bsize = 32,
  1162. .machine_check = machine_check_generic,
  1163. .platform = "ppc603",
  1164. },
  1165. #endif /* CLASSIC_PPC */
  1166. #ifdef CONFIG_8xx
  1167. { /* 8xx */
  1168. .pvr_mask = 0xffff0000,
  1169. .pvr_value = 0x00500000,
  1170. .cpu_name = "8xx",
  1171. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1172. * if the 8xx code is there.... */
  1173. .cpu_features = CPU_FTRS_8XX,
  1174. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1175. .mmu_features = MMU_FTR_TYPE_8xx,
  1176. .icache_bsize = 16,
  1177. .dcache_bsize = 16,
  1178. .platform = "ppc823",
  1179. },
  1180. #endif /* CONFIG_8xx */
  1181. #ifdef CONFIG_40x
  1182. { /* 403GC */
  1183. .pvr_mask = 0xffffff00,
  1184. .pvr_value = 0x00200200,
  1185. .cpu_name = "403GC",
  1186. .cpu_features = CPU_FTRS_40X,
  1187. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1188. .mmu_features = MMU_FTR_TYPE_40x,
  1189. .icache_bsize = 16,
  1190. .dcache_bsize = 16,
  1191. .machine_check = machine_check_4xx,
  1192. .platform = "ppc403",
  1193. },
  1194. { /* 403GCX */
  1195. .pvr_mask = 0xffffff00,
  1196. .pvr_value = 0x00201400,
  1197. .cpu_name = "403GCX",
  1198. .cpu_features = CPU_FTRS_40X,
  1199. .cpu_user_features = PPC_FEATURE_32 |
  1200. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1201. .mmu_features = MMU_FTR_TYPE_40x,
  1202. .icache_bsize = 16,
  1203. .dcache_bsize = 16,
  1204. .machine_check = machine_check_4xx,
  1205. .platform = "ppc403",
  1206. },
  1207. { /* 403G ?? */
  1208. .pvr_mask = 0xffff0000,
  1209. .pvr_value = 0x00200000,
  1210. .cpu_name = "403G ??",
  1211. .cpu_features = CPU_FTRS_40X,
  1212. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1213. .mmu_features = MMU_FTR_TYPE_40x,
  1214. .icache_bsize = 16,
  1215. .dcache_bsize = 16,
  1216. .machine_check = machine_check_4xx,
  1217. .platform = "ppc403",
  1218. },
  1219. { /* 405GP */
  1220. .pvr_mask = 0xffff0000,
  1221. .pvr_value = 0x40110000,
  1222. .cpu_name = "405GP",
  1223. .cpu_features = CPU_FTRS_40X,
  1224. .cpu_user_features = PPC_FEATURE_32 |
  1225. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1226. .mmu_features = MMU_FTR_TYPE_40x,
  1227. .icache_bsize = 32,
  1228. .dcache_bsize = 32,
  1229. .machine_check = machine_check_4xx,
  1230. .platform = "ppc405",
  1231. },
  1232. { /* STB 03xxx */
  1233. .pvr_mask = 0xffff0000,
  1234. .pvr_value = 0x40130000,
  1235. .cpu_name = "STB03xxx",
  1236. .cpu_features = CPU_FTRS_40X,
  1237. .cpu_user_features = PPC_FEATURE_32 |
  1238. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1239. .mmu_features = MMU_FTR_TYPE_40x,
  1240. .icache_bsize = 32,
  1241. .dcache_bsize = 32,
  1242. .machine_check = machine_check_4xx,
  1243. .platform = "ppc405",
  1244. },
  1245. { /* STB 04xxx */
  1246. .pvr_mask = 0xffff0000,
  1247. .pvr_value = 0x41810000,
  1248. .cpu_name = "STB04xxx",
  1249. .cpu_features = CPU_FTRS_40X,
  1250. .cpu_user_features = PPC_FEATURE_32 |
  1251. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1252. .mmu_features = MMU_FTR_TYPE_40x,
  1253. .icache_bsize = 32,
  1254. .dcache_bsize = 32,
  1255. .machine_check = machine_check_4xx,
  1256. .platform = "ppc405",
  1257. },
  1258. { /* NP405L */
  1259. .pvr_mask = 0xffff0000,
  1260. .pvr_value = 0x41610000,
  1261. .cpu_name = "NP405L",
  1262. .cpu_features = CPU_FTRS_40X,
  1263. .cpu_user_features = PPC_FEATURE_32 |
  1264. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1265. .mmu_features = MMU_FTR_TYPE_40x,
  1266. .icache_bsize = 32,
  1267. .dcache_bsize = 32,
  1268. .machine_check = machine_check_4xx,
  1269. .platform = "ppc405",
  1270. },
  1271. { /* NP4GS3 */
  1272. .pvr_mask = 0xffff0000,
  1273. .pvr_value = 0x40B10000,
  1274. .cpu_name = "NP4GS3",
  1275. .cpu_features = CPU_FTRS_40X,
  1276. .cpu_user_features = PPC_FEATURE_32 |
  1277. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1278. .mmu_features = MMU_FTR_TYPE_40x,
  1279. .icache_bsize = 32,
  1280. .dcache_bsize = 32,
  1281. .machine_check = machine_check_4xx,
  1282. .platform = "ppc405",
  1283. },
  1284. { /* NP405H */
  1285. .pvr_mask = 0xffff0000,
  1286. .pvr_value = 0x41410000,
  1287. .cpu_name = "NP405H",
  1288. .cpu_features = CPU_FTRS_40X,
  1289. .cpu_user_features = PPC_FEATURE_32 |
  1290. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1291. .mmu_features = MMU_FTR_TYPE_40x,
  1292. .icache_bsize = 32,
  1293. .dcache_bsize = 32,
  1294. .machine_check = machine_check_4xx,
  1295. .platform = "ppc405",
  1296. },
  1297. { /* 405GPr */
  1298. .pvr_mask = 0xffff0000,
  1299. .pvr_value = 0x50910000,
  1300. .cpu_name = "405GPr",
  1301. .cpu_features = CPU_FTRS_40X,
  1302. .cpu_user_features = PPC_FEATURE_32 |
  1303. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1304. .mmu_features = MMU_FTR_TYPE_40x,
  1305. .icache_bsize = 32,
  1306. .dcache_bsize = 32,
  1307. .machine_check = machine_check_4xx,
  1308. .platform = "ppc405",
  1309. },
  1310. { /* STBx25xx */
  1311. .pvr_mask = 0xffff0000,
  1312. .pvr_value = 0x51510000,
  1313. .cpu_name = "STBx25xx",
  1314. .cpu_features = CPU_FTRS_40X,
  1315. .cpu_user_features = PPC_FEATURE_32 |
  1316. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1317. .mmu_features = MMU_FTR_TYPE_40x,
  1318. .icache_bsize = 32,
  1319. .dcache_bsize = 32,
  1320. .machine_check = machine_check_4xx,
  1321. .platform = "ppc405",
  1322. },
  1323. { /* 405LP */
  1324. .pvr_mask = 0xffff0000,
  1325. .pvr_value = 0x41F10000,
  1326. .cpu_name = "405LP",
  1327. .cpu_features = CPU_FTRS_40X,
  1328. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1329. .mmu_features = MMU_FTR_TYPE_40x,
  1330. .icache_bsize = 32,
  1331. .dcache_bsize = 32,
  1332. .machine_check = machine_check_4xx,
  1333. .platform = "ppc405",
  1334. },
  1335. { /* Xilinx Virtex-II Pro */
  1336. .pvr_mask = 0xfffff000,
  1337. .pvr_value = 0x20010000,
  1338. .cpu_name = "Virtex-II Pro",
  1339. .cpu_features = CPU_FTRS_40X,
  1340. .cpu_user_features = PPC_FEATURE_32 |
  1341. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1342. .mmu_features = MMU_FTR_TYPE_40x,
  1343. .icache_bsize = 32,
  1344. .dcache_bsize = 32,
  1345. .machine_check = machine_check_4xx,
  1346. .platform = "ppc405",
  1347. },
  1348. { /* Xilinx Virtex-4 FX */
  1349. .pvr_mask = 0xfffff000,
  1350. .pvr_value = 0x20011000,
  1351. .cpu_name = "Virtex-4 FX",
  1352. .cpu_features = CPU_FTRS_40X,
  1353. .cpu_user_features = PPC_FEATURE_32 |
  1354. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1355. .mmu_features = MMU_FTR_TYPE_40x,
  1356. .icache_bsize = 32,
  1357. .dcache_bsize = 32,
  1358. .machine_check = machine_check_4xx,
  1359. .platform = "ppc405",
  1360. },
  1361. { /* 405EP */
  1362. .pvr_mask = 0xffff0000,
  1363. .pvr_value = 0x51210000,
  1364. .cpu_name = "405EP",
  1365. .cpu_features = CPU_FTRS_40X,
  1366. .cpu_user_features = PPC_FEATURE_32 |
  1367. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1368. .mmu_features = MMU_FTR_TYPE_40x,
  1369. .icache_bsize = 32,
  1370. .dcache_bsize = 32,
  1371. .machine_check = machine_check_4xx,
  1372. .platform = "ppc405",
  1373. },
  1374. { /* 405EX Rev. A/B with Security */
  1375. .pvr_mask = 0xffff000f,
  1376. .pvr_value = 0x12910007,
  1377. .cpu_name = "405EX Rev. A/B",
  1378. .cpu_features = CPU_FTRS_40X,
  1379. .cpu_user_features = PPC_FEATURE_32 |
  1380. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1381. .mmu_features = MMU_FTR_TYPE_40x,
  1382. .icache_bsize = 32,
  1383. .dcache_bsize = 32,
  1384. .machine_check = machine_check_4xx,
  1385. .platform = "ppc405",
  1386. },
  1387. { /* 405EX Rev. C without Security */
  1388. .pvr_mask = 0xffff000f,
  1389. .pvr_value = 0x1291000d,
  1390. .cpu_name = "405EX Rev. C",
  1391. .cpu_features = CPU_FTRS_40X,
  1392. .cpu_user_features = PPC_FEATURE_32 |
  1393. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1394. .mmu_features = MMU_FTR_TYPE_40x,
  1395. .icache_bsize = 32,
  1396. .dcache_bsize = 32,
  1397. .machine_check = machine_check_4xx,
  1398. .platform = "ppc405",
  1399. },
  1400. { /* 405EX Rev. C with Security */
  1401. .pvr_mask = 0xffff000f,
  1402. .pvr_value = 0x1291000f,
  1403. .cpu_name = "405EX Rev. C",
  1404. .cpu_features = CPU_FTRS_40X,
  1405. .cpu_user_features = PPC_FEATURE_32 |
  1406. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1407. .mmu_features = MMU_FTR_TYPE_40x,
  1408. .icache_bsize = 32,
  1409. .dcache_bsize = 32,
  1410. .machine_check = machine_check_4xx,
  1411. .platform = "ppc405",
  1412. },
  1413. { /* 405EX Rev. D without Security */
  1414. .pvr_mask = 0xffff000f,
  1415. .pvr_value = 0x12910003,
  1416. .cpu_name = "405EX Rev. D",
  1417. .cpu_features = CPU_FTRS_40X,
  1418. .cpu_user_features = PPC_FEATURE_32 |
  1419. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1420. .mmu_features = MMU_FTR_TYPE_40x,
  1421. .icache_bsize = 32,
  1422. .dcache_bsize = 32,
  1423. .machine_check = machine_check_4xx,
  1424. .platform = "ppc405",
  1425. },
  1426. { /* 405EX Rev. D with Security */
  1427. .pvr_mask = 0xffff000f,
  1428. .pvr_value = 0x12910005,
  1429. .cpu_name = "405EX Rev. D",
  1430. .cpu_features = CPU_FTRS_40X,
  1431. .cpu_user_features = PPC_FEATURE_32 |
  1432. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1433. .mmu_features = MMU_FTR_TYPE_40x,
  1434. .icache_bsize = 32,
  1435. .dcache_bsize = 32,
  1436. .machine_check = machine_check_4xx,
  1437. .platform = "ppc405",
  1438. },
  1439. { /* 405EXr Rev. A/B without Security */
  1440. .pvr_mask = 0xffff000f,
  1441. .pvr_value = 0x12910001,
  1442. .cpu_name = "405EXr Rev. A/B",
  1443. .cpu_features = CPU_FTRS_40X,
  1444. .cpu_user_features = PPC_FEATURE_32 |
  1445. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1446. .mmu_features = MMU_FTR_TYPE_40x,
  1447. .icache_bsize = 32,
  1448. .dcache_bsize = 32,
  1449. .machine_check = machine_check_4xx,
  1450. .platform = "ppc405",
  1451. },
  1452. { /* 405EXr Rev. C without Security */
  1453. .pvr_mask = 0xffff000f,
  1454. .pvr_value = 0x12910009,
  1455. .cpu_name = "405EXr Rev. C",
  1456. .cpu_features = CPU_FTRS_40X,
  1457. .cpu_user_features = PPC_FEATURE_32 |
  1458. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1459. .mmu_features = MMU_FTR_TYPE_40x,
  1460. .icache_bsize = 32,
  1461. .dcache_bsize = 32,
  1462. .machine_check = machine_check_4xx,
  1463. .platform = "ppc405",
  1464. },
  1465. { /* 405EXr Rev. C with Security */
  1466. .pvr_mask = 0xffff000f,
  1467. .pvr_value = 0x1291000b,
  1468. .cpu_name = "405EXr Rev. C",
  1469. .cpu_features = CPU_FTRS_40X,
  1470. .cpu_user_features = PPC_FEATURE_32 |
  1471. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1472. .mmu_features = MMU_FTR_TYPE_40x,
  1473. .icache_bsize = 32,
  1474. .dcache_bsize = 32,
  1475. .machine_check = machine_check_4xx,
  1476. .platform = "ppc405",
  1477. },
  1478. { /* 405EXr Rev. D without Security */
  1479. .pvr_mask = 0xffff000f,
  1480. .pvr_value = 0x12910000,
  1481. .cpu_name = "405EXr Rev. D",
  1482. .cpu_features = CPU_FTRS_40X,
  1483. .cpu_user_features = PPC_FEATURE_32 |
  1484. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1485. .mmu_features = MMU_FTR_TYPE_40x,
  1486. .icache_bsize = 32,
  1487. .dcache_bsize = 32,
  1488. .machine_check = machine_check_4xx,
  1489. .platform = "ppc405",
  1490. },
  1491. { /* 405EXr Rev. D with Security */
  1492. .pvr_mask = 0xffff000f,
  1493. .pvr_value = 0x12910002,
  1494. .cpu_name = "405EXr Rev. D",
  1495. .cpu_features = CPU_FTRS_40X,
  1496. .cpu_user_features = PPC_FEATURE_32 |
  1497. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1498. .mmu_features = MMU_FTR_TYPE_40x,
  1499. .icache_bsize = 32,
  1500. .dcache_bsize = 32,
  1501. .machine_check = machine_check_4xx,
  1502. .platform = "ppc405",
  1503. },
  1504. {
  1505. /* 405EZ */
  1506. .pvr_mask = 0xffff0000,
  1507. .pvr_value = 0x41510000,
  1508. .cpu_name = "405EZ",
  1509. .cpu_features = CPU_FTRS_40X,
  1510. .cpu_user_features = PPC_FEATURE_32 |
  1511. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1512. .mmu_features = MMU_FTR_TYPE_40x,
  1513. .icache_bsize = 32,
  1514. .dcache_bsize = 32,
  1515. .machine_check = machine_check_4xx,
  1516. .platform = "ppc405",
  1517. },
  1518. { /* default match */
  1519. .pvr_mask = 0x00000000,
  1520. .pvr_value = 0x00000000,
  1521. .cpu_name = "(generic 40x PPC)",
  1522. .cpu_features = CPU_FTRS_40X,
  1523. .cpu_user_features = PPC_FEATURE_32 |
  1524. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1525. .mmu_features = MMU_FTR_TYPE_40x,
  1526. .icache_bsize = 32,
  1527. .dcache_bsize = 32,
  1528. .machine_check = machine_check_4xx,
  1529. .platform = "ppc405",
  1530. }
  1531. #endif /* CONFIG_40x */
  1532. #ifdef CONFIG_44x
  1533. {
  1534. .pvr_mask = 0xf0000fff,
  1535. .pvr_value = 0x40000850,
  1536. .cpu_name = "440GR Rev. A",
  1537. .cpu_features = CPU_FTRS_44X,
  1538. .cpu_user_features = COMMON_USER_BOOKE,
  1539. .mmu_features = MMU_FTR_TYPE_44x,
  1540. .icache_bsize = 32,
  1541. .dcache_bsize = 32,
  1542. .machine_check = machine_check_4xx,
  1543. .platform = "ppc440",
  1544. },
  1545. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1546. .pvr_mask = 0xf0000fff,
  1547. .pvr_value = 0x40000858,
  1548. .cpu_name = "440EP Rev. A",
  1549. .cpu_features = CPU_FTRS_44X,
  1550. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1551. .mmu_features = MMU_FTR_TYPE_44x,
  1552. .icache_bsize = 32,
  1553. .dcache_bsize = 32,
  1554. .cpu_setup = __setup_cpu_440ep,
  1555. .machine_check = machine_check_4xx,
  1556. .platform = "ppc440",
  1557. },
  1558. {
  1559. .pvr_mask = 0xf0000fff,
  1560. .pvr_value = 0x400008d3,
  1561. .cpu_name = "440GR Rev. B",
  1562. .cpu_features = CPU_FTRS_44X,
  1563. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1564. .mmu_features = MMU_FTR_TYPE_44x,
  1565. .icache_bsize = 32,
  1566. .dcache_bsize = 32,
  1567. .machine_check = machine_check_4xx,
  1568. .platform = "ppc440",
  1569. },
  1570. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1571. .pvr_mask = 0xf0000ff7,
  1572. .pvr_value = 0x400008d4,
  1573. .cpu_name = "440EP Rev. C",
  1574. .cpu_features = CPU_FTRS_44X,
  1575. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1576. .mmu_features = MMU_FTR_TYPE_44x,
  1577. .icache_bsize = 32,
  1578. .dcache_bsize = 32,
  1579. .cpu_setup = __setup_cpu_440ep,
  1580. .machine_check = machine_check_4xx,
  1581. .platform = "ppc440",
  1582. },
  1583. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1584. .pvr_mask = 0xf0000fff,
  1585. .pvr_value = 0x400008db,
  1586. .cpu_name = "440EP Rev. B",
  1587. .cpu_features = CPU_FTRS_44X,
  1588. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1589. .mmu_features = MMU_FTR_TYPE_44x,
  1590. .icache_bsize = 32,
  1591. .dcache_bsize = 32,
  1592. .cpu_setup = __setup_cpu_440ep,
  1593. .machine_check = machine_check_4xx,
  1594. .platform = "ppc440",
  1595. },
  1596. { /* 440GRX */
  1597. .pvr_mask = 0xf0000ffb,
  1598. .pvr_value = 0x200008D0,
  1599. .cpu_name = "440GRX",
  1600. .cpu_features = CPU_FTRS_44X,
  1601. .cpu_user_features = COMMON_USER_BOOKE,
  1602. .mmu_features = MMU_FTR_TYPE_44x,
  1603. .icache_bsize = 32,
  1604. .dcache_bsize = 32,
  1605. .cpu_setup = __setup_cpu_440grx,
  1606. .machine_check = machine_check_440A,
  1607. .platform = "ppc440",
  1608. },
  1609. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1610. .pvr_mask = 0xf0000ffb,
  1611. .pvr_value = 0x200008D8,
  1612. .cpu_name = "440EPX",
  1613. .cpu_features = CPU_FTRS_44X,
  1614. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1615. .mmu_features = MMU_FTR_TYPE_44x,
  1616. .icache_bsize = 32,
  1617. .dcache_bsize = 32,
  1618. .cpu_setup = __setup_cpu_440epx,
  1619. .machine_check = machine_check_440A,
  1620. .platform = "ppc440",
  1621. },
  1622. { /* 440GP Rev. B */
  1623. .pvr_mask = 0xf0000fff,
  1624. .pvr_value = 0x40000440,
  1625. .cpu_name = "440GP Rev. B",
  1626. .cpu_features = CPU_FTRS_44X,
  1627. .cpu_user_features = COMMON_USER_BOOKE,
  1628. .mmu_features = MMU_FTR_TYPE_44x,
  1629. .icache_bsize = 32,
  1630. .dcache_bsize = 32,
  1631. .machine_check = machine_check_4xx,
  1632. .platform = "ppc440gp",
  1633. },
  1634. { /* 440GP Rev. C */
  1635. .pvr_mask = 0xf0000fff,
  1636. .pvr_value = 0x40000481,
  1637. .cpu_name = "440GP Rev. C",
  1638. .cpu_features = CPU_FTRS_44X,
  1639. .cpu_user_features = COMMON_USER_BOOKE,
  1640. .mmu_features = MMU_FTR_TYPE_44x,
  1641. .icache_bsize = 32,
  1642. .dcache_bsize = 32,
  1643. .machine_check = machine_check_4xx,
  1644. .platform = "ppc440gp",
  1645. },
  1646. { /* 440GX Rev. A */
  1647. .pvr_mask = 0xf0000fff,
  1648. .pvr_value = 0x50000850,
  1649. .cpu_name = "440GX Rev. A",
  1650. .cpu_features = CPU_FTRS_44X,
  1651. .cpu_user_features = COMMON_USER_BOOKE,
  1652. .mmu_features = MMU_FTR_TYPE_44x,
  1653. .icache_bsize = 32,
  1654. .dcache_bsize = 32,
  1655. .cpu_setup = __setup_cpu_440gx,
  1656. .machine_check = machine_check_440A,
  1657. .platform = "ppc440",
  1658. },
  1659. { /* 440GX Rev. B */
  1660. .pvr_mask = 0xf0000fff,
  1661. .pvr_value = 0x50000851,
  1662. .cpu_name = "440GX Rev. B",
  1663. .cpu_features = CPU_FTRS_44X,
  1664. .cpu_user_features = COMMON_USER_BOOKE,
  1665. .mmu_features = MMU_FTR_TYPE_44x,
  1666. .icache_bsize = 32,
  1667. .dcache_bsize = 32,
  1668. .cpu_setup = __setup_cpu_440gx,
  1669. .machine_check = machine_check_440A,
  1670. .platform = "ppc440",
  1671. },
  1672. { /* 440GX Rev. C */
  1673. .pvr_mask = 0xf0000fff,
  1674. .pvr_value = 0x50000892,
  1675. .cpu_name = "440GX Rev. C",
  1676. .cpu_features = CPU_FTRS_44X,
  1677. .cpu_user_features = COMMON_USER_BOOKE,
  1678. .mmu_features = MMU_FTR_TYPE_44x,
  1679. .icache_bsize = 32,
  1680. .dcache_bsize = 32,
  1681. .cpu_setup = __setup_cpu_440gx,
  1682. .machine_check = machine_check_440A,
  1683. .platform = "ppc440",
  1684. },
  1685. { /* 440GX Rev. F */
  1686. .pvr_mask = 0xf0000fff,
  1687. .pvr_value = 0x50000894,
  1688. .cpu_name = "440GX Rev. F",
  1689. .cpu_features = CPU_FTRS_44X,
  1690. .cpu_user_features = COMMON_USER_BOOKE,
  1691. .mmu_features = MMU_FTR_TYPE_44x,
  1692. .icache_bsize = 32,
  1693. .dcache_bsize = 32,
  1694. .cpu_setup = __setup_cpu_440gx,
  1695. .machine_check = machine_check_440A,
  1696. .platform = "ppc440",
  1697. },
  1698. { /* 440SP Rev. A */
  1699. .pvr_mask = 0xfff00fff,
  1700. .pvr_value = 0x53200891,
  1701. .cpu_name = "440SP Rev. A",
  1702. .cpu_features = CPU_FTRS_44X,
  1703. .cpu_user_features = COMMON_USER_BOOKE,
  1704. .mmu_features = MMU_FTR_TYPE_44x,
  1705. .icache_bsize = 32,
  1706. .dcache_bsize = 32,
  1707. .machine_check = machine_check_4xx,
  1708. .platform = "ppc440",
  1709. },
  1710. { /* 440SPe Rev. A */
  1711. .pvr_mask = 0xfff00fff,
  1712. .pvr_value = 0x53400890,
  1713. .cpu_name = "440SPe Rev. A",
  1714. .cpu_features = CPU_FTRS_44X,
  1715. .cpu_user_features = COMMON_USER_BOOKE,
  1716. .mmu_features = MMU_FTR_TYPE_44x,
  1717. .icache_bsize = 32,
  1718. .dcache_bsize = 32,
  1719. .cpu_setup = __setup_cpu_440spe,
  1720. .machine_check = machine_check_440A,
  1721. .platform = "ppc440",
  1722. },
  1723. { /* 440SPe Rev. B */
  1724. .pvr_mask = 0xfff00fff,
  1725. .pvr_value = 0x53400891,
  1726. .cpu_name = "440SPe Rev. B",
  1727. .cpu_features = CPU_FTRS_44X,
  1728. .cpu_user_features = COMMON_USER_BOOKE,
  1729. .mmu_features = MMU_FTR_TYPE_44x,
  1730. .icache_bsize = 32,
  1731. .dcache_bsize = 32,
  1732. .cpu_setup = __setup_cpu_440spe,
  1733. .machine_check = machine_check_440A,
  1734. .platform = "ppc440",
  1735. },
  1736. { /* 440 in Xilinx Virtex-5 FXT */
  1737. .pvr_mask = 0xfffffff0,
  1738. .pvr_value = 0x7ff21910,
  1739. .cpu_name = "440 in Virtex-5 FXT",
  1740. .cpu_features = CPU_FTRS_44X,
  1741. .cpu_user_features = COMMON_USER_BOOKE,
  1742. .mmu_features = MMU_FTR_TYPE_44x,
  1743. .icache_bsize = 32,
  1744. .dcache_bsize = 32,
  1745. .cpu_setup = __setup_cpu_440x5,
  1746. .machine_check = machine_check_440A,
  1747. .platform = "ppc440",
  1748. },
  1749. { /* 460EX */
  1750. .pvr_mask = 0xffff0006,
  1751. .pvr_value = 0x13020002,
  1752. .cpu_name = "460EX",
  1753. .cpu_features = CPU_FTRS_440x6,
  1754. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1755. .mmu_features = MMU_FTR_TYPE_44x,
  1756. .icache_bsize = 32,
  1757. .dcache_bsize = 32,
  1758. .cpu_setup = __setup_cpu_460ex,
  1759. .machine_check = machine_check_440A,
  1760. .platform = "ppc440",
  1761. },
  1762. { /* 460EX Rev B */
  1763. .pvr_mask = 0xffff0007,
  1764. .pvr_value = 0x13020004,
  1765. .cpu_name = "460EX Rev. B",
  1766. .cpu_features = CPU_FTRS_440x6,
  1767. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1768. .mmu_features = MMU_FTR_TYPE_44x,
  1769. .icache_bsize = 32,
  1770. .dcache_bsize = 32,
  1771. .cpu_setup = __setup_cpu_460ex,
  1772. .machine_check = machine_check_440A,
  1773. .platform = "ppc440",
  1774. },
  1775. { /* 460GT */
  1776. .pvr_mask = 0xffff0006,
  1777. .pvr_value = 0x13020000,
  1778. .cpu_name = "460GT",
  1779. .cpu_features = CPU_FTRS_440x6,
  1780. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1781. .mmu_features = MMU_FTR_TYPE_44x,
  1782. .icache_bsize = 32,
  1783. .dcache_bsize = 32,
  1784. .cpu_setup = __setup_cpu_460gt,
  1785. .machine_check = machine_check_440A,
  1786. .platform = "ppc440",
  1787. },
  1788. { /* 460GT Rev B */
  1789. .pvr_mask = 0xffff0007,
  1790. .pvr_value = 0x13020005,
  1791. .cpu_name = "460GT Rev. B",
  1792. .cpu_features = CPU_FTRS_440x6,
  1793. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1794. .mmu_features = MMU_FTR_TYPE_44x,
  1795. .icache_bsize = 32,
  1796. .dcache_bsize = 32,
  1797. .cpu_setup = __setup_cpu_460gt,
  1798. .machine_check = machine_check_440A,
  1799. .platform = "ppc440",
  1800. },
  1801. { /* 460SX */
  1802. .pvr_mask = 0xffffff00,
  1803. .pvr_value = 0x13541800,
  1804. .cpu_name = "460SX",
  1805. .cpu_features = CPU_FTRS_44X,
  1806. .cpu_user_features = COMMON_USER_BOOKE,
  1807. .mmu_features = MMU_FTR_TYPE_44x,
  1808. .icache_bsize = 32,
  1809. .dcache_bsize = 32,
  1810. .cpu_setup = __setup_cpu_460sx,
  1811. .machine_check = machine_check_440A,
  1812. .platform = "ppc440",
  1813. },
  1814. { /* 464 in APM821xx */
  1815. .pvr_mask = 0xffffff00,
  1816. .pvr_value = 0x12C41C80,
  1817. .cpu_name = "APM821XX",
  1818. .cpu_features = CPU_FTRS_44X,
  1819. .cpu_user_features = COMMON_USER_BOOKE |
  1820. PPC_FEATURE_HAS_FPU,
  1821. .mmu_features = MMU_FTR_TYPE_44x,
  1822. .icache_bsize = 32,
  1823. .dcache_bsize = 32,
  1824. .cpu_setup = __setup_cpu_apm821xx,
  1825. .machine_check = machine_check_440A,
  1826. .platform = "ppc440",
  1827. },
  1828. { /* 476 core */
  1829. .pvr_mask = 0xffff0000,
  1830. .pvr_value = 0x11a50000,
  1831. .cpu_name = "476",
  1832. .cpu_features = CPU_FTRS_47X,
  1833. .cpu_user_features = COMMON_USER_BOOKE |
  1834. PPC_FEATURE_HAS_FPU,
  1835. .mmu_features = MMU_FTR_TYPE_47x |
  1836. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1837. .icache_bsize = 32,
  1838. .dcache_bsize = 128,
  1839. .machine_check = machine_check_47x,
  1840. .platform = "ppc470",
  1841. },
  1842. { /* 476 iss */
  1843. .pvr_mask = 0xffff0000,
  1844. .pvr_value = 0x00050000,
  1845. .cpu_name = "476",
  1846. .cpu_features = CPU_FTRS_47X,
  1847. .cpu_user_features = COMMON_USER_BOOKE |
  1848. PPC_FEATURE_HAS_FPU,
  1849. .mmu_features = MMU_FTR_TYPE_47x |
  1850. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1851. .icache_bsize = 32,
  1852. .dcache_bsize = 128,
  1853. .machine_check = machine_check_47x,
  1854. .platform = "ppc470",
  1855. },
  1856. { /* default match */
  1857. .pvr_mask = 0x00000000,
  1858. .pvr_value = 0x00000000,
  1859. .cpu_name = "(generic 44x PPC)",
  1860. .cpu_features = CPU_FTRS_44X,
  1861. .cpu_user_features = COMMON_USER_BOOKE,
  1862. .mmu_features = MMU_FTR_TYPE_44x,
  1863. .icache_bsize = 32,
  1864. .dcache_bsize = 32,
  1865. .machine_check = machine_check_4xx,
  1866. .platform = "ppc440",
  1867. }
  1868. #endif /* CONFIG_44x */
  1869. #ifdef CONFIG_E200
  1870. { /* e200z5 */
  1871. .pvr_mask = 0xfff00000,
  1872. .pvr_value = 0x81000000,
  1873. .cpu_name = "e200z5",
  1874. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1875. .cpu_features = CPU_FTRS_E200,
  1876. .cpu_user_features = COMMON_USER_BOOKE |
  1877. PPC_FEATURE_HAS_EFP_SINGLE |
  1878. PPC_FEATURE_UNIFIED_CACHE,
  1879. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1880. .dcache_bsize = 32,
  1881. .machine_check = machine_check_e200,
  1882. .platform = "ppc5554",
  1883. },
  1884. { /* e200z6 */
  1885. .pvr_mask = 0xfff00000,
  1886. .pvr_value = 0x81100000,
  1887. .cpu_name = "e200z6",
  1888. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1889. .cpu_features = CPU_FTRS_E200,
  1890. .cpu_user_features = COMMON_USER_BOOKE |
  1891. PPC_FEATURE_HAS_SPE_COMP |
  1892. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1893. PPC_FEATURE_UNIFIED_CACHE,
  1894. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1895. .dcache_bsize = 32,
  1896. .machine_check = machine_check_e200,
  1897. .platform = "ppc5554",
  1898. },
  1899. { /* default match */
  1900. .pvr_mask = 0x00000000,
  1901. .pvr_value = 0x00000000,
  1902. .cpu_name = "(generic E200 PPC)",
  1903. .cpu_features = CPU_FTRS_E200,
  1904. .cpu_user_features = COMMON_USER_BOOKE |
  1905. PPC_FEATURE_HAS_EFP_SINGLE |
  1906. PPC_FEATURE_UNIFIED_CACHE,
  1907. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1908. .dcache_bsize = 32,
  1909. .cpu_setup = __setup_cpu_e200,
  1910. .machine_check = machine_check_e200,
  1911. .platform = "ppc5554",
  1912. }
  1913. #endif /* CONFIG_E200 */
  1914. #endif /* CONFIG_PPC32 */
  1915. #ifdef CONFIG_E500
  1916. #ifdef CONFIG_PPC32
  1917. { /* e500 */
  1918. .pvr_mask = 0xffff0000,
  1919. .pvr_value = 0x80200000,
  1920. .cpu_name = "e500",
  1921. .cpu_features = CPU_FTRS_E500,
  1922. .cpu_user_features = COMMON_USER_BOOKE |
  1923. PPC_FEATURE_HAS_SPE_COMP |
  1924. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1925. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1926. .icache_bsize = 32,
  1927. .dcache_bsize = 32,
  1928. .num_pmcs = 4,
  1929. .oprofile_cpu_type = "ppc/e500",
  1930. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1931. .cpu_setup = __setup_cpu_e500v1,
  1932. .machine_check = machine_check_e500,
  1933. .platform = "ppc8540",
  1934. },
  1935. { /* e500v2 */
  1936. .pvr_mask = 0xffff0000,
  1937. .pvr_value = 0x80210000,
  1938. .cpu_name = "e500v2",
  1939. .cpu_features = CPU_FTRS_E500_2,
  1940. .cpu_user_features = COMMON_USER_BOOKE |
  1941. PPC_FEATURE_HAS_SPE_COMP |
  1942. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1943. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  1944. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1945. .icache_bsize = 32,
  1946. .dcache_bsize = 32,
  1947. .num_pmcs = 4,
  1948. .oprofile_cpu_type = "ppc/e500",
  1949. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1950. .cpu_setup = __setup_cpu_e500v2,
  1951. .machine_check = machine_check_e500,
  1952. .platform = "ppc8548",
  1953. },
  1954. { /* e500mc */
  1955. .pvr_mask = 0xffff0000,
  1956. .pvr_value = 0x80230000,
  1957. .cpu_name = "e500mc",
  1958. .cpu_features = CPU_FTRS_E500MC,
  1959. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1960. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  1961. MMU_FTR_USE_TLBILX,
  1962. .icache_bsize = 64,
  1963. .dcache_bsize = 64,
  1964. .num_pmcs = 4,
  1965. .oprofile_cpu_type = "ppc/e500mc",
  1966. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1967. .cpu_setup = __setup_cpu_e500mc,
  1968. .machine_check = machine_check_e500mc,
  1969. .platform = "ppce500mc",
  1970. },
  1971. #endif /* CONFIG_PPC32 */
  1972. { /* e5500 */
  1973. .pvr_mask = 0xffff0000,
  1974. .pvr_value = 0x80240000,
  1975. .cpu_name = "e5500",
  1976. .cpu_features = CPU_FTRS_E500MC,
  1977. .cpu_user_features = COMMON_USER_BOOKE,
  1978. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  1979. MMU_FTR_USE_TLBILX,
  1980. .icache_bsize = 64,
  1981. .dcache_bsize = 64,
  1982. .num_pmcs = 4,
  1983. .oprofile_cpu_type = "ppc/e500mc",
  1984. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1985. .cpu_setup = __setup_cpu_e5500,
  1986. .cpu_restore = __restore_cpu_e5500,
  1987. .machine_check = machine_check_e500mc,
  1988. .platform = "ppce5500",
  1989. },
  1990. #ifdef CONFIG_PPC32
  1991. { /* default match */
  1992. .pvr_mask = 0x00000000,
  1993. .pvr_value = 0x00000000,
  1994. .cpu_name = "(generic E500 PPC)",
  1995. .cpu_features = CPU_FTRS_E500,
  1996. .cpu_user_features = COMMON_USER_BOOKE |
  1997. PPC_FEATURE_HAS_SPE_COMP |
  1998. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1999. .mmu_features = MMU_FTR_TYPE_FSL_E,
  2000. .icache_bsize = 32,
  2001. .dcache_bsize = 32,
  2002. .machine_check = machine_check_e500,
  2003. .platform = "powerpc",
  2004. }
  2005. #endif /* CONFIG_PPC32 */
  2006. #endif /* CONFIG_E500 */
  2007. #ifdef CONFIG_PPC_BOOK3E_64
  2008. { /* This is a default entry to get going, to be replaced by
  2009. * a real one at some stage
  2010. */
  2011. #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
  2012. CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
  2013. CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
  2014. .pvr_mask = 0x00000000,
  2015. .pvr_value = 0x00000000,
  2016. .cpu_name = "Book3E",
  2017. .cpu_features = CPU_FTRS_BASE_BOOK3E,
  2018. .cpu_user_features = COMMON_USER_PPC64,
  2019. .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
  2020. MMU_FTR_USE_TLBIVAX_BCAST |
  2021. MMU_FTR_LOCK_BCAST_INVAL,
  2022. .icache_bsize = 64,
  2023. .dcache_bsize = 64,
  2024. .num_pmcs = 0,
  2025. .machine_check = machine_check_generic,
  2026. .platform = "power6",
  2027. },
  2028. #endif
  2029. };
  2030. static struct cpu_spec the_cpu_spec;
  2031. static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
  2032. {
  2033. struct cpu_spec *t = &the_cpu_spec;
  2034. struct cpu_spec old;
  2035. t = PTRRELOC(t);
  2036. old = *t;
  2037. /* Copy everything, then do fixups */
  2038. *t = *s;
  2039. /*
  2040. * If we are overriding a previous value derived from the real
  2041. * PVR with a new value obtained using a logical PVR value,
  2042. * don't modify the performance monitor fields.
  2043. */
  2044. if (old.num_pmcs && !s->num_pmcs) {
  2045. t->num_pmcs = old.num_pmcs;
  2046. t->pmc_type = old.pmc_type;
  2047. t->oprofile_type = old.oprofile_type;
  2048. t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
  2049. t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
  2050. t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
  2051. /*
  2052. * If we have passed through this logic once before and
  2053. * have pulled the default case because the real PVR was
  2054. * not found inside cpu_specs[], then we are possibly
  2055. * running in compatibility mode. In that case, let the
  2056. * oprofiler know which set of compatibility counters to
  2057. * pull from by making sure the oprofile_cpu_type string
  2058. * is set to that of compatibility mode. If the
  2059. * oprofile_cpu_type already has a value, then we are
  2060. * possibly overriding a real PVR with a logical one,
  2061. * and, in that case, keep the current value for
  2062. * oprofile_cpu_type.
  2063. */
  2064. if (old.oprofile_cpu_type != NULL) {
  2065. t->oprofile_cpu_type = old.oprofile_cpu_type;
  2066. t->oprofile_type = old.oprofile_type;
  2067. }
  2068. }
  2069. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  2070. /*
  2071. * Set the base platform string once; assumes
  2072. * we're called with real pvr first.
  2073. */
  2074. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  2075. *PTRRELOC(&powerpc_base_platform) = t->platform;
  2076. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  2077. /* ppc64 and booke expect identify_cpu to also call setup_cpu for
  2078. * that processor. I will consolidate that at a later time, for now,
  2079. * just use #ifdef. We also don't need to PTRRELOC the function
  2080. * pointer on ppc64 and booke as we are running at 0 in real mode
  2081. * on ppc64 and reloc_offset is always 0 on booke.
  2082. */
  2083. if (s->cpu_setup) {
  2084. s->cpu_setup(offset, s);
  2085. }
  2086. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  2087. }
  2088. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  2089. {
  2090. struct cpu_spec *s = cpu_specs;
  2091. int i;
  2092. s = PTRRELOC(s);
  2093. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
  2094. if ((pvr & s->pvr_mask) == s->pvr_value) {
  2095. setup_cpu_spec(offset, s);
  2096. return s;
  2097. }
  2098. }
  2099. BUG();
  2100. return NULL;
  2101. }