radeon_fence.c 14 KB

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  1. /*
  2. * Copyright 2009 Jerome Glisse.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Jerome Glisse <glisse@freedesktop.org>
  29. * Dave Airlie
  30. */
  31. #include <linux/seq_file.h>
  32. #include <linux/atomic.h>
  33. #include <linux/wait.h>
  34. #include <linux/list.h>
  35. #include <linux/kref.h>
  36. #include <linux/slab.h>
  37. #include "drmP.h"
  38. #include "drm.h"
  39. #include "radeon_reg.h"
  40. #include "radeon.h"
  41. #include "radeon_trace.h"
  42. static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  43. {
  44. if (rdev->wb.enabled) {
  45. *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  46. } else {
  47. WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  48. }
  49. }
  50. static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  51. {
  52. u32 seq = 0;
  53. if (rdev->wb.enabled) {
  54. seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  55. } else {
  56. seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  57. }
  58. return seq;
  59. }
  60. int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
  61. {
  62. unsigned long irq_flags;
  63. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  64. if (fence->emitted) {
  65. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  66. return 0;
  67. }
  68. fence->seq = atomic_add_return(1, &rdev->fence_drv[fence->ring].seq);
  69. radeon_fence_ring_emit(rdev, fence->ring, fence);
  70. trace_radeon_fence_emit(rdev->ddev, fence->seq);
  71. fence->emitted = true;
  72. list_move_tail(&fence->list, &rdev->fence_drv[fence->ring].emitted);
  73. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  74. return 0;
  75. }
  76. static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
  77. {
  78. struct radeon_fence *fence;
  79. struct list_head *i, *n;
  80. uint32_t seq;
  81. bool wake = false;
  82. unsigned long cjiffies;
  83. seq = radeon_fence_read(rdev, ring);
  84. if (seq != rdev->fence_drv[ring].last_seq) {
  85. rdev->fence_drv[ring].last_seq = seq;
  86. rdev->fence_drv[ring].last_jiffies = jiffies;
  87. rdev->fence_drv[ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
  88. } else {
  89. cjiffies = jiffies;
  90. if (time_after(cjiffies, rdev->fence_drv[ring].last_jiffies)) {
  91. cjiffies -= rdev->fence_drv[ring].last_jiffies;
  92. if (time_after(rdev->fence_drv[ring].last_timeout, cjiffies)) {
  93. /* update the timeout */
  94. rdev->fence_drv[ring].last_timeout -= cjiffies;
  95. } else {
  96. /* the 500ms timeout is elapsed we should test
  97. * for GPU lockup
  98. */
  99. rdev->fence_drv[ring].last_timeout = 1;
  100. }
  101. } else {
  102. /* wrap around update last jiffies, we will just wait
  103. * a little longer
  104. */
  105. rdev->fence_drv[ring].last_jiffies = cjiffies;
  106. }
  107. return false;
  108. }
  109. n = NULL;
  110. list_for_each(i, &rdev->fence_drv[ring].emitted) {
  111. fence = list_entry(i, struct radeon_fence, list);
  112. if (fence->seq == seq) {
  113. n = i;
  114. break;
  115. }
  116. }
  117. /* all fence previous to this one are considered as signaled */
  118. if (n) {
  119. i = n;
  120. do {
  121. n = i->prev;
  122. list_move_tail(i, &rdev->fence_drv[ring].signaled);
  123. fence = list_entry(i, struct radeon_fence, list);
  124. fence->signaled = true;
  125. i = n;
  126. } while (i != &rdev->fence_drv[ring].emitted);
  127. wake = true;
  128. }
  129. return wake;
  130. }
  131. static void radeon_fence_destroy(struct kref *kref)
  132. {
  133. unsigned long irq_flags;
  134. struct radeon_fence *fence;
  135. fence = container_of(kref, struct radeon_fence, kref);
  136. write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
  137. list_del(&fence->list);
  138. fence->emitted = false;
  139. write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
  140. if (fence->semaphore)
  141. radeon_semaphore_free(fence->rdev, fence->semaphore);
  142. kfree(fence);
  143. }
  144. int radeon_fence_create(struct radeon_device *rdev,
  145. struct radeon_fence **fence,
  146. int ring)
  147. {
  148. unsigned long irq_flags;
  149. *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
  150. if ((*fence) == NULL) {
  151. return -ENOMEM;
  152. }
  153. kref_init(&((*fence)->kref));
  154. (*fence)->rdev = rdev;
  155. (*fence)->emitted = false;
  156. (*fence)->signaled = false;
  157. (*fence)->seq = 0;
  158. (*fence)->ring = ring;
  159. (*fence)->semaphore = NULL;
  160. INIT_LIST_HEAD(&(*fence)->list);
  161. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  162. list_add_tail(&(*fence)->list, &rdev->fence_drv[ring].created);
  163. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  164. return 0;
  165. }
  166. bool radeon_fence_signaled(struct radeon_fence *fence)
  167. {
  168. unsigned long irq_flags;
  169. bool signaled = false;
  170. if (!fence)
  171. return true;
  172. write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
  173. signaled = fence->signaled;
  174. /* if we are shuting down report all fence as signaled */
  175. if (fence->rdev->shutdown) {
  176. signaled = true;
  177. }
  178. if (!fence->emitted) {
  179. WARN(1, "Querying an unemitted fence : %p !\n", fence);
  180. signaled = true;
  181. }
  182. if (!signaled) {
  183. radeon_fence_poll_locked(fence->rdev, fence->ring);
  184. signaled = fence->signaled;
  185. }
  186. write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
  187. return signaled;
  188. }
  189. int radeon_fence_wait(struct radeon_fence *fence, bool intr)
  190. {
  191. struct radeon_device *rdev;
  192. unsigned long irq_flags, timeout;
  193. u32 seq;
  194. int r;
  195. if (fence == NULL) {
  196. WARN(1, "Querying an invalid fence : %p !\n", fence);
  197. return 0;
  198. }
  199. rdev = fence->rdev;
  200. if (radeon_fence_signaled(fence)) {
  201. return 0;
  202. }
  203. timeout = rdev->fence_drv[fence->ring].last_timeout;
  204. retry:
  205. /* save current sequence used to check for GPU lockup */
  206. seq = rdev->fence_drv[fence->ring].last_seq;
  207. trace_radeon_fence_wait_begin(rdev->ddev, seq);
  208. if (intr) {
  209. radeon_irq_kms_sw_irq_get(rdev, fence->ring);
  210. r = wait_event_interruptible_timeout(rdev->fence_drv[fence->ring].queue,
  211. radeon_fence_signaled(fence), timeout);
  212. radeon_irq_kms_sw_irq_put(rdev, fence->ring);
  213. if (unlikely(r < 0)) {
  214. return r;
  215. }
  216. } else {
  217. radeon_irq_kms_sw_irq_get(rdev, fence->ring);
  218. r = wait_event_timeout(rdev->fence_drv[fence->ring].queue,
  219. radeon_fence_signaled(fence), timeout);
  220. radeon_irq_kms_sw_irq_put(rdev, fence->ring);
  221. }
  222. trace_radeon_fence_wait_end(rdev->ddev, seq);
  223. if (unlikely(!radeon_fence_signaled(fence))) {
  224. /* we were interrupted for some reason and fence isn't
  225. * isn't signaled yet, resume wait
  226. */
  227. if (r) {
  228. timeout = r;
  229. goto retry;
  230. }
  231. /* don't protect read access to rdev->fence_drv[t].last_seq
  232. * if we experiencing a lockup the value doesn't change
  233. */
  234. if (seq == rdev->fence_drv[fence->ring].last_seq &&
  235. radeon_ring_is_lockup(rdev, fence->ring, &rdev->ring[fence->ring])) {
  236. /* good news we believe it's a lockup */
  237. printk(KERN_WARNING "GPU lockup (waiting for 0x%08X last fence id 0x%08X)\n",
  238. fence->seq, seq);
  239. /* mark the ring as not ready any more */
  240. rdev->ring[fence->ring].ready = false;
  241. r = radeon_gpu_reset(rdev);
  242. if (r)
  243. return r;
  244. }
  245. timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
  246. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  247. rdev->fence_drv[fence->ring].last_timeout = RADEON_FENCE_JIFFIES_TIMEOUT;
  248. rdev->fence_drv[fence->ring].last_jiffies = jiffies;
  249. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  250. goto retry;
  251. }
  252. return 0;
  253. }
  254. int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
  255. {
  256. unsigned long irq_flags;
  257. struct radeon_fence *fence;
  258. int r;
  259. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  260. if (!rdev->ring[ring].ready) {
  261. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  262. return -EBUSY;
  263. }
  264. if (list_empty(&rdev->fence_drv[ring].emitted)) {
  265. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  266. return 0;
  267. }
  268. fence = list_entry(rdev->fence_drv[ring].emitted.next,
  269. struct radeon_fence, list);
  270. radeon_fence_ref(fence);
  271. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  272. r = radeon_fence_wait(fence, false);
  273. radeon_fence_unref(&fence);
  274. return r;
  275. }
  276. int radeon_fence_wait_last(struct radeon_device *rdev, int ring)
  277. {
  278. unsigned long irq_flags;
  279. struct radeon_fence *fence;
  280. int r;
  281. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  282. if (!rdev->ring[ring].ready) {
  283. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  284. return -EBUSY;
  285. }
  286. if (list_empty(&rdev->fence_drv[ring].emitted)) {
  287. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  288. return 0;
  289. }
  290. fence = list_entry(rdev->fence_drv[ring].emitted.prev,
  291. struct radeon_fence, list);
  292. radeon_fence_ref(fence);
  293. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  294. r = radeon_fence_wait(fence, false);
  295. radeon_fence_unref(&fence);
  296. return r;
  297. }
  298. struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
  299. {
  300. kref_get(&fence->kref);
  301. return fence;
  302. }
  303. void radeon_fence_unref(struct radeon_fence **fence)
  304. {
  305. struct radeon_fence *tmp = *fence;
  306. *fence = NULL;
  307. if (tmp) {
  308. kref_put(&tmp->kref, radeon_fence_destroy);
  309. }
  310. }
  311. void radeon_fence_process(struct radeon_device *rdev, int ring)
  312. {
  313. unsigned long irq_flags;
  314. bool wake;
  315. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  316. wake = radeon_fence_poll_locked(rdev, ring);
  317. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  318. if (wake) {
  319. wake_up_all(&rdev->fence_drv[ring].queue);
  320. }
  321. }
  322. int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
  323. {
  324. unsigned long irq_flags;
  325. int not_processed = 0;
  326. read_lock_irqsave(&rdev->fence_lock, irq_flags);
  327. if (!rdev->fence_drv[ring].initialized) {
  328. read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  329. return 0;
  330. }
  331. if (!list_empty(&rdev->fence_drv[ring].emitted)) {
  332. struct list_head *ptr;
  333. list_for_each(ptr, &rdev->fence_drv[ring].emitted) {
  334. /* count up to 3, that's enought info */
  335. if (++not_processed >= 3)
  336. break;
  337. }
  338. }
  339. read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  340. return not_processed;
  341. }
  342. int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
  343. {
  344. unsigned long irq_flags;
  345. uint64_t index;
  346. int r;
  347. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  348. radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
  349. if (rdev->wb.use_event) {
  350. rdev->fence_drv[ring].scratch_reg = 0;
  351. index = R600_WB_EVENT_OFFSET + ring * 4;
  352. } else {
  353. r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
  354. if (r) {
  355. dev_err(rdev->dev, "fence failed to get scratch register\n");
  356. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  357. return r;
  358. }
  359. index = RADEON_WB_SCRATCH_OFFSET +
  360. rdev->fence_drv[ring].scratch_reg -
  361. rdev->scratch.reg_base;
  362. }
  363. rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
  364. rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
  365. radeon_fence_write(rdev, atomic_read(&rdev->fence_drv[ring].seq), ring);
  366. rdev->fence_drv[ring].initialized = true;
  367. DRM_INFO("fence driver on ring %d use gpu addr 0x%08Lx and cpu addr 0x%p\n",
  368. ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
  369. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  370. return 0;
  371. }
  372. static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
  373. {
  374. rdev->fence_drv[ring].scratch_reg = -1;
  375. rdev->fence_drv[ring].cpu_addr = NULL;
  376. rdev->fence_drv[ring].gpu_addr = 0;
  377. atomic_set(&rdev->fence_drv[ring].seq, 0);
  378. INIT_LIST_HEAD(&rdev->fence_drv[ring].created);
  379. INIT_LIST_HEAD(&rdev->fence_drv[ring].emitted);
  380. INIT_LIST_HEAD(&rdev->fence_drv[ring].signaled);
  381. init_waitqueue_head(&rdev->fence_drv[ring].queue);
  382. rdev->fence_drv[ring].initialized = false;
  383. }
  384. int radeon_fence_driver_init(struct radeon_device *rdev)
  385. {
  386. unsigned long irq_flags;
  387. int ring;
  388. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  389. for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
  390. radeon_fence_driver_init_ring(rdev, ring);
  391. }
  392. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  393. if (radeon_debugfs_fence_init(rdev)) {
  394. dev_err(rdev->dev, "fence debugfs file creation failed\n");
  395. }
  396. return 0;
  397. }
  398. void radeon_fence_driver_fini(struct radeon_device *rdev)
  399. {
  400. unsigned long irq_flags;
  401. int ring;
  402. for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
  403. if (!rdev->fence_drv[ring].initialized)
  404. continue;
  405. radeon_fence_wait_last(rdev, ring);
  406. wake_up_all(&rdev->fence_drv[ring].queue);
  407. write_lock_irqsave(&rdev->fence_lock, irq_flags);
  408. radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
  409. write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
  410. rdev->fence_drv[ring].initialized = false;
  411. }
  412. }
  413. /*
  414. * Fence debugfs
  415. */
  416. #if defined(CONFIG_DEBUG_FS)
  417. static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
  418. {
  419. struct drm_info_node *node = (struct drm_info_node *)m->private;
  420. struct drm_device *dev = node->minor->dev;
  421. struct radeon_device *rdev = dev->dev_private;
  422. struct radeon_fence *fence;
  423. int i;
  424. for (i = 0; i < RADEON_NUM_RINGS; ++i) {
  425. if (!rdev->fence_drv[i].initialized)
  426. continue;
  427. seq_printf(m, "--- ring %d ---\n", i);
  428. seq_printf(m, "Last signaled fence 0x%08X\n",
  429. radeon_fence_read(rdev, i));
  430. if (!list_empty(&rdev->fence_drv[i].emitted)) {
  431. fence = list_entry(rdev->fence_drv[i].emitted.prev,
  432. struct radeon_fence, list);
  433. seq_printf(m, "Last emitted fence %p with 0x%08X\n",
  434. fence, fence->seq);
  435. }
  436. }
  437. return 0;
  438. }
  439. static struct drm_info_list radeon_debugfs_fence_list[] = {
  440. {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
  441. };
  442. #endif
  443. int radeon_debugfs_fence_init(struct radeon_device *rdev)
  444. {
  445. #if defined(CONFIG_DEBUG_FS)
  446. return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
  447. #else
  448. return 0;
  449. #endif
  450. }