psc-i2s.c 11 KB

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  1. /*
  2. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  3. *
  4. * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
  5. * Manuel Lauss <manuel.lauss@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Au1xxx-PSC I2S glue.
  12. *
  13. * NOTE: all of these drivers can only work with a SINGLE instance
  14. * of a PSC. Multiple independent audio devices are impossible
  15. * with ASoC v1.
  16. * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/module.h>
  20. #include <linux/suspend.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/initval.h>
  24. #include <sound/soc.h>
  25. #include <asm/mach-au1x00/au1000.h>
  26. #include <asm/mach-au1x00/au1xxx_psc.h>
  27. #include "psc.h"
  28. /* supported I2S DAI hardware formats */
  29. #define AU1XPSC_I2S_DAIFMT \
  30. (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
  31. SND_SOC_DAIFMT_NB_NF)
  32. /* supported I2S direction */
  33. #define AU1XPSC_I2S_DIR \
  34. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  35. #define AU1XPSC_I2S_RATES \
  36. SNDRV_PCM_RATE_8000_192000
  37. #define AU1XPSC_I2S_FMTS \
  38. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  39. #define I2SSTAT_BUSY(stype) \
  40. ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
  41. #define I2SPCR_START(stype) \
  42. ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
  43. #define I2SPCR_STOP(stype) \
  44. ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
  45. #define I2SPCR_CLRFIFO(stype) \
  46. ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
  47. /* instance data. There can be only one, MacLeod!!!! */
  48. static struct au1xpsc_audio_data *au1xpsc_i2s_workdata;
  49. static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
  50. unsigned int fmt)
  51. {
  52. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  53. unsigned long ct;
  54. int ret;
  55. ret = -EINVAL;
  56. ct = pscdata->cfg;
  57. ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
  58. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  59. case SND_SOC_DAIFMT_I2S:
  60. ct |= PSC_I2SCFG_XM; /* enable I2S mode */
  61. break;
  62. case SND_SOC_DAIFMT_MSB:
  63. break;
  64. case SND_SOC_DAIFMT_LSB:
  65. ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
  66. break;
  67. default:
  68. goto out;
  69. }
  70. ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
  71. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  72. case SND_SOC_DAIFMT_NB_NF:
  73. ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
  74. break;
  75. case SND_SOC_DAIFMT_NB_IF:
  76. ct |= PSC_I2SCFG_BI;
  77. break;
  78. case SND_SOC_DAIFMT_IB_NF:
  79. ct |= PSC_I2SCFG_WI;
  80. break;
  81. case SND_SOC_DAIFMT_IB_IF:
  82. break;
  83. default:
  84. goto out;
  85. }
  86. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  87. case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
  88. ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
  89. break;
  90. case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
  91. ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
  92. break;
  93. default:
  94. goto out;
  95. }
  96. pscdata->cfg = ct;
  97. ret = 0;
  98. out:
  99. return ret;
  100. }
  101. static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
  102. struct snd_pcm_hw_params *params,
  103. struct snd_soc_dai *dai)
  104. {
  105. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  106. int cfgbits;
  107. unsigned long stat;
  108. /* check if the PSC is already streaming data */
  109. stat = au_readl(I2S_STAT(pscdata));
  110. if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
  111. /* reject parameters not currently set up in hardware */
  112. cfgbits = au_readl(I2S_CFG(pscdata));
  113. if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
  114. (params_rate(params) != pscdata->rate))
  115. return -EINVAL;
  116. } else {
  117. /* set sample bitdepth */
  118. pscdata->cfg &= ~(0x1f << 4);
  119. pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
  120. /* remember current rate for other stream */
  121. pscdata->rate = params_rate(params);
  122. }
  123. return 0;
  124. }
  125. /* Configure PSC late: on my devel systems the codec is I2S master and
  126. * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
  127. * uses aggressive PM and switches the codec off when it is not in use
  128. * which also means the PSC unit doesn't get any clocks and is therefore
  129. * dead. That's why this chunk here gets called from the trigger callback
  130. * because I can be reasonably certain the codec is driving the clocks.
  131. */
  132. static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
  133. {
  134. unsigned long tmo;
  135. /* bring PSC out of sleep, and configure I2S unit */
  136. au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
  137. au_sync();
  138. tmo = 1000000;
  139. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
  140. tmo--;
  141. if (!tmo)
  142. goto psc_err;
  143. au_writel(0, I2S_CFG(pscdata));
  144. au_sync();
  145. au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
  146. au_sync();
  147. /* wait for I2S controller to become ready */
  148. tmo = 1000000;
  149. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
  150. tmo--;
  151. if (tmo)
  152. return 0;
  153. psc_err:
  154. au_writel(0, I2S_CFG(pscdata));
  155. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  156. au_sync();
  157. return -ETIMEDOUT;
  158. }
  159. static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
  160. {
  161. unsigned long tmo, stat;
  162. int ret;
  163. ret = 0;
  164. /* if both TX and RX are idle, configure the PSC */
  165. stat = au_readl(I2S_STAT(pscdata));
  166. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  167. ret = au1xpsc_i2s_configure(pscdata);
  168. if (ret)
  169. goto out;
  170. }
  171. au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
  172. au_sync();
  173. au_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
  174. au_sync();
  175. /* wait for start confirmation */
  176. tmo = 1000000;
  177. while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  178. tmo--;
  179. if (!tmo) {
  180. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  181. au_sync();
  182. ret = -ETIMEDOUT;
  183. }
  184. out:
  185. return ret;
  186. }
  187. static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
  188. {
  189. unsigned long tmo, stat;
  190. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  191. au_sync();
  192. /* wait for stop confirmation */
  193. tmo = 1000000;
  194. while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  195. tmo--;
  196. /* if both TX and RX are idle, disable PSC */
  197. stat = au_readl(I2S_STAT(pscdata));
  198. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  199. au_writel(0, I2S_CFG(pscdata));
  200. au_sync();
  201. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  202. au_sync();
  203. }
  204. return 0;
  205. }
  206. static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  207. struct snd_soc_dai *dai)
  208. {
  209. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  210. int ret, stype = SUBSTREAM_TYPE(substream);
  211. switch (cmd) {
  212. case SNDRV_PCM_TRIGGER_START:
  213. case SNDRV_PCM_TRIGGER_RESUME:
  214. ret = au1xpsc_i2s_start(pscdata, stype);
  215. break;
  216. case SNDRV_PCM_TRIGGER_STOP:
  217. case SNDRV_PCM_TRIGGER_SUSPEND:
  218. ret = au1xpsc_i2s_stop(pscdata, stype);
  219. break;
  220. default:
  221. ret = -EINVAL;
  222. }
  223. return ret;
  224. }
  225. static int au1xpsc_i2s_probe(struct platform_device *pdev,
  226. struct snd_soc_dai *dai)
  227. {
  228. return au1xpsc_i2s_workdata ? 0 : -ENODEV;
  229. }
  230. static void au1xpsc_i2s_remove(struct platform_device *pdev,
  231. struct snd_soc_dai *dai)
  232. {
  233. }
  234. static struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
  235. .trigger = au1xpsc_i2s_trigger,
  236. .hw_params = au1xpsc_i2s_hw_params,
  237. .set_fmt = au1xpsc_i2s_set_fmt,
  238. };
  239. struct snd_soc_dai au1xpsc_i2s_dai = {
  240. .name = "au1xpsc_i2s",
  241. .probe = au1xpsc_i2s_probe,
  242. .remove = au1xpsc_i2s_remove,
  243. .playback = {
  244. .rates = AU1XPSC_I2S_RATES,
  245. .formats = AU1XPSC_I2S_FMTS,
  246. .channels_min = 2,
  247. .channels_max = 8, /* 2 without external help */
  248. },
  249. .capture = {
  250. .rates = AU1XPSC_I2S_RATES,
  251. .formats = AU1XPSC_I2S_FMTS,
  252. .channels_min = 2,
  253. .channels_max = 8, /* 2 without external help */
  254. },
  255. .ops = &au1xpsc_i2s_dai_ops,
  256. };
  257. EXPORT_SYMBOL(au1xpsc_i2s_dai);
  258. static int __init au1xpsc_i2s_drvprobe(struct platform_device *pdev)
  259. {
  260. struct resource *r;
  261. unsigned long sel;
  262. int ret;
  263. struct au1xpsc_audio_data *wd;
  264. if (au1xpsc_i2s_workdata)
  265. return -EBUSY;
  266. wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
  267. if (!wd)
  268. return -ENOMEM;
  269. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  270. if (!r) {
  271. ret = -ENODEV;
  272. goto out0;
  273. }
  274. ret = -EBUSY;
  275. wd->ioarea = request_mem_region(r->start, r->end - r->start + 1,
  276. "au1xpsc_i2s");
  277. if (!wd->ioarea)
  278. goto out0;
  279. wd->mmio = ioremap(r->start, 0xffff);
  280. if (!wd->mmio)
  281. goto out1;
  282. /* preserve PSC clock source set up by platform (dev.platform_data
  283. * is already occupied by soc layer)
  284. */
  285. sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
  286. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  287. au_sync();
  288. au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
  289. au_writel(0, I2S_CFG(wd));
  290. au_sync();
  291. /* preconfigure: set max rx/tx fifo depths */
  292. wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
  293. /* don't wait for I2S core to become ready now; clocks may not
  294. * be running yet; depending on clock input for PSC a wait might
  295. * time out.
  296. */
  297. ret = snd_soc_register_dai(&au1xpsc_i2s_dai);
  298. if (ret)
  299. goto out1;
  300. /* finally add the DMA device for this PSC */
  301. wd->dmapd = au1xpsc_pcm_add(pdev);
  302. if (wd->dmapd) {
  303. platform_set_drvdata(pdev, wd);
  304. au1xpsc_i2s_workdata = wd;
  305. return 0;
  306. }
  307. snd_soc_unregister_dai(&au1xpsc_i2s_dai);
  308. out1:
  309. release_resource(wd->ioarea);
  310. kfree(wd->ioarea);
  311. out0:
  312. kfree(wd);
  313. return ret;
  314. }
  315. static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev)
  316. {
  317. struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
  318. if (wd->dmapd)
  319. au1xpsc_pcm_destroy(wd->dmapd);
  320. snd_soc_unregister_dai(&au1xpsc_i2s_dai);
  321. au_writel(0, I2S_CFG(wd));
  322. au_sync();
  323. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  324. au_sync();
  325. iounmap(wd->mmio);
  326. release_resource(wd->ioarea);
  327. kfree(wd->ioarea);
  328. kfree(wd);
  329. au1xpsc_i2s_workdata = NULL; /* MDEV */
  330. return 0;
  331. }
  332. #ifdef CONFIG_PM
  333. static int au1xpsc_i2s_drvsuspend(struct device *dev)
  334. {
  335. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  336. /* save interesting register and disable PSC */
  337. wd->pm[0] = au_readl(PSC_SEL(wd));
  338. au_writel(0, I2S_CFG(wd));
  339. au_sync();
  340. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  341. au_sync();
  342. return 0;
  343. }
  344. static int au1xpsc_i2s_drvresume(struct device *dev)
  345. {
  346. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  347. /* select I2S mode and PSC clock */
  348. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  349. au_sync();
  350. au_writel(0, PSC_SEL(wd));
  351. au_sync();
  352. au_writel(wd->pm[0], PSC_SEL(wd));
  353. au_sync();
  354. return 0;
  355. }
  356. static struct dev_pm_ops au1xpsci2s_pmops = {
  357. .suspend = au1xpsc_i2s_drvsuspend,
  358. .resume = au1xpsc_i2s_drvresume,
  359. };
  360. #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
  361. #else
  362. #define AU1XPSCI2S_PMOPS NULL
  363. #endif
  364. static struct platform_driver au1xpsc_i2s_driver = {
  365. .driver = {
  366. .name = "au1xpsc_i2s",
  367. .owner = THIS_MODULE,
  368. .pm = AU1XPSCI2S_PMOPS,
  369. },
  370. .probe = au1xpsc_i2s_drvprobe,
  371. .remove = __devexit_p(au1xpsc_i2s_drvremove),
  372. };
  373. static int __init au1xpsc_i2s_load(void)
  374. {
  375. au1xpsc_i2s_workdata = NULL;
  376. return platform_driver_register(&au1xpsc_i2s_driver);
  377. }
  378. static void __exit au1xpsc_i2s_unload(void)
  379. {
  380. platform_driver_unregister(&au1xpsc_i2s_driver);
  381. }
  382. module_init(au1xpsc_i2s_load);
  383. module_exit(au1xpsc_i2s_unload);
  384. MODULE_LICENSE("GPL");
  385. MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
  386. MODULE_AUTHOR("Manuel Lauss");