savagefb.h 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414
  1. /*
  2. * linux/drivers/video/savagefb.h -- S3 Savage Framebuffer Driver
  3. *
  4. * Copyright (c) 2001 Denis Oliver Kropp <dok@convergence.de>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General
  7. * Public License. See the file COPYING in the main directory of this
  8. * archive for more details.
  9. */
  10. #ifndef __SAVAGEFB_H__
  11. #define __SAVAGEFB_H__
  12. #include <linux/i2c.h>
  13. #include <linux/i2c-id.h>
  14. #include <linux/i2c-algo-bit.h>
  15. #include <linux/mutex.h>
  16. #include <video/vga.h>
  17. #include "../edid.h"
  18. #ifdef SAVAGEFB_DEBUG
  19. # define DBG(x) printk (KERN_DEBUG "savagefb: %s\n", (x));
  20. #else
  21. # define DBG(x)
  22. # define SavagePrintRegs(...)
  23. #endif
  24. #define PCI_CHIP_SAVAGE4 0x8a22
  25. #define PCI_CHIP_SAVAGE3D 0x8a20
  26. #define PCI_CHIP_SAVAGE3D_MV 0x8a21
  27. #define PCI_CHIP_SAVAGE2000 0x9102
  28. #define PCI_CHIP_SAVAGE_MX_MV 0x8c10
  29. #define PCI_CHIP_SAVAGE_MX 0x8c11
  30. #define PCI_CHIP_SAVAGE_IX_MV 0x8c12
  31. #define PCI_CHIP_SAVAGE_IX 0x8c13
  32. #define PCI_CHIP_PROSAVAGE_PM 0x8a25
  33. #define PCI_CHIP_PROSAVAGE_KM 0x8a26
  34. /* Twister is a code name; hope I get the real name soon. */
  35. #define PCI_CHIP_S3TWISTER_P 0x8d01
  36. #define PCI_CHIP_S3TWISTER_K 0x8d02
  37. #define PCI_CHIP_PROSAVAGE_DDR 0x8d03
  38. #define PCI_CHIP_PROSAVAGE_DDRK 0x8d04
  39. #define PCI_CHIP_SUPSAV_MX128 0x8c22
  40. #define PCI_CHIP_SUPSAV_MX64 0x8c24
  41. #define PCI_CHIP_SUPSAV_MX64C 0x8c26
  42. #define PCI_CHIP_SUPSAV_IX128SDR 0x8c2a
  43. #define PCI_CHIP_SUPSAV_IX128DDR 0x8c2b
  44. #define PCI_CHIP_SUPSAV_IX64SDR 0x8c2c
  45. #define PCI_CHIP_SUPSAV_IX64DDR 0x8c2d
  46. #define PCI_CHIP_SUPSAV_IXCSDR 0x8c2e
  47. #define PCI_CHIP_SUPSAV_IXCDDR 0x8c2f
  48. #define S3_SAVAGE3D_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
  49. #define S3_SAVAGE4_SERIES(chip) ((chip==S3_SAVAGE4) || (chip==S3_PROSAVAGE))
  50. #define S3_SAVAGE_MOBILE_SERIES(chip) ((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
  51. #define S3_SAVAGE_SERIES(chip) ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
  52. /* Chip tags. These are used to group the adapters into
  53. * related families.
  54. */
  55. typedef enum {
  56. S3_UNKNOWN = 0,
  57. S3_SAVAGE3D,
  58. S3_SAVAGE_MX,
  59. S3_SAVAGE4,
  60. S3_PROSAVAGE,
  61. S3_SUPERSAVAGE,
  62. S3_SAVAGE2000,
  63. S3_LAST
  64. } savage_chipset;
  65. #define BIOS_BSIZE 1024
  66. #define BIOS_BASE 0xc0000
  67. #define SAVAGE_NEWMMIO_REGBASE_S3 0x1000000 /* 16MB */
  68. #define SAVAGE_NEWMMIO_REGBASE_S4 0x0000000
  69. #define SAVAGE_NEWMMIO_REGSIZE 0x0080000 /* 512kb */
  70. #define SAVAGE_NEWMMIO_VGABASE 0x8000
  71. #define BASE_FREQ 14318
  72. #define HALF_BASE_FREQ 7159
  73. #define FIFO_CONTROL_REG 0x8200
  74. #define MIU_CONTROL_REG 0x8204
  75. #define STREAMS_TIMEOUT_REG 0x8208
  76. #define MISC_TIMEOUT_REG 0x820c
  77. #define MONO_PAT_0 0xa4e8
  78. #define MONO_PAT_1 0xa4ec
  79. #define MAXFIFO 0x7f00
  80. #define BCI_CMD_NOP 0x40000000
  81. #define BCI_CMD_SETREG 0x96000000
  82. #define BCI_CMD_RECT 0x48000000
  83. #define BCI_CMD_RECT_XP 0x01000000
  84. #define BCI_CMD_RECT_YP 0x02000000
  85. #define BCI_CMD_SEND_COLOR 0x00008000
  86. #define BCI_CMD_DEST_GBD 0x00000000
  87. #define BCI_CMD_SRC_GBD 0x00000020
  88. #define BCI_CMD_SRC_SOLID 0x00000000
  89. #define BCI_CMD_SRC_MONO 0x00000060
  90. #define BCI_CMD_CLIP_NEW 0x00006000
  91. #define BCI_CMD_CLIP_LR 0x00004000
  92. #define BCI_CLIP_LR(l, r) ((((r) << 16) | (l)) & 0x0FFF0FFF)
  93. #define BCI_CLIP_TL(t, l) ((((t) << 16) | (l)) & 0x0FFF0FFF)
  94. #define BCI_CLIP_BR(b, r) ((((b) << 16) | (r)) & 0x0FFF0FFF)
  95. #define BCI_W_H(w, h) (((h) << 16) | ((w) & 0xFFF))
  96. #define BCI_X_Y(x, y) (((y) << 16) | ((x) & 0xFFF))
  97. #define BCI_GBD1 0xE0
  98. #define BCI_GBD2 0xE1
  99. #define BCI_BUFFER_OFFSET 0x10000
  100. #define BCI_SIZE 0x4000
  101. #define BCI_SEND(dw) writel(dw, par->bci_base + par->bci_ptr++)
  102. #define BCI_CMD_GET_ROP(cmd) (((cmd) >> 16) & 0xFF)
  103. #define BCI_CMD_SET_ROP(cmd, rop) ((cmd) |= ((rop & 0xFF) << 16))
  104. #define BCI_CMD_SEND_COLOR 0x00008000
  105. #define DISP_CRT 1
  106. #define DISP_LCD 2
  107. #define DISP_DFP 3
  108. struct xtimings {
  109. unsigned int Clock;
  110. unsigned int HDisplay;
  111. unsigned int HSyncStart;
  112. unsigned int HSyncEnd;
  113. unsigned int HTotal;
  114. unsigned int HAdjusted;
  115. unsigned int VDisplay;
  116. unsigned int VSyncStart;
  117. unsigned int VSyncEnd;
  118. unsigned int VTotal;
  119. unsigned int sync;
  120. int dblscan;
  121. int interlaced;
  122. };
  123. struct savage_reg {
  124. unsigned char MiscOutReg; /* Misc */
  125. unsigned char CRTC[25]; /* Crtc Controller */
  126. unsigned char Sequencer[5]; /* Video Sequencer */
  127. unsigned char Graphics[9]; /* Video Graphics */
  128. unsigned char Attribute[21]; /* Video Atribute */
  129. unsigned int mode, refresh;
  130. unsigned char SR08, SR0E, SR0F;
  131. unsigned char SR10, SR11, SR12, SR13, SR15, SR18, SR29, SR30;
  132. unsigned char SR54[8];
  133. unsigned char Clock;
  134. unsigned char CR31, CR32, CR33, CR34, CR36, CR3A, CR3B, CR3C;
  135. unsigned char CR40, CR41, CR42, CR43, CR45;
  136. unsigned char CR50, CR51, CR53, CR55, CR58, CR5B, CR5D, CR5E;
  137. unsigned char CR60, CR63, CR65, CR66, CR67, CR68, CR69, CR6D, CR6F;
  138. unsigned char CR86, CR88;
  139. unsigned char CR90, CR91, CRB0;
  140. unsigned int STREAMS[22]; /* yuck, streams regs */
  141. unsigned int MMPR0, MMPR1, MMPR2, MMPR3;
  142. };
  143. /* --------------------------------------------------------------------- */
  144. #define NR_PALETTE 256
  145. struct savagefb_par;
  146. struct savagefb_i2c_chan {
  147. struct savagefb_par *par;
  148. struct i2c_adapter adapter;
  149. struct i2c_algo_bit_data algo;
  150. volatile u8 __iomem *ioaddr;
  151. u32 reg;
  152. };
  153. struct savagefb_par {
  154. struct pci_dev *pcidev;
  155. savage_chipset chip;
  156. struct savagefb_i2c_chan chan;
  157. struct savage_reg state;
  158. struct savage_reg save;
  159. struct savage_reg initial;
  160. struct vgastate vgastate;
  161. struct mutex open_lock;
  162. unsigned char *edid;
  163. u32 pseudo_palette[16];
  164. u32 open_count;
  165. int paletteEnabled;
  166. int pm_state;
  167. int display_type;
  168. int dvi;
  169. int crtonly;
  170. int dacSpeedBpp;
  171. int maxClock;
  172. int minClock;
  173. int numClocks;
  174. int clock[4];
  175. int MCLK, REFCLK, LCDclk;
  176. struct {
  177. void __iomem *vbase;
  178. u32 pbase;
  179. u32 len;
  180. #ifdef CONFIG_MTRR
  181. int mtrr;
  182. #endif
  183. } video;
  184. struct {
  185. void __iomem *vbase;
  186. u32 pbase;
  187. u32 len;
  188. } mmio;
  189. volatile u32 __iomem *bci_base;
  190. unsigned int bci_ptr;
  191. u32 cob_offset;
  192. u32 cob_size;
  193. int cob_index;
  194. void (*SavageWaitIdle) (struct savagefb_par *par);
  195. void (*SavageWaitFifo) (struct savagefb_par *par, int space);
  196. int HorizScaleFactor;
  197. /* Panels size */
  198. int SavagePanelWidth;
  199. int SavagePanelHeight;
  200. struct {
  201. u16 red, green, blue, transp;
  202. } palette[NR_PALETTE];
  203. int depth;
  204. int vwidth;
  205. };
  206. #define BCI_BD_BW_DISABLE 0x10000000
  207. #define BCI_BD_SET_BPP(bd, bpp) ((bd) |= (((bpp) & 0xFF) << 16))
  208. #define BCI_BD_SET_STRIDE(bd, st) ((bd) |= ((st) & 0xFFFF))
  209. /* IO functions */
  210. static inline u8 savage_in8(u32 addr, struct savagefb_par *par)
  211. {
  212. return readb(par->mmio.vbase + addr);
  213. }
  214. static inline u16 savage_in16(u32 addr, struct savagefb_par *par)
  215. {
  216. return readw(par->mmio.vbase + addr);
  217. }
  218. static inline u32 savage_in32(u32 addr, struct savagefb_par *par)
  219. {
  220. return readl(par->mmio.vbase + addr);
  221. }
  222. static inline void savage_out8(u32 addr, u8 val, struct savagefb_par *par)
  223. {
  224. writeb(val, par->mmio.vbase + addr);
  225. }
  226. static inline void savage_out16(u32 addr, u16 val, struct savagefb_par *par)
  227. {
  228. writew(val, par->mmio.vbase + addr);
  229. }
  230. static inline void savage_out32(u32 addr, u32 val, struct savagefb_par *par)
  231. {
  232. writel(val, par->mmio.vbase + addr);
  233. }
  234. static inline u8 vga_in8(int addr, struct savagefb_par *par)
  235. {
  236. return savage_in8(0x8000 + addr, par);
  237. }
  238. static inline u16 vga_in16(int addr, struct savagefb_par *par)
  239. {
  240. return savage_in16(0x8000 + addr, par);
  241. }
  242. static inline u8 vga_in32(int addr, struct savagefb_par *par)
  243. {
  244. return savage_in32(0x8000 + addr, par);
  245. }
  246. static inline void vga_out8(int addr, u8 val, struct savagefb_par *par)
  247. {
  248. savage_out8(0x8000 + addr, val, par);
  249. }
  250. static inline void vga_out16(int addr, u16 val, struct savagefb_par *par)
  251. {
  252. savage_out16(0x8000 + addr, val, par);
  253. }
  254. static inline void vga_out32(int addr, u32 val, struct savagefb_par *par)
  255. {
  256. savage_out32(0x8000 + addr, val, par);
  257. }
  258. static inline u8 VGArCR (u8 index, struct savagefb_par *par)
  259. {
  260. vga_out8(0x3d4, index, par);
  261. return vga_in8(0x3d5, par);
  262. }
  263. static inline u8 VGArGR (u8 index, struct savagefb_par *par)
  264. {
  265. vga_out8(0x3ce, index, par);
  266. return vga_in8(0x3cf, par);
  267. }
  268. static inline u8 VGArSEQ (u8 index, struct savagefb_par *par)
  269. {
  270. vga_out8(0x3c4, index, par);
  271. return vga_in8(0x3c5, par);
  272. }
  273. static inline void VGAwCR(u8 index, u8 val, struct savagefb_par *par)
  274. {
  275. vga_out8(0x3d4, index, par);
  276. vga_out8(0x3d5, val, par);
  277. }
  278. static inline void VGAwGR(u8 index, u8 val, struct savagefb_par *par)
  279. {
  280. vga_out8(0x3ce, index, par);
  281. vga_out8(0x3cf, val, par);
  282. }
  283. static inline void VGAwSEQ(u8 index, u8 val, struct savagefb_par *par)
  284. {
  285. vga_out8(0x3c4, index, par);
  286. vga_out8 (0x3c5, val, par);
  287. }
  288. static inline void VGAenablePalette(struct savagefb_par *par)
  289. {
  290. u8 tmp;
  291. tmp = vga_in8(0x3da, par);
  292. vga_out8(0x3c0, 0x00, par);
  293. par->paletteEnabled = 1;
  294. }
  295. static inline void VGAdisablePalette(struct savagefb_par *par)
  296. {
  297. u8 tmp;
  298. tmp = vga_in8(0x3da, par);
  299. vga_out8(0x3c0, 0x20, par);
  300. par->paletteEnabled = 0;
  301. }
  302. static inline void VGAwATTR(u8 index, u8 value, struct savagefb_par *par)
  303. {
  304. u8 tmp;
  305. if (par->paletteEnabled)
  306. index &= ~0x20;
  307. else
  308. index |= 0x20;
  309. tmp = vga_in8(0x3da, par);
  310. vga_out8(0x3c0, index, par);
  311. vga_out8 (0x3c0, value, par);
  312. }
  313. static inline void VGAwMISC(u8 value, struct savagefb_par *par)
  314. {
  315. vga_out8(0x3c2, value, par);
  316. }
  317. #ifndef CONFIG_FB_SAVAGE_ACCEL
  318. #define savagefb_set_clip(x)
  319. #endif
  320. static inline void VerticalRetraceWait(struct savagefb_par *par)
  321. {
  322. vga_out8(0x3d4, 0x17, par);
  323. if (vga_in8(0x3d5, par) & 0x80) {
  324. while ((vga_in8(0x3da, par) & 0x08) == 0x08);
  325. while ((vga_in8(0x3da, par) & 0x08) == 0x00);
  326. }
  327. }
  328. extern int savagefb_probe_i2c_connector(struct fb_info *info,
  329. u8 **out_edid);
  330. extern void savagefb_create_i2c_busses(struct fb_info *info);
  331. extern void savagefb_delete_i2c_busses(struct fb_info *info);
  332. extern int savagefb_sync(struct fb_info *info);
  333. extern void savagefb_copyarea(struct fb_info *info,
  334. const struct fb_copyarea *region);
  335. extern void savagefb_fillrect(struct fb_info *info,
  336. const struct fb_fillrect *rect);
  337. extern void savagefb_imageblit(struct fb_info *info,
  338. const struct fb_image *image);
  339. #endif /* __SAVAGEFB_H__ */