whc-rc.c 13 KB

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  1. /*
  2. * Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
  3. * Radio Control command/event transport to the UWB stack
  4. *
  5. * Copyright (C) 2005-2006 Intel Corporation
  6. * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License version
  10. * 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  20. * 02110-1301, USA.
  21. *
  22. *
  23. * Initialize and hook up the Radio Control interface.
  24. *
  25. * For each device probed, creates an 'struct whcrc' which contains
  26. * just the representation of the UWB Radio Controller, and the logic
  27. * for reading notifications and passing them to the UWB Core.
  28. *
  29. * So we initialize all of those, register the UWB Radio Controller
  30. * and setup the notification/event handle to pipe the notifications
  31. * to the UWB management Daemon.
  32. *
  33. * Once uwb_rc_add() is called, the UWB stack takes control, resets
  34. * the radio and readies the device to take commands the UWB
  35. * API/user-space.
  36. *
  37. * Note this driver is just a transport driver; the commands are
  38. * formed at the UWB stack and given to this driver who will deliver
  39. * them to the hw and transfer the replies/notifications back to the
  40. * UWB stack through the UWB daemon (UWBD).
  41. */
  42. #include <linux/init.h>
  43. #include <linux/module.h>
  44. #include <linux/pci.h>
  45. #include <linux/sched.h>
  46. #include <linux/dma-mapping.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/workqueue.h>
  49. #include <linux/uwb.h>
  50. #include <linux/uwb/whci.h>
  51. #include <linux/uwb/umc.h>
  52. #include "uwb-internal.h"
  53. /**
  54. * Descriptor for an instance of the UWB Radio Control Driver that
  55. * attaches to the URC interface of the WHCI PCI card.
  56. *
  57. * Unless there is a lock specific to the 'data members', all access
  58. * is protected by uwb_rc->mutex.
  59. */
  60. struct whcrc {
  61. struct umc_dev *umc_dev;
  62. struct uwb_rc *uwb_rc; /* UWB host controller */
  63. unsigned long area;
  64. void __iomem *rc_base;
  65. size_t rc_len;
  66. spinlock_t irq_lock;
  67. void *evt_buf, *cmd_buf;
  68. dma_addr_t evt_dma_buf, cmd_dma_buf;
  69. wait_queue_head_t cmd_wq;
  70. struct work_struct event_work;
  71. };
  72. /**
  73. * Execute an UWB RC command on WHCI/RC
  74. *
  75. * @rc: Instance of a Radio Controller that is a whcrc
  76. * @cmd: Buffer containing the RCCB and payload to execute
  77. * @cmd_size: Size of the command buffer.
  78. *
  79. * We copy the command into whcrc->cmd_buf (as it is pretty and
  80. * aligned`and physically contiguous) and then press the right keys in
  81. * the controller's URCCMD register to get it to read it. We might
  82. * have to wait for the cmd_sem to be open to us.
  83. *
  84. * NOTE: rc's mutex has to be locked
  85. */
  86. static int whcrc_cmd(struct uwb_rc *uwb_rc,
  87. const struct uwb_rccb *cmd, size_t cmd_size)
  88. {
  89. int result = 0;
  90. struct whcrc *whcrc = uwb_rc->priv;
  91. struct device *dev = &whcrc->umc_dev->dev;
  92. u32 urccmd;
  93. if (cmd_size >= 4096)
  94. return -EINVAL;
  95. /*
  96. * If the URC is halted, then the hardware has reset itself.
  97. * Attempt to recover by restarting the device and then return
  98. * an error as it's likely that the current command isn't
  99. * valid for a newly started RC.
  100. */
  101. if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
  102. dev_err(dev, "requesting reset of halted radio controller\n");
  103. uwb_rc_reset_all(uwb_rc);
  104. return -EIO;
  105. }
  106. result = wait_event_timeout(whcrc->cmd_wq,
  107. !(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
  108. if (result == 0) {
  109. dev_err(dev, "device is not ready to execute commands\n");
  110. return -ETIMEDOUT;
  111. }
  112. memmove(whcrc->cmd_buf, cmd, cmd_size);
  113. le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
  114. spin_lock(&whcrc->irq_lock);
  115. urccmd = le_readl(whcrc->rc_base + URCCMD);
  116. urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
  117. le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
  118. whcrc->rc_base + URCCMD);
  119. spin_unlock(&whcrc->irq_lock);
  120. return 0;
  121. }
  122. static int whcrc_reset(struct uwb_rc *rc)
  123. {
  124. struct whcrc *whcrc = rc->priv;
  125. return umc_controller_reset(whcrc->umc_dev);
  126. }
  127. /**
  128. * Reset event reception mechanism and tell hw we are ready to get more
  129. *
  130. * We have read all the events in the event buffer, so we are ready to
  131. * reset it to the beginning.
  132. *
  133. * This is only called during initialization or after an event buffer
  134. * has been retired. This means we can be sure that event processing
  135. * is disabled and it's safe to update the URCEVTADDR register.
  136. *
  137. * There's no need to wait for the event processing to start as the
  138. * URC will not clear URCCMD_ACTIVE until (internal) event buffer
  139. * space is available.
  140. */
  141. static
  142. void whcrc_enable_events(struct whcrc *whcrc)
  143. {
  144. u32 urccmd;
  145. le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
  146. spin_lock(&whcrc->irq_lock);
  147. urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
  148. le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
  149. spin_unlock(&whcrc->irq_lock);
  150. }
  151. static void whcrc_event_work(struct work_struct *work)
  152. {
  153. struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
  154. size_t size;
  155. u64 urcevtaddr;
  156. urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
  157. size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
  158. uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
  159. whcrc_enable_events(whcrc);
  160. }
  161. /**
  162. * Catch interrupts?
  163. *
  164. * We ack inmediately (and expect the hw to do the right thing and
  165. * raise another IRQ if things have changed :)
  166. */
  167. static
  168. irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
  169. {
  170. struct whcrc *whcrc = _whcrc;
  171. struct device *dev = &whcrc->umc_dev->dev;
  172. u32 urcsts;
  173. urcsts = le_readl(whcrc->rc_base + URCSTS);
  174. if (!(urcsts & URCSTS_INT_MASK))
  175. return IRQ_NONE;
  176. le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
  177. if (urcsts & URCSTS_HSE) {
  178. dev_err(dev, "host system error -- hardware halted\n");
  179. /* FIXME: do something sensible here */
  180. goto out;
  181. }
  182. if (urcsts & URCSTS_ER)
  183. schedule_work(&whcrc->event_work);
  184. if (urcsts & URCSTS_RCI)
  185. wake_up_all(&whcrc->cmd_wq);
  186. out:
  187. return IRQ_HANDLED;
  188. }
  189. /**
  190. * Initialize a UMC RC interface: map regions, get (shared) IRQ
  191. */
  192. static
  193. int whcrc_setup_rc_umc(struct whcrc *whcrc)
  194. {
  195. int result = 0;
  196. struct device *dev = &whcrc->umc_dev->dev;
  197. struct umc_dev *umc_dev = whcrc->umc_dev;
  198. whcrc->area = umc_dev->resource.start;
  199. whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
  200. result = -EBUSY;
  201. if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) {
  202. dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
  203. whcrc->rc_len, whcrc->area, result);
  204. goto error_request_region;
  205. }
  206. whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
  207. if (whcrc->rc_base == NULL) {
  208. dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
  209. whcrc->rc_len, whcrc->area, result);
  210. goto error_ioremap_nocache;
  211. }
  212. result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
  213. KBUILD_MODNAME, whcrc);
  214. if (result < 0) {
  215. dev_err(dev, "can't allocate IRQ %d: %d\n",
  216. umc_dev->irq, result);
  217. goto error_request_irq;
  218. }
  219. result = -ENOMEM;
  220. whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  221. &whcrc->cmd_dma_buf, GFP_KERNEL);
  222. if (whcrc->cmd_buf == NULL) {
  223. dev_err(dev, "Can't allocate cmd transfer buffer\n");
  224. goto error_cmd_buffer;
  225. }
  226. whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
  227. &whcrc->evt_dma_buf, GFP_KERNEL);
  228. if (whcrc->evt_buf == NULL) {
  229. dev_err(dev, "Can't allocate evt transfer buffer\n");
  230. goto error_evt_buffer;
  231. }
  232. return 0;
  233. error_evt_buffer:
  234. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  235. whcrc->cmd_dma_buf);
  236. error_cmd_buffer:
  237. free_irq(umc_dev->irq, whcrc);
  238. error_request_irq:
  239. iounmap(whcrc->rc_base);
  240. error_ioremap_nocache:
  241. release_mem_region(whcrc->area, whcrc->rc_len);
  242. error_request_region:
  243. return result;
  244. }
  245. /**
  246. * Release RC's UMC resources
  247. */
  248. static
  249. void whcrc_release_rc_umc(struct whcrc *whcrc)
  250. {
  251. struct umc_dev *umc_dev = whcrc->umc_dev;
  252. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
  253. whcrc->evt_dma_buf);
  254. dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
  255. whcrc->cmd_dma_buf);
  256. free_irq(umc_dev->irq, whcrc);
  257. iounmap(whcrc->rc_base);
  258. release_mem_region(whcrc->area, whcrc->rc_len);
  259. }
  260. /**
  261. * whcrc_start_rc - start a WHCI radio controller
  262. * @whcrc: the radio controller to start
  263. *
  264. * Reset the UMC device, start the radio controller, enable events and
  265. * finally enable interrupts.
  266. */
  267. static int whcrc_start_rc(struct uwb_rc *rc)
  268. {
  269. struct whcrc *whcrc = rc->priv;
  270. struct device *dev = &whcrc->umc_dev->dev;
  271. /* Reset the thing */
  272. le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
  273. if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
  274. 5000, "hardware reset") < 0)
  275. return -EBUSY;
  276. /* Set the event buffer, start the controller (enable IRQs later) */
  277. le_writel(0, whcrc->rc_base + URCINTR);
  278. le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
  279. if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
  280. 5000, "radio controller start") < 0)
  281. return -ETIMEDOUT;
  282. whcrc_enable_events(whcrc);
  283. le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
  284. return 0;
  285. }
  286. /**
  287. * whcrc_stop_rc - stop a WHCI radio controller
  288. * @whcrc: the radio controller to stop
  289. *
  290. * Disable interrupts and cancel any pending event processing work
  291. * before clearing the Run/Stop bit.
  292. */
  293. static
  294. void whcrc_stop_rc(struct uwb_rc *rc)
  295. {
  296. struct whcrc *whcrc = rc->priv;
  297. struct umc_dev *umc_dev = whcrc->umc_dev;
  298. le_writel(0, whcrc->rc_base + URCINTR);
  299. cancel_work_sync(&whcrc->event_work);
  300. le_writel(0, whcrc->rc_base + URCCMD);
  301. whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
  302. URCSTS_HALTED, URCSTS_HALTED, 100, "radio controller stop");
  303. }
  304. static void whcrc_init(struct whcrc *whcrc)
  305. {
  306. spin_lock_init(&whcrc->irq_lock);
  307. init_waitqueue_head(&whcrc->cmd_wq);
  308. INIT_WORK(&whcrc->event_work, whcrc_event_work);
  309. }
  310. /**
  311. * Initialize the radio controller.
  312. *
  313. * NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
  314. * IRQ handler we use that to determine if the hw is ready to
  315. * handle events. Looks like a race condition, but it really is
  316. * not.
  317. */
  318. static
  319. int whcrc_probe(struct umc_dev *umc_dev)
  320. {
  321. int result;
  322. struct uwb_rc *uwb_rc;
  323. struct whcrc *whcrc;
  324. struct device *dev = &umc_dev->dev;
  325. result = -ENOMEM;
  326. uwb_rc = uwb_rc_alloc();
  327. if (uwb_rc == NULL) {
  328. dev_err(dev, "unable to allocate RC instance\n");
  329. goto error_rc_alloc;
  330. }
  331. whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
  332. if (whcrc == NULL) {
  333. dev_err(dev, "unable to allocate WHC-RC instance\n");
  334. goto error_alloc;
  335. }
  336. whcrc_init(whcrc);
  337. whcrc->umc_dev = umc_dev;
  338. result = whcrc_setup_rc_umc(whcrc);
  339. if (result < 0) {
  340. dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
  341. goto error_setup_rc_umc;
  342. }
  343. whcrc->uwb_rc = uwb_rc;
  344. uwb_rc->owner = THIS_MODULE;
  345. uwb_rc->cmd = whcrc_cmd;
  346. uwb_rc->reset = whcrc_reset;
  347. uwb_rc->start = whcrc_start_rc;
  348. uwb_rc->stop = whcrc_stop_rc;
  349. result = uwb_rc_add(uwb_rc, dev, whcrc);
  350. if (result < 0)
  351. goto error_rc_add;
  352. umc_set_drvdata(umc_dev, whcrc);
  353. return 0;
  354. error_rc_add:
  355. whcrc_release_rc_umc(whcrc);
  356. error_setup_rc_umc:
  357. kfree(whcrc);
  358. error_alloc:
  359. uwb_rc_put(uwb_rc);
  360. error_rc_alloc:
  361. return result;
  362. }
  363. /**
  364. * Clean up the radio control resources
  365. *
  366. * When we up the command semaphore, everybody possibly held trying to
  367. * execute a command should be granted entry and then they'll see the
  368. * host is quiescing and up it (so it will chain to the next waiter).
  369. * This should not happen (in any case), as we can only remove when
  370. * there are no handles open...
  371. */
  372. static void whcrc_remove(struct umc_dev *umc_dev)
  373. {
  374. struct whcrc *whcrc = umc_get_drvdata(umc_dev);
  375. struct uwb_rc *uwb_rc = whcrc->uwb_rc;
  376. umc_set_drvdata(umc_dev, NULL);
  377. uwb_rc_rm(uwb_rc);
  378. whcrc_release_rc_umc(whcrc);
  379. kfree(whcrc);
  380. uwb_rc_put(uwb_rc);
  381. }
  382. static int whcrc_pre_reset(struct umc_dev *umc)
  383. {
  384. struct whcrc *whcrc = umc_get_drvdata(umc);
  385. struct uwb_rc *uwb_rc = whcrc->uwb_rc;
  386. uwb_rc_pre_reset(uwb_rc);
  387. return 0;
  388. }
  389. static int whcrc_post_reset(struct umc_dev *umc)
  390. {
  391. struct whcrc *whcrc = umc_get_drvdata(umc);
  392. struct uwb_rc *uwb_rc = whcrc->uwb_rc;
  393. return uwb_rc_post_reset(uwb_rc);
  394. }
  395. /* PCI device ID's that we handle [so it gets loaded] */
  396. static struct pci_device_id whcrc_id_table[] = {
  397. { PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
  398. { /* empty last entry */ }
  399. };
  400. MODULE_DEVICE_TABLE(pci, whcrc_id_table);
  401. static struct umc_driver whcrc_driver = {
  402. .name = "whc-rc",
  403. .cap_id = UMC_CAP_ID_WHCI_RC,
  404. .probe = whcrc_probe,
  405. .remove = whcrc_remove,
  406. .pre_reset = whcrc_pre_reset,
  407. .post_reset = whcrc_post_reset,
  408. };
  409. static int __init whcrc_driver_init(void)
  410. {
  411. return umc_driver_register(&whcrc_driver);
  412. }
  413. module_init(whcrc_driver_init);
  414. static void __exit whcrc_driver_exit(void)
  415. {
  416. umc_driver_unregister(&whcrc_driver);
  417. }
  418. module_exit(whcrc_driver_exit);
  419. MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
  420. MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
  421. MODULE_LICENSE("GPL");