ohci-au1xxx.c 7.4 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. * (C) Copyright 2002 Hewlett-Packard Company
  7. *
  8. * Bus Glue for AMD Alchemy Au1xxx
  9. *
  10. * Written by Christopher Hoover <ch@hpl.hp.com>
  11. * Based on fragments of previous driver by Russell King et al.
  12. *
  13. * Modified for LH7A404 from ohci-sa1111.c
  14. * by Durgesh Pattamatta <pattamattad@sharpsec.com>
  15. * Modified for AMD Alchemy Au1xxx
  16. * by Matt Porter <mporter@kernel.crashing.org>
  17. *
  18. * This file is licenced under the GPL.
  19. */
  20. #include <linux/platform_device.h>
  21. #include <linux/signal.h>
  22. #include <asm/mach-au1x00/au1000.h>
  23. #ifndef CONFIG_SOC_AU1200
  24. #define USBH_ENABLE_BE (1<<0)
  25. #define USBH_ENABLE_C (1<<1)
  26. #define USBH_ENABLE_E (1<<2)
  27. #define USBH_ENABLE_CE (1<<3)
  28. #define USBH_ENABLE_RD (1<<4)
  29. #ifdef __LITTLE_ENDIAN
  30. #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C)
  31. #elif __BIG_ENDIAN
  32. #define USBH_ENABLE_INIT (USBH_ENABLE_CE | USBH_ENABLE_E | USBH_ENABLE_C | \
  33. USBH_ENABLE_BE)
  34. #else
  35. #error not byte order defined
  36. #endif
  37. #else /* Au1200 */
  38. #define USB_HOST_CONFIG (USB_MSR_BASE + USB_MSR_MCFG)
  39. #define USB_MCFG_PFEN (1<<31)
  40. #define USB_MCFG_RDCOMB (1<<30)
  41. #define USB_MCFG_SSDEN (1<<23)
  42. #define USB_MCFG_OHCCLKEN (1<<16)
  43. #ifdef CONFIG_DMA_COHERENT
  44. #define USB_MCFG_UCAM (1<<7)
  45. #else
  46. #define USB_MCFG_UCAM (0)
  47. #endif
  48. #define USB_MCFG_OBMEN (1<<1)
  49. #define USB_MCFG_OMEMEN (1<<0)
  50. #define USBH_ENABLE_CE USB_MCFG_OHCCLKEN
  51. #define USBH_ENABLE_INIT (USB_MCFG_PFEN | USB_MCFG_RDCOMB | \
  52. USBH_ENABLE_CE | USB_MCFG_SSDEN | \
  53. USB_MCFG_UCAM | \
  54. USB_MCFG_OBMEN | USB_MCFG_OMEMEN)
  55. #define USBH_DISABLE (USB_MCFG_OBMEN | USB_MCFG_OMEMEN)
  56. #endif /* Au1200 */
  57. extern int usb_disabled(void);
  58. static void au1xxx_start_ohc(void)
  59. {
  60. /* enable host controller */
  61. #ifndef CONFIG_SOC_AU1200
  62. au_writel(USBH_ENABLE_CE, USB_HOST_CONFIG);
  63. au_sync();
  64. udelay(1000);
  65. au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG);
  66. au_sync();
  67. udelay(1000);
  68. /* wait for reset complete (read register twice; see au1500 errata) */
  69. while (au_readl(USB_HOST_CONFIG),
  70. !(au_readl(USB_HOST_CONFIG) & USBH_ENABLE_RD))
  71. udelay(1000);
  72. #else /* Au1200 */
  73. au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_CE, USB_HOST_CONFIG);
  74. au_sync();
  75. udelay(1000);
  76. au_writel(au_readl(USB_HOST_CONFIG) | USBH_ENABLE_INIT, USB_HOST_CONFIG);
  77. au_sync();
  78. udelay(2000);
  79. #endif /* Au1200 */
  80. }
  81. static void au1xxx_stop_ohc(void)
  82. {
  83. #ifdef CONFIG_SOC_AU1200
  84. /* Disable mem */
  85. au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_DISABLE, USB_HOST_CONFIG);
  86. au_sync();
  87. udelay(1000);
  88. #endif
  89. /* Disable clock */
  90. au_writel(au_readl(USB_HOST_CONFIG) & ~USBH_ENABLE_CE, USB_HOST_CONFIG);
  91. au_sync();
  92. }
  93. static int __devinit ohci_au1xxx_start(struct usb_hcd *hcd)
  94. {
  95. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  96. int ret;
  97. ohci_dbg(ohci, "ohci_au1xxx_start, ohci:%p", ohci);
  98. if ((ret = ohci_init(ohci)) < 0)
  99. return ret;
  100. if ((ret = ohci_run(ohci)) < 0) {
  101. err ("can't start %s", hcd->self.bus_name);
  102. ohci_stop(hcd);
  103. return ret;
  104. }
  105. return 0;
  106. }
  107. static const struct hc_driver ohci_au1xxx_hc_driver = {
  108. .description = hcd_name,
  109. .product_desc = "Au1xxx OHCI",
  110. .hcd_priv_size = sizeof(struct ohci_hcd),
  111. /*
  112. * generic hardware linkage
  113. */
  114. .irq = ohci_irq,
  115. .flags = HCD_USB11 | HCD_MEMORY,
  116. /*
  117. * basic lifecycle operations
  118. */
  119. .start = ohci_au1xxx_start,
  120. .stop = ohci_stop,
  121. .shutdown = ohci_shutdown,
  122. /*
  123. * managing i/o requests and associated device resources
  124. */
  125. .urb_enqueue = ohci_urb_enqueue,
  126. .urb_dequeue = ohci_urb_dequeue,
  127. .endpoint_disable = ohci_endpoint_disable,
  128. /*
  129. * scheduling support
  130. */
  131. .get_frame_number = ohci_get_frame,
  132. /*
  133. * root hub support
  134. */
  135. .hub_status_data = ohci_hub_status_data,
  136. .hub_control = ohci_hub_control,
  137. #ifdef CONFIG_PM
  138. .bus_suspend = ohci_bus_suspend,
  139. .bus_resume = ohci_bus_resume,
  140. #endif
  141. .start_port_reset = ohci_start_port_reset,
  142. };
  143. static int ohci_hcd_au1xxx_drv_probe(struct platform_device *pdev)
  144. {
  145. int ret;
  146. struct usb_hcd *hcd;
  147. if (usb_disabled())
  148. return -ENODEV;
  149. #if defined(CONFIG_SOC_AU1200) && defined(CONFIG_DMA_COHERENT)
  150. /* Au1200 AB USB does not support coherent memory */
  151. if (!(read_c0_prid() & 0xff)) {
  152. printk(KERN_INFO "%s: this is chip revision AB !!\n",
  153. pdev->name);
  154. printk(KERN_INFO "%s: update your board or re-configure "
  155. "the kernel\n", pdev->name);
  156. return -ENODEV;
  157. }
  158. #endif
  159. if (pdev->resource[1].flags != IORESOURCE_IRQ) {
  160. pr_debug("resource[1] is not IORESOURCE_IRQ\n");
  161. return -ENOMEM;
  162. }
  163. hcd = usb_create_hcd(&ohci_au1xxx_hc_driver, &pdev->dev, "au1xxx");
  164. if (!hcd)
  165. return -ENOMEM;
  166. hcd->rsrc_start = pdev->resource[0].start;
  167. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  168. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  169. pr_debug("request_mem_region failed\n");
  170. ret = -EBUSY;
  171. goto err1;
  172. }
  173. hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
  174. if (!hcd->regs) {
  175. pr_debug("ioremap failed\n");
  176. ret = -ENOMEM;
  177. goto err2;
  178. }
  179. au1xxx_start_ohc();
  180. ohci_hcd_init(hcd_to_ohci(hcd));
  181. ret = usb_add_hcd(hcd, pdev->resource[1].start,
  182. IRQF_DISABLED | IRQF_SHARED);
  183. if (ret == 0) {
  184. platform_set_drvdata(pdev, hcd);
  185. return ret;
  186. }
  187. au1xxx_stop_ohc();
  188. iounmap(hcd->regs);
  189. err2:
  190. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  191. err1:
  192. usb_put_hcd(hcd);
  193. return ret;
  194. }
  195. static int ohci_hcd_au1xxx_drv_remove(struct platform_device *pdev)
  196. {
  197. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  198. usb_remove_hcd(hcd);
  199. au1xxx_stop_ohc();
  200. iounmap(hcd->regs);
  201. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  202. usb_put_hcd(hcd);
  203. platform_set_drvdata(pdev, NULL);
  204. return 0;
  205. }
  206. #ifdef CONFIG_PM
  207. static int ohci_hcd_au1xxx_drv_suspend(struct device *dev)
  208. {
  209. struct usb_hcd *hcd = dev_get_drvdata(dev);
  210. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  211. unsigned long flags;
  212. int rc;
  213. rc = 0;
  214. /* Root hub was already suspended. Disable irq emission and
  215. * mark HW unaccessible, bail out if RH has been resumed. Use
  216. * the spinlock to properly synchronize with possible pending
  217. * RH suspend or resume activity.
  218. *
  219. * This is still racy as hcd->state is manipulated outside of
  220. * any locks =P But that will be a different fix.
  221. */
  222. spin_lock_irqsave(&ohci->lock, flags);
  223. if (hcd->state != HC_STATE_SUSPENDED) {
  224. rc = -EINVAL;
  225. goto bail;
  226. }
  227. ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  228. (void)ohci_readl(ohci, &ohci->regs->intrdisable);
  229. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  230. au1xxx_stop_ohc();
  231. bail:
  232. spin_unlock_irqrestore(&ohci->lock, flags);
  233. return rc;
  234. }
  235. static int ohci_hcd_au1xxx_drv_resume(struct device *dev)
  236. {
  237. struct usb_hcd *hcd = dev_get_drvdata(dev);
  238. au1xxx_start_ohc();
  239. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  240. ohci_finish_controller_resume(hcd);
  241. return 0;
  242. }
  243. static struct dev_pm_ops au1xxx_ohci_pmops = {
  244. .suspend = ohci_hcd_au1xxx_drv_suspend,
  245. .resume = ohci_hcd_au1xxx_drv_resume,
  246. };
  247. #define AU1XXX_OHCI_PMOPS &au1xxx_ohci_pmops
  248. #else
  249. #define AU1XXX_OHCI_PMOPS NULL
  250. #endif
  251. static struct platform_driver ohci_hcd_au1xxx_driver = {
  252. .probe = ohci_hcd_au1xxx_drv_probe,
  253. .remove = ohci_hcd_au1xxx_drv_remove,
  254. .shutdown = usb_hcd_platform_shutdown,
  255. .driver = {
  256. .name = "au1xxx-ohci",
  257. .owner = THIS_MODULE,
  258. .pm = AU1XXX_OHCI_PMOPS,
  259. },
  260. };
  261. MODULE_ALIAS("platform:au1xxx-ohci");