qla_init.c 127 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. fc_port_t *fcport = sp->fcport;
  42. struct qla_hw_data *ha = fcport->vha->hw;
  43. struct req_que *req;
  44. unsigned long flags;
  45. spin_lock_irqsave(&ha->hardware_lock, flags);
  46. req = ha->req_q_map[0];
  47. req->outstanding_cmds[sp->handle] = NULL;
  48. ctx = sp->ctx;
  49. ctx->timeout(sp);
  50. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  51. ctx->free(sp);
  52. }
  53. static void
  54. qla2x00_ctx_sp_free(srb_t *sp)
  55. {
  56. struct srb_ctx *ctx = sp->ctx;
  57. kfree(ctx);
  58. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  59. }
  60. inline srb_t *
  61. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  62. unsigned long tmo)
  63. {
  64. srb_t *sp;
  65. struct qla_hw_data *ha = vha->hw;
  66. struct srb_ctx *ctx;
  67. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  68. if (!sp)
  69. goto done;
  70. ctx = kzalloc(size, GFP_KERNEL);
  71. if (!ctx) {
  72. mempool_free(sp, ha->srb_mempool);
  73. goto done;
  74. }
  75. memset(sp, 0, sizeof(*sp));
  76. sp->fcport = fcport;
  77. sp->ctx = ctx;
  78. ctx->free = qla2x00_ctx_sp_free;
  79. init_timer(&ctx->timer);
  80. if (!tmo)
  81. goto done;
  82. ctx->timer.expires = jiffies + tmo * HZ;
  83. ctx->timer.data = (unsigned long)sp;
  84. ctx->timer.function = qla2x00_ctx_sp_timeout;
  85. add_timer(&ctx->timer);
  86. done:
  87. return sp;
  88. }
  89. /* Asynchronous Login/Logout Routines -------------------------------------- */
  90. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  91. static void
  92. qla2x00_async_logio_timeout(srb_t *sp)
  93. {
  94. fc_port_t *fcport = sp->fcport;
  95. struct srb_logio *lio = sp->ctx;
  96. DEBUG2(printk(KERN_WARNING
  97. "scsi(%ld:%x): Async-%s timeout.\n",
  98. fcport->vha->host_no, sp->handle,
  99. lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout"));
  100. if (lio->ctx.type == SRB_LOGIN_CMD)
  101. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  102. }
  103. int
  104. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  105. uint16_t *data)
  106. {
  107. struct qla_hw_data *ha = vha->hw;
  108. srb_t *sp;
  109. struct srb_logio *lio;
  110. int rval;
  111. rval = QLA_FUNCTION_FAILED;
  112. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  113. ELS_TMO_2_RATOV(ha) + 2);
  114. if (!sp)
  115. goto done;
  116. lio = sp->ctx;
  117. lio->ctx.type = SRB_LOGIN_CMD;
  118. lio->ctx.timeout = qla2x00_async_logio_timeout;
  119. lio->flags |= SRB_LOGIN_COND_PLOGI;
  120. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  121. lio->flags |= SRB_LOGIN_RETRIED;
  122. rval = qla2x00_start_sp(sp);
  123. if (rval != QLA_SUCCESS)
  124. goto done_free_sp;
  125. DEBUG2(printk(KERN_DEBUG
  126. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  127. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  128. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  129. fcport->login_retry));
  130. return rval;
  131. done_free_sp:
  132. del_timer_sync(&lio->ctx.timer);
  133. lio->ctx.free(sp);
  134. done:
  135. return rval;
  136. }
  137. int
  138. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  139. {
  140. struct qla_hw_data *ha = vha->hw;
  141. srb_t *sp;
  142. struct srb_logio *lio;
  143. int rval;
  144. rval = QLA_FUNCTION_FAILED;
  145. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  146. ELS_TMO_2_RATOV(ha) + 2);
  147. if (!sp)
  148. goto done;
  149. lio = sp->ctx;
  150. lio->ctx.type = SRB_LOGOUT_CMD;
  151. lio->ctx.timeout = qla2x00_async_logio_timeout;
  152. rval = qla2x00_start_sp(sp);
  153. if (rval != QLA_SUCCESS)
  154. goto done_free_sp;
  155. DEBUG2(printk(KERN_DEBUG
  156. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  157. fcport->vha->host_no, sp->handle, fcport->loop_id,
  158. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  159. return rval;
  160. done_free_sp:
  161. del_timer_sync(&lio->ctx.timer);
  162. lio->ctx.free(sp);
  163. done:
  164. return rval;
  165. }
  166. int
  167. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  168. uint16_t *data)
  169. {
  170. int rval;
  171. uint8_t opts = 0;
  172. switch (data[0]) {
  173. case MBS_COMMAND_COMPLETE:
  174. if (fcport->flags & FCF_TAPE_PRESENT)
  175. opts |= BIT_1;
  176. rval = qla2x00_get_port_database(vha, fcport, opts);
  177. if (rval != QLA_SUCCESS)
  178. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  179. else
  180. qla2x00_update_fcport(vha, fcport);
  181. break;
  182. case MBS_COMMAND_ERROR:
  183. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  184. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  185. else
  186. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  187. break;
  188. case MBS_PORT_ID_USED:
  189. fcport->loop_id = data[1];
  190. qla2x00_post_async_login_work(vha, fcport, NULL);
  191. break;
  192. case MBS_LOOP_ID_USED:
  193. fcport->loop_id++;
  194. rval = qla2x00_find_new_loop_id(vha, fcport);
  195. if (rval != QLA_SUCCESS) {
  196. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  197. break;
  198. }
  199. qla2x00_post_async_login_work(vha, fcport, NULL);
  200. break;
  201. }
  202. return QLA_SUCCESS;
  203. }
  204. int
  205. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  206. uint16_t *data)
  207. {
  208. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  209. return QLA_SUCCESS;
  210. }
  211. /****************************************************************************/
  212. /* QLogic ISP2x00 Hardware Support Functions. */
  213. /****************************************************************************/
  214. /*
  215. * qla2x00_initialize_adapter
  216. * Initialize board.
  217. *
  218. * Input:
  219. * ha = adapter block pointer.
  220. *
  221. * Returns:
  222. * 0 = success
  223. */
  224. int
  225. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  226. {
  227. int rval;
  228. struct qla_hw_data *ha = vha->hw;
  229. struct req_que *req = ha->req_q_map[0];
  230. /* Clear adapter flags. */
  231. vha->flags.online = 0;
  232. ha->flags.chip_reset_done = 0;
  233. vha->flags.reset_active = 0;
  234. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  235. atomic_set(&vha->loop_state, LOOP_DOWN);
  236. vha->device_flags = DFLG_NO_CABLE;
  237. vha->dpc_flags = 0;
  238. vha->flags.management_server_logged_in = 0;
  239. vha->marker_needed = 0;
  240. ha->isp_abort_cnt = 0;
  241. ha->beacon_blink_led = 0;
  242. set_bit(0, ha->req_qid_map);
  243. set_bit(0, ha->rsp_qid_map);
  244. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  245. rval = ha->isp_ops->pci_config(vha);
  246. if (rval) {
  247. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  248. vha->host_no));
  249. return (rval);
  250. }
  251. ha->isp_ops->reset_chip(vha);
  252. rval = qla2xxx_get_flash_info(vha);
  253. if (rval) {
  254. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  255. vha->host_no));
  256. return (rval);
  257. }
  258. ha->isp_ops->get_flash_version(vha, req->ring);
  259. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  260. ha->isp_ops->nvram_config(vha);
  261. if (ha->flags.disable_serdes) {
  262. /* Mask HBA via NVRAM settings? */
  263. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  264. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  265. vha->port_name[0], vha->port_name[1],
  266. vha->port_name[2], vha->port_name[3],
  267. vha->port_name[4], vha->port_name[5],
  268. vha->port_name[6], vha->port_name[7]);
  269. return QLA_FUNCTION_FAILED;
  270. }
  271. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  272. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  273. rval = ha->isp_ops->chip_diag(vha);
  274. if (rval)
  275. return (rval);
  276. rval = qla2x00_setup_chip(vha);
  277. if (rval)
  278. return (rval);
  279. }
  280. if (IS_QLA84XX(ha)) {
  281. ha->cs84xx = qla84xx_get_chip(vha);
  282. if (!ha->cs84xx) {
  283. qla_printk(KERN_ERR, ha,
  284. "Unable to configure ISP84XX.\n");
  285. return QLA_FUNCTION_FAILED;
  286. }
  287. }
  288. rval = qla2x00_init_rings(vha);
  289. ha->flags.chip_reset_done = 1;
  290. return (rval);
  291. }
  292. /**
  293. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  294. * @ha: HA context
  295. *
  296. * Returns 0 on success.
  297. */
  298. int
  299. qla2100_pci_config(scsi_qla_host_t *vha)
  300. {
  301. uint16_t w;
  302. unsigned long flags;
  303. struct qla_hw_data *ha = vha->hw;
  304. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  305. pci_set_master(ha->pdev);
  306. pci_try_set_mwi(ha->pdev);
  307. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  308. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  309. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  310. pci_disable_rom(ha->pdev);
  311. /* Get PCI bus information. */
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  314. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  315. return QLA_SUCCESS;
  316. }
  317. /**
  318. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  319. * @ha: HA context
  320. *
  321. * Returns 0 on success.
  322. */
  323. int
  324. qla2300_pci_config(scsi_qla_host_t *vha)
  325. {
  326. uint16_t w;
  327. unsigned long flags = 0;
  328. uint32_t cnt;
  329. struct qla_hw_data *ha = vha->hw;
  330. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  331. pci_set_master(ha->pdev);
  332. pci_try_set_mwi(ha->pdev);
  333. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  334. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  335. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  336. w &= ~PCI_COMMAND_INTX_DISABLE;
  337. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  338. /*
  339. * If this is a 2300 card and not 2312, reset the
  340. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  341. * the 2310 also reports itself as a 2300 so we need to get the
  342. * fb revision level -- a 6 indicates it really is a 2300 and
  343. * not a 2310.
  344. */
  345. if (IS_QLA2300(ha)) {
  346. spin_lock_irqsave(&ha->hardware_lock, flags);
  347. /* Pause RISC. */
  348. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  349. for (cnt = 0; cnt < 30000; cnt++) {
  350. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  351. break;
  352. udelay(10);
  353. }
  354. /* Select FPM registers. */
  355. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  356. RD_REG_WORD(&reg->ctrl_status);
  357. /* Get the fb rev level */
  358. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  359. if (ha->fb_rev == FPM_2300)
  360. pci_clear_mwi(ha->pdev);
  361. /* Deselect FPM registers. */
  362. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  363. RD_REG_WORD(&reg->ctrl_status);
  364. /* Release RISC module. */
  365. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  366. for (cnt = 0; cnt < 30000; cnt++) {
  367. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  368. break;
  369. udelay(10);
  370. }
  371. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  372. }
  373. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  374. pci_disable_rom(ha->pdev);
  375. /* Get PCI bus information. */
  376. spin_lock_irqsave(&ha->hardware_lock, flags);
  377. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  378. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  379. return QLA_SUCCESS;
  380. }
  381. /**
  382. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  383. * @ha: HA context
  384. *
  385. * Returns 0 on success.
  386. */
  387. int
  388. qla24xx_pci_config(scsi_qla_host_t *vha)
  389. {
  390. uint16_t w;
  391. unsigned long flags = 0;
  392. struct qla_hw_data *ha = vha->hw;
  393. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  394. pci_set_master(ha->pdev);
  395. pci_try_set_mwi(ha->pdev);
  396. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  397. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  398. w &= ~PCI_COMMAND_INTX_DISABLE;
  399. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  400. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  401. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  402. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  403. pcix_set_mmrbc(ha->pdev, 2048);
  404. /* PCIe -- adjust Maximum Read Request Size (2048). */
  405. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  406. pcie_set_readrq(ha->pdev, 2048);
  407. pci_disable_rom(ha->pdev);
  408. ha->chip_revision = ha->pdev->revision;
  409. /* Get PCI bus information. */
  410. spin_lock_irqsave(&ha->hardware_lock, flags);
  411. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  412. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  413. return QLA_SUCCESS;
  414. }
  415. /**
  416. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  417. * @ha: HA context
  418. *
  419. * Returns 0 on success.
  420. */
  421. int
  422. qla25xx_pci_config(scsi_qla_host_t *vha)
  423. {
  424. uint16_t w;
  425. struct qla_hw_data *ha = vha->hw;
  426. pci_set_master(ha->pdev);
  427. pci_try_set_mwi(ha->pdev);
  428. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  429. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  430. w &= ~PCI_COMMAND_INTX_DISABLE;
  431. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  432. /* PCIe -- adjust Maximum Read Request Size (2048). */
  433. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  434. pcie_set_readrq(ha->pdev, 2048);
  435. pci_disable_rom(ha->pdev);
  436. ha->chip_revision = ha->pdev->revision;
  437. return QLA_SUCCESS;
  438. }
  439. /**
  440. * qla2x00_isp_firmware() - Choose firmware image.
  441. * @ha: HA context
  442. *
  443. * Returns 0 on success.
  444. */
  445. static int
  446. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  447. {
  448. int rval;
  449. uint16_t loop_id, topo, sw_cap;
  450. uint8_t domain, area, al_pa;
  451. struct qla_hw_data *ha = vha->hw;
  452. /* Assume loading risc code */
  453. rval = QLA_FUNCTION_FAILED;
  454. if (ha->flags.disable_risc_code_load) {
  455. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  456. vha->host_no));
  457. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  458. /* Verify checksum of loaded RISC code. */
  459. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  460. if (rval == QLA_SUCCESS) {
  461. /* And, verify we are not in ROM code. */
  462. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  463. &area, &domain, &topo, &sw_cap);
  464. }
  465. }
  466. if (rval) {
  467. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  468. vha->host_no));
  469. }
  470. return (rval);
  471. }
  472. /**
  473. * qla2x00_reset_chip() - Reset ISP chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla2x00_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. unsigned long flags = 0;
  482. struct qla_hw_data *ha = vha->hw;
  483. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  484. uint32_t cnt;
  485. uint16_t cmd;
  486. ha->isp_ops->disable_intrs(ha);
  487. spin_lock_irqsave(&ha->hardware_lock, flags);
  488. /* Turn off master enable */
  489. cmd = 0;
  490. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  491. cmd &= ~PCI_COMMAND_MASTER;
  492. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  493. if (!IS_QLA2100(ha)) {
  494. /* Pause RISC. */
  495. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  496. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  497. for (cnt = 0; cnt < 30000; cnt++) {
  498. if ((RD_REG_WORD(&reg->hccr) &
  499. HCCR_RISC_PAUSE) != 0)
  500. break;
  501. udelay(100);
  502. }
  503. } else {
  504. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  505. udelay(10);
  506. }
  507. /* Select FPM registers. */
  508. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  509. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  510. /* FPM Soft Reset. */
  511. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  512. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  513. /* Toggle Fpm Reset. */
  514. if (!IS_QLA2200(ha)) {
  515. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  516. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  517. }
  518. /* Select frame buffer registers. */
  519. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  520. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  521. /* Reset frame buffer FIFOs. */
  522. if (IS_QLA2200(ha)) {
  523. WRT_FB_CMD_REG(ha, reg, 0xa000);
  524. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  525. } else {
  526. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  527. /* Read back fb_cmd until zero or 3 seconds max */
  528. for (cnt = 0; cnt < 3000; cnt++) {
  529. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  530. break;
  531. udelay(100);
  532. }
  533. }
  534. /* Select RISC module registers. */
  535. WRT_REG_WORD(&reg->ctrl_status, 0);
  536. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  537. /* Reset RISC processor. */
  538. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  539. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  540. /* Release RISC processor. */
  541. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  542. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  543. }
  544. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  545. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  546. /* Reset ISP chip. */
  547. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  548. /* Wait for RISC to recover from reset. */
  549. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  550. /*
  551. * It is necessary to for a delay here since the card doesn't
  552. * respond to PCI reads during a reset. On some architectures
  553. * this will result in an MCA.
  554. */
  555. udelay(20);
  556. for (cnt = 30000; cnt; cnt--) {
  557. if ((RD_REG_WORD(&reg->ctrl_status) &
  558. CSR_ISP_SOFT_RESET) == 0)
  559. break;
  560. udelay(100);
  561. }
  562. } else
  563. udelay(10);
  564. /* Reset RISC processor. */
  565. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  566. WRT_REG_WORD(&reg->semaphore, 0);
  567. /* Release RISC processor. */
  568. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  569. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  570. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  571. for (cnt = 0; cnt < 30000; cnt++) {
  572. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  573. break;
  574. udelay(100);
  575. }
  576. } else
  577. udelay(100);
  578. /* Turn on master enable */
  579. cmd |= PCI_COMMAND_MASTER;
  580. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  581. /* Disable RISC pause on FPM parity error. */
  582. if (!IS_QLA2100(ha)) {
  583. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  584. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  585. }
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. }
  588. /**
  589. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  590. * @ha: HA context
  591. *
  592. * Returns 0 on success.
  593. */
  594. static inline void
  595. qla24xx_reset_risc(scsi_qla_host_t *vha)
  596. {
  597. unsigned long flags = 0;
  598. struct qla_hw_data *ha = vha->hw;
  599. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  600. uint32_t cnt, d2;
  601. uint16_t wd;
  602. spin_lock_irqsave(&ha->hardware_lock, flags);
  603. /* Reset RISC. */
  604. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  605. for (cnt = 0; cnt < 30000; cnt++) {
  606. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  607. break;
  608. udelay(10);
  609. }
  610. WRT_REG_DWORD(&reg->ctrl_status,
  611. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  612. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  613. udelay(100);
  614. /* Wait for firmware to complete NVRAM accesses. */
  615. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  616. for (cnt = 10000 ; cnt && d2; cnt--) {
  617. udelay(5);
  618. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  619. barrier();
  620. }
  621. /* Wait for soft-reset to complete. */
  622. d2 = RD_REG_DWORD(&reg->ctrl_status);
  623. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  624. udelay(5);
  625. d2 = RD_REG_DWORD(&reg->ctrl_status);
  626. barrier();
  627. }
  628. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  629. RD_REG_DWORD(&reg->hccr);
  630. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  631. RD_REG_DWORD(&reg->hccr);
  632. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  633. RD_REG_DWORD(&reg->hccr);
  634. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  635. for (cnt = 6000000 ; cnt && d2; cnt--) {
  636. udelay(5);
  637. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  638. barrier();
  639. }
  640. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  641. if (IS_NOPOLLING_TYPE(ha))
  642. ha->isp_ops->enable_intrs(ha);
  643. }
  644. /**
  645. * qla24xx_reset_chip() - Reset ISP24xx chip.
  646. * @ha: HA context
  647. *
  648. * Returns 0 on success.
  649. */
  650. void
  651. qla24xx_reset_chip(scsi_qla_host_t *vha)
  652. {
  653. struct qla_hw_data *ha = vha->hw;
  654. ha->isp_ops->disable_intrs(ha);
  655. /* Perform RISC reset. */
  656. qla24xx_reset_risc(vha);
  657. }
  658. /**
  659. * qla2x00_chip_diag() - Test chip for proper operation.
  660. * @ha: HA context
  661. *
  662. * Returns 0 on success.
  663. */
  664. int
  665. qla2x00_chip_diag(scsi_qla_host_t *vha)
  666. {
  667. int rval;
  668. struct qla_hw_data *ha = vha->hw;
  669. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  670. unsigned long flags = 0;
  671. uint16_t data;
  672. uint32_t cnt;
  673. uint16_t mb[5];
  674. struct req_que *req = ha->req_q_map[0];
  675. /* Assume a failed state */
  676. rval = QLA_FUNCTION_FAILED;
  677. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  678. vha->host_no, (u_long)&reg->flash_address));
  679. spin_lock_irqsave(&ha->hardware_lock, flags);
  680. /* Reset ISP chip. */
  681. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  682. /*
  683. * We need to have a delay here since the card will not respond while
  684. * in reset causing an MCA on some architectures.
  685. */
  686. udelay(20);
  687. data = qla2x00_debounce_register(&reg->ctrl_status);
  688. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  689. udelay(5);
  690. data = RD_REG_WORD(&reg->ctrl_status);
  691. barrier();
  692. }
  693. if (!cnt)
  694. goto chip_diag_failed;
  695. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  696. vha->host_no));
  697. /* Reset RISC processor. */
  698. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  699. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  700. /* Workaround for QLA2312 PCI parity error */
  701. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  702. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  703. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  704. udelay(5);
  705. data = RD_MAILBOX_REG(ha, reg, 0);
  706. barrier();
  707. }
  708. } else
  709. udelay(10);
  710. if (!cnt)
  711. goto chip_diag_failed;
  712. /* Check product ID of chip */
  713. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  714. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  715. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  716. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  717. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  718. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  719. mb[3] != PROD_ID_3) {
  720. qla_printk(KERN_WARNING, ha,
  721. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  722. goto chip_diag_failed;
  723. }
  724. ha->product_id[0] = mb[1];
  725. ha->product_id[1] = mb[2];
  726. ha->product_id[2] = mb[3];
  727. ha->product_id[3] = mb[4];
  728. /* Adjust fw RISC transfer size */
  729. if (req->length > 1024)
  730. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  731. else
  732. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  733. req->length;
  734. if (IS_QLA2200(ha) &&
  735. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  736. /* Limit firmware transfer size with a 2200A */
  737. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  738. vha->host_no));
  739. ha->device_type |= DT_ISP2200A;
  740. ha->fw_transfer_size = 128;
  741. }
  742. /* Wrap Incoming Mailboxes Test. */
  743. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  744. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  745. rval = qla2x00_mbx_reg_test(vha);
  746. if (rval) {
  747. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  748. vha->host_no));
  749. qla_printk(KERN_WARNING, ha,
  750. "Failed mailbox send register test\n");
  751. }
  752. else {
  753. /* Flag a successful rval */
  754. rval = QLA_SUCCESS;
  755. }
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. chip_diag_failed:
  758. if (rval)
  759. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  760. "****\n", vha->host_no));
  761. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  762. return (rval);
  763. }
  764. /**
  765. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  766. * @ha: HA context
  767. *
  768. * Returns 0 on success.
  769. */
  770. int
  771. qla24xx_chip_diag(scsi_qla_host_t *vha)
  772. {
  773. int rval;
  774. struct qla_hw_data *ha = vha->hw;
  775. struct req_que *req = ha->req_q_map[0];
  776. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  777. rval = qla2x00_mbx_reg_test(vha);
  778. if (rval) {
  779. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  780. vha->host_no));
  781. qla_printk(KERN_WARNING, ha,
  782. "Failed mailbox send register test\n");
  783. } else {
  784. /* Flag a successful rval */
  785. rval = QLA_SUCCESS;
  786. }
  787. return rval;
  788. }
  789. void
  790. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  791. {
  792. int rval;
  793. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  794. eft_size, fce_size, mq_size;
  795. dma_addr_t tc_dma;
  796. void *tc;
  797. struct qla_hw_data *ha = vha->hw;
  798. struct req_que *req = ha->req_q_map[0];
  799. struct rsp_que *rsp = ha->rsp_q_map[0];
  800. if (ha->fw_dump) {
  801. qla_printk(KERN_WARNING, ha,
  802. "Firmware dump previously allocated.\n");
  803. return;
  804. }
  805. ha->fw_dumped = 0;
  806. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  807. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  808. fixed_size = sizeof(struct qla2100_fw_dump);
  809. } else if (IS_QLA23XX(ha)) {
  810. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  811. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  812. sizeof(uint16_t);
  813. } else if (IS_FWI2_CAPABLE(ha)) {
  814. if (IS_QLA81XX(ha))
  815. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  816. else if (IS_QLA25XX(ha))
  817. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  818. else
  819. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  820. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  821. sizeof(uint32_t);
  822. if (ha->mqenable)
  823. mq_size = sizeof(struct qla2xxx_mq_chain);
  824. /* Allocate memory for Fibre Channel Event Buffer. */
  825. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  826. goto try_eft;
  827. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  828. GFP_KERNEL);
  829. if (!tc) {
  830. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  831. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  832. goto try_eft;
  833. }
  834. memset(tc, 0, FCE_SIZE);
  835. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  836. ha->fce_mb, &ha->fce_bufs);
  837. if (rval) {
  838. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  839. "FCE (%d).\n", rval);
  840. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  841. tc_dma);
  842. ha->flags.fce_enabled = 0;
  843. goto try_eft;
  844. }
  845. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  846. FCE_SIZE / 1024);
  847. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  848. ha->flags.fce_enabled = 1;
  849. ha->fce_dma = tc_dma;
  850. ha->fce = tc;
  851. try_eft:
  852. /* Allocate memory for Extended Trace Buffer. */
  853. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  854. GFP_KERNEL);
  855. if (!tc) {
  856. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  857. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  858. goto cont_alloc;
  859. }
  860. memset(tc, 0, EFT_SIZE);
  861. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  862. if (rval) {
  863. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  864. "EFT (%d).\n", rval);
  865. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  866. tc_dma);
  867. goto cont_alloc;
  868. }
  869. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  870. EFT_SIZE / 1024);
  871. eft_size = EFT_SIZE;
  872. ha->eft_dma = tc_dma;
  873. ha->eft = tc;
  874. }
  875. cont_alloc:
  876. req_q_size = req->length * sizeof(request_t);
  877. rsp_q_size = rsp->length * sizeof(response_t);
  878. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  879. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  880. ha->chain_offset = dump_size;
  881. dump_size += mq_size + fce_size;
  882. ha->fw_dump = vmalloc(dump_size);
  883. if (!ha->fw_dump) {
  884. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  885. "firmware dump!!!\n", dump_size / 1024);
  886. if (ha->eft) {
  887. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  888. ha->eft_dma);
  889. ha->eft = NULL;
  890. ha->eft_dma = 0;
  891. }
  892. return;
  893. }
  894. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  895. dump_size / 1024);
  896. ha->fw_dump_len = dump_size;
  897. ha->fw_dump->signature[0] = 'Q';
  898. ha->fw_dump->signature[1] = 'L';
  899. ha->fw_dump->signature[2] = 'G';
  900. ha->fw_dump->signature[3] = 'C';
  901. ha->fw_dump->version = __constant_htonl(1);
  902. ha->fw_dump->fixed_size = htonl(fixed_size);
  903. ha->fw_dump->mem_size = htonl(mem_size);
  904. ha->fw_dump->req_q_size = htonl(req_q_size);
  905. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  906. ha->fw_dump->eft_size = htonl(eft_size);
  907. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  908. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  909. ha->fw_dump->header_size =
  910. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  911. }
  912. static int
  913. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  914. {
  915. #define MPS_MASK 0xe0
  916. int rval;
  917. uint16_t dc;
  918. uint32_t dw;
  919. struct qla_hw_data *ha = vha->hw;
  920. if (!IS_QLA81XX(vha->hw))
  921. return QLA_SUCCESS;
  922. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  923. if (rval != QLA_SUCCESS) {
  924. DEBUG2(qla_printk(KERN_WARNING, ha,
  925. "Sync-MPI: Unable to acquire semaphore.\n"));
  926. goto done;
  927. }
  928. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  929. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  930. if (rval != QLA_SUCCESS) {
  931. DEBUG2(qla_printk(KERN_WARNING, ha,
  932. "Sync-MPI: Unable to read sync.\n"));
  933. goto done_release;
  934. }
  935. dc &= MPS_MASK;
  936. if (dc == (dw & MPS_MASK))
  937. goto done_release;
  938. dw &= ~MPS_MASK;
  939. dw |= dc;
  940. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  941. if (rval != QLA_SUCCESS) {
  942. DEBUG2(qla_printk(KERN_WARNING, ha,
  943. "Sync-MPI: Unable to gain sync.\n"));
  944. }
  945. done_release:
  946. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  947. if (rval != QLA_SUCCESS) {
  948. DEBUG2(qla_printk(KERN_WARNING, ha,
  949. "Sync-MPI: Unable to release semaphore.\n"));
  950. }
  951. done:
  952. return rval;
  953. }
  954. /**
  955. * qla2x00_setup_chip() - Load and start RISC firmware.
  956. * @ha: HA context
  957. *
  958. * Returns 0 on success.
  959. */
  960. static int
  961. qla2x00_setup_chip(scsi_qla_host_t *vha)
  962. {
  963. int rval;
  964. uint32_t srisc_address = 0;
  965. struct qla_hw_data *ha = vha->hw;
  966. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  967. unsigned long flags;
  968. uint16_t fw_major_version;
  969. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  970. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  971. spin_lock_irqsave(&ha->hardware_lock, flags);
  972. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  973. RD_REG_WORD(&reg->hccr);
  974. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  975. }
  976. qla81xx_mpi_sync(vha);
  977. /* Load firmware sequences */
  978. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  979. if (rval == QLA_SUCCESS) {
  980. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  981. "code.\n", vha->host_no));
  982. rval = qla2x00_verify_checksum(vha, srisc_address);
  983. if (rval == QLA_SUCCESS) {
  984. /* Start firmware execution. */
  985. DEBUG(printk("scsi(%ld): Checksum OK, start "
  986. "firmware.\n", vha->host_no));
  987. rval = qla2x00_execute_fw(vha, srisc_address);
  988. /* Retrieve firmware information. */
  989. if (rval == QLA_SUCCESS) {
  990. fw_major_version = ha->fw_major_version;
  991. rval = qla2x00_get_fw_version(vha,
  992. &ha->fw_major_version,
  993. &ha->fw_minor_version,
  994. &ha->fw_subminor_version,
  995. &ha->fw_attributes, &ha->fw_memory_size,
  996. ha->mpi_version, &ha->mpi_capabilities,
  997. ha->phy_version);
  998. if (rval != QLA_SUCCESS)
  999. goto failed;
  1000. ha->flags.npiv_supported = 0;
  1001. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1002. (ha->fw_attributes & BIT_2)) {
  1003. ha->flags.npiv_supported = 1;
  1004. if ((!ha->max_npiv_vports) ||
  1005. ((ha->max_npiv_vports + 1) %
  1006. MIN_MULTI_ID_FABRIC))
  1007. ha->max_npiv_vports =
  1008. MIN_MULTI_ID_FABRIC - 1;
  1009. }
  1010. qla2x00_get_resource_cnts(vha, NULL,
  1011. &ha->fw_xcb_count, NULL, NULL,
  1012. &ha->max_npiv_vports, NULL);
  1013. if (!fw_major_version && ql2xallocfwdump)
  1014. qla2x00_alloc_fw_dump(vha);
  1015. }
  1016. } else {
  1017. DEBUG2(printk(KERN_INFO
  1018. "scsi(%ld): ISP Firmware failed checksum.\n",
  1019. vha->host_no));
  1020. }
  1021. }
  1022. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1023. /* Enable proper parity. */
  1024. spin_lock_irqsave(&ha->hardware_lock, flags);
  1025. if (IS_QLA2300(ha))
  1026. /* SRAM parity */
  1027. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1028. else
  1029. /* SRAM, Instruction RAM and GP RAM parity */
  1030. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1031. RD_REG_WORD(&reg->hccr);
  1032. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1033. }
  1034. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1035. uint32_t size;
  1036. rval = qla81xx_fac_get_sector_size(vha, &size);
  1037. if (rval == QLA_SUCCESS) {
  1038. ha->flags.fac_supported = 1;
  1039. ha->fdt_block_size = size << 2;
  1040. } else {
  1041. qla_printk(KERN_ERR, ha,
  1042. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1043. ha->fw_major_version, ha->fw_minor_version,
  1044. ha->fw_subminor_version);
  1045. }
  1046. }
  1047. failed:
  1048. if (rval) {
  1049. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1050. vha->host_no));
  1051. }
  1052. return (rval);
  1053. }
  1054. /**
  1055. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1056. * @ha: HA context
  1057. *
  1058. * Beginning of request ring has initialization control block already built
  1059. * by nvram config routine.
  1060. *
  1061. * Returns 0 on success.
  1062. */
  1063. void
  1064. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1065. {
  1066. uint16_t cnt;
  1067. response_t *pkt;
  1068. rsp->ring_ptr = rsp->ring;
  1069. rsp->ring_index = 0;
  1070. rsp->status_srb = NULL;
  1071. pkt = rsp->ring_ptr;
  1072. for (cnt = 0; cnt < rsp->length; cnt++) {
  1073. pkt->signature = RESPONSE_PROCESSED;
  1074. pkt++;
  1075. }
  1076. }
  1077. /**
  1078. * qla2x00_update_fw_options() - Read and process firmware options.
  1079. * @ha: HA context
  1080. *
  1081. * Returns 0 on success.
  1082. */
  1083. void
  1084. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1085. {
  1086. uint16_t swing, emphasis, tx_sens, rx_sens;
  1087. struct qla_hw_data *ha = vha->hw;
  1088. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1089. qla2x00_get_fw_options(vha, ha->fw_options);
  1090. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1091. return;
  1092. /* Serial Link options. */
  1093. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1094. vha->host_no));
  1095. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1096. sizeof(ha->fw_seriallink_options)));
  1097. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1098. if (ha->fw_seriallink_options[3] & BIT_2) {
  1099. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1100. /* 1G settings */
  1101. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1102. emphasis = (ha->fw_seriallink_options[2] &
  1103. (BIT_4 | BIT_3)) >> 3;
  1104. tx_sens = ha->fw_seriallink_options[0] &
  1105. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1106. rx_sens = (ha->fw_seriallink_options[0] &
  1107. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1108. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1109. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1110. if (rx_sens == 0x0)
  1111. rx_sens = 0x3;
  1112. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1113. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1114. ha->fw_options[10] |= BIT_5 |
  1115. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1116. (tx_sens & (BIT_1 | BIT_0));
  1117. /* 2G settings */
  1118. swing = (ha->fw_seriallink_options[2] &
  1119. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1120. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1121. tx_sens = ha->fw_seriallink_options[1] &
  1122. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1123. rx_sens = (ha->fw_seriallink_options[1] &
  1124. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1125. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1126. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1127. if (rx_sens == 0x0)
  1128. rx_sens = 0x3;
  1129. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1130. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1131. ha->fw_options[11] |= BIT_5 |
  1132. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1133. (tx_sens & (BIT_1 | BIT_0));
  1134. }
  1135. /* FCP2 options. */
  1136. /* Return command IOCBs without waiting for an ABTS to complete. */
  1137. ha->fw_options[3] |= BIT_13;
  1138. /* LED scheme. */
  1139. if (ha->flags.enable_led_scheme)
  1140. ha->fw_options[2] |= BIT_12;
  1141. /* Detect ISP6312. */
  1142. if (IS_QLA6312(ha))
  1143. ha->fw_options[2] |= BIT_13;
  1144. /* Update firmware options. */
  1145. qla2x00_set_fw_options(vha, ha->fw_options);
  1146. }
  1147. void
  1148. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1149. {
  1150. int rval;
  1151. struct qla_hw_data *ha = vha->hw;
  1152. /* Update Serial Link options. */
  1153. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1154. return;
  1155. rval = qla2x00_set_serdes_params(vha,
  1156. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1157. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1158. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1159. if (rval != QLA_SUCCESS) {
  1160. qla_printk(KERN_WARNING, ha,
  1161. "Unable to update Serial Link options (%x).\n", rval);
  1162. }
  1163. }
  1164. void
  1165. qla2x00_config_rings(struct scsi_qla_host *vha)
  1166. {
  1167. struct qla_hw_data *ha = vha->hw;
  1168. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1169. struct req_que *req = ha->req_q_map[0];
  1170. struct rsp_que *rsp = ha->rsp_q_map[0];
  1171. /* Setup ring parameters in initialization control block. */
  1172. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1173. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1174. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1175. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1176. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1177. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1178. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1179. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1180. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1181. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1182. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1183. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1184. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1185. }
  1186. void
  1187. qla24xx_config_rings(struct scsi_qla_host *vha)
  1188. {
  1189. struct qla_hw_data *ha = vha->hw;
  1190. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1191. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1192. struct qla_msix_entry *msix;
  1193. struct init_cb_24xx *icb;
  1194. uint16_t rid = 0;
  1195. struct req_que *req = ha->req_q_map[0];
  1196. struct rsp_que *rsp = ha->rsp_q_map[0];
  1197. /* Setup ring parameters in initialization control block. */
  1198. icb = (struct init_cb_24xx *)ha->init_cb;
  1199. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1200. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1201. icb->request_q_length = cpu_to_le16(req->length);
  1202. icb->response_q_length = cpu_to_le16(rsp->length);
  1203. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1204. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1205. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1206. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1207. if (ha->mqenable) {
  1208. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1209. icb->rid = __constant_cpu_to_le16(rid);
  1210. if (ha->flags.msix_enabled) {
  1211. msix = &ha->msix_entries[1];
  1212. DEBUG2_17(printk(KERN_INFO
  1213. "Registering vector 0x%x for base que\n", msix->entry));
  1214. icb->msix = cpu_to_le16(msix->entry);
  1215. }
  1216. /* Use alternate PCI bus number */
  1217. if (MSB(rid))
  1218. icb->firmware_options_2 |=
  1219. __constant_cpu_to_le32(BIT_19);
  1220. /* Use alternate PCI devfn */
  1221. if (LSB(rid))
  1222. icb->firmware_options_2 |=
  1223. __constant_cpu_to_le32(BIT_18);
  1224. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1225. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1226. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1227. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1228. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1229. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1230. } else {
  1231. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1232. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1233. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1234. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1235. }
  1236. /* PCI posting */
  1237. RD_REG_DWORD(&ioreg->hccr);
  1238. }
  1239. /**
  1240. * qla2x00_init_rings() - Initializes firmware.
  1241. * @ha: HA context
  1242. *
  1243. * Beginning of request ring has initialization control block already built
  1244. * by nvram config routine.
  1245. *
  1246. * Returns 0 on success.
  1247. */
  1248. static int
  1249. qla2x00_init_rings(scsi_qla_host_t *vha)
  1250. {
  1251. int rval;
  1252. unsigned long flags = 0;
  1253. int cnt, que;
  1254. struct qla_hw_data *ha = vha->hw;
  1255. struct req_que *req;
  1256. struct rsp_que *rsp;
  1257. struct scsi_qla_host *vp;
  1258. struct mid_init_cb_24xx *mid_init_cb =
  1259. (struct mid_init_cb_24xx *) ha->init_cb;
  1260. spin_lock_irqsave(&ha->hardware_lock, flags);
  1261. /* Clear outstanding commands array. */
  1262. for (que = 0; que < ha->max_req_queues; que++) {
  1263. req = ha->req_q_map[que];
  1264. if (!req)
  1265. continue;
  1266. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1267. req->outstanding_cmds[cnt] = NULL;
  1268. req->current_outstanding_cmd = 1;
  1269. /* Initialize firmware. */
  1270. req->ring_ptr = req->ring;
  1271. req->ring_index = 0;
  1272. req->cnt = req->length;
  1273. }
  1274. for (que = 0; que < ha->max_rsp_queues; que++) {
  1275. rsp = ha->rsp_q_map[que];
  1276. if (!rsp)
  1277. continue;
  1278. /* Initialize response queue entries */
  1279. qla2x00_init_response_q_entries(rsp);
  1280. }
  1281. /* Clear RSCN queue. */
  1282. list_for_each_entry(vp, &ha->vp_list, list) {
  1283. vp->rscn_in_ptr = 0;
  1284. vp->rscn_out_ptr = 0;
  1285. }
  1286. ha->isp_ops->config_rings(vha);
  1287. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1288. /* Update any ISP specific firmware options before initialization. */
  1289. ha->isp_ops->update_fw_options(vha);
  1290. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1291. if (ha->flags.npiv_supported) {
  1292. if (ha->operating_mode == LOOP)
  1293. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1294. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1295. }
  1296. if (IS_FWI2_CAPABLE(ha)) {
  1297. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1298. mid_init_cb->init_cb.execution_throttle =
  1299. cpu_to_le16(ha->fw_xcb_count);
  1300. }
  1301. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1302. if (rval) {
  1303. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1304. vha->host_no));
  1305. } else {
  1306. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1307. vha->host_no));
  1308. }
  1309. return (rval);
  1310. }
  1311. /**
  1312. * qla2x00_fw_ready() - Waits for firmware ready.
  1313. * @ha: HA context
  1314. *
  1315. * Returns 0 on success.
  1316. */
  1317. static int
  1318. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1319. {
  1320. int rval;
  1321. unsigned long wtime, mtime, cs84xx_time;
  1322. uint16_t min_wait; /* Minimum wait time if loop is down */
  1323. uint16_t wait_time; /* Wait time if loop is coming ready */
  1324. uint16_t state[5];
  1325. struct qla_hw_data *ha = vha->hw;
  1326. rval = QLA_SUCCESS;
  1327. /* 20 seconds for loop down. */
  1328. min_wait = 20;
  1329. /*
  1330. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1331. * our own processing.
  1332. */
  1333. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1334. wait_time = min_wait;
  1335. }
  1336. /* Min wait time if loop down */
  1337. mtime = jiffies + (min_wait * HZ);
  1338. /* wait time before firmware ready */
  1339. wtime = jiffies + (wait_time * HZ);
  1340. /* Wait for ISP to finish LIP */
  1341. if (!vha->flags.init_done)
  1342. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1343. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1344. vha->host_no));
  1345. do {
  1346. rval = qla2x00_get_firmware_state(vha, state);
  1347. if (rval == QLA_SUCCESS) {
  1348. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1349. vha->device_flags &= ~DFLG_NO_CABLE;
  1350. }
  1351. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1352. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1353. "84xx=%x.\n", vha->host_no, state[0],
  1354. state[2]));
  1355. if ((state[2] & FSTATE_LOGGED_IN) &&
  1356. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1357. DEBUG16(printk("scsi(%ld): Sending "
  1358. "verify iocb.\n", vha->host_no));
  1359. cs84xx_time = jiffies;
  1360. rval = qla84xx_init_chip(vha);
  1361. if (rval != QLA_SUCCESS)
  1362. break;
  1363. /* Add time taken to initialize. */
  1364. cs84xx_time = jiffies - cs84xx_time;
  1365. wtime += cs84xx_time;
  1366. mtime += cs84xx_time;
  1367. DEBUG16(printk("scsi(%ld): Increasing "
  1368. "wait time by %ld. New time %ld\n",
  1369. vha->host_no, cs84xx_time, wtime));
  1370. }
  1371. } else if (state[0] == FSTATE_READY) {
  1372. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1373. vha->host_no));
  1374. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1375. &ha->login_timeout, &ha->r_a_tov);
  1376. rval = QLA_SUCCESS;
  1377. break;
  1378. }
  1379. rval = QLA_FUNCTION_FAILED;
  1380. if (atomic_read(&vha->loop_down_timer) &&
  1381. state[0] != FSTATE_READY) {
  1382. /* Loop down. Timeout on min_wait for states
  1383. * other than Wait for Login.
  1384. */
  1385. if (time_after_eq(jiffies, mtime)) {
  1386. qla_printk(KERN_INFO, ha,
  1387. "Cable is unplugged...\n");
  1388. vha->device_flags |= DFLG_NO_CABLE;
  1389. break;
  1390. }
  1391. }
  1392. } else {
  1393. /* Mailbox cmd failed. Timeout on min_wait. */
  1394. if (time_after_eq(jiffies, mtime))
  1395. break;
  1396. }
  1397. if (time_after_eq(jiffies, wtime))
  1398. break;
  1399. /* Delay for a while */
  1400. msleep(500);
  1401. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1402. vha->host_no, state[0], jiffies));
  1403. } while (1);
  1404. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1405. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1406. jiffies));
  1407. if (rval) {
  1408. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1409. vha->host_no));
  1410. }
  1411. return (rval);
  1412. }
  1413. /*
  1414. * qla2x00_configure_hba
  1415. * Setup adapter context.
  1416. *
  1417. * Input:
  1418. * ha = adapter state pointer.
  1419. *
  1420. * Returns:
  1421. * 0 = success
  1422. *
  1423. * Context:
  1424. * Kernel context.
  1425. */
  1426. static int
  1427. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1428. {
  1429. int rval;
  1430. uint16_t loop_id;
  1431. uint16_t topo;
  1432. uint16_t sw_cap;
  1433. uint8_t al_pa;
  1434. uint8_t area;
  1435. uint8_t domain;
  1436. char connect_type[22];
  1437. struct qla_hw_data *ha = vha->hw;
  1438. /* Get host addresses. */
  1439. rval = qla2x00_get_adapter_id(vha,
  1440. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1441. if (rval != QLA_SUCCESS) {
  1442. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1443. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1444. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1445. __func__, vha->host_no));
  1446. } else {
  1447. qla_printk(KERN_WARNING, ha,
  1448. "ERROR -- Unable to get host loop ID.\n");
  1449. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1450. }
  1451. return (rval);
  1452. }
  1453. if (topo == 4) {
  1454. qla_printk(KERN_INFO, ha,
  1455. "Cannot get topology - retrying.\n");
  1456. return (QLA_FUNCTION_FAILED);
  1457. }
  1458. vha->loop_id = loop_id;
  1459. /* initialize */
  1460. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1461. ha->operating_mode = LOOP;
  1462. ha->switch_cap = 0;
  1463. switch (topo) {
  1464. case 0:
  1465. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1466. vha->host_no));
  1467. ha->current_topology = ISP_CFG_NL;
  1468. strcpy(connect_type, "(Loop)");
  1469. break;
  1470. case 1:
  1471. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1472. vha->host_no));
  1473. ha->switch_cap = sw_cap;
  1474. ha->current_topology = ISP_CFG_FL;
  1475. strcpy(connect_type, "(FL_Port)");
  1476. break;
  1477. case 2:
  1478. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1479. vha->host_no));
  1480. ha->operating_mode = P2P;
  1481. ha->current_topology = ISP_CFG_N;
  1482. strcpy(connect_type, "(N_Port-to-N_Port)");
  1483. break;
  1484. case 3:
  1485. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1486. vha->host_no));
  1487. ha->switch_cap = sw_cap;
  1488. ha->operating_mode = P2P;
  1489. ha->current_topology = ISP_CFG_F;
  1490. strcpy(connect_type, "(F_Port)");
  1491. break;
  1492. default:
  1493. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1494. "Using NL.\n",
  1495. vha->host_no, topo));
  1496. ha->current_topology = ISP_CFG_NL;
  1497. strcpy(connect_type, "(Loop)");
  1498. break;
  1499. }
  1500. /* Save Host port and loop ID. */
  1501. /* byte order - Big Endian */
  1502. vha->d_id.b.domain = domain;
  1503. vha->d_id.b.area = area;
  1504. vha->d_id.b.al_pa = al_pa;
  1505. if (!vha->flags.init_done)
  1506. qla_printk(KERN_INFO, ha,
  1507. "Topology - %s, Host Loop address 0x%x\n",
  1508. connect_type, vha->loop_id);
  1509. if (rval) {
  1510. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1511. } else {
  1512. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1513. }
  1514. return(rval);
  1515. }
  1516. static inline void
  1517. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1518. char *def)
  1519. {
  1520. char *st, *en;
  1521. uint16_t index;
  1522. struct qla_hw_data *ha = vha->hw;
  1523. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1524. !IS_QLA81XX(ha);
  1525. if (memcmp(model, BINZERO, len) != 0) {
  1526. strncpy(ha->model_number, model, len);
  1527. st = en = ha->model_number;
  1528. en += len - 1;
  1529. while (en > st) {
  1530. if (*en != 0x20 && *en != 0x00)
  1531. break;
  1532. *en-- = '\0';
  1533. }
  1534. index = (ha->pdev->subsystem_device & 0xff);
  1535. if (use_tbl &&
  1536. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1537. index < QLA_MODEL_NAMES)
  1538. strncpy(ha->model_desc,
  1539. qla2x00_model_name[index * 2 + 1],
  1540. sizeof(ha->model_desc) - 1);
  1541. } else {
  1542. index = (ha->pdev->subsystem_device & 0xff);
  1543. if (use_tbl &&
  1544. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1545. index < QLA_MODEL_NAMES) {
  1546. strcpy(ha->model_number,
  1547. qla2x00_model_name[index * 2]);
  1548. strncpy(ha->model_desc,
  1549. qla2x00_model_name[index * 2 + 1],
  1550. sizeof(ha->model_desc) - 1);
  1551. } else {
  1552. strcpy(ha->model_number, def);
  1553. }
  1554. }
  1555. if (IS_FWI2_CAPABLE(ha))
  1556. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1557. sizeof(ha->model_desc));
  1558. }
  1559. /* On sparc systems, obtain port and node WWN from firmware
  1560. * properties.
  1561. */
  1562. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1563. {
  1564. #ifdef CONFIG_SPARC
  1565. struct qla_hw_data *ha = vha->hw;
  1566. struct pci_dev *pdev = ha->pdev;
  1567. struct device_node *dp = pci_device_to_OF_node(pdev);
  1568. const u8 *val;
  1569. int len;
  1570. val = of_get_property(dp, "port-wwn", &len);
  1571. if (val && len >= WWN_SIZE)
  1572. memcpy(nv->port_name, val, WWN_SIZE);
  1573. val = of_get_property(dp, "node-wwn", &len);
  1574. if (val && len >= WWN_SIZE)
  1575. memcpy(nv->node_name, val, WWN_SIZE);
  1576. #endif
  1577. }
  1578. /*
  1579. * NVRAM configuration for ISP 2xxx
  1580. *
  1581. * Input:
  1582. * ha = adapter block pointer.
  1583. *
  1584. * Output:
  1585. * initialization control block in response_ring
  1586. * host adapters parameters in host adapter block
  1587. *
  1588. * Returns:
  1589. * 0 = success.
  1590. */
  1591. int
  1592. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1593. {
  1594. int rval;
  1595. uint8_t chksum = 0;
  1596. uint16_t cnt;
  1597. uint8_t *dptr1, *dptr2;
  1598. struct qla_hw_data *ha = vha->hw;
  1599. init_cb_t *icb = ha->init_cb;
  1600. nvram_t *nv = ha->nvram;
  1601. uint8_t *ptr = ha->nvram;
  1602. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1603. rval = QLA_SUCCESS;
  1604. /* Determine NVRAM starting address. */
  1605. ha->nvram_size = sizeof(nvram_t);
  1606. ha->nvram_base = 0;
  1607. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1608. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1609. ha->nvram_base = 0x80;
  1610. /* Get NVRAM data and calculate checksum. */
  1611. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1612. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1613. chksum += *ptr++;
  1614. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1615. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1616. /* Bad NVRAM data, set defaults parameters. */
  1617. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1618. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1619. /* Reset NVRAM data. */
  1620. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1621. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1622. nv->nvram_version);
  1623. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1624. "invalid -- WWPN) defaults.\n");
  1625. /*
  1626. * Set default initialization control block.
  1627. */
  1628. memset(nv, 0, ha->nvram_size);
  1629. nv->parameter_block_version = ICB_VERSION;
  1630. if (IS_QLA23XX(ha)) {
  1631. nv->firmware_options[0] = BIT_2 | BIT_1;
  1632. nv->firmware_options[1] = BIT_7 | BIT_5;
  1633. nv->add_firmware_options[0] = BIT_5;
  1634. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1635. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1636. nv->special_options[1] = BIT_7;
  1637. } else if (IS_QLA2200(ha)) {
  1638. nv->firmware_options[0] = BIT_2 | BIT_1;
  1639. nv->firmware_options[1] = BIT_7 | BIT_5;
  1640. nv->add_firmware_options[0] = BIT_5;
  1641. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1642. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1643. } else if (IS_QLA2100(ha)) {
  1644. nv->firmware_options[0] = BIT_3 | BIT_1;
  1645. nv->firmware_options[1] = BIT_5;
  1646. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1647. }
  1648. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1649. nv->execution_throttle = __constant_cpu_to_le16(16);
  1650. nv->retry_count = 8;
  1651. nv->retry_delay = 1;
  1652. nv->port_name[0] = 33;
  1653. nv->port_name[3] = 224;
  1654. nv->port_name[4] = 139;
  1655. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1656. nv->login_timeout = 4;
  1657. /*
  1658. * Set default host adapter parameters
  1659. */
  1660. nv->host_p[1] = BIT_2;
  1661. nv->reset_delay = 5;
  1662. nv->port_down_retry_count = 8;
  1663. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1664. nv->link_down_timeout = 60;
  1665. rval = 1;
  1666. }
  1667. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1668. /*
  1669. * The SN2 does not provide BIOS emulation which means you can't change
  1670. * potentially bogus BIOS settings. Force the use of default settings
  1671. * for link rate and frame size. Hope that the rest of the settings
  1672. * are valid.
  1673. */
  1674. if (ia64_platform_is("sn2")) {
  1675. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1676. if (IS_QLA23XX(ha))
  1677. nv->special_options[1] = BIT_7;
  1678. }
  1679. #endif
  1680. /* Reset Initialization control block */
  1681. memset(icb, 0, ha->init_cb_size);
  1682. /*
  1683. * Setup driver NVRAM options.
  1684. */
  1685. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1686. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1687. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1688. nv->firmware_options[1] &= ~BIT_4;
  1689. if (IS_QLA23XX(ha)) {
  1690. nv->firmware_options[0] |= BIT_2;
  1691. nv->firmware_options[0] &= ~BIT_3;
  1692. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1693. if (IS_QLA2300(ha)) {
  1694. if (ha->fb_rev == FPM_2310) {
  1695. strcpy(ha->model_number, "QLA2310");
  1696. } else {
  1697. strcpy(ha->model_number, "QLA2300");
  1698. }
  1699. } else {
  1700. qla2x00_set_model_info(vha, nv->model_number,
  1701. sizeof(nv->model_number), "QLA23xx");
  1702. }
  1703. } else if (IS_QLA2200(ha)) {
  1704. nv->firmware_options[0] |= BIT_2;
  1705. /*
  1706. * 'Point-to-point preferred, else loop' is not a safe
  1707. * connection mode setting.
  1708. */
  1709. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1710. (BIT_5 | BIT_4)) {
  1711. /* Force 'loop preferred, else point-to-point'. */
  1712. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1713. nv->add_firmware_options[0] |= BIT_5;
  1714. }
  1715. strcpy(ha->model_number, "QLA22xx");
  1716. } else /*if (IS_QLA2100(ha))*/ {
  1717. strcpy(ha->model_number, "QLA2100");
  1718. }
  1719. /*
  1720. * Copy over NVRAM RISC parameter block to initialization control block.
  1721. */
  1722. dptr1 = (uint8_t *)icb;
  1723. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1724. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1725. while (cnt--)
  1726. *dptr1++ = *dptr2++;
  1727. /* Copy 2nd half. */
  1728. dptr1 = (uint8_t *)icb->add_firmware_options;
  1729. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1730. while (cnt--)
  1731. *dptr1++ = *dptr2++;
  1732. /* Use alternate WWN? */
  1733. if (nv->host_p[1] & BIT_7) {
  1734. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1735. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1736. }
  1737. /* Prepare nodename */
  1738. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1739. /*
  1740. * Firmware will apply the following mask if the nodename was
  1741. * not provided.
  1742. */
  1743. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1744. icb->node_name[0] &= 0xF0;
  1745. }
  1746. /*
  1747. * Set host adapter parameters.
  1748. */
  1749. if (nv->host_p[0] & BIT_7)
  1750. ql2xextended_error_logging = 1;
  1751. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1752. /* Always load RISC code on non ISP2[12]00 chips. */
  1753. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1754. ha->flags.disable_risc_code_load = 0;
  1755. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1756. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1757. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1758. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1759. ha->flags.disable_serdes = 0;
  1760. ha->operating_mode =
  1761. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1762. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1763. sizeof(ha->fw_seriallink_options));
  1764. /* save HBA serial number */
  1765. ha->serial0 = icb->port_name[5];
  1766. ha->serial1 = icb->port_name[6];
  1767. ha->serial2 = icb->port_name[7];
  1768. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1769. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1770. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1771. ha->retry_count = nv->retry_count;
  1772. /* Set minimum login_timeout to 4 seconds. */
  1773. if (nv->login_timeout < ql2xlogintimeout)
  1774. nv->login_timeout = ql2xlogintimeout;
  1775. if (nv->login_timeout < 4)
  1776. nv->login_timeout = 4;
  1777. ha->login_timeout = nv->login_timeout;
  1778. icb->login_timeout = nv->login_timeout;
  1779. /* Set minimum RATOV to 100 tenths of a second. */
  1780. ha->r_a_tov = 100;
  1781. ha->loop_reset_delay = nv->reset_delay;
  1782. /* Link Down Timeout = 0:
  1783. *
  1784. * When Port Down timer expires we will start returning
  1785. * I/O's to OS with "DID_NO_CONNECT".
  1786. *
  1787. * Link Down Timeout != 0:
  1788. *
  1789. * The driver waits for the link to come up after link down
  1790. * before returning I/Os to OS with "DID_NO_CONNECT".
  1791. */
  1792. if (nv->link_down_timeout == 0) {
  1793. ha->loop_down_abort_time =
  1794. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1795. } else {
  1796. ha->link_down_timeout = nv->link_down_timeout;
  1797. ha->loop_down_abort_time =
  1798. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1799. }
  1800. /*
  1801. * Need enough time to try and get the port back.
  1802. */
  1803. ha->port_down_retry_count = nv->port_down_retry_count;
  1804. if (qlport_down_retry)
  1805. ha->port_down_retry_count = qlport_down_retry;
  1806. /* Set login_retry_count */
  1807. ha->login_retry_count = nv->retry_count;
  1808. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1809. ha->port_down_retry_count > 3)
  1810. ha->login_retry_count = ha->port_down_retry_count;
  1811. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1812. ha->login_retry_count = ha->port_down_retry_count;
  1813. if (ql2xloginretrycount)
  1814. ha->login_retry_count = ql2xloginretrycount;
  1815. icb->lun_enables = __constant_cpu_to_le16(0);
  1816. icb->command_resource_count = 0;
  1817. icb->immediate_notify_resource_count = 0;
  1818. icb->timeout = __constant_cpu_to_le16(0);
  1819. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1820. /* Enable RIO */
  1821. icb->firmware_options[0] &= ~BIT_3;
  1822. icb->add_firmware_options[0] &=
  1823. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1824. icb->add_firmware_options[0] |= BIT_2;
  1825. icb->response_accumulation_timer = 3;
  1826. icb->interrupt_delay_timer = 5;
  1827. vha->flags.process_response_queue = 1;
  1828. } else {
  1829. /* Enable ZIO. */
  1830. if (!vha->flags.init_done) {
  1831. ha->zio_mode = icb->add_firmware_options[0] &
  1832. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1833. ha->zio_timer = icb->interrupt_delay_timer ?
  1834. icb->interrupt_delay_timer: 2;
  1835. }
  1836. icb->add_firmware_options[0] &=
  1837. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1838. vha->flags.process_response_queue = 0;
  1839. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1840. ha->zio_mode = QLA_ZIO_MODE_6;
  1841. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1842. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1843. ha->zio_timer * 100));
  1844. qla_printk(KERN_INFO, ha,
  1845. "ZIO mode %d enabled; timer delay (%d us).\n",
  1846. ha->zio_mode, ha->zio_timer * 100);
  1847. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1848. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1849. vha->flags.process_response_queue = 1;
  1850. }
  1851. }
  1852. if (rval) {
  1853. DEBUG2_3(printk(KERN_WARNING
  1854. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1855. }
  1856. return (rval);
  1857. }
  1858. static void
  1859. qla2x00_rport_del(void *data)
  1860. {
  1861. fc_port_t *fcport = data;
  1862. struct fc_rport *rport;
  1863. spin_lock_irq(fcport->vha->host->host_lock);
  1864. rport = fcport->drport ? fcport->drport: fcport->rport;
  1865. fcport->drport = NULL;
  1866. spin_unlock_irq(fcport->vha->host->host_lock);
  1867. if (rport)
  1868. fc_remote_port_delete(rport);
  1869. }
  1870. /**
  1871. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1872. * @ha: HA context
  1873. * @flags: allocation flags
  1874. *
  1875. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1876. */
  1877. static fc_port_t *
  1878. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1879. {
  1880. fc_port_t *fcport;
  1881. fcport = kzalloc(sizeof(fc_port_t), flags);
  1882. if (!fcport)
  1883. return NULL;
  1884. /* Setup fcport template structure. */
  1885. fcport->vha = vha;
  1886. fcport->vp_idx = vha->vp_idx;
  1887. fcport->port_type = FCT_UNKNOWN;
  1888. fcport->loop_id = FC_NO_LOOP_ID;
  1889. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1890. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1891. return fcport;
  1892. }
  1893. /*
  1894. * qla2x00_configure_loop
  1895. * Updates Fibre Channel Device Database with what is actually on loop.
  1896. *
  1897. * Input:
  1898. * ha = adapter block pointer.
  1899. *
  1900. * Returns:
  1901. * 0 = success.
  1902. * 1 = error.
  1903. * 2 = database was full and device was not configured.
  1904. */
  1905. static int
  1906. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1907. {
  1908. int rval;
  1909. unsigned long flags, save_flags;
  1910. struct qla_hw_data *ha = vha->hw;
  1911. rval = QLA_SUCCESS;
  1912. /* Get Initiator ID */
  1913. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1914. rval = qla2x00_configure_hba(vha);
  1915. if (rval != QLA_SUCCESS) {
  1916. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1917. vha->host_no));
  1918. return (rval);
  1919. }
  1920. }
  1921. save_flags = flags = vha->dpc_flags;
  1922. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1923. vha->host_no, flags));
  1924. /*
  1925. * If we have both an RSCN and PORT UPDATE pending then handle them
  1926. * both at the same time.
  1927. */
  1928. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1929. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1930. /* Determine what we need to do */
  1931. if (ha->current_topology == ISP_CFG_FL &&
  1932. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1933. vha->flags.rscn_queue_overflow = 1;
  1934. set_bit(RSCN_UPDATE, &flags);
  1935. } else if (ha->current_topology == ISP_CFG_F &&
  1936. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1937. vha->flags.rscn_queue_overflow = 1;
  1938. set_bit(RSCN_UPDATE, &flags);
  1939. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1940. } else if (ha->current_topology == ISP_CFG_N) {
  1941. clear_bit(RSCN_UPDATE, &flags);
  1942. } else if (!vha->flags.online ||
  1943. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1944. vha->flags.rscn_queue_overflow = 1;
  1945. set_bit(RSCN_UPDATE, &flags);
  1946. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1947. }
  1948. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1949. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1950. rval = QLA_FUNCTION_FAILED;
  1951. else
  1952. rval = qla2x00_configure_local_loop(vha);
  1953. }
  1954. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1955. if (LOOP_TRANSITION(vha))
  1956. rval = QLA_FUNCTION_FAILED;
  1957. else
  1958. rval = qla2x00_configure_fabric(vha);
  1959. }
  1960. if (rval == QLA_SUCCESS) {
  1961. if (atomic_read(&vha->loop_down_timer) ||
  1962. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1963. rval = QLA_FUNCTION_FAILED;
  1964. } else {
  1965. atomic_set(&vha->loop_state, LOOP_READY);
  1966. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1967. }
  1968. }
  1969. if (rval) {
  1970. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1971. __func__, vha->host_no));
  1972. } else {
  1973. DEBUG3(printk("%s: exiting normally\n", __func__));
  1974. }
  1975. /* Restore state if a resync event occurred during processing */
  1976. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1977. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1978. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1979. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1980. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1981. vha->flags.rscn_queue_overflow = 1;
  1982. }
  1983. }
  1984. return (rval);
  1985. }
  1986. /*
  1987. * qla2x00_configure_local_loop
  1988. * Updates Fibre Channel Device Database with local loop devices.
  1989. *
  1990. * Input:
  1991. * ha = adapter block pointer.
  1992. *
  1993. * Returns:
  1994. * 0 = success.
  1995. */
  1996. static int
  1997. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1998. {
  1999. int rval, rval2;
  2000. int found_devs;
  2001. int found;
  2002. fc_port_t *fcport, *new_fcport;
  2003. uint16_t index;
  2004. uint16_t entries;
  2005. char *id_iter;
  2006. uint16_t loop_id;
  2007. uint8_t domain, area, al_pa;
  2008. struct qla_hw_data *ha = vha->hw;
  2009. found_devs = 0;
  2010. new_fcport = NULL;
  2011. entries = MAX_FIBRE_DEVICES;
  2012. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2013. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2014. /* Get list of logged in devices. */
  2015. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2016. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2017. &entries);
  2018. if (rval != QLA_SUCCESS)
  2019. goto cleanup_allocation;
  2020. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2021. vha->host_no, entries));
  2022. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2023. entries * sizeof(struct gid_list_info)));
  2024. /* Allocate temporary fcport for any new fcports discovered. */
  2025. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2026. if (new_fcport == NULL) {
  2027. rval = QLA_MEMORY_ALLOC_FAILED;
  2028. goto cleanup_allocation;
  2029. }
  2030. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2031. /*
  2032. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2033. */
  2034. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2035. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2036. fcport->port_type != FCT_BROADCAST &&
  2037. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2038. DEBUG(printk("scsi(%ld): Marking port lost, "
  2039. "loop_id=0x%04x\n",
  2040. vha->host_no, fcport->loop_id));
  2041. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2042. }
  2043. }
  2044. /* Add devices to port list. */
  2045. id_iter = (char *)ha->gid_list;
  2046. for (index = 0; index < entries; index++) {
  2047. domain = ((struct gid_list_info *)id_iter)->domain;
  2048. area = ((struct gid_list_info *)id_iter)->area;
  2049. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2050. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2051. loop_id = (uint16_t)
  2052. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2053. else
  2054. loop_id = le16_to_cpu(
  2055. ((struct gid_list_info *)id_iter)->loop_id);
  2056. id_iter += ha->gid_list_info_size;
  2057. /* Bypass reserved domain fields. */
  2058. if ((domain & 0xf0) == 0xf0)
  2059. continue;
  2060. /* Bypass if not same domain and area of adapter. */
  2061. if (area && domain &&
  2062. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2063. continue;
  2064. /* Bypass invalid local loop ID. */
  2065. if (loop_id > LAST_LOCAL_LOOP_ID)
  2066. continue;
  2067. /* Fill in member data. */
  2068. new_fcport->d_id.b.domain = domain;
  2069. new_fcport->d_id.b.area = area;
  2070. new_fcport->d_id.b.al_pa = al_pa;
  2071. new_fcport->loop_id = loop_id;
  2072. new_fcport->vp_idx = vha->vp_idx;
  2073. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2074. if (rval2 != QLA_SUCCESS) {
  2075. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2076. "information -- get_port_database=%x, "
  2077. "loop_id=0x%04x\n",
  2078. vha->host_no, rval2, new_fcport->loop_id));
  2079. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2080. vha->host_no));
  2081. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2082. continue;
  2083. }
  2084. /* Check for matching device in port list. */
  2085. found = 0;
  2086. fcport = NULL;
  2087. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2088. if (memcmp(new_fcport->port_name, fcport->port_name,
  2089. WWN_SIZE))
  2090. continue;
  2091. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2092. fcport->loop_id = new_fcport->loop_id;
  2093. fcport->port_type = new_fcport->port_type;
  2094. fcport->d_id.b24 = new_fcport->d_id.b24;
  2095. memcpy(fcport->node_name, new_fcport->node_name,
  2096. WWN_SIZE);
  2097. found++;
  2098. break;
  2099. }
  2100. if (!found) {
  2101. /* New device, add to fcports list. */
  2102. if (vha->vp_idx) {
  2103. new_fcport->vha = vha;
  2104. new_fcport->vp_idx = vha->vp_idx;
  2105. }
  2106. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2107. /* Allocate a new replacement fcport. */
  2108. fcport = new_fcport;
  2109. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2110. if (new_fcport == NULL) {
  2111. rval = QLA_MEMORY_ALLOC_FAILED;
  2112. goto cleanup_allocation;
  2113. }
  2114. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2115. }
  2116. /* Base iIDMA settings on HBA port speed. */
  2117. fcport->fp_speed = ha->link_data_rate;
  2118. qla2x00_update_fcport(vha, fcport);
  2119. found_devs++;
  2120. }
  2121. cleanup_allocation:
  2122. kfree(new_fcport);
  2123. if (rval != QLA_SUCCESS) {
  2124. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2125. "rval=%x\n", vha->host_no, rval));
  2126. }
  2127. return (rval);
  2128. }
  2129. static void
  2130. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2131. {
  2132. #define LS_UNKNOWN 2
  2133. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2134. char *link_speed;
  2135. int rval;
  2136. uint16_t mb[4];
  2137. struct qla_hw_data *ha = vha->hw;
  2138. if (!IS_IIDMA_CAPABLE(ha))
  2139. return;
  2140. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2141. fcport->fp_speed > ha->link_data_rate)
  2142. return;
  2143. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2144. mb);
  2145. if (rval != QLA_SUCCESS) {
  2146. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2147. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2148. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2149. fcport->port_name[2], fcport->port_name[3],
  2150. fcport->port_name[4], fcport->port_name[5],
  2151. fcport->port_name[6], fcport->port_name[7], rval,
  2152. fcport->fp_speed, mb[0], mb[1]));
  2153. } else {
  2154. link_speed = link_speeds[LS_UNKNOWN];
  2155. if (fcport->fp_speed < 5)
  2156. link_speed = link_speeds[fcport->fp_speed];
  2157. else if (fcport->fp_speed == 0x13)
  2158. link_speed = link_speeds[5];
  2159. DEBUG2(qla_printk(KERN_INFO, ha,
  2160. "iIDMA adjusted to %s GB/s on "
  2161. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2162. link_speed, fcport->port_name[0],
  2163. fcport->port_name[1], fcport->port_name[2],
  2164. fcport->port_name[3], fcport->port_name[4],
  2165. fcport->port_name[5], fcport->port_name[6],
  2166. fcport->port_name[7]));
  2167. }
  2168. }
  2169. static void
  2170. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2171. {
  2172. struct fc_rport_identifiers rport_ids;
  2173. struct fc_rport *rport;
  2174. struct qla_hw_data *ha = vha->hw;
  2175. qla2x00_rport_del(fcport);
  2176. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2177. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2178. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2179. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2180. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2181. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2182. if (!rport) {
  2183. qla_printk(KERN_WARNING, ha,
  2184. "Unable to allocate fc remote port!\n");
  2185. return;
  2186. }
  2187. spin_lock_irq(fcport->vha->host->host_lock);
  2188. *((fc_port_t **)rport->dd_data) = fcport;
  2189. spin_unlock_irq(fcport->vha->host->host_lock);
  2190. rport->supported_classes = fcport->supported_classes;
  2191. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2192. if (fcport->port_type == FCT_INITIATOR)
  2193. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2194. if (fcport->port_type == FCT_TARGET)
  2195. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2196. fc_remote_port_rolechg(rport, rport_ids.roles);
  2197. }
  2198. /*
  2199. * qla2x00_update_fcport
  2200. * Updates device on list.
  2201. *
  2202. * Input:
  2203. * ha = adapter block pointer.
  2204. * fcport = port structure pointer.
  2205. *
  2206. * Return:
  2207. * 0 - Success
  2208. * BIT_0 - error
  2209. *
  2210. * Context:
  2211. * Kernel context.
  2212. */
  2213. void
  2214. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2215. {
  2216. struct qla_hw_data *ha = vha->hw;
  2217. fcport->vha = vha;
  2218. fcport->login_retry = 0;
  2219. fcport->port_login_retry_count = ha->port_down_retry_count *
  2220. PORT_RETRY_TIME;
  2221. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2222. PORT_RETRY_TIME);
  2223. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2224. qla2x00_iidma_fcport(vha, fcport);
  2225. atomic_set(&fcport->state, FCS_ONLINE);
  2226. qla2x00_reg_remote_port(vha, fcport);
  2227. }
  2228. /*
  2229. * qla2x00_configure_fabric
  2230. * Setup SNS devices with loop ID's.
  2231. *
  2232. * Input:
  2233. * ha = adapter block pointer.
  2234. *
  2235. * Returns:
  2236. * 0 = success.
  2237. * BIT_0 = error
  2238. */
  2239. static int
  2240. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2241. {
  2242. int rval, rval2;
  2243. fc_port_t *fcport, *fcptemp;
  2244. uint16_t next_loopid;
  2245. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2246. uint16_t loop_id;
  2247. LIST_HEAD(new_fcports);
  2248. struct qla_hw_data *ha = vha->hw;
  2249. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2250. /* If FL port exists, then SNS is present */
  2251. if (IS_FWI2_CAPABLE(ha))
  2252. loop_id = NPH_F_PORT;
  2253. else
  2254. loop_id = SNS_FL_PORT;
  2255. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2256. if (rval != QLA_SUCCESS) {
  2257. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2258. "Port\n", vha->host_no));
  2259. vha->device_flags &= ~SWITCH_FOUND;
  2260. return (QLA_SUCCESS);
  2261. }
  2262. vha->device_flags |= SWITCH_FOUND;
  2263. /* Mark devices that need re-synchronization. */
  2264. rval2 = qla2x00_device_resync(vha);
  2265. if (rval2 == QLA_RSCNS_HANDLED) {
  2266. /* No point doing the scan, just continue. */
  2267. return (QLA_SUCCESS);
  2268. }
  2269. do {
  2270. /* FDMI support. */
  2271. if (ql2xfdmienable &&
  2272. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2273. qla2x00_fdmi_register(vha);
  2274. /* Ensure we are logged into the SNS. */
  2275. if (IS_FWI2_CAPABLE(ha))
  2276. loop_id = NPH_SNS;
  2277. else
  2278. loop_id = SIMPLE_NAME_SERVER;
  2279. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2280. 0xfc, mb, BIT_1 | BIT_0);
  2281. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2282. DEBUG2(qla_printk(KERN_INFO, ha,
  2283. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2284. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2285. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2286. return (QLA_SUCCESS);
  2287. }
  2288. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2289. if (qla2x00_rft_id(vha)) {
  2290. /* EMPTY */
  2291. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2292. "TYPE failed.\n", vha->host_no));
  2293. }
  2294. if (qla2x00_rff_id(vha)) {
  2295. /* EMPTY */
  2296. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2297. "Features failed.\n", vha->host_no));
  2298. }
  2299. if (qla2x00_rnn_id(vha)) {
  2300. /* EMPTY */
  2301. DEBUG2(printk("scsi(%ld): Register Node Name "
  2302. "failed.\n", vha->host_no));
  2303. } else if (qla2x00_rsnn_nn(vha)) {
  2304. /* EMPTY */
  2305. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2306. "Node Name failed.\n", vha->host_no));
  2307. }
  2308. }
  2309. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2310. if (rval != QLA_SUCCESS)
  2311. break;
  2312. /*
  2313. * Logout all previous fabric devices marked lost, except
  2314. * tape devices.
  2315. */
  2316. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2317. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2318. break;
  2319. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2320. continue;
  2321. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2322. qla2x00_mark_device_lost(vha, fcport,
  2323. ql2xplogiabsentdevice, 0);
  2324. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2325. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2326. fcport->port_type != FCT_INITIATOR &&
  2327. fcport->port_type != FCT_BROADCAST) {
  2328. ha->isp_ops->fabric_logout(vha,
  2329. fcport->loop_id,
  2330. fcport->d_id.b.domain,
  2331. fcport->d_id.b.area,
  2332. fcport->d_id.b.al_pa);
  2333. fcport->loop_id = FC_NO_LOOP_ID;
  2334. }
  2335. }
  2336. }
  2337. /* Starting free loop ID. */
  2338. next_loopid = ha->min_external_loopid;
  2339. /*
  2340. * Scan through our port list and login entries that need to be
  2341. * logged in.
  2342. */
  2343. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2344. if (atomic_read(&vha->loop_down_timer) ||
  2345. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2346. break;
  2347. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2348. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2349. continue;
  2350. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2351. fcport->loop_id = next_loopid;
  2352. rval = qla2x00_find_new_loop_id(
  2353. base_vha, fcport);
  2354. if (rval != QLA_SUCCESS) {
  2355. /* Ran out of IDs to use */
  2356. break;
  2357. }
  2358. }
  2359. /* Login and update database */
  2360. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2361. }
  2362. /* Exit if out of loop IDs. */
  2363. if (rval != QLA_SUCCESS) {
  2364. break;
  2365. }
  2366. /*
  2367. * Login and add the new devices to our port list.
  2368. */
  2369. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2370. if (atomic_read(&vha->loop_down_timer) ||
  2371. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2372. break;
  2373. /* Find a new loop ID to use. */
  2374. fcport->loop_id = next_loopid;
  2375. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2376. if (rval != QLA_SUCCESS) {
  2377. /* Ran out of IDs to use */
  2378. break;
  2379. }
  2380. /* Login and update database */
  2381. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2382. if (vha->vp_idx) {
  2383. fcport->vha = vha;
  2384. fcport->vp_idx = vha->vp_idx;
  2385. }
  2386. list_move_tail(&fcport->list, &vha->vp_fcports);
  2387. }
  2388. } while (0);
  2389. /* Free all new device structures not processed. */
  2390. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2391. list_del(&fcport->list);
  2392. kfree(fcport);
  2393. }
  2394. if (rval) {
  2395. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2396. "rval=%d\n", vha->host_no, rval));
  2397. }
  2398. return (rval);
  2399. }
  2400. /*
  2401. * qla2x00_find_all_fabric_devs
  2402. *
  2403. * Input:
  2404. * ha = adapter block pointer.
  2405. * dev = database device entry pointer.
  2406. *
  2407. * Returns:
  2408. * 0 = success.
  2409. *
  2410. * Context:
  2411. * Kernel context.
  2412. */
  2413. static int
  2414. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2415. struct list_head *new_fcports)
  2416. {
  2417. int rval;
  2418. uint16_t loop_id;
  2419. fc_port_t *fcport, *new_fcport, *fcptemp;
  2420. int found;
  2421. sw_info_t *swl;
  2422. int swl_idx;
  2423. int first_dev, last_dev;
  2424. port_id_t wrap, nxt_d_id;
  2425. struct qla_hw_data *ha = vha->hw;
  2426. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2427. struct scsi_qla_host *tvp;
  2428. rval = QLA_SUCCESS;
  2429. /* Try GID_PT to get device list, else GAN. */
  2430. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2431. if (!swl) {
  2432. /*EMPTY*/
  2433. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2434. "on GA_NXT\n", vha->host_no));
  2435. } else {
  2436. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2437. kfree(swl);
  2438. swl = NULL;
  2439. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2440. kfree(swl);
  2441. swl = NULL;
  2442. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2443. kfree(swl);
  2444. swl = NULL;
  2445. } else if (ql2xiidmaenable &&
  2446. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2447. qla2x00_gpsc(vha, swl);
  2448. }
  2449. }
  2450. swl_idx = 0;
  2451. /* Allocate temporary fcport for any new fcports discovered. */
  2452. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2453. if (new_fcport == NULL) {
  2454. kfree(swl);
  2455. return (QLA_MEMORY_ALLOC_FAILED);
  2456. }
  2457. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2458. /* Set start port ID scan at adapter ID. */
  2459. first_dev = 1;
  2460. last_dev = 0;
  2461. /* Starting free loop ID. */
  2462. loop_id = ha->min_external_loopid;
  2463. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2464. if (qla2x00_is_reserved_id(vha, loop_id))
  2465. continue;
  2466. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2467. break;
  2468. if (swl != NULL) {
  2469. if (last_dev) {
  2470. wrap.b24 = new_fcport->d_id.b24;
  2471. } else {
  2472. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2473. memcpy(new_fcport->node_name,
  2474. swl[swl_idx].node_name, WWN_SIZE);
  2475. memcpy(new_fcport->port_name,
  2476. swl[swl_idx].port_name, WWN_SIZE);
  2477. memcpy(new_fcport->fabric_port_name,
  2478. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2479. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2480. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2481. last_dev = 1;
  2482. }
  2483. swl_idx++;
  2484. }
  2485. } else {
  2486. /* Send GA_NXT to the switch */
  2487. rval = qla2x00_ga_nxt(vha, new_fcport);
  2488. if (rval != QLA_SUCCESS) {
  2489. qla_printk(KERN_WARNING, ha,
  2490. "SNS scan failed -- assuming zero-entry "
  2491. "result...\n");
  2492. list_for_each_entry_safe(fcport, fcptemp,
  2493. new_fcports, list) {
  2494. list_del(&fcport->list);
  2495. kfree(fcport);
  2496. }
  2497. rval = QLA_SUCCESS;
  2498. break;
  2499. }
  2500. }
  2501. /* If wrap on switch device list, exit. */
  2502. if (first_dev) {
  2503. wrap.b24 = new_fcport->d_id.b24;
  2504. first_dev = 0;
  2505. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2506. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2507. vha->host_no, new_fcport->d_id.b.domain,
  2508. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2509. break;
  2510. }
  2511. /* Bypass if same physical adapter. */
  2512. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2513. continue;
  2514. /* Bypass virtual ports of the same host. */
  2515. found = 0;
  2516. if (ha->num_vhosts) {
  2517. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2518. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2519. found = 1;
  2520. break;
  2521. }
  2522. }
  2523. if (found)
  2524. continue;
  2525. }
  2526. /* Bypass if same domain and area of adapter. */
  2527. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2528. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2529. ISP_CFG_FL)
  2530. continue;
  2531. /* Bypass reserved domain fields. */
  2532. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2533. continue;
  2534. /* Locate matching device in database. */
  2535. found = 0;
  2536. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2537. if (memcmp(new_fcport->port_name, fcport->port_name,
  2538. WWN_SIZE))
  2539. continue;
  2540. found++;
  2541. /* Update port state. */
  2542. memcpy(fcport->fabric_port_name,
  2543. new_fcport->fabric_port_name, WWN_SIZE);
  2544. fcport->fp_speed = new_fcport->fp_speed;
  2545. /*
  2546. * If address the same and state FCS_ONLINE, nothing
  2547. * changed.
  2548. */
  2549. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2550. atomic_read(&fcport->state) == FCS_ONLINE) {
  2551. break;
  2552. }
  2553. /*
  2554. * If device was not a fabric device before.
  2555. */
  2556. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2557. fcport->d_id.b24 = new_fcport->d_id.b24;
  2558. fcport->loop_id = FC_NO_LOOP_ID;
  2559. fcport->flags |= (FCF_FABRIC_DEVICE |
  2560. FCF_LOGIN_NEEDED);
  2561. break;
  2562. }
  2563. /*
  2564. * Port ID changed or device was marked to be updated;
  2565. * Log it out if still logged in and mark it for
  2566. * relogin later.
  2567. */
  2568. fcport->d_id.b24 = new_fcport->d_id.b24;
  2569. fcport->flags |= FCF_LOGIN_NEEDED;
  2570. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2571. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2572. fcport->port_type != FCT_INITIATOR &&
  2573. fcport->port_type != FCT_BROADCAST) {
  2574. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2575. fcport->d_id.b.domain, fcport->d_id.b.area,
  2576. fcport->d_id.b.al_pa);
  2577. fcport->loop_id = FC_NO_LOOP_ID;
  2578. }
  2579. break;
  2580. }
  2581. if (found)
  2582. continue;
  2583. /* If device was not in our fcports list, then add it. */
  2584. list_add_tail(&new_fcport->list, new_fcports);
  2585. /* Allocate a new replacement fcport. */
  2586. nxt_d_id.b24 = new_fcport->d_id.b24;
  2587. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2588. if (new_fcport == NULL) {
  2589. kfree(swl);
  2590. return (QLA_MEMORY_ALLOC_FAILED);
  2591. }
  2592. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2593. new_fcport->d_id.b24 = nxt_d_id.b24;
  2594. }
  2595. kfree(swl);
  2596. kfree(new_fcport);
  2597. return (rval);
  2598. }
  2599. /*
  2600. * qla2x00_find_new_loop_id
  2601. * Scan through our port list and find a new usable loop ID.
  2602. *
  2603. * Input:
  2604. * ha: adapter state pointer.
  2605. * dev: port structure pointer.
  2606. *
  2607. * Returns:
  2608. * qla2x00 local function return status code.
  2609. *
  2610. * Context:
  2611. * Kernel context.
  2612. */
  2613. static int
  2614. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2615. {
  2616. int rval;
  2617. int found;
  2618. fc_port_t *fcport;
  2619. uint16_t first_loop_id;
  2620. struct qla_hw_data *ha = vha->hw;
  2621. struct scsi_qla_host *vp;
  2622. struct scsi_qla_host *tvp;
  2623. rval = QLA_SUCCESS;
  2624. /* Save starting loop ID. */
  2625. first_loop_id = dev->loop_id;
  2626. for (;;) {
  2627. /* Skip loop ID if already used by adapter. */
  2628. if (dev->loop_id == vha->loop_id)
  2629. dev->loop_id++;
  2630. /* Skip reserved loop IDs. */
  2631. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2632. dev->loop_id++;
  2633. /* Reset loop ID if passed the end. */
  2634. if (dev->loop_id > ha->max_loop_id) {
  2635. /* first loop ID. */
  2636. dev->loop_id = ha->min_external_loopid;
  2637. }
  2638. /* Check for loop ID being already in use. */
  2639. found = 0;
  2640. fcport = NULL;
  2641. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2642. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2643. if (fcport->loop_id == dev->loop_id &&
  2644. fcport != dev) {
  2645. /* ID possibly in use */
  2646. found++;
  2647. break;
  2648. }
  2649. }
  2650. if (found)
  2651. break;
  2652. }
  2653. /* If not in use then it is free to use. */
  2654. if (!found) {
  2655. break;
  2656. }
  2657. /* ID in use. Try next value. */
  2658. dev->loop_id++;
  2659. /* If wrap around. No free ID to use. */
  2660. if (dev->loop_id == first_loop_id) {
  2661. dev->loop_id = FC_NO_LOOP_ID;
  2662. rval = QLA_FUNCTION_FAILED;
  2663. break;
  2664. }
  2665. }
  2666. return (rval);
  2667. }
  2668. /*
  2669. * qla2x00_device_resync
  2670. * Marks devices in the database that needs resynchronization.
  2671. *
  2672. * Input:
  2673. * ha = adapter block pointer.
  2674. *
  2675. * Context:
  2676. * Kernel context.
  2677. */
  2678. static int
  2679. qla2x00_device_resync(scsi_qla_host_t *vha)
  2680. {
  2681. int rval;
  2682. uint32_t mask;
  2683. fc_port_t *fcport;
  2684. uint32_t rscn_entry;
  2685. uint8_t rscn_out_iter;
  2686. uint8_t format;
  2687. port_id_t d_id;
  2688. rval = QLA_RSCNS_HANDLED;
  2689. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2690. vha->flags.rscn_queue_overflow) {
  2691. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2692. format = MSB(MSW(rscn_entry));
  2693. d_id.b.domain = LSB(MSW(rscn_entry));
  2694. d_id.b.area = MSB(LSW(rscn_entry));
  2695. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2696. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2697. "[%02x/%02x%02x%02x].\n",
  2698. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2699. d_id.b.area, d_id.b.al_pa));
  2700. vha->rscn_out_ptr++;
  2701. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2702. vha->rscn_out_ptr = 0;
  2703. /* Skip duplicate entries. */
  2704. for (rscn_out_iter = vha->rscn_out_ptr;
  2705. !vha->flags.rscn_queue_overflow &&
  2706. rscn_out_iter != vha->rscn_in_ptr;
  2707. rscn_out_iter = (rscn_out_iter ==
  2708. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2709. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2710. break;
  2711. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2712. "entry found at [%d].\n", vha->host_no,
  2713. rscn_out_iter));
  2714. vha->rscn_out_ptr = rscn_out_iter;
  2715. }
  2716. /* Queue overflow, set switch default case. */
  2717. if (vha->flags.rscn_queue_overflow) {
  2718. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2719. "overflow.\n", vha->host_no));
  2720. format = 3;
  2721. vha->flags.rscn_queue_overflow = 0;
  2722. }
  2723. switch (format) {
  2724. case 0:
  2725. mask = 0xffffff;
  2726. break;
  2727. case 1:
  2728. mask = 0xffff00;
  2729. break;
  2730. case 2:
  2731. mask = 0xff0000;
  2732. break;
  2733. default:
  2734. mask = 0x0;
  2735. d_id.b24 = 0;
  2736. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2737. break;
  2738. }
  2739. rval = QLA_SUCCESS;
  2740. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2741. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2742. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2743. fcport->port_type == FCT_BROADCAST)
  2744. continue;
  2745. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2746. if (format != 3 ||
  2747. fcport->port_type != FCT_INITIATOR) {
  2748. qla2x00_mark_device_lost(vha, fcport,
  2749. 0, 0);
  2750. }
  2751. }
  2752. }
  2753. }
  2754. return (rval);
  2755. }
  2756. /*
  2757. * qla2x00_fabric_dev_login
  2758. * Login fabric target device and update FC port database.
  2759. *
  2760. * Input:
  2761. * ha: adapter state pointer.
  2762. * fcport: port structure list pointer.
  2763. * next_loopid: contains value of a new loop ID that can be used
  2764. * by the next login attempt.
  2765. *
  2766. * Returns:
  2767. * qla2x00 local function return status code.
  2768. *
  2769. * Context:
  2770. * Kernel context.
  2771. */
  2772. static int
  2773. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2774. uint16_t *next_loopid)
  2775. {
  2776. int rval;
  2777. int retry;
  2778. uint8_t opts;
  2779. struct qla_hw_data *ha = vha->hw;
  2780. rval = QLA_SUCCESS;
  2781. retry = 0;
  2782. if (IS_ALOGIO_CAPABLE(ha)) {
  2783. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2784. if (!rval)
  2785. return rval;
  2786. }
  2787. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2788. if (rval == QLA_SUCCESS) {
  2789. /* Send an ADISC to tape devices.*/
  2790. opts = 0;
  2791. if (fcport->flags & FCF_TAPE_PRESENT)
  2792. opts |= BIT_1;
  2793. rval = qla2x00_get_port_database(vha, fcport, opts);
  2794. if (rval != QLA_SUCCESS) {
  2795. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2796. fcport->d_id.b.domain, fcport->d_id.b.area,
  2797. fcport->d_id.b.al_pa);
  2798. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2799. } else {
  2800. qla2x00_update_fcport(vha, fcport);
  2801. }
  2802. }
  2803. return (rval);
  2804. }
  2805. /*
  2806. * qla2x00_fabric_login
  2807. * Issue fabric login command.
  2808. *
  2809. * Input:
  2810. * ha = adapter block pointer.
  2811. * device = pointer to FC device type structure.
  2812. *
  2813. * Returns:
  2814. * 0 - Login successfully
  2815. * 1 - Login failed
  2816. * 2 - Initiator device
  2817. * 3 - Fatal error
  2818. */
  2819. int
  2820. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2821. uint16_t *next_loopid)
  2822. {
  2823. int rval;
  2824. int retry;
  2825. uint16_t tmp_loopid;
  2826. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2827. struct qla_hw_data *ha = vha->hw;
  2828. retry = 0;
  2829. tmp_loopid = 0;
  2830. for (;;) {
  2831. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2832. "for port %02x%02x%02x.\n",
  2833. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2834. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2835. /* Login fcport on switch. */
  2836. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2837. fcport->d_id.b.domain, fcport->d_id.b.area,
  2838. fcport->d_id.b.al_pa, mb, BIT_0);
  2839. if (mb[0] == MBS_PORT_ID_USED) {
  2840. /*
  2841. * Device has another loop ID. The firmware team
  2842. * recommends the driver perform an implicit login with
  2843. * the specified ID again. The ID we just used is save
  2844. * here so we return with an ID that can be tried by
  2845. * the next login.
  2846. */
  2847. retry++;
  2848. tmp_loopid = fcport->loop_id;
  2849. fcport->loop_id = mb[1];
  2850. DEBUG(printk("Fabric Login: port in use - next "
  2851. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2852. fcport->loop_id, fcport->d_id.b.domain,
  2853. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2854. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2855. /*
  2856. * Login succeeded.
  2857. */
  2858. if (retry) {
  2859. /* A retry occurred before. */
  2860. *next_loopid = tmp_loopid;
  2861. } else {
  2862. /*
  2863. * No retry occurred before. Just increment the
  2864. * ID value for next login.
  2865. */
  2866. *next_loopid = (fcport->loop_id + 1);
  2867. }
  2868. if (mb[1] & BIT_0) {
  2869. fcport->port_type = FCT_INITIATOR;
  2870. } else {
  2871. fcport->port_type = FCT_TARGET;
  2872. if (mb[1] & BIT_1) {
  2873. fcport->flags |= FCF_FCP2_DEVICE;
  2874. }
  2875. }
  2876. if (mb[10] & BIT_0)
  2877. fcport->supported_classes |= FC_COS_CLASS2;
  2878. if (mb[10] & BIT_1)
  2879. fcport->supported_classes |= FC_COS_CLASS3;
  2880. rval = QLA_SUCCESS;
  2881. break;
  2882. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2883. /*
  2884. * Loop ID already used, try next loop ID.
  2885. */
  2886. fcport->loop_id++;
  2887. rval = qla2x00_find_new_loop_id(vha, fcport);
  2888. if (rval != QLA_SUCCESS) {
  2889. /* Ran out of loop IDs to use */
  2890. break;
  2891. }
  2892. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2893. /*
  2894. * Firmware possibly timed out during login. If NO
  2895. * retries are left to do then the device is declared
  2896. * dead.
  2897. */
  2898. *next_loopid = fcport->loop_id;
  2899. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2900. fcport->d_id.b.domain, fcport->d_id.b.area,
  2901. fcport->d_id.b.al_pa);
  2902. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2903. rval = 1;
  2904. break;
  2905. } else {
  2906. /*
  2907. * unrecoverable / not handled error
  2908. */
  2909. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2910. "loop_id=%x jiffies=%lx.\n",
  2911. __func__, vha->host_no, mb[0],
  2912. fcport->d_id.b.domain, fcport->d_id.b.area,
  2913. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2914. *next_loopid = fcport->loop_id;
  2915. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2916. fcport->d_id.b.domain, fcport->d_id.b.area,
  2917. fcport->d_id.b.al_pa);
  2918. fcport->loop_id = FC_NO_LOOP_ID;
  2919. fcport->login_retry = 0;
  2920. rval = 3;
  2921. break;
  2922. }
  2923. }
  2924. return (rval);
  2925. }
  2926. /*
  2927. * qla2x00_local_device_login
  2928. * Issue local device login command.
  2929. *
  2930. * Input:
  2931. * ha = adapter block pointer.
  2932. * loop_id = loop id of device to login to.
  2933. *
  2934. * Returns (Where's the #define!!!!):
  2935. * 0 - Login successfully
  2936. * 1 - Login failed
  2937. * 3 - Fatal error
  2938. */
  2939. int
  2940. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2941. {
  2942. int rval;
  2943. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2944. memset(mb, 0, sizeof(mb));
  2945. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2946. if (rval == QLA_SUCCESS) {
  2947. /* Interrogate mailbox registers for any errors */
  2948. if (mb[0] == MBS_COMMAND_ERROR)
  2949. rval = 1;
  2950. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2951. /* device not in PCB table */
  2952. rval = 3;
  2953. }
  2954. return (rval);
  2955. }
  2956. /*
  2957. * qla2x00_loop_resync
  2958. * Resync with fibre channel devices.
  2959. *
  2960. * Input:
  2961. * ha = adapter block pointer.
  2962. *
  2963. * Returns:
  2964. * 0 = success
  2965. */
  2966. int
  2967. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2968. {
  2969. int rval = QLA_SUCCESS;
  2970. uint32_t wait_time;
  2971. struct req_que *req;
  2972. struct rsp_que *rsp;
  2973. if (vha->hw->flags.cpu_affinity_enabled)
  2974. req = vha->hw->req_q_map[0];
  2975. else
  2976. req = vha->req;
  2977. rsp = req->rsp;
  2978. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2979. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2980. if (vha->flags.online) {
  2981. if (!(rval = qla2x00_fw_ready(vha))) {
  2982. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2983. wait_time = 256;
  2984. do {
  2985. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2986. /* Issue a marker after FW becomes ready. */
  2987. qla2x00_marker(vha, req, rsp, 0, 0,
  2988. MK_SYNC_ALL);
  2989. vha->marker_needed = 0;
  2990. /* Remap devices on Loop. */
  2991. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2992. qla2x00_configure_loop(vha);
  2993. wait_time--;
  2994. } while (!atomic_read(&vha->loop_down_timer) &&
  2995. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2996. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2997. &vha->dpc_flags)));
  2998. }
  2999. }
  3000. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3001. return (QLA_FUNCTION_FAILED);
  3002. if (rval)
  3003. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3004. return (rval);
  3005. }
  3006. void
  3007. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3008. {
  3009. fc_port_t *fcport;
  3010. struct scsi_qla_host *tvp, *vha;
  3011. /* Go with deferred removal of rport references. */
  3012. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3013. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3014. if (fcport && fcport->drport &&
  3015. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3016. qla2x00_rport_del(fcport);
  3017. }
  3018. /*
  3019. * qla2x00_abort_isp
  3020. * Resets ISP and aborts all outstanding commands.
  3021. *
  3022. * Input:
  3023. * ha = adapter block pointer.
  3024. *
  3025. * Returns:
  3026. * 0 = success
  3027. */
  3028. int
  3029. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3030. {
  3031. int rval;
  3032. uint8_t status = 0;
  3033. struct qla_hw_data *ha = vha->hw;
  3034. struct scsi_qla_host *vp;
  3035. struct scsi_qla_host *tvp;
  3036. struct req_que *req = ha->req_q_map[0];
  3037. if (vha->flags.online) {
  3038. vha->flags.online = 0;
  3039. ha->flags.chip_reset_done = 0;
  3040. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3041. ha->qla_stats.total_isp_aborts++;
  3042. qla_printk(KERN_INFO, ha,
  3043. "Performing ISP error recovery - ha= %p.\n", ha);
  3044. ha->isp_ops->reset_chip(vha);
  3045. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3046. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3047. atomic_set(&vha->loop_state, LOOP_DOWN);
  3048. qla2x00_mark_all_devices_lost(vha, 0);
  3049. } else {
  3050. if (!atomic_read(&vha->loop_down_timer))
  3051. atomic_set(&vha->loop_down_timer,
  3052. LOOP_DOWN_TIME);
  3053. }
  3054. /* Requeue all commands in outstanding command list. */
  3055. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3056. ha->isp_ops->get_flash_version(vha, req->ring);
  3057. ha->isp_ops->nvram_config(vha);
  3058. if (!qla2x00_restart_isp(vha)) {
  3059. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3060. if (!atomic_read(&vha->loop_down_timer)) {
  3061. /*
  3062. * Issue marker command only when we are going
  3063. * to start the I/O .
  3064. */
  3065. vha->marker_needed = 1;
  3066. }
  3067. vha->flags.online = 1;
  3068. ha->isp_ops->enable_intrs(ha);
  3069. ha->isp_abort_cnt = 0;
  3070. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3071. if (IS_QLA81XX(ha))
  3072. qla2x00_get_fw_version(vha,
  3073. &ha->fw_major_version,
  3074. &ha->fw_minor_version,
  3075. &ha->fw_subminor_version,
  3076. &ha->fw_attributes, &ha->fw_memory_size,
  3077. ha->mpi_version, &ha->mpi_capabilities,
  3078. ha->phy_version);
  3079. if (ha->fce) {
  3080. ha->flags.fce_enabled = 1;
  3081. memset(ha->fce, 0,
  3082. fce_calc_size(ha->fce_bufs));
  3083. rval = qla2x00_enable_fce_trace(vha,
  3084. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3085. &ha->fce_bufs);
  3086. if (rval) {
  3087. qla_printk(KERN_WARNING, ha,
  3088. "Unable to reinitialize FCE "
  3089. "(%d).\n", rval);
  3090. ha->flags.fce_enabled = 0;
  3091. }
  3092. }
  3093. if (ha->eft) {
  3094. memset(ha->eft, 0, EFT_SIZE);
  3095. rval = qla2x00_enable_eft_trace(vha,
  3096. ha->eft_dma, EFT_NUM_BUFFERS);
  3097. if (rval) {
  3098. qla_printk(KERN_WARNING, ha,
  3099. "Unable to reinitialize EFT "
  3100. "(%d).\n", rval);
  3101. }
  3102. }
  3103. } else { /* failed the ISP abort */
  3104. vha->flags.online = 1;
  3105. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3106. if (ha->isp_abort_cnt == 0) {
  3107. qla_printk(KERN_WARNING, ha,
  3108. "ISP error recovery failed - "
  3109. "board disabled\n");
  3110. /*
  3111. * The next call disables the board
  3112. * completely.
  3113. */
  3114. ha->isp_ops->reset_adapter(vha);
  3115. vha->flags.online = 0;
  3116. clear_bit(ISP_ABORT_RETRY,
  3117. &vha->dpc_flags);
  3118. status = 0;
  3119. } else { /* schedule another ISP abort */
  3120. ha->isp_abort_cnt--;
  3121. DEBUG(printk("qla%ld: ISP abort - "
  3122. "retry remaining %d\n",
  3123. vha->host_no, ha->isp_abort_cnt));
  3124. status = 1;
  3125. }
  3126. } else {
  3127. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3128. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3129. "- retrying (%d) more times\n",
  3130. vha->host_no, ha->isp_abort_cnt));
  3131. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3132. status = 1;
  3133. }
  3134. }
  3135. }
  3136. if (!status) {
  3137. DEBUG(printk(KERN_INFO
  3138. "qla2x00_abort_isp(%ld): succeeded.\n",
  3139. vha->host_no));
  3140. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3141. if (vp->vp_idx)
  3142. qla2x00_vp_abort_isp(vp);
  3143. }
  3144. } else {
  3145. qla_printk(KERN_INFO, ha,
  3146. "qla2x00_abort_isp: **** FAILED ****\n");
  3147. }
  3148. return(status);
  3149. }
  3150. /*
  3151. * qla2x00_restart_isp
  3152. * restarts the ISP after a reset
  3153. *
  3154. * Input:
  3155. * ha = adapter block pointer.
  3156. *
  3157. * Returns:
  3158. * 0 = success
  3159. */
  3160. static int
  3161. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3162. {
  3163. int status = 0;
  3164. uint32_t wait_time;
  3165. struct qla_hw_data *ha = vha->hw;
  3166. struct req_que *req = ha->req_q_map[0];
  3167. struct rsp_que *rsp = ha->rsp_q_map[0];
  3168. /* If firmware needs to be loaded */
  3169. if (qla2x00_isp_firmware(vha)) {
  3170. vha->flags.online = 0;
  3171. status = ha->isp_ops->chip_diag(vha);
  3172. if (!status)
  3173. status = qla2x00_setup_chip(vha);
  3174. }
  3175. if (!status && !(status = qla2x00_init_rings(vha))) {
  3176. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3177. ha->flags.chip_reset_done = 1;
  3178. /* Initialize the queues in use */
  3179. qla25xx_init_queues(ha);
  3180. status = qla2x00_fw_ready(vha);
  3181. if (!status) {
  3182. DEBUG(printk("%s(): Start configure loop, "
  3183. "status = %d\n", __func__, status));
  3184. /* Issue a marker after FW becomes ready. */
  3185. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3186. vha->flags.online = 1;
  3187. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3188. wait_time = 256;
  3189. do {
  3190. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3191. qla2x00_configure_loop(vha);
  3192. wait_time--;
  3193. } while (!atomic_read(&vha->loop_down_timer) &&
  3194. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3195. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3196. &vha->dpc_flags)));
  3197. }
  3198. /* if no cable then assume it's good */
  3199. if ((vha->device_flags & DFLG_NO_CABLE))
  3200. status = 0;
  3201. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3202. __func__,
  3203. status));
  3204. }
  3205. return (status);
  3206. }
  3207. static int
  3208. qla25xx_init_queues(struct qla_hw_data *ha)
  3209. {
  3210. struct rsp_que *rsp = NULL;
  3211. struct req_que *req = NULL;
  3212. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3213. int ret = -1;
  3214. int i;
  3215. for (i = 1; i < ha->max_rsp_queues; i++) {
  3216. rsp = ha->rsp_q_map[i];
  3217. if (rsp) {
  3218. rsp->options &= ~BIT_0;
  3219. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3220. if (ret != QLA_SUCCESS)
  3221. DEBUG2_17(printk(KERN_WARNING
  3222. "%s Rsp que:%d init failed\n", __func__,
  3223. rsp->id));
  3224. else
  3225. DEBUG2_17(printk(KERN_INFO
  3226. "%s Rsp que:%d inited\n", __func__,
  3227. rsp->id));
  3228. }
  3229. }
  3230. for (i = 1; i < ha->max_req_queues; i++) {
  3231. req = ha->req_q_map[i];
  3232. if (req) {
  3233. /* Clear outstanding commands array. */
  3234. req->options &= ~BIT_0;
  3235. ret = qla25xx_init_req_que(base_vha, req);
  3236. if (ret != QLA_SUCCESS)
  3237. DEBUG2_17(printk(KERN_WARNING
  3238. "%s Req que:%d init failed\n", __func__,
  3239. req->id));
  3240. else
  3241. DEBUG2_17(printk(KERN_WARNING
  3242. "%s Req que:%d inited\n", __func__,
  3243. req->id));
  3244. }
  3245. }
  3246. return ret;
  3247. }
  3248. /*
  3249. * qla2x00_reset_adapter
  3250. * Reset adapter.
  3251. *
  3252. * Input:
  3253. * ha = adapter block pointer.
  3254. */
  3255. void
  3256. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3257. {
  3258. unsigned long flags = 0;
  3259. struct qla_hw_data *ha = vha->hw;
  3260. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3261. vha->flags.online = 0;
  3262. ha->isp_ops->disable_intrs(ha);
  3263. spin_lock_irqsave(&ha->hardware_lock, flags);
  3264. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3265. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3266. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3267. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3268. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3269. }
  3270. void
  3271. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3272. {
  3273. unsigned long flags = 0;
  3274. struct qla_hw_data *ha = vha->hw;
  3275. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3276. vha->flags.online = 0;
  3277. ha->isp_ops->disable_intrs(ha);
  3278. spin_lock_irqsave(&ha->hardware_lock, flags);
  3279. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3280. RD_REG_DWORD(&reg->hccr);
  3281. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3282. RD_REG_DWORD(&reg->hccr);
  3283. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3284. if (IS_NOPOLLING_TYPE(ha))
  3285. ha->isp_ops->enable_intrs(ha);
  3286. }
  3287. /* On sparc systems, obtain port and node WWN from firmware
  3288. * properties.
  3289. */
  3290. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3291. struct nvram_24xx *nv)
  3292. {
  3293. #ifdef CONFIG_SPARC
  3294. struct qla_hw_data *ha = vha->hw;
  3295. struct pci_dev *pdev = ha->pdev;
  3296. struct device_node *dp = pci_device_to_OF_node(pdev);
  3297. const u8 *val;
  3298. int len;
  3299. val = of_get_property(dp, "port-wwn", &len);
  3300. if (val && len >= WWN_SIZE)
  3301. memcpy(nv->port_name, val, WWN_SIZE);
  3302. val = of_get_property(dp, "node-wwn", &len);
  3303. if (val && len >= WWN_SIZE)
  3304. memcpy(nv->node_name, val, WWN_SIZE);
  3305. #endif
  3306. }
  3307. int
  3308. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3309. {
  3310. int rval;
  3311. struct init_cb_24xx *icb;
  3312. struct nvram_24xx *nv;
  3313. uint32_t *dptr;
  3314. uint8_t *dptr1, *dptr2;
  3315. uint32_t chksum;
  3316. uint16_t cnt;
  3317. struct qla_hw_data *ha = vha->hw;
  3318. rval = QLA_SUCCESS;
  3319. icb = (struct init_cb_24xx *)ha->init_cb;
  3320. nv = ha->nvram;
  3321. /* Determine NVRAM starting address. */
  3322. if (ha->flags.port0) {
  3323. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3324. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3325. } else {
  3326. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3327. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3328. }
  3329. ha->nvram_size = sizeof(struct nvram_24xx);
  3330. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3331. /* Get VPD data into cache */
  3332. ha->vpd = ha->nvram + VPD_OFFSET;
  3333. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3334. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3335. /* Get NVRAM data into cache and calculate checksum. */
  3336. dptr = (uint32_t *)nv;
  3337. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3338. ha->nvram_size);
  3339. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3340. chksum += le32_to_cpu(*dptr++);
  3341. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3342. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3343. /* Bad NVRAM data, set defaults parameters. */
  3344. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3345. || nv->id[3] != ' ' ||
  3346. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3347. /* Reset NVRAM data. */
  3348. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3349. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3350. le16_to_cpu(nv->nvram_version));
  3351. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3352. "invalid -- WWPN) defaults.\n");
  3353. /*
  3354. * Set default initialization control block.
  3355. */
  3356. memset(nv, 0, ha->nvram_size);
  3357. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3358. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3359. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3360. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3361. nv->exchange_count = __constant_cpu_to_le16(0);
  3362. nv->hard_address = __constant_cpu_to_le16(124);
  3363. nv->port_name[0] = 0x21;
  3364. nv->port_name[1] = 0x00 + ha->port_no;
  3365. nv->port_name[2] = 0x00;
  3366. nv->port_name[3] = 0xe0;
  3367. nv->port_name[4] = 0x8b;
  3368. nv->port_name[5] = 0x1c;
  3369. nv->port_name[6] = 0x55;
  3370. nv->port_name[7] = 0x86;
  3371. nv->node_name[0] = 0x20;
  3372. nv->node_name[1] = 0x00;
  3373. nv->node_name[2] = 0x00;
  3374. nv->node_name[3] = 0xe0;
  3375. nv->node_name[4] = 0x8b;
  3376. nv->node_name[5] = 0x1c;
  3377. nv->node_name[6] = 0x55;
  3378. nv->node_name[7] = 0x86;
  3379. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3380. nv->login_retry_count = __constant_cpu_to_le16(8);
  3381. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3382. nv->login_timeout = __constant_cpu_to_le16(0);
  3383. nv->firmware_options_1 =
  3384. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3385. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3386. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3387. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3388. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3389. nv->efi_parameters = __constant_cpu_to_le32(0);
  3390. nv->reset_delay = 5;
  3391. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3392. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3393. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3394. rval = 1;
  3395. }
  3396. /* Reset Initialization control block */
  3397. memset(icb, 0, ha->init_cb_size);
  3398. /* Copy 1st segment. */
  3399. dptr1 = (uint8_t *)icb;
  3400. dptr2 = (uint8_t *)&nv->version;
  3401. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3402. while (cnt--)
  3403. *dptr1++ = *dptr2++;
  3404. icb->login_retry_count = nv->login_retry_count;
  3405. icb->link_down_on_nos = nv->link_down_on_nos;
  3406. /* Copy 2nd segment. */
  3407. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3408. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3409. cnt = (uint8_t *)&icb->reserved_3 -
  3410. (uint8_t *)&icb->interrupt_delay_timer;
  3411. while (cnt--)
  3412. *dptr1++ = *dptr2++;
  3413. /*
  3414. * Setup driver NVRAM options.
  3415. */
  3416. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3417. "QLA2462");
  3418. /* Use alternate WWN? */
  3419. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3420. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3421. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3422. }
  3423. /* Prepare nodename */
  3424. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3425. /*
  3426. * Firmware will apply the following mask if the nodename was
  3427. * not provided.
  3428. */
  3429. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3430. icb->node_name[0] &= 0xF0;
  3431. }
  3432. /* Set host adapter parameters. */
  3433. ha->flags.disable_risc_code_load = 0;
  3434. ha->flags.enable_lip_reset = 0;
  3435. ha->flags.enable_lip_full_login =
  3436. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3437. ha->flags.enable_target_reset =
  3438. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3439. ha->flags.enable_led_scheme = 0;
  3440. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3441. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3442. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3443. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3444. sizeof(ha->fw_seriallink_options24));
  3445. /* save HBA serial number */
  3446. ha->serial0 = icb->port_name[5];
  3447. ha->serial1 = icb->port_name[6];
  3448. ha->serial2 = icb->port_name[7];
  3449. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3450. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3451. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3452. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3453. /* Set minimum login_timeout to 4 seconds. */
  3454. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3455. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3456. if (le16_to_cpu(nv->login_timeout) < 4)
  3457. nv->login_timeout = __constant_cpu_to_le16(4);
  3458. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3459. icb->login_timeout = nv->login_timeout;
  3460. /* Set minimum RATOV to 100 tenths of a second. */
  3461. ha->r_a_tov = 100;
  3462. ha->loop_reset_delay = nv->reset_delay;
  3463. /* Link Down Timeout = 0:
  3464. *
  3465. * When Port Down timer expires we will start returning
  3466. * I/O's to OS with "DID_NO_CONNECT".
  3467. *
  3468. * Link Down Timeout != 0:
  3469. *
  3470. * The driver waits for the link to come up after link down
  3471. * before returning I/Os to OS with "DID_NO_CONNECT".
  3472. */
  3473. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3474. ha->loop_down_abort_time =
  3475. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3476. } else {
  3477. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3478. ha->loop_down_abort_time =
  3479. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3480. }
  3481. /* Need enough time to try and get the port back. */
  3482. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3483. if (qlport_down_retry)
  3484. ha->port_down_retry_count = qlport_down_retry;
  3485. /* Set login_retry_count */
  3486. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3487. if (ha->port_down_retry_count ==
  3488. le16_to_cpu(nv->port_down_retry_count) &&
  3489. ha->port_down_retry_count > 3)
  3490. ha->login_retry_count = ha->port_down_retry_count;
  3491. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3492. ha->login_retry_count = ha->port_down_retry_count;
  3493. if (ql2xloginretrycount)
  3494. ha->login_retry_count = ql2xloginretrycount;
  3495. /* Enable ZIO. */
  3496. if (!vha->flags.init_done) {
  3497. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3498. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3499. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3500. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3501. }
  3502. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3503. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3504. vha->flags.process_response_queue = 0;
  3505. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3506. ha->zio_mode = QLA_ZIO_MODE_6;
  3507. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3508. "(%d us).\n", vha->host_no, ha->zio_mode,
  3509. ha->zio_timer * 100));
  3510. qla_printk(KERN_INFO, ha,
  3511. "ZIO mode %d enabled; timer delay (%d us).\n",
  3512. ha->zio_mode, ha->zio_timer * 100);
  3513. icb->firmware_options_2 |= cpu_to_le32(
  3514. (uint32_t)ha->zio_mode);
  3515. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3516. vha->flags.process_response_queue = 1;
  3517. }
  3518. if (rval) {
  3519. DEBUG2_3(printk(KERN_WARNING
  3520. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3521. }
  3522. return (rval);
  3523. }
  3524. static int
  3525. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3526. uint32_t faddr)
  3527. {
  3528. int rval = QLA_SUCCESS;
  3529. int segments, fragment;
  3530. uint32_t *dcode, dlen;
  3531. uint32_t risc_addr;
  3532. uint32_t risc_size;
  3533. uint32_t i;
  3534. struct qla_hw_data *ha = vha->hw;
  3535. struct req_que *req = ha->req_q_map[0];
  3536. qla_printk(KERN_INFO, ha,
  3537. "FW: Loading from flash (%x)...\n", faddr);
  3538. rval = QLA_SUCCESS;
  3539. segments = FA_RISC_CODE_SEGMENTS;
  3540. dcode = (uint32_t *)req->ring;
  3541. *srisc_addr = 0;
  3542. /* Validate firmware image by checking version. */
  3543. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3544. for (i = 0; i < 4; i++)
  3545. dcode[i] = be32_to_cpu(dcode[i]);
  3546. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3547. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3548. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3549. dcode[3] == 0)) {
  3550. qla_printk(KERN_WARNING, ha,
  3551. "Unable to verify integrity of flash firmware image!\n");
  3552. qla_printk(KERN_WARNING, ha,
  3553. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3554. dcode[1], dcode[2], dcode[3]);
  3555. return QLA_FUNCTION_FAILED;
  3556. }
  3557. while (segments && rval == QLA_SUCCESS) {
  3558. /* Read segment's load information. */
  3559. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3560. risc_addr = be32_to_cpu(dcode[2]);
  3561. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3562. risc_size = be32_to_cpu(dcode[3]);
  3563. fragment = 0;
  3564. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3565. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3566. if (dlen > risc_size)
  3567. dlen = risc_size;
  3568. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3569. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3570. vha->host_no, risc_addr, dlen, faddr));
  3571. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3572. for (i = 0; i < dlen; i++)
  3573. dcode[i] = swab32(dcode[i]);
  3574. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3575. dlen);
  3576. if (rval) {
  3577. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3578. "segment %d of firmware\n", vha->host_no,
  3579. fragment));
  3580. qla_printk(KERN_WARNING, ha,
  3581. "[ERROR] Failed to load segment %d of "
  3582. "firmware\n", fragment);
  3583. break;
  3584. }
  3585. faddr += dlen;
  3586. risc_addr += dlen;
  3587. risc_size -= dlen;
  3588. fragment++;
  3589. }
  3590. /* Next segment. */
  3591. segments--;
  3592. }
  3593. return rval;
  3594. }
  3595. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3596. int
  3597. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3598. {
  3599. int rval;
  3600. int i, fragment;
  3601. uint16_t *wcode, *fwcode;
  3602. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3603. struct fw_blob *blob;
  3604. struct qla_hw_data *ha = vha->hw;
  3605. struct req_que *req = ha->req_q_map[0];
  3606. /* Load firmware blob. */
  3607. blob = qla2x00_request_firmware(vha);
  3608. if (!blob) {
  3609. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3610. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3611. "from: " QLA_FW_URL ".\n");
  3612. return QLA_FUNCTION_FAILED;
  3613. }
  3614. rval = QLA_SUCCESS;
  3615. wcode = (uint16_t *)req->ring;
  3616. *srisc_addr = 0;
  3617. fwcode = (uint16_t *)blob->fw->data;
  3618. fwclen = 0;
  3619. /* Validate firmware image by checking version. */
  3620. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3621. qla_printk(KERN_WARNING, ha,
  3622. "Unable to verify integrity of firmware image (%Zd)!\n",
  3623. blob->fw->size);
  3624. goto fail_fw_integrity;
  3625. }
  3626. for (i = 0; i < 4; i++)
  3627. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3628. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3629. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3630. wcode[2] == 0 && wcode[3] == 0)) {
  3631. qla_printk(KERN_WARNING, ha,
  3632. "Unable to verify integrity of firmware image!\n");
  3633. qla_printk(KERN_WARNING, ha,
  3634. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3635. wcode[1], wcode[2], wcode[3]);
  3636. goto fail_fw_integrity;
  3637. }
  3638. seg = blob->segs;
  3639. while (*seg && rval == QLA_SUCCESS) {
  3640. risc_addr = *seg;
  3641. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3642. risc_size = be16_to_cpu(fwcode[3]);
  3643. /* Validate firmware image size. */
  3644. fwclen += risc_size * sizeof(uint16_t);
  3645. if (blob->fw->size < fwclen) {
  3646. qla_printk(KERN_WARNING, ha,
  3647. "Unable to verify integrity of firmware image "
  3648. "(%Zd)!\n", blob->fw->size);
  3649. goto fail_fw_integrity;
  3650. }
  3651. fragment = 0;
  3652. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3653. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3654. if (wlen > risc_size)
  3655. wlen = risc_size;
  3656. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3657. "addr %x, number of words 0x%x.\n", vha->host_no,
  3658. risc_addr, wlen));
  3659. for (i = 0; i < wlen; i++)
  3660. wcode[i] = swab16(fwcode[i]);
  3661. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3662. wlen);
  3663. if (rval) {
  3664. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3665. "segment %d of firmware\n", vha->host_no,
  3666. fragment));
  3667. qla_printk(KERN_WARNING, ha,
  3668. "[ERROR] Failed to load segment %d of "
  3669. "firmware\n", fragment);
  3670. break;
  3671. }
  3672. fwcode += wlen;
  3673. risc_addr += wlen;
  3674. risc_size -= wlen;
  3675. fragment++;
  3676. }
  3677. /* Next segment. */
  3678. seg++;
  3679. }
  3680. return rval;
  3681. fail_fw_integrity:
  3682. return QLA_FUNCTION_FAILED;
  3683. }
  3684. static int
  3685. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3686. {
  3687. int rval;
  3688. int segments, fragment;
  3689. uint32_t *dcode, dlen;
  3690. uint32_t risc_addr;
  3691. uint32_t risc_size;
  3692. uint32_t i;
  3693. struct fw_blob *blob;
  3694. uint32_t *fwcode, fwclen;
  3695. struct qla_hw_data *ha = vha->hw;
  3696. struct req_que *req = ha->req_q_map[0];
  3697. /* Load firmware blob. */
  3698. blob = qla2x00_request_firmware(vha);
  3699. if (!blob) {
  3700. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3701. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3702. "from: " QLA_FW_URL ".\n");
  3703. return QLA_FUNCTION_FAILED;
  3704. }
  3705. qla_printk(KERN_INFO, ha,
  3706. "FW: Loading via request-firmware...\n");
  3707. rval = QLA_SUCCESS;
  3708. segments = FA_RISC_CODE_SEGMENTS;
  3709. dcode = (uint32_t *)req->ring;
  3710. *srisc_addr = 0;
  3711. fwcode = (uint32_t *)blob->fw->data;
  3712. fwclen = 0;
  3713. /* Validate firmware image by checking version. */
  3714. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3715. qla_printk(KERN_WARNING, ha,
  3716. "Unable to verify integrity of firmware image (%Zd)!\n",
  3717. blob->fw->size);
  3718. goto fail_fw_integrity;
  3719. }
  3720. for (i = 0; i < 4; i++)
  3721. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3722. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3723. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3724. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3725. dcode[3] == 0)) {
  3726. qla_printk(KERN_WARNING, ha,
  3727. "Unable to verify integrity of firmware image!\n");
  3728. qla_printk(KERN_WARNING, ha,
  3729. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3730. dcode[1], dcode[2], dcode[3]);
  3731. goto fail_fw_integrity;
  3732. }
  3733. while (segments && rval == QLA_SUCCESS) {
  3734. risc_addr = be32_to_cpu(fwcode[2]);
  3735. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3736. risc_size = be32_to_cpu(fwcode[3]);
  3737. /* Validate firmware image size. */
  3738. fwclen += risc_size * sizeof(uint32_t);
  3739. if (blob->fw->size < fwclen) {
  3740. qla_printk(KERN_WARNING, ha,
  3741. "Unable to verify integrity of firmware image "
  3742. "(%Zd)!\n", blob->fw->size);
  3743. goto fail_fw_integrity;
  3744. }
  3745. fragment = 0;
  3746. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3747. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3748. if (dlen > risc_size)
  3749. dlen = risc_size;
  3750. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3751. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3752. risc_addr, dlen));
  3753. for (i = 0; i < dlen; i++)
  3754. dcode[i] = swab32(fwcode[i]);
  3755. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3756. dlen);
  3757. if (rval) {
  3758. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3759. "segment %d of firmware\n", vha->host_no,
  3760. fragment));
  3761. qla_printk(KERN_WARNING, ha,
  3762. "[ERROR] Failed to load segment %d of "
  3763. "firmware\n", fragment);
  3764. break;
  3765. }
  3766. fwcode += dlen;
  3767. risc_addr += dlen;
  3768. risc_size -= dlen;
  3769. fragment++;
  3770. }
  3771. /* Next segment. */
  3772. segments--;
  3773. }
  3774. return rval;
  3775. fail_fw_integrity:
  3776. return QLA_FUNCTION_FAILED;
  3777. }
  3778. int
  3779. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3780. {
  3781. int rval;
  3782. if (ql2xfwloadbin == 1)
  3783. return qla81xx_load_risc(vha, srisc_addr);
  3784. /*
  3785. * FW Load priority:
  3786. * 1) Firmware via request-firmware interface (.bin file).
  3787. * 2) Firmware residing in flash.
  3788. */
  3789. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3790. if (rval == QLA_SUCCESS)
  3791. return rval;
  3792. return qla24xx_load_risc_flash(vha, srisc_addr,
  3793. vha->hw->flt_region_fw);
  3794. }
  3795. int
  3796. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3797. {
  3798. int rval;
  3799. struct qla_hw_data *ha = vha->hw;
  3800. if (ql2xfwloadbin == 2)
  3801. goto try_blob_fw;
  3802. /*
  3803. * FW Load priority:
  3804. * 1) Firmware residing in flash.
  3805. * 2) Firmware via request-firmware interface (.bin file).
  3806. * 3) Golden-Firmware residing in flash -- limited operation.
  3807. */
  3808. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3809. if (rval == QLA_SUCCESS)
  3810. return rval;
  3811. try_blob_fw:
  3812. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3813. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3814. return rval;
  3815. qla_printk(KERN_ERR, ha,
  3816. "FW: Attempting to fallback to golden firmware...\n");
  3817. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3818. if (rval != QLA_SUCCESS)
  3819. return rval;
  3820. qla_printk(KERN_ERR, ha,
  3821. "FW: Please update operational firmware...\n");
  3822. ha->flags.running_gold_fw = 1;
  3823. return rval;
  3824. }
  3825. void
  3826. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3827. {
  3828. int ret, retries;
  3829. struct qla_hw_data *ha = vha->hw;
  3830. if (!IS_FWI2_CAPABLE(ha))
  3831. return;
  3832. if (!ha->fw_major_version)
  3833. return;
  3834. ret = qla2x00_stop_firmware(vha);
  3835. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3836. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3837. ha->isp_ops->reset_chip(vha);
  3838. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3839. continue;
  3840. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3841. continue;
  3842. qla_printk(KERN_INFO, ha,
  3843. "Attempting retry of stop-firmware command...\n");
  3844. ret = qla2x00_stop_firmware(vha);
  3845. }
  3846. }
  3847. int
  3848. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3849. {
  3850. int rval = QLA_SUCCESS;
  3851. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3852. struct qla_hw_data *ha = vha->hw;
  3853. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3854. struct req_que *req;
  3855. struct rsp_que *rsp;
  3856. if (!vha->vp_idx)
  3857. return -EINVAL;
  3858. rval = qla2x00_fw_ready(base_vha);
  3859. if (ha->flags.cpu_affinity_enabled)
  3860. req = ha->req_q_map[0];
  3861. else
  3862. req = vha->req;
  3863. rsp = req->rsp;
  3864. if (rval == QLA_SUCCESS) {
  3865. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3866. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3867. }
  3868. vha->flags.management_server_logged_in = 0;
  3869. /* Login to SNS first */
  3870. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3871. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3872. DEBUG15(qla_printk(KERN_INFO, ha,
  3873. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3874. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3875. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3876. return (QLA_FUNCTION_FAILED);
  3877. }
  3878. atomic_set(&vha->loop_down_timer, 0);
  3879. atomic_set(&vha->loop_state, LOOP_UP);
  3880. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3881. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3882. rval = qla2x00_loop_resync(base_vha);
  3883. return rval;
  3884. }
  3885. /* 84XX Support **************************************************************/
  3886. static LIST_HEAD(qla_cs84xx_list);
  3887. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3888. static struct qla_chip_state_84xx *
  3889. qla84xx_get_chip(struct scsi_qla_host *vha)
  3890. {
  3891. struct qla_chip_state_84xx *cs84xx;
  3892. struct qla_hw_data *ha = vha->hw;
  3893. mutex_lock(&qla_cs84xx_mutex);
  3894. /* Find any shared 84xx chip. */
  3895. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3896. if (cs84xx->bus == ha->pdev->bus) {
  3897. kref_get(&cs84xx->kref);
  3898. goto done;
  3899. }
  3900. }
  3901. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3902. if (!cs84xx)
  3903. goto done;
  3904. kref_init(&cs84xx->kref);
  3905. spin_lock_init(&cs84xx->access_lock);
  3906. mutex_init(&cs84xx->fw_update_mutex);
  3907. cs84xx->bus = ha->pdev->bus;
  3908. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3909. done:
  3910. mutex_unlock(&qla_cs84xx_mutex);
  3911. return cs84xx;
  3912. }
  3913. static void
  3914. __qla84xx_chip_release(struct kref *kref)
  3915. {
  3916. struct qla_chip_state_84xx *cs84xx =
  3917. container_of(kref, struct qla_chip_state_84xx, kref);
  3918. mutex_lock(&qla_cs84xx_mutex);
  3919. list_del(&cs84xx->list);
  3920. mutex_unlock(&qla_cs84xx_mutex);
  3921. kfree(cs84xx);
  3922. }
  3923. void
  3924. qla84xx_put_chip(struct scsi_qla_host *vha)
  3925. {
  3926. struct qla_hw_data *ha = vha->hw;
  3927. if (ha->cs84xx)
  3928. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3929. }
  3930. static int
  3931. qla84xx_init_chip(scsi_qla_host_t *vha)
  3932. {
  3933. int rval;
  3934. uint16_t status[2];
  3935. struct qla_hw_data *ha = vha->hw;
  3936. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3937. rval = qla84xx_verify_chip(vha, status);
  3938. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3939. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3940. QLA_SUCCESS;
  3941. }
  3942. /* 81XX Support **************************************************************/
  3943. int
  3944. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3945. {
  3946. int rval;
  3947. struct init_cb_81xx *icb;
  3948. struct nvram_81xx *nv;
  3949. uint32_t *dptr;
  3950. uint8_t *dptr1, *dptr2;
  3951. uint32_t chksum;
  3952. uint16_t cnt;
  3953. struct qla_hw_data *ha = vha->hw;
  3954. rval = QLA_SUCCESS;
  3955. icb = (struct init_cb_81xx *)ha->init_cb;
  3956. nv = ha->nvram;
  3957. /* Determine NVRAM starting address. */
  3958. ha->nvram_size = sizeof(struct nvram_81xx);
  3959. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3960. /* Get VPD data into cache */
  3961. ha->vpd = ha->nvram + VPD_OFFSET;
  3962. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3963. ha->vpd_size);
  3964. /* Get NVRAM data into cache and calculate checksum. */
  3965. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3966. ha->nvram_size);
  3967. dptr = (uint32_t *)nv;
  3968. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3969. chksum += le32_to_cpu(*dptr++);
  3970. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3971. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3972. /* Bad NVRAM data, set defaults parameters. */
  3973. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3974. || nv->id[3] != ' ' ||
  3975. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3976. /* Reset NVRAM data. */
  3977. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3978. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3979. le16_to_cpu(nv->nvram_version));
  3980. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3981. "invalid -- WWPN) defaults.\n");
  3982. /*
  3983. * Set default initialization control block.
  3984. */
  3985. memset(nv, 0, ha->nvram_size);
  3986. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3987. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3988. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3989. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3990. nv->exchange_count = __constant_cpu_to_le16(0);
  3991. nv->port_name[0] = 0x21;
  3992. nv->port_name[1] = 0x00 + ha->port_no;
  3993. nv->port_name[2] = 0x00;
  3994. nv->port_name[3] = 0xe0;
  3995. nv->port_name[4] = 0x8b;
  3996. nv->port_name[5] = 0x1c;
  3997. nv->port_name[6] = 0x55;
  3998. nv->port_name[7] = 0x86;
  3999. nv->node_name[0] = 0x20;
  4000. nv->node_name[1] = 0x00;
  4001. nv->node_name[2] = 0x00;
  4002. nv->node_name[3] = 0xe0;
  4003. nv->node_name[4] = 0x8b;
  4004. nv->node_name[5] = 0x1c;
  4005. nv->node_name[6] = 0x55;
  4006. nv->node_name[7] = 0x86;
  4007. nv->login_retry_count = __constant_cpu_to_le16(8);
  4008. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4009. nv->login_timeout = __constant_cpu_to_le16(0);
  4010. nv->firmware_options_1 =
  4011. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4012. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4013. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4014. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4015. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4016. nv->efi_parameters = __constant_cpu_to_le32(0);
  4017. nv->reset_delay = 5;
  4018. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4019. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4020. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4021. nv->enode_mac[0] = 0x00;
  4022. nv->enode_mac[1] = 0x02;
  4023. nv->enode_mac[2] = 0x03;
  4024. nv->enode_mac[3] = 0x04;
  4025. nv->enode_mac[4] = 0x05;
  4026. nv->enode_mac[5] = 0x06 + ha->port_no;
  4027. rval = 1;
  4028. }
  4029. /* Reset Initialization control block */
  4030. memset(icb, 0, sizeof(struct init_cb_81xx));
  4031. /* Copy 1st segment. */
  4032. dptr1 = (uint8_t *)icb;
  4033. dptr2 = (uint8_t *)&nv->version;
  4034. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4035. while (cnt--)
  4036. *dptr1++ = *dptr2++;
  4037. icb->login_retry_count = nv->login_retry_count;
  4038. /* Copy 2nd segment. */
  4039. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4040. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4041. cnt = (uint8_t *)&icb->reserved_5 -
  4042. (uint8_t *)&icb->interrupt_delay_timer;
  4043. while (cnt--)
  4044. *dptr1++ = *dptr2++;
  4045. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4046. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4047. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4048. icb->enode_mac[0] = 0x01;
  4049. icb->enode_mac[1] = 0x02;
  4050. icb->enode_mac[2] = 0x03;
  4051. icb->enode_mac[3] = 0x04;
  4052. icb->enode_mac[4] = 0x05;
  4053. icb->enode_mac[5] = 0x06 + ha->port_no;
  4054. }
  4055. /* Use extended-initialization control block. */
  4056. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4057. /*
  4058. * Setup driver NVRAM options.
  4059. */
  4060. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4061. "QLE81XX");
  4062. /* Use alternate WWN? */
  4063. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4064. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4065. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4066. }
  4067. /* Prepare nodename */
  4068. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4069. /*
  4070. * Firmware will apply the following mask if the nodename was
  4071. * not provided.
  4072. */
  4073. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4074. icb->node_name[0] &= 0xF0;
  4075. }
  4076. /* Set host adapter parameters. */
  4077. ha->flags.disable_risc_code_load = 0;
  4078. ha->flags.enable_lip_reset = 0;
  4079. ha->flags.enable_lip_full_login =
  4080. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4081. ha->flags.enable_target_reset =
  4082. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4083. ha->flags.enable_led_scheme = 0;
  4084. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4085. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4086. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4087. /* save HBA serial number */
  4088. ha->serial0 = icb->port_name[5];
  4089. ha->serial1 = icb->port_name[6];
  4090. ha->serial2 = icb->port_name[7];
  4091. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4092. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4093. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4094. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4095. /* Set minimum login_timeout to 4 seconds. */
  4096. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4097. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4098. if (le16_to_cpu(nv->login_timeout) < 4)
  4099. nv->login_timeout = __constant_cpu_to_le16(4);
  4100. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4101. icb->login_timeout = nv->login_timeout;
  4102. /* Set minimum RATOV to 100 tenths of a second. */
  4103. ha->r_a_tov = 100;
  4104. ha->loop_reset_delay = nv->reset_delay;
  4105. /* Link Down Timeout = 0:
  4106. *
  4107. * When Port Down timer expires we will start returning
  4108. * I/O's to OS with "DID_NO_CONNECT".
  4109. *
  4110. * Link Down Timeout != 0:
  4111. *
  4112. * The driver waits for the link to come up after link down
  4113. * before returning I/Os to OS with "DID_NO_CONNECT".
  4114. */
  4115. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4116. ha->loop_down_abort_time =
  4117. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4118. } else {
  4119. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4120. ha->loop_down_abort_time =
  4121. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4122. }
  4123. /* Need enough time to try and get the port back. */
  4124. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4125. if (qlport_down_retry)
  4126. ha->port_down_retry_count = qlport_down_retry;
  4127. /* Set login_retry_count */
  4128. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4129. if (ha->port_down_retry_count ==
  4130. le16_to_cpu(nv->port_down_retry_count) &&
  4131. ha->port_down_retry_count > 3)
  4132. ha->login_retry_count = ha->port_down_retry_count;
  4133. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4134. ha->login_retry_count = ha->port_down_retry_count;
  4135. if (ql2xloginretrycount)
  4136. ha->login_retry_count = ql2xloginretrycount;
  4137. /* Enable ZIO. */
  4138. if (!vha->flags.init_done) {
  4139. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4140. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4141. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4142. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4143. }
  4144. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4145. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4146. vha->flags.process_response_queue = 0;
  4147. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4148. ha->zio_mode = QLA_ZIO_MODE_6;
  4149. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4150. "(%d us).\n", vha->host_no, ha->zio_mode,
  4151. ha->zio_timer * 100));
  4152. qla_printk(KERN_INFO, ha,
  4153. "ZIO mode %d enabled; timer delay (%d us).\n",
  4154. ha->zio_mode, ha->zio_timer * 100);
  4155. icb->firmware_options_2 |= cpu_to_le32(
  4156. (uint32_t)ha->zio_mode);
  4157. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4158. vha->flags.process_response_queue = 1;
  4159. }
  4160. if (rval) {
  4161. DEBUG2_3(printk(KERN_WARNING
  4162. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4163. }
  4164. return (rval);
  4165. }
  4166. void
  4167. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  4168. {
  4169. }