rtc-sh.c 21 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006 - 2009 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <linux/log2.h>
  28. #include <linux/clk.h>
  29. #include <asm/rtc.h>
  30. #define DRV_NAME "sh-rtc"
  31. #define DRV_VERSION "0.2.3"
  32. #define RTC_REG(r) ((r) * rtc_reg_size)
  33. #define R64CNT RTC_REG(0)
  34. #define RSECCNT RTC_REG(1) /* RTC sec */
  35. #define RMINCNT RTC_REG(2) /* RTC min */
  36. #define RHRCNT RTC_REG(3) /* RTC hour */
  37. #define RWKCNT RTC_REG(4) /* RTC week */
  38. #define RDAYCNT RTC_REG(5) /* RTC day */
  39. #define RMONCNT RTC_REG(6) /* RTC month */
  40. #define RYRCNT RTC_REG(7) /* RTC year */
  41. #define RSECAR RTC_REG(8) /* ALARM sec */
  42. #define RMINAR RTC_REG(9) /* ALARM min */
  43. #define RHRAR RTC_REG(10) /* ALARM hour */
  44. #define RWKAR RTC_REG(11) /* ALARM week */
  45. #define RDAYAR RTC_REG(12) /* ALARM day */
  46. #define RMONAR RTC_REG(13) /* ALARM month */
  47. #define RCR1 RTC_REG(14) /* Control */
  48. #define RCR2 RTC_REG(15) /* Control */
  49. /*
  50. * Note on RYRAR and RCR3: Up until this point most of the register
  51. * definitions are consistent across all of the available parts. However,
  52. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  53. * register used to control RYRCNT/RYRAR compare) varies considerably
  54. * across various parts, occasionally being mapped in to a completely
  55. * unrelated address space. For proper RYRAR support a separate resource
  56. * would have to be handed off, but as this is purely optional in
  57. * practice, we simply opt not to support it, thereby keeping the code
  58. * quite a bit more simplified.
  59. */
  60. /* ALARM Bits - or with BCD encoded value */
  61. #define AR_ENB 0x80 /* Enable for alarm cmp */
  62. /* Period Bits */
  63. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  64. #define PF_COUNT 0x200 /* Half periodic counter */
  65. #define PF_OXS 0x400 /* Periodic One x Second */
  66. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  67. #define PF_MASK 0xf00
  68. /* RCR1 Bits */
  69. #define RCR1_CF 0x80 /* Carry Flag */
  70. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  71. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  72. #define RCR1_AF 0x01 /* Alarm Flag */
  73. /* RCR2 Bits */
  74. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  75. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  76. #define RCR2_RTCEN 0x08 /* ENable RTC */
  77. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  78. #define RCR2_RESET 0x02 /* Reset bit */
  79. #define RCR2_START 0x01 /* Start bit */
  80. struct sh_rtc {
  81. void __iomem *regbase;
  82. unsigned long regsize;
  83. struct resource *res;
  84. int alarm_irq;
  85. int periodic_irq;
  86. int carry_irq;
  87. struct clk *clk;
  88. struct rtc_device *rtc_dev;
  89. spinlock_t lock;
  90. unsigned long capabilities; /* See asm/rtc.h for cap bits */
  91. unsigned short periodic_freq;
  92. };
  93. static int __sh_rtc_interrupt(struct sh_rtc *rtc)
  94. {
  95. unsigned int tmp, pending;
  96. tmp = readb(rtc->regbase + RCR1);
  97. pending = tmp & RCR1_CF;
  98. tmp &= ~RCR1_CF;
  99. writeb(tmp, rtc->regbase + RCR1);
  100. /* Users have requested One x Second IRQ */
  101. if (pending && rtc->periodic_freq & PF_OXS)
  102. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  103. return pending;
  104. }
  105. static int __sh_rtc_alarm(struct sh_rtc *rtc)
  106. {
  107. unsigned int tmp, pending;
  108. tmp = readb(rtc->regbase + RCR1);
  109. pending = tmp & RCR1_AF;
  110. tmp &= ~(RCR1_AF | RCR1_AIE);
  111. writeb(tmp, rtc->regbase + RCR1);
  112. if (pending)
  113. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  114. return pending;
  115. }
  116. static int __sh_rtc_periodic(struct sh_rtc *rtc)
  117. {
  118. struct rtc_device *rtc_dev = rtc->rtc_dev;
  119. struct rtc_task *irq_task;
  120. unsigned int tmp, pending;
  121. tmp = readb(rtc->regbase + RCR2);
  122. pending = tmp & RCR2_PEF;
  123. tmp &= ~RCR2_PEF;
  124. writeb(tmp, rtc->regbase + RCR2);
  125. if (!pending)
  126. return 0;
  127. /* Half period enabled than one skipped and the next notified */
  128. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  129. rtc->periodic_freq &= ~PF_COUNT;
  130. else {
  131. if (rtc->periodic_freq & PF_HP)
  132. rtc->periodic_freq |= PF_COUNT;
  133. if (rtc->periodic_freq & PF_KOU) {
  134. spin_lock(&rtc_dev->irq_task_lock);
  135. irq_task = rtc_dev->irq_task;
  136. if (irq_task)
  137. irq_task->func(irq_task->private_data);
  138. spin_unlock(&rtc_dev->irq_task_lock);
  139. } else
  140. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  141. }
  142. return pending;
  143. }
  144. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  145. {
  146. struct sh_rtc *rtc = dev_id;
  147. int ret;
  148. spin_lock(&rtc->lock);
  149. ret = __sh_rtc_interrupt(rtc);
  150. spin_unlock(&rtc->lock);
  151. return IRQ_RETVAL(ret);
  152. }
  153. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  154. {
  155. struct sh_rtc *rtc = dev_id;
  156. int ret;
  157. spin_lock(&rtc->lock);
  158. ret = __sh_rtc_alarm(rtc);
  159. spin_unlock(&rtc->lock);
  160. return IRQ_RETVAL(ret);
  161. }
  162. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  163. {
  164. struct sh_rtc *rtc = dev_id;
  165. int ret;
  166. spin_lock(&rtc->lock);
  167. ret = __sh_rtc_periodic(rtc);
  168. spin_unlock(&rtc->lock);
  169. return IRQ_RETVAL(ret);
  170. }
  171. static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
  172. {
  173. struct sh_rtc *rtc = dev_id;
  174. int ret;
  175. spin_lock(&rtc->lock);
  176. ret = __sh_rtc_interrupt(rtc);
  177. ret |= __sh_rtc_alarm(rtc);
  178. ret |= __sh_rtc_periodic(rtc);
  179. spin_unlock(&rtc->lock);
  180. return IRQ_RETVAL(ret);
  181. }
  182. static int sh_rtc_irq_set_state(struct device *dev, int enable)
  183. {
  184. struct sh_rtc *rtc = dev_get_drvdata(dev);
  185. unsigned int tmp;
  186. spin_lock_irq(&rtc->lock);
  187. tmp = readb(rtc->regbase + RCR2);
  188. if (enable) {
  189. rtc->periodic_freq |= PF_KOU;
  190. tmp &= ~RCR2_PEF; /* Clear PES bit */
  191. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  192. } else {
  193. rtc->periodic_freq &= ~PF_KOU;
  194. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  195. }
  196. writeb(tmp, rtc->regbase + RCR2);
  197. spin_unlock_irq(&rtc->lock);
  198. return 0;
  199. }
  200. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  201. {
  202. struct sh_rtc *rtc = dev_get_drvdata(dev);
  203. int tmp, ret = 0;
  204. spin_lock_irq(&rtc->lock);
  205. tmp = rtc->periodic_freq & PF_MASK;
  206. switch (freq) {
  207. case 0:
  208. rtc->periodic_freq = 0x00;
  209. break;
  210. case 1:
  211. rtc->periodic_freq = 0x60;
  212. break;
  213. case 2:
  214. rtc->periodic_freq = 0x50;
  215. break;
  216. case 4:
  217. rtc->periodic_freq = 0x40;
  218. break;
  219. case 8:
  220. rtc->periodic_freq = 0x30 | PF_HP;
  221. break;
  222. case 16:
  223. rtc->periodic_freq = 0x30;
  224. break;
  225. case 32:
  226. rtc->periodic_freq = 0x20 | PF_HP;
  227. break;
  228. case 64:
  229. rtc->periodic_freq = 0x20;
  230. break;
  231. case 128:
  232. rtc->periodic_freq = 0x10 | PF_HP;
  233. break;
  234. case 256:
  235. rtc->periodic_freq = 0x10;
  236. break;
  237. default:
  238. ret = -ENOTSUPP;
  239. }
  240. if (ret == 0)
  241. rtc->periodic_freq |= tmp;
  242. spin_unlock_irq(&rtc->lock);
  243. return ret;
  244. }
  245. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  246. {
  247. struct sh_rtc *rtc = dev_get_drvdata(dev);
  248. unsigned int tmp;
  249. spin_lock_irq(&rtc->lock);
  250. tmp = readb(rtc->regbase + RCR1);
  251. if (enable)
  252. tmp |= RCR1_AIE;
  253. else
  254. tmp &= ~RCR1_AIE;
  255. writeb(tmp, rtc->regbase + RCR1);
  256. spin_unlock_irq(&rtc->lock);
  257. }
  258. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  259. {
  260. struct sh_rtc *rtc = dev_get_drvdata(dev);
  261. unsigned int tmp;
  262. tmp = readb(rtc->regbase + RCR1);
  263. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  264. tmp = readb(rtc->regbase + RCR2);
  265. seq_printf(seq, "periodic_IRQ\t: %s\n",
  266. (tmp & RCR2_PESMASK) ? "yes" : "no");
  267. return 0;
  268. }
  269. static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
  270. {
  271. struct sh_rtc *rtc = dev_get_drvdata(dev);
  272. unsigned int tmp;
  273. spin_lock_irq(&rtc->lock);
  274. tmp = readb(rtc->regbase + RCR1);
  275. if (!enable)
  276. tmp &= ~RCR1_CIE;
  277. else
  278. tmp |= RCR1_CIE;
  279. writeb(tmp, rtc->regbase + RCR1);
  280. spin_unlock_irq(&rtc->lock);
  281. }
  282. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  283. {
  284. struct sh_rtc *rtc = dev_get_drvdata(dev);
  285. unsigned int ret = 0;
  286. switch (cmd) {
  287. case RTC_AIE_OFF:
  288. case RTC_AIE_ON:
  289. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  290. break;
  291. case RTC_UIE_OFF:
  292. rtc->periodic_freq &= ~PF_OXS;
  293. sh_rtc_setcie(dev, 0);
  294. break;
  295. case RTC_UIE_ON:
  296. rtc->periodic_freq |= PF_OXS;
  297. sh_rtc_setcie(dev, 1);
  298. break;
  299. default:
  300. ret = -ENOIOCTLCMD;
  301. }
  302. return ret;
  303. }
  304. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  305. {
  306. struct platform_device *pdev = to_platform_device(dev);
  307. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  308. unsigned int sec128, sec2, yr, yr100, cf_bit;
  309. do {
  310. unsigned int tmp;
  311. spin_lock_irq(&rtc->lock);
  312. tmp = readb(rtc->regbase + RCR1);
  313. tmp &= ~RCR1_CF; /* Clear CF-bit */
  314. tmp |= RCR1_CIE;
  315. writeb(tmp, rtc->regbase + RCR1);
  316. sec128 = readb(rtc->regbase + R64CNT);
  317. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  318. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  319. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  320. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  321. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  322. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  323. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  324. yr = readw(rtc->regbase + RYRCNT);
  325. yr100 = bcd2bin(yr >> 8);
  326. yr &= 0xff;
  327. } else {
  328. yr = readb(rtc->regbase + RYRCNT);
  329. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  330. }
  331. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  332. sec2 = readb(rtc->regbase + R64CNT);
  333. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  334. spin_unlock_irq(&rtc->lock);
  335. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  336. #if RTC_BIT_INVERTED != 0
  337. if ((sec128 & RTC_BIT_INVERTED))
  338. tm->tm_sec--;
  339. #endif
  340. /* only keep the carry interrupt enabled if UIE is on */
  341. if (!(rtc->periodic_freq & PF_OXS))
  342. sh_rtc_setcie(dev, 0);
  343. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  344. "mday=%d, mon=%d, year=%d, wday=%d\n",
  345. __func__,
  346. tm->tm_sec, tm->tm_min, tm->tm_hour,
  347. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  348. return rtc_valid_tm(tm);
  349. }
  350. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  351. {
  352. struct platform_device *pdev = to_platform_device(dev);
  353. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  354. unsigned int tmp;
  355. int year;
  356. spin_lock_irq(&rtc->lock);
  357. /* Reset pre-scaler & stop RTC */
  358. tmp = readb(rtc->regbase + RCR2);
  359. tmp |= RCR2_RESET;
  360. tmp &= ~RCR2_START;
  361. writeb(tmp, rtc->regbase + RCR2);
  362. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  363. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  364. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  365. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  366. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  367. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  368. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  369. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  370. bin2bcd(tm->tm_year % 100);
  371. writew(year, rtc->regbase + RYRCNT);
  372. } else {
  373. year = tm->tm_year % 100;
  374. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  375. }
  376. /* Start RTC */
  377. tmp = readb(rtc->regbase + RCR2);
  378. tmp &= ~RCR2_RESET;
  379. tmp |= RCR2_RTCEN | RCR2_START;
  380. writeb(tmp, rtc->regbase + RCR2);
  381. spin_unlock_irq(&rtc->lock);
  382. return 0;
  383. }
  384. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  385. {
  386. unsigned int byte;
  387. int value = 0xff; /* return 0xff for ignored values */
  388. byte = readb(rtc->regbase + reg_off);
  389. if (byte & AR_ENB) {
  390. byte &= ~AR_ENB; /* strip the enable bit */
  391. value = bcd2bin(byte);
  392. }
  393. return value;
  394. }
  395. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  396. {
  397. struct platform_device *pdev = to_platform_device(dev);
  398. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  399. struct rtc_time *tm = &wkalrm->time;
  400. spin_lock_irq(&rtc->lock);
  401. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  402. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  403. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  404. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  405. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  406. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  407. if (tm->tm_mon > 0)
  408. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  409. tm->tm_year = 0xffff;
  410. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  411. spin_unlock_irq(&rtc->lock);
  412. return 0;
  413. }
  414. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  415. int value, int reg_off)
  416. {
  417. /* < 0 for a value that is ignored */
  418. if (value < 0)
  419. writeb(0, rtc->regbase + reg_off);
  420. else
  421. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  422. }
  423. static int sh_rtc_check_alarm(struct rtc_time *tm)
  424. {
  425. /*
  426. * The original rtc says anything > 0xc0 is "don't care" or "match
  427. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  428. * The original rtc doesn't support years - some things use -1 and
  429. * some 0xffff. We use -1 to make out tests easier.
  430. */
  431. if (tm->tm_year == 0xffff)
  432. tm->tm_year = -1;
  433. if (tm->tm_mon >= 0xff)
  434. tm->tm_mon = -1;
  435. if (tm->tm_mday >= 0xff)
  436. tm->tm_mday = -1;
  437. if (tm->tm_wday >= 0xff)
  438. tm->tm_wday = -1;
  439. if (tm->tm_hour >= 0xff)
  440. tm->tm_hour = -1;
  441. if (tm->tm_min >= 0xff)
  442. tm->tm_min = -1;
  443. if (tm->tm_sec >= 0xff)
  444. tm->tm_sec = -1;
  445. if (tm->tm_year > 9999 ||
  446. tm->tm_mon >= 12 ||
  447. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  448. tm->tm_wday >= 7 ||
  449. tm->tm_hour >= 24 ||
  450. tm->tm_min >= 60 ||
  451. tm->tm_sec >= 60)
  452. return -EINVAL;
  453. return 0;
  454. }
  455. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  456. {
  457. struct platform_device *pdev = to_platform_device(dev);
  458. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  459. unsigned int rcr1;
  460. struct rtc_time *tm = &wkalrm->time;
  461. int mon, err;
  462. err = sh_rtc_check_alarm(tm);
  463. if (unlikely(err < 0))
  464. return err;
  465. spin_lock_irq(&rtc->lock);
  466. /* disable alarm interrupt and clear the alarm flag */
  467. rcr1 = readb(rtc->regbase + RCR1);
  468. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  469. writeb(rcr1, rtc->regbase + RCR1);
  470. /* set alarm time */
  471. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  472. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  473. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  474. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  475. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  476. mon = tm->tm_mon;
  477. if (mon >= 0)
  478. mon += 1;
  479. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  480. if (wkalrm->enabled) {
  481. rcr1 |= RCR1_AIE;
  482. writeb(rcr1, rtc->regbase + RCR1);
  483. }
  484. spin_unlock_irq(&rtc->lock);
  485. return 0;
  486. }
  487. static struct rtc_class_ops sh_rtc_ops = {
  488. .ioctl = sh_rtc_ioctl,
  489. .read_time = sh_rtc_read_time,
  490. .set_time = sh_rtc_set_time,
  491. .read_alarm = sh_rtc_read_alarm,
  492. .set_alarm = sh_rtc_set_alarm,
  493. .irq_set_state = sh_rtc_irq_set_state,
  494. .irq_set_freq = sh_rtc_irq_set_freq,
  495. .proc = sh_rtc_proc,
  496. };
  497. static int __init sh_rtc_probe(struct platform_device *pdev)
  498. {
  499. struct sh_rtc *rtc;
  500. struct resource *res;
  501. struct rtc_time r;
  502. char clk_name[6];
  503. int clk_id, ret;
  504. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  505. if (unlikely(!rtc))
  506. return -ENOMEM;
  507. spin_lock_init(&rtc->lock);
  508. /* get periodic/carry/alarm irqs */
  509. ret = platform_get_irq(pdev, 0);
  510. if (unlikely(ret <= 0)) {
  511. ret = -ENOENT;
  512. dev_err(&pdev->dev, "No IRQ resource\n");
  513. goto err_badres;
  514. }
  515. rtc->periodic_irq = ret;
  516. rtc->carry_irq = platform_get_irq(pdev, 1);
  517. rtc->alarm_irq = platform_get_irq(pdev, 2);
  518. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  519. if (unlikely(res == NULL)) {
  520. ret = -ENOENT;
  521. dev_err(&pdev->dev, "No IO resource\n");
  522. goto err_badres;
  523. }
  524. rtc->regsize = resource_size(res);
  525. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  526. if (unlikely(!rtc->res)) {
  527. ret = -EBUSY;
  528. goto err_badres;
  529. }
  530. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  531. if (unlikely(!rtc->regbase)) {
  532. ret = -EINVAL;
  533. goto err_badmap;
  534. }
  535. clk_id = pdev->id;
  536. /* With a single device, the clock id is still "rtc0" */
  537. if (clk_id < 0)
  538. clk_id = 0;
  539. snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
  540. rtc->clk = clk_get(&pdev->dev, clk_name);
  541. if (IS_ERR(rtc->clk)) {
  542. /*
  543. * No error handling for rtc->clk intentionally, not all
  544. * platforms will have a unique clock for the RTC, and
  545. * the clk API can handle the struct clk pointer being
  546. * NULL.
  547. */
  548. rtc->clk = NULL;
  549. }
  550. clk_enable(rtc->clk);
  551. rtc->capabilities = RTC_DEF_CAPABILITIES;
  552. if (pdev->dev.platform_data) {
  553. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  554. /*
  555. * Some CPUs have special capabilities in addition to the
  556. * default set. Add those in here.
  557. */
  558. rtc->capabilities |= pinfo->capabilities;
  559. }
  560. if (rtc->carry_irq <= 0) {
  561. /* register shared periodic/carry/alarm irq */
  562. ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
  563. IRQF_DISABLED, "sh-rtc", rtc);
  564. if (unlikely(ret)) {
  565. dev_err(&pdev->dev,
  566. "request IRQ failed with %d, IRQ %d\n", ret,
  567. rtc->periodic_irq);
  568. goto err_unmap;
  569. }
  570. } else {
  571. /* register periodic/carry/alarm irqs */
  572. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
  573. IRQF_DISABLED, "sh-rtc period", rtc);
  574. if (unlikely(ret)) {
  575. dev_err(&pdev->dev,
  576. "request period IRQ failed with %d, IRQ %d\n",
  577. ret, rtc->periodic_irq);
  578. goto err_unmap;
  579. }
  580. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
  581. IRQF_DISABLED, "sh-rtc carry", rtc);
  582. if (unlikely(ret)) {
  583. dev_err(&pdev->dev,
  584. "request carry IRQ failed with %d, IRQ %d\n",
  585. ret, rtc->carry_irq);
  586. free_irq(rtc->periodic_irq, rtc);
  587. goto err_unmap;
  588. }
  589. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
  590. IRQF_DISABLED, "sh-rtc alarm", rtc);
  591. if (unlikely(ret)) {
  592. dev_err(&pdev->dev,
  593. "request alarm IRQ failed with %d, IRQ %d\n",
  594. ret, rtc->alarm_irq);
  595. free_irq(rtc->carry_irq, rtc);
  596. free_irq(rtc->periodic_irq, rtc);
  597. goto err_unmap;
  598. }
  599. }
  600. platform_set_drvdata(pdev, rtc);
  601. /* everything disabled by default */
  602. sh_rtc_irq_set_freq(&pdev->dev, 0);
  603. sh_rtc_irq_set_state(&pdev->dev, 0);
  604. sh_rtc_setaie(&pdev->dev, 0);
  605. sh_rtc_setcie(&pdev->dev, 0);
  606. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  607. &sh_rtc_ops, THIS_MODULE);
  608. if (IS_ERR(rtc->rtc_dev)) {
  609. ret = PTR_ERR(rtc->rtc_dev);
  610. free_irq(rtc->periodic_irq, rtc);
  611. free_irq(rtc->carry_irq, rtc);
  612. free_irq(rtc->alarm_irq, rtc);
  613. goto err_unmap;
  614. }
  615. rtc->rtc_dev->max_user_freq = 256;
  616. /* reset rtc to epoch 0 if time is invalid */
  617. if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
  618. rtc_time_to_tm(0, &r);
  619. rtc_set_time(rtc->rtc_dev, &r);
  620. }
  621. device_init_wakeup(&pdev->dev, 1);
  622. return 0;
  623. err_unmap:
  624. clk_disable(rtc->clk);
  625. clk_put(rtc->clk);
  626. iounmap(rtc->regbase);
  627. err_badmap:
  628. release_resource(rtc->res);
  629. err_badres:
  630. kfree(rtc);
  631. return ret;
  632. }
  633. static int __exit sh_rtc_remove(struct platform_device *pdev)
  634. {
  635. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  636. rtc_device_unregister(rtc->rtc_dev);
  637. sh_rtc_irq_set_state(&pdev->dev, 0);
  638. sh_rtc_setaie(&pdev->dev, 0);
  639. sh_rtc_setcie(&pdev->dev, 0);
  640. free_irq(rtc->periodic_irq, rtc);
  641. if (rtc->carry_irq > 0) {
  642. free_irq(rtc->carry_irq, rtc);
  643. free_irq(rtc->alarm_irq, rtc);
  644. }
  645. iounmap(rtc->regbase);
  646. release_resource(rtc->res);
  647. clk_disable(rtc->clk);
  648. clk_put(rtc->clk);
  649. platform_set_drvdata(pdev, NULL);
  650. kfree(rtc);
  651. return 0;
  652. }
  653. static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
  654. {
  655. struct platform_device *pdev = to_platform_device(dev);
  656. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  657. set_irq_wake(rtc->periodic_irq, enabled);
  658. if (rtc->carry_irq > 0) {
  659. set_irq_wake(rtc->carry_irq, enabled);
  660. set_irq_wake(rtc->alarm_irq, enabled);
  661. }
  662. }
  663. static int sh_rtc_suspend(struct device *dev)
  664. {
  665. if (device_may_wakeup(dev))
  666. sh_rtc_set_irq_wake(dev, 1);
  667. return 0;
  668. }
  669. static int sh_rtc_resume(struct device *dev)
  670. {
  671. if (device_may_wakeup(dev))
  672. sh_rtc_set_irq_wake(dev, 0);
  673. return 0;
  674. }
  675. static struct dev_pm_ops sh_rtc_dev_pm_ops = {
  676. .suspend = sh_rtc_suspend,
  677. .resume = sh_rtc_resume,
  678. };
  679. static struct platform_driver sh_rtc_platform_driver = {
  680. .driver = {
  681. .name = DRV_NAME,
  682. .owner = THIS_MODULE,
  683. .pm = &sh_rtc_dev_pm_ops,
  684. },
  685. .remove = __exit_p(sh_rtc_remove),
  686. };
  687. static int __init sh_rtc_init(void)
  688. {
  689. return platform_driver_probe(&sh_rtc_platform_driver, sh_rtc_probe);
  690. }
  691. static void __exit sh_rtc_exit(void)
  692. {
  693. platform_driver_unregister(&sh_rtc_platform_driver);
  694. }
  695. module_init(sh_rtc_init);
  696. module_exit(sh_rtc_exit);
  697. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  698. MODULE_VERSION(DRV_VERSION);
  699. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  700. "Jamie Lenehan <lenehan@twibble.org>, "
  701. "Angelo Castello <angelo.castello@st.com>");
  702. MODULE_LICENSE("GPL");
  703. MODULE_ALIAS("platform:" DRV_NAME);