au1000_pb1x00.c 9.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414
  1. /*
  2. *
  3. * Alchemy Semi Pb1x00 boards specific pcmcia routines.
  4. *
  5. * Copyright 2002 MontaVista Software Inc.
  6. * Author: MontaVista Software, Inc.
  7. * ppopov@mvista.com or source@mvista.com
  8. *
  9. * ########################################################################
  10. *
  11. * This program is free software; you can distribute it and/or modify it
  12. * under the terms of the GNU General Public License (Version 2) as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope it will be useful, but WITHOUT
  16. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  17. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  18. * for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License along
  21. * with this program; if not, write to the Free Software Foundation, Inc.,
  22. * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/ioport.h>
  28. #include <linux/kernel.h>
  29. #include <linux/timer.h>
  30. #include <linux/mm.h>
  31. #include <linux/proc_fs.h>
  32. #include <linux/types.h>
  33. #include <pcmcia/cs_types.h>
  34. #include <pcmcia/cs.h>
  35. #include <pcmcia/ss.h>
  36. #include <pcmcia/cistpl.h>
  37. #include <pcmcia/bus_ops.h>
  38. #include <asm/io.h>
  39. #include <asm/irq.h>
  40. #include <asm/system.h>
  41. #include <asm/au1000.h>
  42. #include <asm/au1000_pcmcia.h>
  43. #define debug(fmt, arg...) do { } while (0)
  44. #ifdef CONFIG_MIPS_PB1000
  45. #include <asm/pb1000.h>
  46. #define PCMCIA_IRQ AU1000_GPIO_15
  47. #elif defined (CONFIG_MIPS_PB1500)
  48. #include <asm/pb1500.h>
  49. #define PCMCIA_IRQ AU1500_GPIO_203
  50. #elif defined (CONFIG_MIPS_PB1100)
  51. #include <asm/pb1100.h>
  52. #define PCMCIA_IRQ AU1000_GPIO_11
  53. #endif
  54. static int pb1x00_pcmcia_init(struct pcmcia_init *init)
  55. {
  56. #ifdef CONFIG_MIPS_PB1000
  57. u16 pcr;
  58. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  59. au_writel(0x8000, PB1000_MDR); /* clear pcmcia interrupt */
  60. au_sync_delay(100);
  61. au_writel(0x4000, PB1000_MDR); /* enable pcmcia interrupt */
  62. au_sync();
  63. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  64. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  65. au_writel(pcr, PB1000_PCR);
  66. au_sync_delay(20);
  67. return PCMCIA_NUM_SOCKS;
  68. #else /* fixme -- take care of the Pb1500 at some point */
  69. u16 pcr;
  70. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  71. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  72. au_writew(pcr, PCMCIA_BOARD_REG);
  73. au_sync_delay(500);
  74. return PCMCIA_NUM_SOCKS;
  75. #endif
  76. }
  77. static int pb1x00_pcmcia_shutdown(void)
  78. {
  79. #ifdef CONFIG_MIPS_PB1000
  80. u16 pcr;
  81. pcr = PCR_SLOT_0_RST | PCR_SLOT_1_RST;
  82. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,0);
  83. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,1);
  84. au_writel(pcr, PB1000_PCR);
  85. au_sync_delay(20);
  86. return 0;
  87. #else
  88. u16 pcr;
  89. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf; /* turn off power */
  90. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  91. au_writew(pcr, PCMCIA_BOARD_REG);
  92. au_sync_delay(2);
  93. return 0;
  94. #endif
  95. }
  96. static int
  97. pb1x00_pcmcia_socket_state(unsigned sock, struct pcmcia_state *state)
  98. {
  99. u32 inserted0, inserted1;
  100. u16 vs0, vs1;
  101. #ifdef CONFIG_MIPS_PB1000
  102. vs0 = vs1 = (u16)au_readl(PB1000_ACR1);
  103. inserted0 = !(vs0 & (ACR1_SLOT_0_CD1 | ACR1_SLOT_0_CD2));
  104. inserted1 = !(vs1 & (ACR1_SLOT_1_CD1 | ACR1_SLOT_1_CD2));
  105. vs0 = (vs0 >> 4) & 0x3;
  106. vs1 = (vs1 >> 12) & 0x3;
  107. #else
  108. vs0 = (au_readw(BOARD_STATUS_REG) >> 4) & 0x3;
  109. #ifdef CONFIG_MIPS_PB1500
  110. inserted0 = !((au_readl(GPIO2_PINSTATE) >> 1) & 0x1); /* gpio 201 */
  111. #else /* Pb1100 */
  112. inserted0 = !((au_readl(SYS_PINSTATERD) >> 9) & 0x1); /* gpio 9 */
  113. #endif
  114. inserted1 = 0;
  115. #endif
  116. state->ready = 0;
  117. state->vs_Xv = 0;
  118. state->vs_3v = 0;
  119. state->detect = 0;
  120. if (sock == 0) {
  121. if (inserted0) {
  122. switch (vs0) {
  123. case 0:
  124. case 2:
  125. state->vs_3v=1;
  126. break;
  127. case 3: /* 5V */
  128. break;
  129. default:
  130. /* return without setting 'detect' */
  131. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  132. vs0);
  133. return 0;
  134. }
  135. state->detect = 1;
  136. }
  137. }
  138. else {
  139. if (inserted1) {
  140. switch (vs1) {
  141. case 0:
  142. case 2:
  143. state->vs_3v=1;
  144. break;
  145. case 3: /* 5V */
  146. break;
  147. default:
  148. /* return without setting 'detect' */
  149. printk(KERN_ERR "pb1x00 bad VS (%d)\n",
  150. vs1);
  151. return 0;
  152. }
  153. state->detect = 1;
  154. }
  155. }
  156. if (state->detect) {
  157. state->ready = 1;
  158. }
  159. state->bvd1=1;
  160. state->bvd2=1;
  161. state->wrprot=0;
  162. return 1;
  163. }
  164. static int pb1x00_pcmcia_get_irq_info(struct pcmcia_irq_info *info)
  165. {
  166. if(info->sock > PCMCIA_MAX_SOCK) return -1;
  167. /*
  168. * Even in the case of the Pb1000, both sockets are connected
  169. * to the same irq line.
  170. */
  171. info->irq = PCMCIA_IRQ;
  172. return 0;
  173. }
  174. static int
  175. pb1x00_pcmcia_configure_socket(const struct pcmcia_configure *configure)
  176. {
  177. u16 pcr;
  178. if(configure->sock > PCMCIA_MAX_SOCK) return -1;
  179. #ifdef CONFIG_MIPS_PB1000
  180. pcr = au_readl(PB1000_PCR);
  181. if (configure->sock == 0) {
  182. pcr &= ~(PCR_SLOT_0_VCC0 | PCR_SLOT_0_VCC1 |
  183. PCR_SLOT_0_VPP0 | PCR_SLOT_0_VPP1);
  184. }
  185. else {
  186. pcr &= ~(PCR_SLOT_1_VCC0 | PCR_SLOT_1_VCC1 |
  187. PCR_SLOT_1_VPP0 | PCR_SLOT_1_VPP1);
  188. }
  189. pcr &= ~PCR_SLOT_0_RST;
  190. debug("Vcc %dV Vpp %dV, pcr %x\n",
  191. configure->vcc, configure->vpp, pcr);
  192. switch(configure->vcc){
  193. case 0: /* Vcc 0 */
  194. switch(configure->vpp) {
  195. case 0:
  196. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_GND,
  197. configure->sock);
  198. break;
  199. case 12:
  200. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_12V,
  201. configure->sock);
  202. break;
  203. case 50:
  204. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_5V,
  205. configure->sock);
  206. break;
  207. case 33:
  208. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_3V,
  209. configure->sock);
  210. break;
  211. default:
  212. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  213. configure->sock);
  214. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  215. __func__,
  216. configure->vcc,
  217. configure->vpp);
  218. break;
  219. }
  220. break;
  221. case 50: /* Vcc 5V */
  222. switch(configure->vpp) {
  223. case 0:
  224. pcr |= SET_VCC_VPP(VCC_5V,VPP_GND,
  225. configure->sock);
  226. break;
  227. case 50:
  228. pcr |= SET_VCC_VPP(VCC_5V,VPP_5V,
  229. configure->sock);
  230. break;
  231. case 12:
  232. pcr |= SET_VCC_VPP(VCC_5V,VPP_12V,
  233. configure->sock);
  234. break;
  235. case 33:
  236. pcr |= SET_VCC_VPP(VCC_5V,VPP_3V,
  237. configure->sock);
  238. break;
  239. default:
  240. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  241. configure->sock);
  242. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  243. __func__,
  244. configure->vcc,
  245. configure->vpp);
  246. break;
  247. }
  248. break;
  249. case 33: /* Vcc 3.3V */
  250. switch(configure->vpp) {
  251. case 0:
  252. pcr |= SET_VCC_VPP(VCC_3V,VPP_GND,
  253. configure->sock);
  254. break;
  255. case 50:
  256. pcr |= SET_VCC_VPP(VCC_3V,VPP_5V,
  257. configure->sock);
  258. break;
  259. case 12:
  260. pcr |= SET_VCC_VPP(VCC_3V,VPP_12V,
  261. configure->sock);
  262. break;
  263. case 33:
  264. pcr |= SET_VCC_VPP(VCC_3V,VPP_3V,
  265. configure->sock);
  266. break;
  267. default:
  268. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,
  269. configure->sock);
  270. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  271. __func__,
  272. configure->vcc,
  273. configure->vpp);
  274. break;
  275. }
  276. break;
  277. default: /* what's this ? */
  278. pcr |= SET_VCC_VPP(VCC_HIZ,VPP_HIZ,configure->sock);
  279. printk(KERN_ERR "%s: bad Vcc %d\n",
  280. __func__, configure->vcc);
  281. break;
  282. }
  283. if (configure->sock == 0) {
  284. pcr &= ~(PCR_SLOT_0_RST);
  285. if (configure->reset)
  286. pcr |= PCR_SLOT_0_RST;
  287. }
  288. else {
  289. pcr &= ~(PCR_SLOT_1_RST);
  290. if (configure->reset)
  291. pcr |= PCR_SLOT_1_RST;
  292. }
  293. au_writel(pcr, PB1000_PCR);
  294. au_sync_delay(300);
  295. #else
  296. pcr = au_readw(PCMCIA_BOARD_REG) & ~0xf;
  297. debug("Vcc %dV Vpp %dV, pcr %x, reset %d\n",
  298. configure->vcc, configure->vpp, pcr, configure->reset);
  299. switch(configure->vcc){
  300. case 0: /* Vcc 0 */
  301. pcr |= SET_VCC_VPP(0,0);
  302. break;
  303. case 50: /* Vcc 5V */
  304. switch(configure->vpp) {
  305. case 0:
  306. pcr |= SET_VCC_VPP(2,0);
  307. break;
  308. case 50:
  309. pcr |= SET_VCC_VPP(2,1);
  310. break;
  311. case 12:
  312. pcr |= SET_VCC_VPP(2,2);
  313. break;
  314. case 33:
  315. default:
  316. pcr |= SET_VCC_VPP(0,0);
  317. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  318. __func__,
  319. configure->vcc,
  320. configure->vpp);
  321. break;
  322. }
  323. break;
  324. case 33: /* Vcc 3.3V */
  325. switch(configure->vpp) {
  326. case 0:
  327. pcr |= SET_VCC_VPP(1,0);
  328. break;
  329. case 12:
  330. pcr |= SET_VCC_VPP(1,2);
  331. break;
  332. case 33:
  333. pcr |= SET_VCC_VPP(1,1);
  334. break;
  335. case 50:
  336. default:
  337. pcr |= SET_VCC_VPP(0,0);
  338. printk("%s: bad Vcc/Vpp (%d:%d)\n",
  339. __func__,
  340. configure->vcc,
  341. configure->vpp);
  342. break;
  343. }
  344. break;
  345. default: /* what's this ? */
  346. pcr |= SET_VCC_VPP(0,0);
  347. printk(KERN_ERR "%s: bad Vcc %d\n",
  348. __func__, configure->vcc);
  349. break;
  350. }
  351. au_writew(pcr, PCMCIA_BOARD_REG);
  352. au_sync_delay(300);
  353. if (!configure->reset) {
  354. pcr |= PC_DRV_EN;
  355. au_writew(pcr, PCMCIA_BOARD_REG);
  356. au_sync_delay(100);
  357. pcr |= PC_DEASSERT_RST;
  358. au_writew(pcr, PCMCIA_BOARD_REG);
  359. au_sync_delay(100);
  360. }
  361. else {
  362. pcr &= ~(PC_DEASSERT_RST | PC_DRV_EN);
  363. au_writew(pcr, PCMCIA_BOARD_REG);
  364. au_sync_delay(100);
  365. }
  366. #endif
  367. return 0;
  368. }
  369. struct pcmcia_low_level pb1x00_pcmcia_ops = {
  370. pb1x00_pcmcia_init,
  371. pb1x00_pcmcia_shutdown,
  372. pb1x00_pcmcia_socket_state,
  373. pb1x00_pcmcia_get_irq_info,
  374. pb1x00_pcmcia_configure_socket
  375. };