pci-sysfs.c 29 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. const struct cpumask *mask;
  64. int len;
  65. #ifdef CONFIG_NUMA
  66. mask = cpumask_of_node(dev_to_node(dev));
  67. #else
  68. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  69. #endif
  70. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  71. buf[len++] = '\n';
  72. buf[len] = '\0';
  73. return len;
  74. }
  75. static ssize_t local_cpulist_show(struct device *dev,
  76. struct device_attribute *attr, char *buf)
  77. {
  78. const struct cpumask *mask;
  79. int len;
  80. #ifdef CONFIG_NUMA
  81. mask = cpumask_of_node(dev_to_node(dev));
  82. #else
  83. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  84. #endif
  85. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  86. buf[len++] = '\n';
  87. buf[len] = '\0';
  88. return len;
  89. }
  90. /* show resources */
  91. static ssize_t
  92. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  93. {
  94. struct pci_dev * pci_dev = to_pci_dev(dev);
  95. char * str = buf;
  96. int i;
  97. int max;
  98. resource_size_t start, end;
  99. if (pci_dev->subordinate)
  100. max = DEVICE_COUNT_RESOURCE;
  101. else
  102. max = PCI_BRIDGE_RESOURCES;
  103. for (i = 0; i < max; i++) {
  104. struct resource *res = &pci_dev->resource[i];
  105. pci_resource_to_user(pci_dev, i, res, &start, &end);
  106. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  107. (unsigned long long)start,
  108. (unsigned long long)end,
  109. (unsigned long long)res->flags);
  110. }
  111. return (str - buf);
  112. }
  113. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  114. {
  115. struct pci_dev *pci_dev = to_pci_dev(dev);
  116. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  117. pci_dev->vendor, pci_dev->device,
  118. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  119. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  120. (u8)(pci_dev->class));
  121. }
  122. static ssize_t is_enabled_store(struct device *dev,
  123. struct device_attribute *attr, const char *buf,
  124. size_t count)
  125. {
  126. struct pci_dev *pdev = to_pci_dev(dev);
  127. unsigned long val;
  128. ssize_t result = strict_strtoul(buf, 0, &val);
  129. if (result < 0)
  130. return result;
  131. /* this can crash the machine when done on the "wrong" device */
  132. if (!capable(CAP_SYS_ADMIN))
  133. return -EPERM;
  134. if (!val) {
  135. if (pci_is_enabled(pdev))
  136. pci_disable_device(pdev);
  137. else
  138. result = -EIO;
  139. } else
  140. result = pci_enable_device(pdev);
  141. return result < 0 ? result : count;
  142. }
  143. static ssize_t is_enabled_show(struct device *dev,
  144. struct device_attribute *attr, char *buf)
  145. {
  146. struct pci_dev *pdev;
  147. pdev = to_pci_dev (dev);
  148. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  149. }
  150. #ifdef CONFIG_NUMA
  151. static ssize_t
  152. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  153. {
  154. return sprintf (buf, "%d\n", dev->numa_node);
  155. }
  156. #endif
  157. static ssize_t
  158. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  159. {
  160. struct pci_dev *pdev = to_pci_dev(dev);
  161. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  162. }
  163. static ssize_t
  164. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  165. char *buf)
  166. {
  167. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  168. }
  169. static ssize_t
  170. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  171. {
  172. struct pci_dev *pdev = to_pci_dev(dev);
  173. if (!pdev->subordinate)
  174. return 0;
  175. return sprintf (buf, "%u\n",
  176. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  177. }
  178. static ssize_t
  179. msi_bus_store(struct device *dev, struct device_attribute *attr,
  180. const char *buf, size_t count)
  181. {
  182. struct pci_dev *pdev = to_pci_dev(dev);
  183. unsigned long val;
  184. if (strict_strtoul(buf, 0, &val) < 0)
  185. return -EINVAL;
  186. /* bad things may happen if the no_msi flag is changed
  187. * while some drivers are loaded */
  188. if (!capable(CAP_SYS_ADMIN))
  189. return -EPERM;
  190. /* Maybe pci devices without subordinate busses shouldn't even have this
  191. * attribute in the first place? */
  192. if (!pdev->subordinate)
  193. return count;
  194. /* Is the flag going to change, or keep the value it already had? */
  195. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  196. !!val) {
  197. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  198. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  199. " bad things could happen\n", val ? "" : " not");
  200. }
  201. return count;
  202. }
  203. #ifdef CONFIG_HOTPLUG
  204. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  205. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  206. size_t count)
  207. {
  208. unsigned long val;
  209. struct pci_bus *b = NULL;
  210. if (strict_strtoul(buf, 0, &val) < 0)
  211. return -EINVAL;
  212. if (val) {
  213. mutex_lock(&pci_remove_rescan_mutex);
  214. while ((b = pci_find_next_bus(b)) != NULL)
  215. pci_rescan_bus(b);
  216. mutex_unlock(&pci_remove_rescan_mutex);
  217. }
  218. return count;
  219. }
  220. struct bus_attribute pci_bus_attrs[] = {
  221. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  222. __ATTR_NULL
  223. };
  224. static ssize_t
  225. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. unsigned long val;
  229. struct pci_dev *pdev = to_pci_dev(dev);
  230. if (strict_strtoul(buf, 0, &val) < 0)
  231. return -EINVAL;
  232. if (val) {
  233. mutex_lock(&pci_remove_rescan_mutex);
  234. pci_rescan_bus(pdev->bus);
  235. mutex_unlock(&pci_remove_rescan_mutex);
  236. }
  237. return count;
  238. }
  239. static void remove_callback(struct device *dev)
  240. {
  241. struct pci_dev *pdev = to_pci_dev(dev);
  242. mutex_lock(&pci_remove_rescan_mutex);
  243. pci_remove_bus_device(pdev);
  244. mutex_unlock(&pci_remove_rescan_mutex);
  245. }
  246. static ssize_t
  247. remove_store(struct device *dev, struct device_attribute *dummy,
  248. const char *buf, size_t count)
  249. {
  250. int ret = 0;
  251. unsigned long val;
  252. if (strict_strtoul(buf, 0, &val) < 0)
  253. return -EINVAL;
  254. /* An attribute cannot be unregistered by one of its own methods,
  255. * so we have to use this roundabout approach.
  256. */
  257. if (val)
  258. ret = device_schedule_callback(dev, remove_callback);
  259. if (ret)
  260. count = ret;
  261. return count;
  262. }
  263. #endif
  264. struct device_attribute pci_dev_attrs[] = {
  265. __ATTR_RO(resource),
  266. __ATTR_RO(vendor),
  267. __ATTR_RO(device),
  268. __ATTR_RO(subsystem_vendor),
  269. __ATTR_RO(subsystem_device),
  270. __ATTR_RO(class),
  271. __ATTR_RO(irq),
  272. __ATTR_RO(local_cpus),
  273. __ATTR_RO(local_cpulist),
  274. __ATTR_RO(modalias),
  275. #ifdef CONFIG_NUMA
  276. __ATTR_RO(numa_node),
  277. #endif
  278. __ATTR_RO(dma_mask_bits),
  279. __ATTR_RO(consistent_dma_mask_bits),
  280. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  281. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  282. broken_parity_status_show,broken_parity_status_store),
  283. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  284. #ifdef CONFIG_HOTPLUG
  285. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  286. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  287. #endif
  288. __ATTR_NULL,
  289. };
  290. static ssize_t
  291. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  292. {
  293. struct pci_dev *pdev = to_pci_dev(dev);
  294. return sprintf(buf, "%u\n",
  295. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  296. IORESOURCE_ROM_SHADOW));
  297. }
  298. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  299. static ssize_t
  300. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  301. char *buf, loff_t off, size_t count)
  302. {
  303. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  304. unsigned int size = 64;
  305. loff_t init_off = off;
  306. u8 *data = (u8*) buf;
  307. /* Several chips lock up trying to read undefined config space */
  308. if (capable(CAP_SYS_ADMIN)) {
  309. size = dev->cfg_size;
  310. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  311. size = 128;
  312. }
  313. if (off > size)
  314. return 0;
  315. if (off + count > size) {
  316. size -= off;
  317. count = size;
  318. } else {
  319. size = count;
  320. }
  321. if ((off & 1) && size) {
  322. u8 val;
  323. pci_user_read_config_byte(dev, off, &val);
  324. data[off - init_off] = val;
  325. off++;
  326. size--;
  327. }
  328. if ((off & 3) && size > 2) {
  329. u16 val;
  330. pci_user_read_config_word(dev, off, &val);
  331. data[off - init_off] = val & 0xff;
  332. data[off - init_off + 1] = (val >> 8) & 0xff;
  333. off += 2;
  334. size -= 2;
  335. }
  336. while (size > 3) {
  337. u32 val;
  338. pci_user_read_config_dword(dev, off, &val);
  339. data[off - init_off] = val & 0xff;
  340. data[off - init_off + 1] = (val >> 8) & 0xff;
  341. data[off - init_off + 2] = (val >> 16) & 0xff;
  342. data[off - init_off + 3] = (val >> 24) & 0xff;
  343. off += 4;
  344. size -= 4;
  345. }
  346. if (size >= 2) {
  347. u16 val;
  348. pci_user_read_config_word(dev, off, &val);
  349. data[off - init_off] = val & 0xff;
  350. data[off - init_off + 1] = (val >> 8) & 0xff;
  351. off += 2;
  352. size -= 2;
  353. }
  354. if (size > 0) {
  355. u8 val;
  356. pci_user_read_config_byte(dev, off, &val);
  357. data[off - init_off] = val;
  358. off++;
  359. --size;
  360. }
  361. return count;
  362. }
  363. static ssize_t
  364. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  365. char *buf, loff_t off, size_t count)
  366. {
  367. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  368. unsigned int size = count;
  369. loff_t init_off = off;
  370. u8 *data = (u8*) buf;
  371. if (off > dev->cfg_size)
  372. return 0;
  373. if (off + count > dev->cfg_size) {
  374. size = dev->cfg_size - off;
  375. count = size;
  376. }
  377. if ((off & 1) && size) {
  378. pci_user_write_config_byte(dev, off, data[off - init_off]);
  379. off++;
  380. size--;
  381. }
  382. if ((off & 3) && size > 2) {
  383. u16 val = data[off - init_off];
  384. val |= (u16) data[off - init_off + 1] << 8;
  385. pci_user_write_config_word(dev, off, val);
  386. off += 2;
  387. size -= 2;
  388. }
  389. while (size > 3) {
  390. u32 val = data[off - init_off];
  391. val |= (u32) data[off - init_off + 1] << 8;
  392. val |= (u32) data[off - init_off + 2] << 16;
  393. val |= (u32) data[off - init_off + 3] << 24;
  394. pci_user_write_config_dword(dev, off, val);
  395. off += 4;
  396. size -= 4;
  397. }
  398. if (size >= 2) {
  399. u16 val = data[off - init_off];
  400. val |= (u16) data[off - init_off + 1] << 8;
  401. pci_user_write_config_word(dev, off, val);
  402. off += 2;
  403. size -= 2;
  404. }
  405. if (size) {
  406. pci_user_write_config_byte(dev, off, data[off - init_off]);
  407. off++;
  408. --size;
  409. }
  410. return count;
  411. }
  412. static ssize_t
  413. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  414. char *buf, loff_t off, size_t count)
  415. {
  416. struct pci_dev *dev =
  417. to_pci_dev(container_of(kobj, struct device, kobj));
  418. if (off > bin_attr->size)
  419. count = 0;
  420. else if (count > bin_attr->size - off)
  421. count = bin_attr->size - off;
  422. return pci_read_vpd(dev, off, count, buf);
  423. }
  424. static ssize_t
  425. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  426. char *buf, loff_t off, size_t count)
  427. {
  428. struct pci_dev *dev =
  429. to_pci_dev(container_of(kobj, struct device, kobj));
  430. if (off > bin_attr->size)
  431. count = 0;
  432. else if (count > bin_attr->size - off)
  433. count = bin_attr->size - off;
  434. return pci_write_vpd(dev, off, count, buf);
  435. }
  436. #ifdef HAVE_PCI_LEGACY
  437. /**
  438. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  439. * @kobj: kobject corresponding to file to read from
  440. * @bin_attr: struct bin_attribute for this file
  441. * @buf: buffer to store results
  442. * @off: offset into legacy I/O port space
  443. * @count: number of bytes to read
  444. *
  445. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  446. * callback routine (pci_legacy_read).
  447. */
  448. static ssize_t
  449. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  450. char *buf, loff_t off, size_t count)
  451. {
  452. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  453. struct device,
  454. kobj));
  455. /* Only support 1, 2 or 4 byte accesses */
  456. if (count != 1 && count != 2 && count != 4)
  457. return -EINVAL;
  458. return pci_legacy_read(bus, off, (u32 *)buf, count);
  459. }
  460. /**
  461. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  462. * @kobj: kobject corresponding to file to read from
  463. * @bin_attr: struct bin_attribute for this file
  464. * @buf: buffer containing value to be written
  465. * @off: offset into legacy I/O port space
  466. * @count: number of bytes to write
  467. *
  468. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  469. * callback routine (pci_legacy_write).
  470. */
  471. static ssize_t
  472. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  473. char *buf, loff_t off, size_t count)
  474. {
  475. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  476. struct device,
  477. kobj));
  478. /* Only support 1, 2 or 4 byte accesses */
  479. if (count != 1 && count != 2 && count != 4)
  480. return -EINVAL;
  481. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  482. }
  483. /**
  484. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  485. * @kobj: kobject corresponding to device to be mapped
  486. * @attr: struct bin_attribute for this file
  487. * @vma: struct vm_area_struct passed to mmap
  488. *
  489. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  490. * legacy memory space (first meg of bus space) into application virtual
  491. * memory space.
  492. */
  493. static int
  494. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  495. struct vm_area_struct *vma)
  496. {
  497. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  498. struct device,
  499. kobj));
  500. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  501. }
  502. /**
  503. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  504. * @kobj: kobject corresponding to device to be mapped
  505. * @attr: struct bin_attribute for this file
  506. * @vma: struct vm_area_struct passed to mmap
  507. *
  508. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  509. * legacy IO space (first meg of bus space) into application virtual
  510. * memory space. Returns -ENOSYS if the operation isn't supported
  511. */
  512. static int
  513. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  514. struct vm_area_struct *vma)
  515. {
  516. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  517. struct device,
  518. kobj));
  519. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  520. }
  521. /**
  522. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  523. * @b: bus to create files under
  524. * @mmap_type: I/O port or memory
  525. *
  526. * Stub implementation. Can be overridden by arch if necessary.
  527. */
  528. void __weak
  529. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  530. {
  531. return;
  532. }
  533. /**
  534. * pci_create_legacy_files - create legacy I/O port and memory files
  535. * @b: bus to create files under
  536. *
  537. * Some platforms allow access to legacy I/O port and ISA memory space on
  538. * a per-bus basis. This routine creates the files and ties them into
  539. * their associated read, write and mmap files from pci-sysfs.c
  540. *
  541. * On error unwind, but don't propogate the error to the caller
  542. * as it is ok to set up the PCI bus without these files.
  543. */
  544. void pci_create_legacy_files(struct pci_bus *b)
  545. {
  546. int error;
  547. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  548. GFP_ATOMIC);
  549. if (!b->legacy_io)
  550. goto kzalloc_err;
  551. b->legacy_io->attr.name = "legacy_io";
  552. b->legacy_io->size = 0xffff;
  553. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  554. b->legacy_io->read = pci_read_legacy_io;
  555. b->legacy_io->write = pci_write_legacy_io;
  556. b->legacy_io->mmap = pci_mmap_legacy_io;
  557. pci_adjust_legacy_attr(b, pci_mmap_io);
  558. error = device_create_bin_file(&b->dev, b->legacy_io);
  559. if (error)
  560. goto legacy_io_err;
  561. /* Allocated above after the legacy_io struct */
  562. b->legacy_mem = b->legacy_io + 1;
  563. b->legacy_mem->attr.name = "legacy_mem";
  564. b->legacy_mem->size = 1024*1024;
  565. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  566. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  567. pci_adjust_legacy_attr(b, pci_mmap_mem);
  568. error = device_create_bin_file(&b->dev, b->legacy_mem);
  569. if (error)
  570. goto legacy_mem_err;
  571. return;
  572. legacy_mem_err:
  573. device_remove_bin_file(&b->dev, b->legacy_io);
  574. legacy_io_err:
  575. kfree(b->legacy_io);
  576. b->legacy_io = NULL;
  577. kzalloc_err:
  578. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  579. "and ISA memory resources to sysfs\n");
  580. return;
  581. }
  582. void pci_remove_legacy_files(struct pci_bus *b)
  583. {
  584. if (b->legacy_io) {
  585. device_remove_bin_file(&b->dev, b->legacy_io);
  586. device_remove_bin_file(&b->dev, b->legacy_mem);
  587. kfree(b->legacy_io); /* both are allocated here */
  588. }
  589. }
  590. #endif /* HAVE_PCI_LEGACY */
  591. #ifdef HAVE_PCI_MMAP
  592. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  593. {
  594. unsigned long nr, start, size;
  595. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  596. start = vma->vm_pgoff;
  597. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  598. if (start < size && size - start >= nr)
  599. return 1;
  600. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  601. current->comm, start, start+nr, pci_name(pdev), resno, size);
  602. return 0;
  603. }
  604. /**
  605. * pci_mmap_resource - map a PCI resource into user memory space
  606. * @kobj: kobject for mapping
  607. * @attr: struct bin_attribute for the file being mapped
  608. * @vma: struct vm_area_struct passed into the mmap
  609. * @write_combine: 1 for write_combine mapping
  610. *
  611. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  612. */
  613. static int
  614. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  615. struct vm_area_struct *vma, int write_combine)
  616. {
  617. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  618. struct device, kobj));
  619. struct resource *res = (struct resource *)attr->private;
  620. enum pci_mmap_state mmap_type;
  621. resource_size_t start, end;
  622. int i;
  623. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  624. if (res == &pdev->resource[i])
  625. break;
  626. if (i >= PCI_ROM_RESOURCE)
  627. return -ENODEV;
  628. if (!pci_mmap_fits(pdev, i, vma))
  629. return -EINVAL;
  630. /* pci_mmap_page_range() expects the same kind of entry as coming
  631. * from /proc/bus/pci/ which is a "user visible" value. If this is
  632. * different from the resource itself, arch will do necessary fixup.
  633. */
  634. pci_resource_to_user(pdev, i, res, &start, &end);
  635. vma->vm_pgoff += start >> PAGE_SHIFT;
  636. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  637. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  638. return -EINVAL;
  639. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  640. }
  641. static int
  642. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  643. struct vm_area_struct *vma)
  644. {
  645. return pci_mmap_resource(kobj, attr, vma, 0);
  646. }
  647. static int
  648. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  649. struct vm_area_struct *vma)
  650. {
  651. return pci_mmap_resource(kobj, attr, vma, 1);
  652. }
  653. /**
  654. * pci_remove_resource_files - cleanup resource files
  655. * @pdev: dev to cleanup
  656. *
  657. * If we created resource files for @pdev, remove them from sysfs and
  658. * free their resources.
  659. */
  660. static void
  661. pci_remove_resource_files(struct pci_dev *pdev)
  662. {
  663. int i;
  664. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  665. struct bin_attribute *res_attr;
  666. res_attr = pdev->res_attr[i];
  667. if (res_attr) {
  668. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  669. kfree(res_attr);
  670. }
  671. res_attr = pdev->res_attr_wc[i];
  672. if (res_attr) {
  673. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  674. kfree(res_attr);
  675. }
  676. }
  677. }
  678. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  679. {
  680. /* allocate attribute structure, piggyback attribute name */
  681. int name_len = write_combine ? 13 : 10;
  682. struct bin_attribute *res_attr;
  683. int retval;
  684. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  685. if (res_attr) {
  686. char *res_attr_name = (char *)(res_attr + 1);
  687. if (write_combine) {
  688. pdev->res_attr_wc[num] = res_attr;
  689. sprintf(res_attr_name, "resource%d_wc", num);
  690. res_attr->mmap = pci_mmap_resource_wc;
  691. } else {
  692. pdev->res_attr[num] = res_attr;
  693. sprintf(res_attr_name, "resource%d", num);
  694. res_attr->mmap = pci_mmap_resource_uc;
  695. }
  696. res_attr->attr.name = res_attr_name;
  697. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  698. res_attr->size = pci_resource_len(pdev, num);
  699. res_attr->private = &pdev->resource[num];
  700. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  701. } else
  702. retval = -ENOMEM;
  703. return retval;
  704. }
  705. /**
  706. * pci_create_resource_files - create resource files in sysfs for @dev
  707. * @pdev: dev in question
  708. *
  709. * Walk the resources in @pdev creating files for each resource available.
  710. */
  711. static int pci_create_resource_files(struct pci_dev *pdev)
  712. {
  713. int i;
  714. int retval;
  715. /* Expose the PCI resources from this device as files */
  716. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  717. /* skip empty resources */
  718. if (!pci_resource_len(pdev, i))
  719. continue;
  720. retval = pci_create_attr(pdev, i, 0);
  721. /* for prefetchable resources, create a WC mappable file */
  722. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  723. retval = pci_create_attr(pdev, i, 1);
  724. if (retval) {
  725. pci_remove_resource_files(pdev);
  726. return retval;
  727. }
  728. }
  729. return 0;
  730. }
  731. #else /* !HAVE_PCI_MMAP */
  732. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  733. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  734. #endif /* HAVE_PCI_MMAP */
  735. /**
  736. * pci_write_rom - used to enable access to the PCI ROM display
  737. * @kobj: kernel object handle
  738. * @bin_attr: struct bin_attribute for this file
  739. * @buf: user input
  740. * @off: file offset
  741. * @count: number of byte in input
  742. *
  743. * writing anything except 0 enables it
  744. */
  745. static ssize_t
  746. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  747. char *buf, loff_t off, size_t count)
  748. {
  749. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  750. if ((off == 0) && (*buf == '0') && (count == 2))
  751. pdev->rom_attr_enabled = 0;
  752. else
  753. pdev->rom_attr_enabled = 1;
  754. return count;
  755. }
  756. /**
  757. * pci_read_rom - read a PCI ROM
  758. * @kobj: kernel object handle
  759. * @bin_attr: struct bin_attribute for this file
  760. * @buf: where to put the data we read from the ROM
  761. * @off: file offset
  762. * @count: number of bytes to read
  763. *
  764. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  765. * device corresponding to @kobj.
  766. */
  767. static ssize_t
  768. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  769. char *buf, loff_t off, size_t count)
  770. {
  771. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  772. void __iomem *rom;
  773. size_t size;
  774. if (!pdev->rom_attr_enabled)
  775. return -EINVAL;
  776. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  777. if (!rom || !size)
  778. return -EIO;
  779. if (off >= size)
  780. count = 0;
  781. else {
  782. if (off + count > size)
  783. count = size - off;
  784. memcpy_fromio(buf, rom + off, count);
  785. }
  786. pci_unmap_rom(pdev, rom);
  787. return count;
  788. }
  789. static struct bin_attribute pci_config_attr = {
  790. .attr = {
  791. .name = "config",
  792. .mode = S_IRUGO | S_IWUSR,
  793. },
  794. .size = PCI_CFG_SPACE_SIZE,
  795. .read = pci_read_config,
  796. .write = pci_write_config,
  797. };
  798. static struct bin_attribute pcie_config_attr = {
  799. .attr = {
  800. .name = "config",
  801. .mode = S_IRUGO | S_IWUSR,
  802. },
  803. .size = PCI_CFG_SPACE_EXP_SIZE,
  804. .read = pci_read_config,
  805. .write = pci_write_config,
  806. };
  807. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  808. {
  809. return 0;
  810. }
  811. static ssize_t reset_store(struct device *dev,
  812. struct device_attribute *attr, const char *buf,
  813. size_t count)
  814. {
  815. struct pci_dev *pdev = to_pci_dev(dev);
  816. unsigned long val;
  817. ssize_t result = strict_strtoul(buf, 0, &val);
  818. if (result < 0)
  819. return result;
  820. if (val != 1)
  821. return -EINVAL;
  822. return pci_reset_function(pdev);
  823. }
  824. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  825. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  826. {
  827. int retval;
  828. struct bin_attribute *attr;
  829. /* If the device has VPD, try to expose it in sysfs. */
  830. if (dev->vpd) {
  831. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  832. if (!attr)
  833. return -ENOMEM;
  834. attr->size = dev->vpd->len;
  835. attr->attr.name = "vpd";
  836. attr->attr.mode = S_IRUSR | S_IWUSR;
  837. attr->read = read_vpd_attr;
  838. attr->write = write_vpd_attr;
  839. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  840. if (retval) {
  841. kfree(dev->vpd->attr);
  842. return retval;
  843. }
  844. dev->vpd->attr = attr;
  845. }
  846. /* Active State Power Management */
  847. pcie_aspm_create_sysfs_dev_files(dev);
  848. if (!pci_probe_reset_function(dev)) {
  849. retval = device_create_file(&dev->dev, &reset_attr);
  850. if (retval)
  851. goto error;
  852. dev->reset_fn = 1;
  853. }
  854. return 0;
  855. error:
  856. pcie_aspm_remove_sysfs_dev_files(dev);
  857. if (dev->vpd && dev->vpd->attr) {
  858. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  859. kfree(dev->vpd->attr);
  860. }
  861. return retval;
  862. }
  863. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  864. {
  865. int retval;
  866. int rom_size = 0;
  867. struct bin_attribute *attr;
  868. if (!sysfs_initialized)
  869. return -EACCES;
  870. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  871. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  872. else
  873. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  874. if (retval)
  875. goto err;
  876. retval = pci_create_resource_files(pdev);
  877. if (retval)
  878. goto err_config_file;
  879. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  880. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  881. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  882. rom_size = 0x20000;
  883. /* If the device has a ROM, try to expose it in sysfs. */
  884. if (rom_size) {
  885. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  886. if (!attr) {
  887. retval = -ENOMEM;
  888. goto err_resource_files;
  889. }
  890. attr->size = rom_size;
  891. attr->attr.name = "rom";
  892. attr->attr.mode = S_IRUSR;
  893. attr->read = pci_read_rom;
  894. attr->write = pci_write_rom;
  895. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  896. if (retval) {
  897. kfree(attr);
  898. goto err_resource_files;
  899. }
  900. pdev->rom_attr = attr;
  901. }
  902. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  903. retval = device_create_file(&pdev->dev, &vga_attr);
  904. if (retval)
  905. goto err_rom_file;
  906. }
  907. /* add platform-specific attributes */
  908. retval = pcibios_add_platform_entries(pdev);
  909. if (retval)
  910. goto err_vga_file;
  911. /* add sysfs entries for various capabilities */
  912. retval = pci_create_capabilities_sysfs(pdev);
  913. if (retval)
  914. goto err_vga_file;
  915. return 0;
  916. err_vga_file:
  917. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  918. device_remove_file(&pdev->dev, &vga_attr);
  919. err_rom_file:
  920. if (rom_size) {
  921. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  922. kfree(pdev->rom_attr);
  923. pdev->rom_attr = NULL;
  924. }
  925. err_resource_files:
  926. pci_remove_resource_files(pdev);
  927. err_config_file:
  928. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  929. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  930. else
  931. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  932. err:
  933. return retval;
  934. }
  935. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  936. {
  937. if (dev->vpd && dev->vpd->attr) {
  938. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  939. kfree(dev->vpd->attr);
  940. }
  941. pcie_aspm_remove_sysfs_dev_files(dev);
  942. if (dev->reset_fn) {
  943. device_remove_file(&dev->dev, &reset_attr);
  944. dev->reset_fn = 0;
  945. }
  946. }
  947. /**
  948. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  949. * @pdev: device whose entries we should free
  950. *
  951. * Cleanup when @pdev is removed from sysfs.
  952. */
  953. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  954. {
  955. int rom_size = 0;
  956. if (!sysfs_initialized)
  957. return;
  958. pci_remove_capabilities_sysfs(pdev);
  959. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  960. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  961. else
  962. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  963. pci_remove_resource_files(pdev);
  964. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  965. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  966. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  967. rom_size = 0x20000;
  968. if (rom_size && pdev->rom_attr) {
  969. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  970. kfree(pdev->rom_attr);
  971. }
  972. }
  973. static int __init pci_sysfs_init(void)
  974. {
  975. struct pci_dev *pdev = NULL;
  976. int retval;
  977. sysfs_initialized = 1;
  978. for_each_pci_dev(pdev) {
  979. retval = pci_create_sysfs_dev_files(pdev);
  980. if (retval) {
  981. pci_dev_put(pdev);
  982. return retval;
  983. }
  984. }
  985. return 0;
  986. }
  987. late_initcall(pci_sysfs_init);