mc13783-core.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427
  1. /*
  2. * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  3. *
  4. * This code is in parts based on wm8350-core.c and pcf50633-core.c
  5. *
  6. * Initial development of this code was funded by
  7. * Phytec Messtechnik GmbH, http://www.phytec.de
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/mfd/mc13783-private.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/mfd/mc13783.h>
  26. #include <linux/completion.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/mfd/core.h>
  29. #include <linux/spi/spi.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/irq.h>
  36. #define MC13783_MAX_REG_NUM 0x3f
  37. #define MC13783_FRAME_MASK 0x00ffffff
  38. #define MC13783_MAX_REG_NUM 0x3f
  39. #define MC13783_REG_NUM_SHIFT 0x19
  40. #define MC13783_WRITE_BIT_SHIFT 31
  41. static inline int spi_rw(struct spi_device *spi, u8 * buf, size_t len)
  42. {
  43. struct spi_transfer t = {
  44. .tx_buf = (const void *)buf,
  45. .rx_buf = buf,
  46. .len = len,
  47. .cs_change = 0,
  48. .delay_usecs = 0,
  49. };
  50. struct spi_message m;
  51. spi_message_init(&m);
  52. spi_message_add_tail(&t, &m);
  53. if (spi_sync(spi, &m) != 0 || m.status != 0)
  54. return -EINVAL;
  55. return len - m.actual_length;
  56. }
  57. static int mc13783_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
  58. {
  59. unsigned int frame = 0;
  60. int ret = 0;
  61. if (reg_num > MC13783_MAX_REG_NUM)
  62. return -EINVAL;
  63. frame |= reg_num << MC13783_REG_NUM_SHIFT;
  64. ret = spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
  65. *reg_val = frame & MC13783_FRAME_MASK;
  66. return ret;
  67. }
  68. static int mc13783_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
  69. {
  70. unsigned int frame = 0;
  71. if (reg_num > MC13783_MAX_REG_NUM)
  72. return -EINVAL;
  73. frame |= (1 << MC13783_WRITE_BIT_SHIFT);
  74. frame |= reg_num << MC13783_REG_NUM_SHIFT;
  75. frame |= reg_val & MC13783_FRAME_MASK;
  76. return spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
  77. }
  78. int mc13783_reg_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
  79. {
  80. int ret;
  81. mutex_lock(&mc13783->io_lock);
  82. ret = mc13783_read(mc13783, reg_num, reg_val);
  83. mutex_unlock(&mc13783->io_lock);
  84. return ret;
  85. }
  86. EXPORT_SYMBOL_GPL(mc13783_reg_read);
  87. int mc13783_reg_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
  88. {
  89. int ret;
  90. mutex_lock(&mc13783->io_lock);
  91. ret = mc13783_write(mc13783, reg_num, reg_val);
  92. mutex_unlock(&mc13783->io_lock);
  93. return ret;
  94. }
  95. EXPORT_SYMBOL_GPL(mc13783_reg_write);
  96. /**
  97. * mc13783_set_bits - Bitmask write
  98. *
  99. * @mc13783: Pointer to mc13783 control structure
  100. * @reg: Register to access
  101. * @mask: Mask of bits to change
  102. * @val: Value to set for masked bits
  103. */
  104. int mc13783_set_bits(struct mc13783 *mc13783, int reg, u32 mask, u32 val)
  105. {
  106. u32 tmp;
  107. int ret;
  108. mutex_lock(&mc13783->io_lock);
  109. ret = mc13783_read(mc13783, reg, &tmp);
  110. tmp = (tmp & ~mask) | val;
  111. if (ret == 0)
  112. ret = mc13783_write(mc13783, reg, tmp);
  113. mutex_unlock(&mc13783->io_lock);
  114. return ret;
  115. }
  116. EXPORT_SYMBOL_GPL(mc13783_set_bits);
  117. int mc13783_register_irq(struct mc13783 *mc13783, int irq,
  118. void (*handler) (int, void *), void *data)
  119. {
  120. if (irq < 0 || irq > MC13783_NUM_IRQ || !handler)
  121. return -EINVAL;
  122. if (WARN_ON(mc13783->irq_handler[irq].handler))
  123. return -EBUSY;
  124. mutex_lock(&mc13783->io_lock);
  125. mc13783->irq_handler[irq].handler = handler;
  126. mc13783->irq_handler[irq].data = data;
  127. mutex_unlock(&mc13783->io_lock);
  128. return 0;
  129. }
  130. EXPORT_SYMBOL_GPL(mc13783_register_irq);
  131. int mc13783_free_irq(struct mc13783 *mc13783, int irq)
  132. {
  133. if (irq < 0 || irq > MC13783_NUM_IRQ)
  134. return -EINVAL;
  135. mutex_lock(&mc13783->io_lock);
  136. mc13783->irq_handler[irq].handler = NULL;
  137. mutex_unlock(&mc13783->io_lock);
  138. return 0;
  139. }
  140. EXPORT_SYMBOL_GPL(mc13783_free_irq);
  141. static void mc13783_irq_work(struct work_struct *work)
  142. {
  143. struct mc13783 *mc13783 = container_of(work, struct mc13783, work);
  144. int i;
  145. unsigned int adc_sts;
  146. /* check if the adc has finished any completion */
  147. mc13783_reg_read(mc13783, MC13783_REG_INTERRUPT_STATUS_0, &adc_sts);
  148. mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0,
  149. adc_sts & MC13783_INT_STAT_ADCDONEI);
  150. if (adc_sts & MC13783_INT_STAT_ADCDONEI)
  151. complete_all(&mc13783->adc_done);
  152. for (i = 0; i < MC13783_NUM_IRQ; i++)
  153. if (mc13783->irq_handler[i].handler)
  154. mc13783->irq_handler[i].handler(i,
  155. mc13783->irq_handler[i].data);
  156. enable_irq(mc13783->irq);
  157. }
  158. static irqreturn_t mc13783_interrupt(int irq, void *dev_id)
  159. {
  160. struct mc13783 *mc13783 = dev_id;
  161. disable_irq_nosync(irq);
  162. schedule_work(&mc13783->work);
  163. return IRQ_HANDLED;
  164. }
  165. /* set adc to ts interrupt mode, which generates touchscreen wakeup interrupt */
  166. static inline void mc13783_adc_set_ts_irq_mode(struct mc13783 *mc13783)
  167. {
  168. unsigned int reg_adc0, reg_adc1;
  169. reg_adc0 = MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
  170. | MC13783_ADC0_TSMOD0;
  171. reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN;
  172. mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
  173. mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
  174. }
  175. int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
  176. unsigned int channel, unsigned int *sample)
  177. {
  178. unsigned int reg_adc0, reg_adc1;
  179. int i;
  180. mutex_lock(&mc13783->adc_conv_lock);
  181. /* set up auto incrementing anyway to make quick read */
  182. reg_adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2;
  183. /* enable the adc, ignore external triggering and set ASC to trigger
  184. * conversion */
  185. reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN
  186. | MC13783_ADC1_ASC;
  187. /* setup channel number */
  188. if (channel > 7)
  189. reg_adc1 |= MC13783_ADC1_ADSEL;
  190. switch (mode) {
  191. case MC13783_ADC_MODE_TS:
  192. /* enables touch screen reference mode and set touchscreen mode
  193. * to position mode */
  194. reg_adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
  195. | MC13783_ADC0_TSMOD0 | MC13783_ADC0_TSMOD1;
  196. reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
  197. break;
  198. case MC13783_ADC_MODE_SINGLE_CHAN:
  199. reg_adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT;
  200. reg_adc1 |= MC13783_ADC1_RAND;
  201. break;
  202. case MC13783_ADC_MODE_MULT_CHAN:
  203. reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
  204. break;
  205. default:
  206. return -EINVAL;
  207. }
  208. mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
  209. mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
  210. wait_for_completion_interruptible(&mc13783->adc_done);
  211. for (i = 0; i < 4; i++)
  212. mc13783_reg_read(mc13783, MC13783_REG_ADC_2, &sample[i]);
  213. if (mc13783->ts_active)
  214. mc13783_adc_set_ts_irq_mode(mc13783);
  215. mutex_unlock(&mc13783->adc_conv_lock);
  216. return 0;
  217. }
  218. EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion);
  219. void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status)
  220. {
  221. mc13783->ts_active = status;
  222. }
  223. EXPORT_SYMBOL_GPL(mc13783_adc_set_ts_status);
  224. static int mc13783_check_revision(struct mc13783 *mc13783)
  225. {
  226. u32 rev_id, rev1, rev2, finid, icid;
  227. mc13783_read(mc13783, MC13783_REG_REVISION, &rev_id);
  228. rev1 = (rev_id & 0x018) >> 3;
  229. rev2 = (rev_id & 0x007);
  230. icid = (rev_id & 0x01C0) >> 6;
  231. finid = (rev_id & 0x01E00) >> 9;
  232. /* Ver 0.2 is actually 3.2a. Report as 3.2 */
  233. if ((rev1 == 0) && (rev2 == 2))
  234. rev1 = 3;
  235. if (rev1 == 0 || icid != 2) {
  236. dev_err(mc13783->dev, "No MC13783 detected.\n");
  237. return -ENODEV;
  238. }
  239. mc13783->revision = ((rev1 * 10) + rev2);
  240. dev_info(mc13783->dev, "MC13783 Rev %d.%d FinVer %x detected\n", rev1,
  241. rev2, finid);
  242. return 0;
  243. }
  244. /*
  245. * Register a client device. This is non-fatal since there is no need to
  246. * fail the entire device init due to a single platform device failing.
  247. */
  248. static void mc13783_client_dev_register(struct mc13783 *mc13783,
  249. const char *name)
  250. {
  251. struct mfd_cell cell = {};
  252. cell.name = name;
  253. mfd_add_devices(mc13783->dev, -1, &cell, 1, NULL, 0);
  254. }
  255. static int __devinit mc13783_probe(struct spi_device *spi)
  256. {
  257. struct mc13783 *mc13783;
  258. struct mc13783_platform_data *pdata = spi->dev.platform_data;
  259. int ret;
  260. mc13783 = kzalloc(sizeof(struct mc13783), GFP_KERNEL);
  261. if (!mc13783)
  262. return -ENOMEM;
  263. dev_set_drvdata(&spi->dev, mc13783);
  264. spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
  265. spi->bits_per_word = 32;
  266. spi_setup(spi);
  267. mc13783->spi_device = spi;
  268. mc13783->dev = &spi->dev;
  269. mc13783->irq = spi->irq;
  270. INIT_WORK(&mc13783->work, mc13783_irq_work);
  271. mutex_init(&mc13783->io_lock);
  272. mutex_init(&mc13783->adc_conv_lock);
  273. init_completion(&mc13783->adc_done);
  274. if (pdata) {
  275. mc13783->flags = pdata->flags;
  276. mc13783->regulators = pdata->regulators;
  277. mc13783->num_regulators = pdata->num_regulators;
  278. }
  279. if (mc13783_check_revision(mc13783)) {
  280. ret = -ENODEV;
  281. goto err_out;
  282. }
  283. /* clear and mask all interrupts */
  284. mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0, 0x00ffffff);
  285. mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_0, 0x00ffffff);
  286. mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_1, 0x00ffffff);
  287. mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_1, 0x00ffffff);
  288. /* unmask adcdone interrupts */
  289. mc13783_set_bits(mc13783, MC13783_REG_INTERRUPT_MASK_0,
  290. MC13783_INT_MASK_ADCDONEM, 0);
  291. ret = request_irq(mc13783->irq, mc13783_interrupt,
  292. IRQF_DISABLED | IRQF_TRIGGER_HIGH, "mc13783",
  293. mc13783);
  294. if (ret)
  295. goto err_out;
  296. if (mc13783->flags & MC13783_USE_CODEC)
  297. mc13783_client_dev_register(mc13783, "mc13783-codec");
  298. if (mc13783->flags & MC13783_USE_ADC)
  299. mc13783_client_dev_register(mc13783, "mc13783-adc");
  300. if (mc13783->flags & MC13783_USE_RTC)
  301. mc13783_client_dev_register(mc13783, "mc13783-rtc");
  302. if (mc13783->flags & MC13783_USE_REGULATOR)
  303. mc13783_client_dev_register(mc13783, "mc13783-regulator");
  304. if (mc13783->flags & MC13783_USE_TOUCHSCREEN)
  305. mc13783_client_dev_register(mc13783, "mc13783-ts");
  306. return 0;
  307. err_out:
  308. kfree(mc13783);
  309. return ret;
  310. }
  311. static int __devexit mc13783_remove(struct spi_device *spi)
  312. {
  313. struct mc13783 *mc13783;
  314. mc13783 = dev_get_drvdata(&spi->dev);
  315. free_irq(mc13783->irq, mc13783);
  316. mfd_remove_devices(&spi->dev);
  317. return 0;
  318. }
  319. static struct spi_driver pmic_driver = {
  320. .driver = {
  321. .name = "mc13783",
  322. .bus = &spi_bus_type,
  323. .owner = THIS_MODULE,
  324. },
  325. .probe = mc13783_probe,
  326. .remove = __devexit_p(mc13783_remove),
  327. };
  328. static int __init pmic_init(void)
  329. {
  330. return spi_register_driver(&pmic_driver);
  331. }
  332. subsys_initcall(pmic_init);
  333. static void __exit pmic_exit(void)
  334. {
  335. spi_unregister_driver(&pmic_driver);
  336. }
  337. module_exit(pmic_exit);
  338. MODULE_DESCRIPTION("Core/Protocol driver for Freescale MC13783 PMIC");
  339. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
  340. MODULE_LICENSE("GPL");