stradis.c 64 KB

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  1. /*
  2. * stradis.c - stradis 4:2:2 mpeg decoder driver
  3. *
  4. * Stradis 4:2:2 MPEG-2 Decoder Driver
  5. * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/fs.h>
  25. #include <linux/kernel.h>
  26. #include <linux/major.h>
  27. #include <linux/slab.h>
  28. #include <linux/smp_lock.h>
  29. #include <linux/mm.h>
  30. #include <linux/init.h>
  31. #include <linux/poll.h>
  32. #include <linux/pci.h>
  33. #include <linux/signal.h>
  34. #include <asm/io.h>
  35. #include <linux/ioport.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/page.h>
  38. #include <linux/sched.h>
  39. #include <asm/types.h>
  40. #include <linux/types.h>
  41. #include <linux/interrupt.h>
  42. #include <asm/uaccess.h>
  43. #include <linux/vmalloc.h>
  44. #include <linux/videodev.h>
  45. #include <media/v4l2-common.h>
  46. #include <media/v4l2-ioctl.h>
  47. #include "saa7146.h"
  48. #include "saa7146reg.h"
  49. #include "ibmmpeg2.h"
  50. #include "saa7121.h"
  51. #include "cs8420.h"
  52. #define DEBUG(x) /* debug driver */
  53. #undef IDEBUG /* debug irq handler */
  54. #undef MDEBUG /* debug memory management */
  55. #define SAA7146_MAX 6
  56. static struct saa7146 saa7146s[SAA7146_MAX];
  57. static int saa_num; /* number of SAA7146s in use */
  58. static int video_nr = -1;
  59. module_param(video_nr, int, 0);
  60. MODULE_LICENSE("GPL");
  61. #define nDebNormal 0x00480000
  62. #define nDebNoInc 0x00480000
  63. #define nDebVideo 0xd0480000
  64. #define nDebAudio 0xd0400000
  65. #define nDebDMA 0x02c80000
  66. #define oDebNormal 0x13c80000
  67. #define oDebNoInc 0x13c80000
  68. #define oDebVideo 0xd1080000
  69. #define oDebAudio 0xd1080000
  70. #define oDebDMA 0x03080000
  71. #define NewCard (saa->boardcfg[3])
  72. #define ChipControl (saa->boardcfg[1])
  73. #define NTSCFirstActive (saa->boardcfg[4])
  74. #define PALFirstActive (saa->boardcfg[5])
  75. #define NTSCLastActive (saa->boardcfg[54])
  76. #define PALLastActive (saa->boardcfg[55])
  77. #define Have2MB (saa->boardcfg[18] & 0x40)
  78. #define HaveCS8420 (saa->boardcfg[18] & 0x04)
  79. #define IBMMPEGCD20 (saa->boardcfg[18] & 0x20)
  80. #define HaveCS3310 (saa->boardcfg[18] & 0x01)
  81. #define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31])
  82. #define HaveCS4341 (saa->boardcfg[40] == 2)
  83. #define SDIType (saa->boardcfg[27])
  84. #define CurrentMode (saa->boardcfg[2])
  85. #define debNormal (NewCard ? nDebNormal : oDebNormal)
  86. #define debNoInc (NewCard ? nDebNoInc : oDebNoInc)
  87. #define debVideo (NewCard ? nDebVideo : oDebVideo)
  88. #define debAudio (NewCard ? nDebAudio : oDebAudio)
  89. #define debDMA (NewCard ? nDebDMA : oDebDMA)
  90. #ifdef USE_RESCUE_EEPROM_SDM275
  91. static unsigned char rescue_eeprom[64] = {
  92. 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63,
  93. 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l',
  94. 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2,
  95. 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a',
  96. 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  97. 0x00, 0x00, 0x00, 0x00,
  98. };
  99. #endif
  100. /* ----------------------------------------------------------------------- */
  101. /* Hardware I2C functions */
  102. static void I2CWipe(struct saa7146 *saa)
  103. {
  104. int i;
  105. /* set i2c to ~=100kHz, abort transfer, clear busy */
  106. saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS);
  107. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  108. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  109. /* wait for i2c registers to be programmed */
  110. for (i = 0; i < 1000 &&
  111. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  112. schedule();
  113. saawrite(0x600, SAA7146_I2C_STATUS);
  114. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  115. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  116. /* wait for i2c registers to be programmed */
  117. for (i = 0; i < 1000 &&
  118. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  119. schedule();
  120. saawrite(0x600, SAA7146_I2C_STATUS);
  121. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  122. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  123. /* wait for i2c registers to be programmed */
  124. for (i = 0; i < 1000 &&
  125. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  126. schedule();
  127. }
  128. /* read I2C */
  129. static int I2CRead(struct saa7146 *saa, unsigned char addr,
  130. unsigned char subaddr, int dosub)
  131. {
  132. int i;
  133. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  134. I2CWipe(saa);
  135. for (i = 0;
  136. i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY);
  137. i++)
  138. schedule();
  139. if (i == 1000)
  140. I2CWipe(saa);
  141. if (dosub)
  142. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) |
  143. ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER);
  144. else
  145. saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) |
  146. 0xf1, SAA7146_I2C_TRANSFER);
  147. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  148. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  149. /* wait for i2c registers to be programmed */
  150. for (i = 0; i < 1000 &&
  151. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  152. schedule();
  153. /* wait for valid data */
  154. for (i = 0; i < 1000 &&
  155. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  156. schedule();
  157. if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR)
  158. return -1;
  159. if (i == 1000)
  160. printk("i2c setup read timeout\n");
  161. saawrite(0x41, SAA7146_I2C_TRANSFER);
  162. saawrite((SAA7146_MC2_UPLD_I2C << 16) |
  163. SAA7146_MC2_UPLD_I2C, SAA7146_MC2);
  164. /* wait for i2c registers to be programmed */
  165. for (i = 0; i < 1000 &&
  166. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++)
  167. schedule();
  168. /* wait for valid data */
  169. for (i = 0; i < 1000 &&
  170. (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++)
  171. schedule();
  172. if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR)
  173. return -1;
  174. if (i == 1000)
  175. printk("i2c read timeout\n");
  176. return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff);
  177. }
  178. /* set both to write both bytes, reset it to write only b1 */
  179. static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1,
  180. unsigned char b2, int both)
  181. {
  182. int i;
  183. u32 data;
  184. if (saaread(SAA7146_I2C_STATUS) & 0x3c)
  185. I2CWipe(saa);
  186. for (i = 0; i < 1000 &&
  187. (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++)
  188. schedule();
  189. if (i == 1000)
  190. I2CWipe(saa);
  191. data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16);
  192. if (both)
  193. data |= ((b2 & 0xff) << 8) | 0xe5;
  194. else
  195. data |= 0xd1;
  196. saawrite(data, SAA7146_I2C_TRANSFER);
  197. saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C,
  198. SAA7146_MC2);
  199. return 0;
  200. }
  201. static void attach_inform(struct saa7146 *saa, int id)
  202. {
  203. int i;
  204. DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr,
  205. id));
  206. if (id == 0xa0) { /* we have rev2 or later board, fill in info */
  207. for (i = 0; i < 64; i++)
  208. saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1);
  209. #ifdef USE_RESCUE_EEPROM_SDM275
  210. if (saa->boardcfg[0] != 0) {
  211. printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE "
  212. "BEEN IGNORED\n", saa->nr);
  213. for (i = 0; i < 64; i++)
  214. saa->boardcfg[i] = rescue_eeprom[i];
  215. }
  216. #endif
  217. printk("stradis%d: config =", saa->nr);
  218. for (i = 0; i < 51; i++) {
  219. printk(" %02x", saa->boardcfg[i]);
  220. }
  221. printk("\n");
  222. }
  223. }
  224. static void I2CBusScan(struct saa7146 *saa)
  225. {
  226. int i;
  227. for (i = 0; i < 0xff; i += 2)
  228. if ((I2CRead(saa, i, 0, 0)) >= 0)
  229. attach_inform(saa, i);
  230. }
  231. static int debiwait_maxwait;
  232. static int wait_for_debi_done(struct saa7146 *saa)
  233. {
  234. int i;
  235. /* wait for registers to be programmed */
  236. for (i = 0; i < 100000 &&
  237. !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++)
  238. saaread(SAA7146_MC2);
  239. /* wait for transfer to complete */
  240. for (i = 0; i < 500000 &&
  241. (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++)
  242. saaread(SAA7146_MC2);
  243. if (i > debiwait_maxwait)
  244. printk("wait-for-debi-done maxwait: %d\n",
  245. debiwait_maxwait = i);
  246. if (i == 500000)
  247. return -1;
  248. return 0;
  249. }
  250. static int debiwrite(struct saa7146 *saa, u32 config, int addr,
  251. u32 val, int count)
  252. {
  253. u32 cmd;
  254. if (count <= 0 || count > 32764)
  255. return -1;
  256. if (wait_for_debi_done(saa) < 0)
  257. return -1;
  258. saawrite(config, SAA7146_DEBI_CONFIG);
  259. if (count <= 4) /* immediate transfer */
  260. saawrite(val, SAA7146_DEBI_AD);
  261. else /* block transfer */
  262. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  263. saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND);
  264. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  265. SAA7146_MC2);
  266. return 0;
  267. }
  268. static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count)
  269. {
  270. u32 result = 0;
  271. if (count > 32764 || count <= 0)
  272. return 0;
  273. if (wait_for_debi_done(saa) < 0)
  274. return 0;
  275. saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD);
  276. saawrite((count << 17) | 0x10000 | (addr & 0xffff),
  277. SAA7146_DEBI_COMMAND);
  278. saawrite(config, SAA7146_DEBI_CONFIG);
  279. saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI,
  280. SAA7146_MC2);
  281. if (count > 4) /* not an immediate transfer */
  282. return count;
  283. wait_for_debi_done(saa);
  284. result = saaread(SAA7146_DEBI_AD);
  285. if (count == 1)
  286. result &= 0xff;
  287. if (count == 2)
  288. result &= 0xffff;
  289. if (count == 3)
  290. result &= 0xffffff;
  291. return result;
  292. }
  293. static void do_irq_send_data(struct saa7146 *saa)
  294. {
  295. int split, audbytes, vidbytes;
  296. saawrite(SAA7146_PSR_PIN1, SAA7146_IER);
  297. /* if special feature mode in effect, disable audio sending */
  298. if (saa->playmode != VID_PLAY_NORMAL)
  299. saa->audtail = saa->audhead = 0;
  300. if (saa->audhead <= saa->audtail)
  301. audbytes = saa->audtail - saa->audhead;
  302. else
  303. audbytes = 65536 - (saa->audhead - saa->audtail);
  304. if (saa->vidhead <= saa->vidtail)
  305. vidbytes = saa->vidtail - saa->vidhead;
  306. else
  307. vidbytes = 524288 - (saa->vidhead - saa->vidtail);
  308. if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) {
  309. saawrite(0, SAA7146_IER);
  310. return;
  311. }
  312. /* if at least 1 block audio waiting and audio fifo isn't full */
  313. if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2)
  314. & 0xff) < 60) {
  315. if (saa->audhead > saa->audtail)
  316. split = 65536 - saa->audhead;
  317. else
  318. split = 0;
  319. audbytes = 2048;
  320. if (split > 0 && split < 2048) {
  321. memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split);
  322. saa->audhead = 0;
  323. audbytes -= split;
  324. } else
  325. split = 0;
  326. memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead,
  327. audbytes);
  328. saa->audhead += audbytes;
  329. saa->audhead &= 0xffff;
  330. debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO :
  331. IBM_MP2_AUD_FIFOW), 0, 2048);
  332. wake_up_interruptible(&saa->audq);
  333. /* if at least 1 block video waiting and video fifo isn't full */
  334. } else if (vidbytes >= 30720 && (debiread(saa, debNormal,
  335. IBM_MP2_FIFO, 2)) < 16384) {
  336. if (saa->vidhead > saa->vidtail)
  337. split = 524288 - saa->vidhead;
  338. else
  339. split = 0;
  340. vidbytes = 30720;
  341. if (split > 0 && split < 30720) {
  342. memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split);
  343. saa->vidhead = 0;
  344. vidbytes -= split;
  345. } else
  346. split = 0;
  347. memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead,
  348. vidbytes);
  349. saa->vidhead += vidbytes;
  350. saa->vidhead &= 0x7ffff;
  351. debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO :
  352. IBM_MP2_FIFOW), 0, 30720);
  353. wake_up_interruptible(&saa->vidq);
  354. }
  355. saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER);
  356. }
  357. static void send_osd_data(struct saa7146 *saa)
  358. {
  359. int size = saa->osdtail - saa->osdhead;
  360. if (size > 30720)
  361. size = 30720;
  362. /* ensure some multiple of 8 bytes is transferred */
  363. size = 8 * ((size + 8) >> 3);
  364. if (size) {
  365. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR,
  366. (saa->osdhead >> 3), 2);
  367. memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size);
  368. saa->osdhead += size;
  369. /* block transfer of next 8 bytes to ~32k bytes */
  370. debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size);
  371. }
  372. if (saa->osdhead >= saa->osdtail) {
  373. saa->osdhead = saa->osdtail = 0;
  374. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  375. }
  376. }
  377. static irqreturn_t saa7146_irq(int irq, void *dev_id)
  378. {
  379. struct saa7146 *saa = dev_id;
  380. u32 stat, astat;
  381. int count;
  382. int handled = 0;
  383. count = 0;
  384. while (1) {
  385. /* get/clear interrupt status bits */
  386. stat = saaread(SAA7146_ISR);
  387. astat = stat & saaread(SAA7146_IER);
  388. if (!astat)
  389. break;
  390. handled = 1;
  391. saawrite(astat, SAA7146_ISR);
  392. if (astat & SAA7146_PSR_DEBI_S) {
  393. do_irq_send_data(saa);
  394. }
  395. if (astat & SAA7146_PSR_PIN1) {
  396. int istat;
  397. /* the following read will trigger DEBI_S */
  398. istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  399. if (istat & 1) {
  400. saawrite(0, SAA7146_IER);
  401. send_osd_data(saa);
  402. saawrite(SAA7146_PSR_DEBI_S |
  403. SAA7146_PSR_PIN1, SAA7146_IER);
  404. }
  405. if (istat & 0x20) { /* Video Start */
  406. saa->vidinfo.frame_count++;
  407. }
  408. if (istat & 0x400) { /* Picture Start */
  409. /* update temporal reference */
  410. }
  411. if (istat & 0x200) { /* Picture Resolution Change */
  412. /* read new resolution */
  413. }
  414. if (istat & 0x100) { /* New User Data found */
  415. /* read new user data */
  416. }
  417. if (istat & 0x1000) { /* new GOP/SMPTE */
  418. /* read new SMPTE */
  419. }
  420. if (istat & 0x8000) { /* Sequence Start Code */
  421. /* reset frame counter, load sizes */
  422. saa->vidinfo.frame_count = 0;
  423. saa->vidinfo.h_size = 704;
  424. saa->vidinfo.v_size = 480;
  425. #if 0
  426. if (saa->endmarkhead != saa->endmarktail) {
  427. saa->audhead =
  428. saa->endmark[saa->endmarkhead];
  429. saa->endmarkhead++;
  430. if (saa->endmarkhead >= MAX_MARKS)
  431. saa->endmarkhead = 0;
  432. }
  433. #endif
  434. }
  435. if (istat & 0x4000) { /* Sequence Error Code */
  436. if (saa->endmarkhead != saa->endmarktail) {
  437. saa->audhead =
  438. saa->endmark[saa->endmarkhead];
  439. saa->endmarkhead++;
  440. if (saa->endmarkhead >= MAX_MARKS)
  441. saa->endmarkhead = 0;
  442. }
  443. }
  444. }
  445. #ifdef IDEBUG
  446. if (astat & SAA7146_PSR_PPEF) {
  447. IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr));
  448. }
  449. if (astat & SAA7146_PSR_PABO) {
  450. IDEBUG(printk("stradis%d irq: PABO\n", saa->nr));
  451. }
  452. if (astat & SAA7146_PSR_PPED) {
  453. IDEBUG(printk("stradis%d irq: PPED\n", saa->nr));
  454. }
  455. if (astat & SAA7146_PSR_RPS_I1) {
  456. IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr));
  457. }
  458. if (astat & SAA7146_PSR_RPS_I0) {
  459. IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr));
  460. }
  461. if (astat & SAA7146_PSR_RPS_LATE1) {
  462. IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr));
  463. }
  464. if (astat & SAA7146_PSR_RPS_LATE0) {
  465. IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr));
  466. }
  467. if (astat & SAA7146_PSR_RPS_E1) {
  468. IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr));
  469. }
  470. if (astat & SAA7146_PSR_RPS_E0) {
  471. IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr));
  472. }
  473. if (astat & SAA7146_PSR_RPS_TO1) {
  474. IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr));
  475. }
  476. if (astat & SAA7146_PSR_RPS_TO0) {
  477. IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr));
  478. }
  479. if (astat & SAA7146_PSR_UPLD) {
  480. IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr));
  481. }
  482. if (astat & SAA7146_PSR_DEBI_E) {
  483. IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr));
  484. }
  485. if (astat & SAA7146_PSR_I2C_S) {
  486. IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr));
  487. }
  488. if (astat & SAA7146_PSR_I2C_E) {
  489. IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr));
  490. }
  491. if (astat & SAA7146_PSR_A2_IN) {
  492. IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr));
  493. }
  494. if (astat & SAA7146_PSR_A2_OUT) {
  495. IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr));
  496. }
  497. if (astat & SAA7146_PSR_A1_IN) {
  498. IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr));
  499. }
  500. if (astat & SAA7146_PSR_A1_OUT) {
  501. IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr));
  502. }
  503. if (astat & SAA7146_PSR_AFOU) {
  504. IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr));
  505. }
  506. if (astat & SAA7146_PSR_V_PE) {
  507. IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr));
  508. }
  509. if (astat & SAA7146_PSR_VFOU) {
  510. IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr));
  511. }
  512. if (astat & SAA7146_PSR_FIDA) {
  513. IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr));
  514. }
  515. if (astat & SAA7146_PSR_FIDB) {
  516. IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr));
  517. }
  518. if (astat & SAA7146_PSR_PIN3) {
  519. IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr));
  520. }
  521. if (astat & SAA7146_PSR_PIN2) {
  522. IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr));
  523. }
  524. if (astat & SAA7146_PSR_PIN0) {
  525. IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr));
  526. }
  527. if (astat & SAA7146_PSR_ECS) {
  528. IDEBUG(printk("stradis%d irq: ECS\n", saa->nr));
  529. }
  530. if (astat & SAA7146_PSR_EC3S) {
  531. IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr));
  532. }
  533. if (astat & SAA7146_PSR_EC0S) {
  534. IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr));
  535. }
  536. #endif
  537. count++;
  538. if (count > 15)
  539. printk(KERN_WARNING "stradis%d: irq loop %d\n",
  540. saa->nr, count);
  541. if (count > 20) {
  542. saawrite(0, SAA7146_IER);
  543. printk(KERN_ERR
  544. "stradis%d: IRQ loop cleared\n", saa->nr);
  545. }
  546. }
  547. return IRQ_RETVAL(handled);
  548. }
  549. static int ibm_send_command(struct saa7146 *saa,
  550. int command, int data, int chain)
  551. {
  552. int i;
  553. if (chain)
  554. debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2);
  555. else
  556. debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2);
  557. debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2);
  558. debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2);
  559. for (i = 0; i < 100 &&
  560. (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++)
  561. schedule();
  562. if (i == 100)
  563. return -1;
  564. return 0;
  565. }
  566. static void cs4341_setlevel(struct saa7146 *saa, int left, int right)
  567. {
  568. I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2);
  569. I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2);
  570. }
  571. static void initialize_cs4341(struct saa7146 *saa)
  572. {
  573. int i;
  574. for (i = 0; i < 200; i++) {
  575. /* auto mute off, power on, no de-emphasis */
  576. /* I2S data up to 24-bit 64xFs internal SCLK */
  577. I2CWrite(saa, 0x22, 0x01, 0x11, 2);
  578. /* ATAPI mixer settings */
  579. I2CWrite(saa, 0x22, 0x02, 0x49, 2);
  580. /* attenuation left 3db */
  581. I2CWrite(saa, 0x22, 0x03, 0x00, 2);
  582. /* attenuation right 3db */
  583. I2CWrite(saa, 0x22, 0x04, 0x00, 2);
  584. I2CWrite(saa, 0x22, 0x01, 0x10, 2);
  585. if (I2CRead(saa, 0x22, 0x02, 1) == 0x49)
  586. break;
  587. schedule();
  588. }
  589. printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i);
  590. return;
  591. }
  592. static void initialize_cs8420(struct saa7146 *saa, int pro)
  593. {
  594. int i;
  595. u8 *sequence;
  596. if (pro)
  597. sequence = mode8420pro;
  598. else
  599. sequence = mode8420con;
  600. for (i = 0; i < INIT8420LEN; i++)
  601. I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2);
  602. for (i = 0; i < MODE8420LEN; i++)
  603. I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2);
  604. printk("stradis%d: CS8420 initialized\n", saa->nr);
  605. }
  606. static void initialize_saa7121(struct saa7146 *saa, int dopal)
  607. {
  608. int i, mod;
  609. u8 *sequence;
  610. if (dopal)
  611. sequence = init7121pal;
  612. else
  613. sequence = init7121ntsc;
  614. mod = saaread(SAA7146_PSR) & 0x08;
  615. /* initialize PAL/NTSC video encoder */
  616. for (i = 0; i < INIT7121LEN; i++) {
  617. if (NewCard) { /* handle new card encoder differences */
  618. if (sequence[i * 2] == 0x3a)
  619. I2CWrite(saa, 0x88, 0x3a, 0x13, 2);
  620. else if (sequence[i * 2] == 0x6b)
  621. I2CWrite(saa, 0x88, 0x6b, 0x20, 2);
  622. else if (sequence[i * 2] == 0x6c)
  623. I2CWrite(saa, 0x88, 0x6c,
  624. dopal ? 0x09 : 0xf5, 2);
  625. else if (sequence[i * 2] == 0x6d)
  626. I2CWrite(saa, 0x88, 0x6d,
  627. dopal ? 0x20 : 0x00, 2);
  628. else if (sequence[i * 2] == 0x7a)
  629. I2CWrite(saa, 0x88, 0x7a,
  630. dopal ? (PALFirstActive - 1) :
  631. (NTSCFirstActive - 4), 2);
  632. else if (sequence[i * 2] == 0x7b)
  633. I2CWrite(saa, 0x88, 0x7b,
  634. dopal ? PALLastActive :
  635. NTSCLastActive, 2);
  636. else
  637. I2CWrite(saa, 0x88, sequence[i * 2],
  638. sequence[i * 2 + 1], 2);
  639. } else {
  640. if (sequence[i * 2] == 0x6b && mod)
  641. I2CWrite(saa, 0x88, 0x6b,
  642. (sequence[i * 2 + 1] ^ 0x09), 2);
  643. else if (sequence[i * 2] == 0x7a)
  644. I2CWrite(saa, 0x88, 0x7a,
  645. dopal ? (PALFirstActive - 1) :
  646. (NTSCFirstActive - 4), 2);
  647. else if (sequence[i * 2] == 0x7b)
  648. I2CWrite(saa, 0x88, 0x7b,
  649. dopal ? PALLastActive :
  650. NTSCLastActive, 2);
  651. else
  652. I2CWrite(saa, 0x88, sequence[i * 2],
  653. sequence[i * 2 + 1], 2);
  654. }
  655. }
  656. }
  657. static void set_genlock_offset(struct saa7146 *saa, int noffset)
  658. {
  659. int nCode;
  660. int PixelsPerLine = 858;
  661. if (CurrentMode == VIDEO_MODE_PAL)
  662. PixelsPerLine = 864;
  663. if (noffset > 500)
  664. noffset = 500;
  665. else if (noffset < -500)
  666. noffset = -500;
  667. nCode = noffset + 0x100;
  668. if (nCode == 1)
  669. nCode = 0x401;
  670. else if (nCode < 1)
  671. nCode = 0x400 + PixelsPerLine + nCode;
  672. debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2);
  673. }
  674. static void set_out_format(struct saa7146 *saa, int mode)
  675. {
  676. initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1));
  677. saa->boardcfg[2] = mode;
  678. /* do not adjust analog video parameters here, use saa7121 init */
  679. /* you will affect the SDI output on the new card */
  680. if (mode == VIDEO_MODE_PAL) { /* PAL */
  681. debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2);
  682. mdelay(50);
  683. saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1);
  684. if (NewCard) {
  685. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2);
  686. mdelay(50);
  687. }
  688. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  689. NewCard ? 0xe500 : 0x6500, 2);
  690. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  691. (1 << 8) |
  692. (NewCard ? PALFirstActive : PALFirstActive - 6), 2);
  693. } else { /* NTSC */
  694. debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2);
  695. mdelay(50);
  696. saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1);
  697. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  698. NewCard ? 0xe100 : 0x6100, 2);
  699. debiwrite(saa, debNormal, IBM_MP2_DISP_DLY,
  700. (1 << 8) |
  701. (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2);
  702. }
  703. }
  704. /* Intialize bitmangler to map from a byte value to the mangled word that
  705. * must be output to program the Xilinx part through the DEBI port.
  706. * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0
  707. * transfer FPGA code, init IBM chip, transfer IBM microcode
  708. * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0
  709. */
  710. static u16 bitmangler[256];
  711. static int initialize_fpga(struct video_code *bitdata)
  712. {
  713. int i, num, startindex, failure = 0, loadtwo, loadfile = 0;
  714. u16 *dmabuf;
  715. u8 *newdma;
  716. struct saa7146 *saa;
  717. /* verify fpga code */
  718. for (startindex = 0; startindex < bitdata->datasize; startindex++)
  719. if (bitdata->data[startindex] == 255)
  720. break;
  721. if (startindex == bitdata->datasize) {
  722. printk(KERN_INFO "stradis: bad fpga code\n");
  723. return -1;
  724. }
  725. /* initialize all detected cards */
  726. for (num = 0; num < saa_num; num++) {
  727. saa = &saa7146s[num];
  728. if (saa->boardcfg[0] > 20)
  729. continue; /* card was programmed */
  730. loadtwo = (saa->boardcfg[18] & 0x10);
  731. if (!NewCard) /* we have an old board */
  732. for (i = 0; i < 256; i++)
  733. bitmangler[i] = ((i & 0x01) << 15) |
  734. ((i & 0x02) << 6) | ((i & 0x04) << 4) |
  735. ((i & 0x08) << 9) | ((i & 0x10) << 7) |
  736. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  737. ((i & 0x80) >> 7);
  738. else /* else we have a new board */
  739. for (i = 0; i < 256; i++)
  740. bitmangler[i] = ((i & 0x01) << 7) |
  741. ((i & 0x02) << 5) | ((i & 0x04) << 3) |
  742. ((i & 0x08) << 1) | ((i & 0x10) >> 1) |
  743. ((i & 0x20) >> 3) | ((i & 0x40) >> 5) |
  744. ((i & 0x80) >> 7);
  745. dmabuf = (u16 *) saa->dmadebi;
  746. newdma = (u8 *) saa->dmadebi;
  747. if (NewCard) { /* SDM2xxx */
  748. if (!strncmp(bitdata->loadwhat, "decoder2", 8))
  749. continue; /* fpga not for this card */
  750. if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8))
  751. loadfile = 1;
  752. else if (loadtwo && !strncmp(&saa->boardcfg[19],
  753. bitdata->loadwhat, 8))
  754. loadfile = 2;
  755. else if (!saa->boardcfg[42] && !strncmp("decxl",
  756. bitdata->loadwhat, 8))
  757. loadfile = 1; /* special */
  758. else
  759. continue; /* fpga not for this card */
  760. if (loadfile != 1 && loadfile != 2)
  761. continue; /* skip to next card */
  762. if (saa->boardcfg[0] && loadfile == 1)
  763. continue; /* skip to next card */
  764. if (saa->boardcfg[0] != 1 && loadfile == 2)
  765. continue; /* skip to next card */
  766. saa->boardcfg[0]++; /* mark fpga handled */
  767. printk("stradis%d: loading %s\n", saa->nr,
  768. bitdata->loadwhat);
  769. if (loadtwo && loadfile == 2)
  770. goto send_fpga_stuff;
  771. /* turn on the Audio interface to set PROG low */
  772. saawrite(0x00400040, SAA7146_GPIO_CTRL);
  773. saaread(SAA7146_PSR); /* ensure posted write */
  774. /* wait for everyone to reset */
  775. mdelay(10);
  776. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  777. } else { /* original card */
  778. if (strncmp(bitdata->loadwhat, "decoder2", 8))
  779. continue; /* fpga not for this card */
  780. /* Pull the Xilinx PROG signal WS3 low */
  781. saawrite(0x02000200, SAA7146_MC1);
  782. /* Turn on the Audio interface so can set PROG low */
  783. saawrite(0x000000c0, SAA7146_ACON1);
  784. /* Pull the Xilinx INIT signal (GPIO2) low */
  785. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  786. /* Make sure everybody resets */
  787. saaread(SAA7146_PSR); /* ensure posted write */
  788. mdelay(10);
  789. /* Release the Xilinx PROG signal */
  790. saawrite(0x00000000, SAA7146_ACON1);
  791. /* Turn off the Audio interface */
  792. saawrite(0x02000000, SAA7146_MC1);
  793. }
  794. /* Release Xilinx INIT signal (WS2) */
  795. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  796. /* Wait for the INIT to go High */
  797. for (i = 0;
  798. i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  799. i++)
  800. schedule();
  801. if (i == 1000) {
  802. printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr);
  803. return -1;
  804. }
  805. send_fpga_stuff:
  806. if (NewCard) {
  807. for (i = startindex; i < bitdata->datasize; i++)
  808. newdma[i - startindex] =
  809. bitmangler[bitdata->data[i]];
  810. debiwrite(saa, 0x01420000, 0, 0,
  811. ((bitdata->datasize - startindex) + 5));
  812. if (loadtwo && loadfile == 1) {
  813. printk("stradis%d: awaiting 2nd FPGA bitfile\n",
  814. saa->nr);
  815. continue; /* skip to next card */
  816. }
  817. } else {
  818. for (i = startindex; i < bitdata->datasize; i++)
  819. dmabuf[i - startindex] =
  820. bitmangler[bitdata->data[i]];
  821. debiwrite(saa, 0x014a0000, 0, 0,
  822. ((bitdata->datasize - startindex) + 5) * 2);
  823. }
  824. for (i = 0;
  825. i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2);
  826. i++)
  827. schedule();
  828. if (i == 1000) {
  829. printk(KERN_INFO "stradis%d: FPGA load failed\n",
  830. saa->nr);
  831. failure++;
  832. continue;
  833. }
  834. if (!NewCard) {
  835. /* Pull the Xilinx INIT signal (GPIO2) low */
  836. saawrite(0x00400000, SAA7146_GPIO_CTRL);
  837. saaread(SAA7146_PSR); /* ensure posted write */
  838. mdelay(2);
  839. saawrite(0x00000000, SAA7146_GPIO_CTRL);
  840. mdelay(2);
  841. }
  842. printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr);
  843. saa->boardcfg[0] = 26; /* mark fpga programmed */
  844. /* set VXCO to its lowest frequency */
  845. debiwrite(saa, debNormal, XILINX_PWM, 0, 2);
  846. if (NewCard) {
  847. /* mute CS3310 */
  848. if (HaveCS3310)
  849. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  850. 0, 2);
  851. /* set VXCO to PWM mode, release reset, blank on */
  852. debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2);
  853. mdelay(10);
  854. /* unmute CS3310 */
  855. if (HaveCS3310)
  856. debiwrite(saa, debNormal, XILINX_CTL0,
  857. 0x2020, 2);
  858. }
  859. /* set source Black */
  860. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  861. saa->boardcfg[4] = 22; /* set NTSC First Active Line */
  862. saa->boardcfg[5] = 23; /* set PAL First Active Line */
  863. saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */
  864. saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */
  865. set_out_format(saa, VIDEO_MODE_NTSC);
  866. mdelay(50);
  867. /* begin IBM chip init */
  868. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  869. saaread(SAA7146_PSR); /* wait for reset */
  870. mdelay(5);
  871. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  872. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  873. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2);
  874. debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2);
  875. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  876. if (NewCard) {
  877. mdelay(5);
  878. /* set i2s rate converter to 48KHz */
  879. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  880. /* we must init CS8420 first since rev b pulls i2s */
  881. /* master clock low and CS4341 needs i2s master to */
  882. /* run the i2c port. */
  883. if (HaveCS8420)
  884. /* 0=consumer, 1=pro */
  885. initialize_cs8420(saa, 0);
  886. mdelay(5);
  887. if (HaveCS4341)
  888. initialize_cs4341(saa);
  889. }
  890. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  891. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  892. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  893. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  894. if (NewCard)
  895. set_genlock_offset(saa, 0);
  896. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  897. #if 0
  898. /* enable genlock */
  899. debiwrite(saa, debNormal, XILINX_CTL0, 0x8000, 2);
  900. #else
  901. /* disable genlock */
  902. debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2);
  903. #endif
  904. }
  905. return failure;
  906. }
  907. static int do_ibm_reset(struct saa7146 *saa)
  908. {
  909. /* failure if decoder not previously programmed */
  910. if (saa->boardcfg[0] < 37)
  911. return -EIO;
  912. /* mute CS3310 */
  913. if (HaveCS3310)
  914. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2);
  915. /* disable interrupts */
  916. saawrite(0, SAA7146_IER);
  917. saa->audhead = saa->audtail = 0;
  918. saa->vidhead = saa->vidtail = 0;
  919. /* tristate debi bus, disable debi transfers */
  920. saawrite(0x00880000, SAA7146_MC1);
  921. /* ensure posted write */
  922. saaread(SAA7146_MC1);
  923. mdelay(50);
  924. /* re-enable debi transfers */
  925. saawrite(0x00880088, SAA7146_MC1);
  926. /* set source Black */
  927. debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2);
  928. /* begin IBM chip init */
  929. set_out_format(saa, CurrentMode);
  930. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2);
  931. saaread(SAA7146_PSR); /* wait for reset */
  932. mdelay(5);
  933. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2);
  934. debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2);
  935. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  936. debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2);
  937. if (NewCard) {
  938. mdelay(5);
  939. /* set i2s rate converter to 48KHz */
  940. debiwrite(saa, debNormal, 0x80c0, 6, 2);
  941. /* we must init CS8420 first since rev b pulls i2s */
  942. /* master clock low and CS4341 needs i2s master to */
  943. /* run the i2c port. */
  944. if (HaveCS8420)
  945. /* 0=consumer, 1=pro */
  946. initialize_cs8420(saa, 1);
  947. mdelay(5);
  948. if (HaveCS4341)
  949. initialize_cs4341(saa);
  950. }
  951. debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2);
  952. debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2);
  953. debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2);
  954. debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2);
  955. if (NewCard)
  956. set_genlock_offset(saa, 0);
  957. debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2);
  958. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  959. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  960. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  961. (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) {
  962. printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr);
  963. }
  964. if (HaveCS3310) {
  965. int i = CS3310MaxLvl;
  966. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2);
  967. }
  968. /* start video decoder */
  969. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  970. /* 256k vid, 3520 bytes aud */
  971. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2);
  972. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  973. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  974. /* enable buffer threshold irq */
  975. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  976. /* clear pending interrupts */
  977. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  978. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  979. return 0;
  980. }
  981. /* load the decoder microcode */
  982. static int initialize_ibmmpeg2(struct video_code *microcode)
  983. {
  984. int i, num;
  985. struct saa7146 *saa;
  986. for (num = 0; num < saa_num; num++) {
  987. saa = &saa7146s[num];
  988. /* check that FPGA is loaded */
  989. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2);
  990. i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2);
  991. if (i != 0xa55a) {
  992. printk(KERN_INFO "stradis%d: %04x != 0xa55a\n",
  993. saa->nr, i);
  994. #if 0
  995. return -1;
  996. #endif
  997. }
  998. if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) {
  999. if (saa->boardcfg[0] > 27)
  1000. continue; /* skip to next card */
  1001. /* load video control store */
  1002. saa->boardcfg[1] = 0x13; /* no-sync default */
  1003. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1004. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1005. for (i = 0; i < microcode->datasize / 2; i++)
  1006. debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA,
  1007. (microcode->data[i * 2] << 8) |
  1008. microcode->data[i * 2 + 1], 2);
  1009. debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2);
  1010. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1011. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1012. ChipControl, 2);
  1013. saa->boardcfg[0] = 28;
  1014. }
  1015. if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) {
  1016. if (saa->boardcfg[0] > 35)
  1017. continue; /* skip to next card */
  1018. /* load audio control store */
  1019. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2);
  1020. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1021. for (i = 0; i < microcode->datasize; i++)
  1022. debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA,
  1023. microcode->data[i], 1);
  1024. debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2);
  1025. debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2);
  1026. debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2);
  1027. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2);
  1028. if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER,
  1029. 0xe000, 1)) {
  1030. printk(KERN_ERR "stradis%d: IBM config "
  1031. "failed\n", saa->nr);
  1032. return -1;
  1033. }
  1034. /* set PWM to center value */
  1035. if (NewCard) {
  1036. debiwrite(saa, debNormal, XILINX_PWM,
  1037. saa->boardcfg[14] +
  1038. (saa->boardcfg[13] << 8), 2);
  1039. } else
  1040. debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2);
  1041. if (HaveCS3310) {
  1042. i = CS3310MaxLvl;
  1043. debiwrite(saa, debNormal, XILINX_CS3310_CMPLT,
  1044. (i << 8) | i, 2);
  1045. }
  1046. printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n",
  1047. saa->nr, 18 + (debiread(saa, debNormal,
  1048. IBM_MP2_CHIP_CONTROL, 2) >> 12));
  1049. /* start video decoder */
  1050. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1051. ChipControl, 2);
  1052. debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037,
  1053. 2); /* 256k vid, 3520 bytes aud */
  1054. debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2);
  1055. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1056. /* enable buffer threshold irq */
  1057. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2);
  1058. debiread(saa, debNormal, IBM_MP2_HOST_INT, 2);
  1059. /* enable gpio irq */
  1060. saawrite(0x00002000, SAA7146_GPIO_CTRL);
  1061. /* enable decoder output to HPS */
  1062. debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2);
  1063. saa->boardcfg[0] = 37;
  1064. }
  1065. }
  1066. return 0;
  1067. }
  1068. static u32 palette2fmt[] = { /* some of these YUV translations are wrong */
  1069. 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000,
  1070. 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000,
  1071. 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000
  1072. };
  1073. static int bpp2fmt[4] = {
  1074. VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24,
  1075. VIDEO_PALETTE_RGB32
  1076. };
  1077. /* I wish I could find a formula to calculate these... */
  1078. static u32 h_prescale[64] = {
  1079. 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808,
  1080. 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460,
  1081. 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f,
  1082. 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000,
  1083. 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000,
  1084. 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000,
  1085. 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000,
  1086. 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000,
  1087. 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000,
  1088. 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000,
  1089. 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000,
  1090. };
  1091. static u32 v_gain[64] = {
  1092. 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff,
  1093. 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff,
  1094. 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1095. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1096. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1097. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1098. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1099. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1100. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1101. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1102. 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff,
  1103. };
  1104. static void saa7146_set_winsize(struct saa7146 *saa)
  1105. {
  1106. u32 format;
  1107. int offset, yacl, ysci;
  1108. saa->win.color_fmt = format =
  1109. (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] :
  1110. palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]];
  1111. offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl;
  1112. saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1);
  1113. saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1);
  1114. saawrite(saa->win.bpl * 2, SAA7146_PITCH1);
  1115. saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight,
  1116. SAA7146_PROT_ADDR1);
  1117. saawrite(0, SAA7146_PAGE1);
  1118. saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL);
  1119. offset = (704 / (saa->win.width - 1)) & 0x3f;
  1120. saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE);
  1121. offset = (720896 / saa->win.width) / (offset + 1);
  1122. saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE);
  1123. if (CurrentMode == VIDEO_MODE_NTSC) {
  1124. yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0;
  1125. ysci = 1024 - (saa->win.height * 1024 / 480);
  1126. } else {
  1127. yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0;
  1128. ysci = 1024 - (saa->win.height * 1024 / 576);
  1129. }
  1130. saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE);
  1131. saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN);
  1132. saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V |
  1133. SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 |
  1134. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2);
  1135. }
  1136. /* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area
  1137. * bitmap is fixed width, 128 bytes (1024 pixels represented)
  1138. * arranged most-sigificant-bit-left in 32-bit words
  1139. * based on saa7146 clipping hardware, it swaps bytes if LE
  1140. * much of this makes up for egcs brain damage -- so if you
  1141. * are wondering "why did he do this?" it is because the C
  1142. * was adjusted to generate the optimal asm output without
  1143. * writing non-portable __asm__ directives.
  1144. */
  1145. static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h)
  1146. {
  1147. register int startword, endword;
  1148. register u32 bitsleft, bitsright;
  1149. u32 *temp;
  1150. if (x < 0) {
  1151. w += x;
  1152. x = 0;
  1153. }
  1154. if (y < 0) {
  1155. h += y;
  1156. y = 0;
  1157. }
  1158. if (w <= 0 || h <= 0 || x > 1023 || y > 639)
  1159. return; /* throw away bad clips */
  1160. if (x + w > 1024)
  1161. w = 1024 - x;
  1162. if (y + h > 640)
  1163. h = 640 - y;
  1164. startword = (x >> 5);
  1165. endword = ((x + w) >> 5);
  1166. bitsleft = (0xffffffff >> (x & 31));
  1167. bitsright = (0xffffffff << (~((x + w) - (endword << 5))));
  1168. temp = &clipmap[(y << 5) + startword];
  1169. w = endword - startword;
  1170. if (!w) {
  1171. bitsleft |= bitsright;
  1172. for (y = 0; y < h; y++) {
  1173. *temp |= bitsleft;
  1174. temp += 32;
  1175. }
  1176. } else {
  1177. for (y = 0; y < h; y++) {
  1178. *temp++ |= bitsleft;
  1179. for (x = 1; x < w; x++)
  1180. *temp++ = 0xffffffff;
  1181. *temp |= bitsright;
  1182. temp += (32 - w);
  1183. }
  1184. }
  1185. }
  1186. static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr)
  1187. {
  1188. int i, width, height;
  1189. u32 *clipmap;
  1190. clipmap = saa->dmavid2;
  1191. if ((width = saa->win.width) > 1023)
  1192. width = 1023; /* sanity check */
  1193. if ((height = saa->win.height) > 640)
  1194. height = 639; /* sanity check */
  1195. if (ncr > 0) { /* rectangles pased */
  1196. /* convert rectangular clips to a bitmap */
  1197. memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */
  1198. for (i = 0; i < ncr; i++)
  1199. clip_draw_rectangle(clipmap, cr[i].x, cr[i].y,
  1200. cr[i].width, cr[i].height);
  1201. }
  1202. /* clip against viewing window AND screen
  1203. so we do not have to rely on the user program
  1204. */
  1205. clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ?
  1206. (saa->win.swidth - saa->win.x) : width, 0, 1024, 768);
  1207. clip_draw_rectangle(clipmap, 0,
  1208. (saa->win.y + height > saa->win.sheight) ?
  1209. (saa->win.sheight - saa->win.y) : height, 1024, 768);
  1210. if (saa->win.x < 0)
  1211. clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768);
  1212. if (saa->win.y < 0)
  1213. clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y);
  1214. }
  1215. static long saa_ioctl(struct file *file,
  1216. unsigned int cmd, unsigned long argl)
  1217. {
  1218. struct saa7146 *saa = file->private_data;
  1219. void __user *arg = (void __user *)argl;
  1220. switch (cmd) {
  1221. case VIDIOCGCAP:
  1222. {
  1223. struct video_capability b;
  1224. strcpy(b.name, saa->video_dev.name);
  1225. b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY |
  1226. VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM |
  1227. VID_TYPE_SCALES;
  1228. b.channels = 1;
  1229. b.audios = 1;
  1230. b.maxwidth = 768;
  1231. b.maxheight = 576;
  1232. b.minwidth = 32;
  1233. b.minheight = 32;
  1234. if (copy_to_user(arg, &b, sizeof(b)))
  1235. return -EFAULT;
  1236. return 0;
  1237. }
  1238. case VIDIOCGPICT:
  1239. {
  1240. struct video_picture p = saa->picture;
  1241. if (saa->win.depth == 8)
  1242. p.palette = VIDEO_PALETTE_HI240;
  1243. if (saa->win.depth == 15)
  1244. p.palette = VIDEO_PALETTE_RGB555;
  1245. if (saa->win.depth == 16)
  1246. p.palette = VIDEO_PALETTE_RGB565;
  1247. if (saa->win.depth == 24)
  1248. p.palette = VIDEO_PALETTE_RGB24;
  1249. if (saa->win.depth == 32)
  1250. p.palette = VIDEO_PALETTE_RGB32;
  1251. if (copy_to_user(arg, &p, sizeof(p)))
  1252. return -EFAULT;
  1253. return 0;
  1254. }
  1255. case VIDIOCSPICT:
  1256. {
  1257. struct video_picture p;
  1258. u32 format;
  1259. if (copy_from_user(&p, arg, sizeof(p)))
  1260. return -EFAULT;
  1261. if (p.palette < ARRAY_SIZE(palette2fmt)) {
  1262. format = palette2fmt[p.palette];
  1263. saa->win.color_fmt = format;
  1264. saawrite(format | 0x60,
  1265. SAA7146_CLIP_FORMAT_CTRL);
  1266. }
  1267. saawrite(((p.brightness & 0xff00) << 16) |
  1268. ((p.contrast & 0xfe00) << 7) |
  1269. ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL);
  1270. saa->picture = p;
  1271. /* upload changed registers */
  1272. saawrite(((SAA7146_MC2_UPLD_HPS_H |
  1273. SAA7146_MC2_UPLD_HPS_V) << 16) |
  1274. SAA7146_MC2_UPLD_HPS_H |
  1275. SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2);
  1276. return 0;
  1277. }
  1278. case VIDIOCSWIN:
  1279. {
  1280. struct video_window vw;
  1281. struct video_clip *vcp = NULL;
  1282. if (copy_from_user(&vw, arg, sizeof(vw)))
  1283. return -EFAULT;
  1284. /* stop capture */
  1285. if (vw.flags || vw.width < 16 || vw.height < 16) {
  1286. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1287. SAA7146_MC1);
  1288. return -EINVAL;
  1289. }
  1290. /* 32-bit align start and adjust width */
  1291. if (saa->win.bpp < 4) {
  1292. int i = vw.x;
  1293. vw.x = (vw.x + 3) & ~3;
  1294. i = vw.x - i;
  1295. vw.width -= i;
  1296. }
  1297. saa->win.x = vw.x;
  1298. saa->win.y = vw.y;
  1299. saa->win.width = vw.width;
  1300. if (saa->win.width > 768)
  1301. saa->win.width = 768;
  1302. saa->win.height = vw.height;
  1303. if (CurrentMode == VIDEO_MODE_NTSC) {
  1304. if (saa->win.height > 480)
  1305. saa->win.height = 480;
  1306. } else {
  1307. if (saa->win.height > 576)
  1308. saa->win.height = 576;
  1309. }
  1310. /* stop capture */
  1311. saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1);
  1312. saa7146_set_winsize(saa);
  1313. /*
  1314. * Do any clips.
  1315. */
  1316. if (vw.clipcount < 0) {
  1317. if (copy_from_user(saa->dmavid2, vw.clips,
  1318. VIDEO_CLIPMAP_SIZE))
  1319. return -EFAULT;
  1320. } else if (vw.clipcount > 16384) {
  1321. return -EINVAL;
  1322. } else if (vw.clipcount > 0) {
  1323. vcp = vmalloc(sizeof(struct video_clip) *
  1324. vw.clipcount);
  1325. if (vcp == NULL)
  1326. return -ENOMEM;
  1327. if (copy_from_user(vcp, vw.clips,
  1328. sizeof(struct video_clip) *
  1329. vw.clipcount)) {
  1330. vfree(vcp);
  1331. return -EFAULT;
  1332. }
  1333. } else /* nothing clipped */
  1334. memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE);
  1335. make_clip_tab(saa, vcp, vw.clipcount);
  1336. if (vw.clipcount > 0)
  1337. vfree(vcp);
  1338. /* start capture & clip dma if we have an address */
  1339. if ((saa->cap & 3) && saa->win.vidadr != 0)
  1340. saawrite(((SAA7146_MC1_TR_E_1 |
  1341. SAA7146_MC1_TR_E_2) << 16) | 0xffff,
  1342. SAA7146_MC1);
  1343. return 0;
  1344. }
  1345. case VIDIOCGWIN:
  1346. {
  1347. struct video_window vw;
  1348. vw.x = saa->win.x;
  1349. vw.y = saa->win.y;
  1350. vw.width = saa->win.width;
  1351. vw.height = saa->win.height;
  1352. vw.chromakey = 0;
  1353. vw.flags = 0;
  1354. if (copy_to_user(arg, &vw, sizeof(vw)))
  1355. return -EFAULT;
  1356. return 0;
  1357. }
  1358. case VIDIOCCAPTURE:
  1359. {
  1360. int v;
  1361. if (copy_from_user(&v, arg, sizeof(v)))
  1362. return -EFAULT;
  1363. if (v == 0) {
  1364. saa->cap &= ~1;
  1365. saawrite((SAA7146_MC1_TR_E_1 << 16),
  1366. SAA7146_MC1);
  1367. } else {
  1368. if (saa->win.vidadr == 0 || saa->win.width == 0
  1369. || saa->win.height == 0)
  1370. return -EINVAL;
  1371. saa->cap |= 1;
  1372. saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff,
  1373. SAA7146_MC1);
  1374. }
  1375. return 0;
  1376. }
  1377. case VIDIOCGFBUF:
  1378. {
  1379. struct video_buffer v;
  1380. v.base = (void *)saa->win.vidadr;
  1381. v.height = saa->win.sheight;
  1382. v.width = saa->win.swidth;
  1383. v.depth = saa->win.depth;
  1384. v.bytesperline = saa->win.bpl;
  1385. if (copy_to_user(arg, &v, sizeof(v)))
  1386. return -EFAULT;
  1387. return 0;
  1388. }
  1389. case VIDIOCSFBUF:
  1390. {
  1391. struct video_buffer v;
  1392. if (!capable(CAP_SYS_ADMIN))
  1393. return -EPERM;
  1394. if (copy_from_user(&v, arg, sizeof(v)))
  1395. return -EFAULT;
  1396. if (v.depth != 8 && v.depth != 15 && v.depth != 16 &&
  1397. v.depth != 24 && v.depth != 32 && v.width > 16 &&
  1398. v.height > 16 && v.bytesperline > 16)
  1399. return -EINVAL;
  1400. if (v.base)
  1401. saa->win.vidadr = (unsigned long)v.base;
  1402. saa->win.sheight = v.height;
  1403. saa->win.swidth = v.width;
  1404. saa->win.bpp = ((v.depth + 7) & 0x38) / 8;
  1405. saa->win.depth = v.depth;
  1406. saa->win.bpl = v.bytesperline;
  1407. DEBUG(printk("Display at %p is %d by %d, bytedepth %d, "
  1408. "bpl %d\n", v.base, v.width, v.height,
  1409. saa->win.bpp, saa->win.bpl));
  1410. saa7146_set_winsize(saa);
  1411. return 0;
  1412. }
  1413. case VIDIOCKEY:
  1414. {
  1415. /* Will be handled higher up .. */
  1416. return 0;
  1417. }
  1418. case VIDIOCGAUDIO:
  1419. {
  1420. struct video_audio v;
  1421. v = saa->audio_dev;
  1422. v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE);
  1423. v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME;
  1424. strcpy(v.name, "MPEG");
  1425. v.mode = VIDEO_SOUND_STEREO;
  1426. if (copy_to_user(arg, &v, sizeof(v)))
  1427. return -EFAULT;
  1428. return 0;
  1429. }
  1430. case VIDIOCSAUDIO:
  1431. {
  1432. struct video_audio v;
  1433. int i;
  1434. if (copy_from_user(&v, arg, sizeof(v)))
  1435. return -EFAULT;
  1436. i = (~(v.volume >> 8)) & 0xff;
  1437. if (!HaveCS4341) {
  1438. if (v.flags & VIDEO_AUDIO_MUTE)
  1439. debiwrite(saa, debNormal,
  1440. IBM_MP2_FRNT_ATTEN, 0xffff, 2);
  1441. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1442. debiwrite(saa, debNormal,
  1443. IBM_MP2_FRNT_ATTEN, 0x0000, 2);
  1444. if (v.flags & VIDEO_AUDIO_VOLUME)
  1445. debiwrite(saa, debNormal,
  1446. IBM_MP2_FRNT_ATTEN,
  1447. (i << 8) | i, 2);
  1448. } else {
  1449. if (v.flags & VIDEO_AUDIO_MUTE)
  1450. cs4341_setlevel(saa, 0xff, 0xff);
  1451. if (!(v.flags & VIDEO_AUDIO_MUTE))
  1452. cs4341_setlevel(saa, 0, 0);
  1453. if (v.flags & VIDEO_AUDIO_VOLUME)
  1454. cs4341_setlevel(saa, i, i);
  1455. }
  1456. saa->audio_dev = v;
  1457. return 0;
  1458. }
  1459. case VIDIOCGUNIT:
  1460. {
  1461. struct video_unit vu;
  1462. vu.video = saa->video_dev.minor;
  1463. vu.vbi = VIDEO_NO_UNIT;
  1464. vu.radio = VIDEO_NO_UNIT;
  1465. vu.audio = VIDEO_NO_UNIT;
  1466. vu.teletext = VIDEO_NO_UNIT;
  1467. if (copy_to_user(arg, &vu, sizeof(vu)))
  1468. return -EFAULT;
  1469. return 0;
  1470. }
  1471. case VIDIOCSPLAYMODE:
  1472. {
  1473. struct video_play_mode pmode;
  1474. if (copy_from_user((void *)&pmode, arg,
  1475. sizeof(struct video_play_mode)))
  1476. return -EFAULT;
  1477. switch (pmode.mode) {
  1478. case VID_PLAY_VID_OUT_MODE:
  1479. if (pmode.p1 != VIDEO_MODE_NTSC &&
  1480. pmode.p1 != VIDEO_MODE_PAL)
  1481. return -EINVAL;
  1482. set_out_format(saa, pmode.p1);
  1483. return 0;
  1484. case VID_PLAY_GENLOCK:
  1485. debiwrite(saa, debNormal, XILINX_CTL0,
  1486. pmode.p1 ? 0x8000 : 0x8080, 2);
  1487. if (NewCard)
  1488. set_genlock_offset(saa, pmode.p2);
  1489. return 0;
  1490. case VID_PLAY_NORMAL:
  1491. debiwrite(saa, debNormal,
  1492. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1493. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1494. saa->playmode = pmode.mode;
  1495. return 0;
  1496. case VID_PLAY_PAUSE:
  1497. /* IBM removed the PAUSE command */
  1498. /* they say use SINGLE_FRAME now */
  1499. case VID_PLAY_SINGLE_FRAME:
  1500. ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0);
  1501. if (saa->playmode == pmode.mode) {
  1502. debiwrite(saa, debNormal,
  1503. IBM_MP2_CHIP_CONTROL,
  1504. ChipControl, 2);
  1505. }
  1506. saa->playmode = pmode.mode;
  1507. return 0;
  1508. case VID_PLAY_FAST_FORWARD:
  1509. ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0);
  1510. saa->playmode = pmode.mode;
  1511. return 0;
  1512. case VID_PLAY_SLOW_MOTION:
  1513. ibm_send_command(saa, IBM_MP2_SLOW_MOTION,
  1514. pmode.p1, 0);
  1515. saa->playmode = pmode.mode;
  1516. return 0;
  1517. case VID_PLAY_IMMEDIATE_NORMAL:
  1518. /* ensure transfers resume */
  1519. debiwrite(saa, debNormal,
  1520. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1521. ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY,
  1522. 0, 0);
  1523. saa->playmode = VID_PLAY_NORMAL;
  1524. return 0;
  1525. case VID_PLAY_SWITCH_CHANNELS:
  1526. saa->audhead = saa->audtail = 0;
  1527. saa->vidhead = saa->vidtail = 0;
  1528. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1);
  1529. ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE,
  1530. 0, 1);
  1531. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1532. 0, 2);
  1533. ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH,
  1534. 0, 1);
  1535. debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL,
  1536. ChipControl, 2);
  1537. ibm_send_command(saa, IBM_MP2_PLAY, 0, 0);
  1538. saa->playmode = VID_PLAY_NORMAL;
  1539. return 0;
  1540. case VID_PLAY_FREEZE_FRAME:
  1541. ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0);
  1542. saa->playmode = pmode.mode;
  1543. return 0;
  1544. case VID_PLAY_STILL_MODE:
  1545. ibm_send_command(saa, IBM_MP2_SET_STILL_MODE,
  1546. 0, 0);
  1547. saa->playmode = pmode.mode;
  1548. return 0;
  1549. case VID_PLAY_MASTER_MODE:
  1550. if (pmode.p1 == VID_PLAY_MASTER_NONE)
  1551. saa->boardcfg[1] = 0x13;
  1552. else if (pmode.p1 == VID_PLAY_MASTER_VIDEO)
  1553. saa->boardcfg[1] = 0x23;
  1554. else if (pmode.p1 == VID_PLAY_MASTER_AUDIO)
  1555. saa->boardcfg[1] = 0x43;
  1556. else
  1557. return -EINVAL;
  1558. debiwrite(saa, debNormal,
  1559. IBM_MP2_CHIP_CONTROL, ChipControl, 2);
  1560. return 0;
  1561. case VID_PLAY_ACTIVE_SCANLINES:
  1562. if (CurrentMode == VIDEO_MODE_PAL) {
  1563. if (pmode.p1 < 1 || pmode.p2 > 625)
  1564. return -EINVAL;
  1565. saa->boardcfg[5] = pmode.p1;
  1566. saa->boardcfg[55] = (pmode.p1 +
  1567. (pmode.p2 / 2) - 1) & 0xff;
  1568. } else {
  1569. if (pmode.p1 < 4 || pmode.p2 > 525)
  1570. return -EINVAL;
  1571. saa->boardcfg[4] = pmode.p1;
  1572. saa->boardcfg[54] = (pmode.p1 +
  1573. (pmode.p2 / 2) - 4) & 0xff;
  1574. }
  1575. set_out_format(saa, CurrentMode);
  1576. case VID_PLAY_RESET:
  1577. return do_ibm_reset(saa);
  1578. case VID_PLAY_END_MARK:
  1579. if (saa->endmarktail < saa->endmarkhead) {
  1580. if (saa->endmarkhead -
  1581. saa->endmarktail < 2)
  1582. return -ENOSPC;
  1583. } else if (saa->endmarkhead <=saa->endmarktail){
  1584. if (saa->endmarktail - saa->endmarkhead
  1585. > (MAX_MARKS - 2))
  1586. return -ENOSPC;
  1587. } else
  1588. return -ENOSPC;
  1589. saa->endmark[saa->endmarktail] = saa->audtail;
  1590. saa->endmarktail++;
  1591. if (saa->endmarktail >= MAX_MARKS)
  1592. saa->endmarktail = 0;
  1593. }
  1594. return -EINVAL;
  1595. }
  1596. case VIDIOCSWRITEMODE:
  1597. {
  1598. int mode;
  1599. if (copy_from_user((void *)&mode, arg, sizeof(int)))
  1600. return -EFAULT;
  1601. if (mode == VID_WRITE_MPEG_AUD ||
  1602. mode == VID_WRITE_MPEG_VID ||
  1603. mode == VID_WRITE_CC ||
  1604. mode == VID_WRITE_TTX ||
  1605. mode == VID_WRITE_OSD) {
  1606. saa->writemode = mode;
  1607. return 0;
  1608. }
  1609. return -EINVAL;
  1610. }
  1611. case VIDIOCSMICROCODE:
  1612. {
  1613. struct video_code ucode;
  1614. __u8 *udata;
  1615. int i;
  1616. if (copy_from_user(&ucode, arg, sizeof(ucode)))
  1617. return -EFAULT;
  1618. if (ucode.datasize > 65536 || ucode.datasize < 1024 ||
  1619. strncmp(ucode.loadwhat, "dec", 3))
  1620. return -EINVAL;
  1621. if ((udata = vmalloc(ucode.datasize)) == NULL)
  1622. return -ENOMEM;
  1623. if (copy_from_user(udata, ucode.data, ucode.datasize)) {
  1624. vfree(udata);
  1625. return -EFAULT;
  1626. }
  1627. ucode.data = udata;
  1628. if (!strncmp(ucode.loadwhat, "decoder.aud", 11) ||
  1629. !strncmp(ucode.loadwhat, "decoder.vid", 11))
  1630. i = initialize_ibmmpeg2(&ucode);
  1631. else
  1632. i = initialize_fpga(&ucode);
  1633. vfree(udata);
  1634. if (i)
  1635. return -EINVAL;
  1636. return 0;
  1637. }
  1638. case VIDIOCGCHAN: /* this makes xawtv happy */
  1639. {
  1640. struct video_channel v;
  1641. if (copy_from_user(&v, arg, sizeof(v)))
  1642. return -EFAULT;
  1643. v.flags = VIDEO_VC_AUDIO;
  1644. v.tuners = 0;
  1645. v.type = VID_TYPE_MPEG_DECODER;
  1646. v.norm = CurrentMode;
  1647. strcpy(v.name, "MPEG2");
  1648. if (copy_to_user(arg, &v, sizeof(v)))
  1649. return -EFAULT;
  1650. return 0;
  1651. }
  1652. case VIDIOCSCHAN: /* this makes xawtv happy */
  1653. {
  1654. struct video_channel v;
  1655. if (copy_from_user(&v, arg, sizeof(v)))
  1656. return -EFAULT;
  1657. /* do nothing */
  1658. return 0;
  1659. }
  1660. default:
  1661. return -ENOIOCTLCMD;
  1662. }
  1663. return 0;
  1664. }
  1665. static int saa_mmap(struct file *file, struct vm_area_struct *vma)
  1666. {
  1667. struct saa7146 *saa = file->private_data;
  1668. printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr);
  1669. return -EINVAL;
  1670. }
  1671. static ssize_t saa_read(struct file *file, char __user * buf,
  1672. size_t count, loff_t * ppos)
  1673. {
  1674. return -EINVAL;
  1675. }
  1676. static ssize_t saa_write(struct file *file, const char __user * buf,
  1677. size_t count, loff_t * ppos)
  1678. {
  1679. struct saa7146 *saa = file->private_data;
  1680. unsigned long todo = count;
  1681. int blocksize, split;
  1682. unsigned long flags;
  1683. while (todo > 0) {
  1684. if (saa->writemode == VID_WRITE_MPEG_AUD) {
  1685. spin_lock_irqsave(&saa->lock, flags);
  1686. if (saa->audhead <= saa->audtail)
  1687. blocksize = 65536 -
  1688. (saa->audtail - saa->audhead);
  1689. else
  1690. blocksize = saa->audhead - saa->audtail;
  1691. spin_unlock_irqrestore(&saa->lock, flags);
  1692. if (blocksize < 16384) {
  1693. saawrite(SAA7146_PSR_DEBI_S |
  1694. SAA7146_PSR_PIN1, SAA7146_IER);
  1695. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1696. /* wait for buffer space to open */
  1697. interruptible_sleep_on(&saa->audq);
  1698. }
  1699. spin_lock_irqsave(&saa->lock, flags);
  1700. if (saa->audhead <= saa->audtail) {
  1701. blocksize = 65536 -
  1702. (saa->audtail - saa->audhead);
  1703. split = 65536 - saa->audtail;
  1704. } else {
  1705. blocksize = saa->audhead - saa->audtail;
  1706. split = 65536;
  1707. }
  1708. spin_unlock_irqrestore(&saa->lock, flags);
  1709. blocksize--;
  1710. if (blocksize > todo)
  1711. blocksize = todo;
  1712. /* double check that we really have space */
  1713. if (!blocksize)
  1714. return -ENOSPC;
  1715. if (split < blocksize) {
  1716. if (copy_from_user(saa->audbuf +
  1717. saa->audtail, buf, split))
  1718. return -EFAULT;
  1719. buf += split;
  1720. todo -= split;
  1721. blocksize -= split;
  1722. saa->audtail = 0;
  1723. }
  1724. if (copy_from_user(saa->audbuf + saa->audtail, buf,
  1725. blocksize))
  1726. return -EFAULT;
  1727. saa->audtail += blocksize;
  1728. todo -= blocksize;
  1729. buf += blocksize;
  1730. saa->audtail &= 0xffff;
  1731. } else if (saa->writemode == VID_WRITE_MPEG_VID) {
  1732. spin_lock_irqsave(&saa->lock, flags);
  1733. if (saa->vidhead <= saa->vidtail)
  1734. blocksize = 524288 -
  1735. (saa->vidtail - saa->vidhead);
  1736. else
  1737. blocksize = saa->vidhead - saa->vidtail;
  1738. spin_unlock_irqrestore(&saa->lock, flags);
  1739. if (blocksize < 65536) {
  1740. saawrite(SAA7146_PSR_DEBI_S |
  1741. SAA7146_PSR_PIN1, SAA7146_IER);
  1742. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1743. /* wait for buffer space to open */
  1744. interruptible_sleep_on(&saa->vidq);
  1745. }
  1746. spin_lock_irqsave(&saa->lock, flags);
  1747. if (saa->vidhead <= saa->vidtail) {
  1748. blocksize = 524288 -
  1749. (saa->vidtail - saa->vidhead);
  1750. split = 524288 - saa->vidtail;
  1751. } else {
  1752. blocksize = saa->vidhead - saa->vidtail;
  1753. split = 524288;
  1754. }
  1755. spin_unlock_irqrestore(&saa->lock, flags);
  1756. blocksize--;
  1757. if (blocksize > todo)
  1758. blocksize = todo;
  1759. /* double check that we really have space */
  1760. if (!blocksize)
  1761. return -ENOSPC;
  1762. if (split < blocksize) {
  1763. if (copy_from_user(saa->vidbuf +
  1764. saa->vidtail, buf, split))
  1765. return -EFAULT;
  1766. buf += split;
  1767. todo -= split;
  1768. blocksize -= split;
  1769. saa->vidtail = 0;
  1770. }
  1771. if (copy_from_user(saa->vidbuf + saa->vidtail, buf,
  1772. blocksize))
  1773. return -EFAULT;
  1774. saa->vidtail += blocksize;
  1775. todo -= blocksize;
  1776. buf += blocksize;
  1777. saa->vidtail &= 0x7ffff;
  1778. } else if (saa->writemode == VID_WRITE_OSD) {
  1779. if (count > 131072)
  1780. return -ENOSPC;
  1781. if (copy_from_user(saa->osdbuf, buf, count))
  1782. return -EFAULT;
  1783. buf += count;
  1784. saa->osdhead = 0;
  1785. saa->osdtail = count;
  1786. debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2);
  1787. debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2);
  1788. debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2);
  1789. debiwrite(saa, debNormal, IBM_MP2_DISP_MODE,
  1790. debiread(saa, debNormal,
  1791. IBM_MP2_DISP_MODE, 2) | 1, 2);
  1792. /* trigger osd data transfer */
  1793. saawrite(SAA7146_PSR_DEBI_S |
  1794. SAA7146_PSR_PIN1, SAA7146_IER);
  1795. saawrite(SAA7146_PSR_PIN1, SAA7146_PSR);
  1796. }
  1797. }
  1798. return count;
  1799. }
  1800. static int saa_open(struct file *file)
  1801. {
  1802. struct video_device *vdev = video_devdata(file);
  1803. struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev);
  1804. lock_kernel();
  1805. file->private_data = saa;
  1806. saa->user++;
  1807. if (saa->user > 1) {
  1808. unlock_kernel();
  1809. return 0; /* device open already, don't reset */
  1810. }
  1811. saa->writemode = VID_WRITE_MPEG_VID; /* default to video */
  1812. unlock_kernel();
  1813. return 0;
  1814. }
  1815. static int saa_release(struct file *file)
  1816. {
  1817. struct saa7146 *saa = file->private_data;
  1818. saa->user--;
  1819. if (saa->user > 0) /* still someone using device */
  1820. return 0;
  1821. saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */
  1822. return 0;
  1823. }
  1824. static const struct v4l2_file_operations saa_fops = {
  1825. .owner = THIS_MODULE,
  1826. .open = saa_open,
  1827. .release = saa_release,
  1828. .ioctl = saa_ioctl,
  1829. .read = saa_read,
  1830. .write = saa_write,
  1831. .mmap = saa_mmap,
  1832. };
  1833. /* template for video_device-structure */
  1834. static struct video_device saa_template = {
  1835. .name = "SAA7146A",
  1836. .fops = &saa_fops,
  1837. .minor = -1,
  1838. .release = video_device_release_empty,
  1839. };
  1840. static int __devinit configure_saa7146(struct pci_dev *pdev, int num)
  1841. {
  1842. int retval;
  1843. struct saa7146 *saa = pci_get_drvdata(pdev);
  1844. saa->endmarkhead = saa->endmarktail = 0;
  1845. saa->win.x = saa->win.y = 0;
  1846. saa->win.width = saa->win.cropwidth = 720;
  1847. saa->win.height = saa->win.cropheight = 480;
  1848. saa->win.cropx = saa->win.cropy = 0;
  1849. saa->win.bpp = 2;
  1850. saa->win.depth = 16;
  1851. saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565];
  1852. saa->win.bpl = 1024 * saa->win.bpp;
  1853. saa->win.swidth = 1024;
  1854. saa->win.sheight = 768;
  1855. saa->picture.brightness = 32768;
  1856. saa->picture.contrast = 38768;
  1857. saa->picture.colour = 32768;
  1858. saa->cap = 0;
  1859. saa->nr = num;
  1860. saa->playmode = VID_PLAY_NORMAL;
  1861. memset(saa->boardcfg, 0, 64); /* clear board config area */
  1862. saa->saa7146_mem = NULL;
  1863. saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in =
  1864. saa->dmaa1out = saa->dmaa2in = saa->dmaa2out =
  1865. saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in =
  1866. saa->pagea1out = saa->pagea2in = saa->pagea2out =
  1867. saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 =
  1868. saa->pageRPS2 = NULL;
  1869. saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL;
  1870. saa->audhead = saa->vidtail = 0;
  1871. init_waitqueue_head(&saa->i2cq);
  1872. init_waitqueue_head(&saa->audq);
  1873. init_waitqueue_head(&saa->debiq);
  1874. init_waitqueue_head(&saa->vidq);
  1875. spin_lock_init(&saa->lock);
  1876. retval = pci_enable_device(pdev);
  1877. if (retval) {
  1878. dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num);
  1879. goto err;
  1880. }
  1881. saa->id = pdev->device;
  1882. saa->irq = pdev->irq;
  1883. saa->video_dev.minor = -1;
  1884. saa->saa7146_adr = pci_resource_start(pdev, 0);
  1885. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision);
  1886. saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200);
  1887. if (saa->saa7146_mem == NULL) {
  1888. dev_err(&pdev->dev, "%d: ioremap failed!\n", num);
  1889. retval = -EIO;
  1890. goto err;
  1891. }
  1892. memcpy(&saa->video_dev, &saa_template, sizeof(saa_template));
  1893. saawrite(0, SAA7146_IER); /* turn off all interrupts */
  1894. retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED,
  1895. "stradis", saa);
  1896. if (retval == -EINVAL)
  1897. dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num);
  1898. else if (retval == -EBUSY)
  1899. dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config "
  1900. "in BIOS\n", num, saa->irq);
  1901. if (retval < 0)
  1902. goto errio;
  1903. pci_set_master(pdev);
  1904. retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER,
  1905. video_nr);
  1906. if (retval < 0) {
  1907. dev_err(&pdev->dev, "%d: error in registering video device!\n",
  1908. num);
  1909. goto errio;
  1910. }
  1911. return 0;
  1912. errio:
  1913. iounmap(saa->saa7146_mem);
  1914. err:
  1915. return retval;
  1916. }
  1917. static int __devinit init_saa7146(struct pci_dev *pdev)
  1918. {
  1919. struct saa7146 *saa = pci_get_drvdata(pdev);
  1920. saa->user = 0;
  1921. /* reset the saa7146 */
  1922. saawrite(0xffff0000, SAA7146_MC1);
  1923. mdelay(5);
  1924. /* enable debi and i2c transfers and pins */
  1925. saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C |
  1926. SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1);
  1927. /* ensure proper state of chip */
  1928. saawrite(0x00000000, SAA7146_PAGE1);
  1929. saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1);
  1930. saawrite(0x00000000, SAA7146_PAGE2);
  1931. saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2);
  1932. saawrite(0x00000000, SAA7146_DD1_INIT);
  1933. saawrite(0x00000000, SAA7146_DD1_STREAM_B);
  1934. saawrite(0x00000000, SAA7146_DD1_STREAM_A);
  1935. saawrite(0x00000000, SAA7146_BRS_CTRL);
  1936. saawrite(0x80400040, SAA7146_BCS_CTRL);
  1937. saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL);
  1938. saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL);
  1939. saawrite(0x00000000, SAA7146_ACON1);
  1940. saawrite(0x00000000, SAA7146_ACON2);
  1941. saawrite(0x00000600, SAA7146_I2C_STATUS);
  1942. saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A |
  1943. SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H |
  1944. SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 |
  1945. SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff,
  1946. SAA7146_MC2);
  1947. /* setup arbitration control registers */
  1948. saawrite(0x1412121a, SAA7146_PCI_BT_V1);
  1949. /* allocate 32k dma buffer + 4k for page table */
  1950. if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) {
  1951. dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr);
  1952. goto err;
  1953. }
  1954. #if 0
  1955. saa->pagedebi = saa->dmadebi + 32768; /* top 4k is for mmu */
  1956. saawrite(virt_to_bus(saa->pagedebi) /*|0x800 */ , SAA7146_DEBI_PAGE);
  1957. for (i = 0; i < 12; i++) /* setup mmu page table */
  1958. saa->pagedebi[i] = virt_to_bus((saa->dmadebi + i * 4096));
  1959. #endif
  1960. saa->audhead = saa->vidhead = saa->osdhead = 0;
  1961. saa->audtail = saa->vidtail = saa->osdtail = 0;
  1962. if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) {
  1963. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1964. goto err;
  1965. }
  1966. if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) {
  1967. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1968. goto errfree;
  1969. }
  1970. if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) {
  1971. dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr);
  1972. goto errfree;
  1973. }
  1974. /* allocate 81920 byte buffer for clipping */
  1975. if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) {
  1976. dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr);
  1977. goto errfree;
  1978. }
  1979. /* setup clipping registers */
  1980. saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2);
  1981. saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2);
  1982. saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE,
  1983. SAA7146_PROT_ADDR2);
  1984. saawrite(256, SAA7146_PITCH2);
  1985. saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */
  1986. saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2,
  1987. SAA7146_MC2);
  1988. I2CBusScan(saa);
  1989. return 0;
  1990. errfree:
  1991. vfree(saa->osdbuf);
  1992. vfree(saa->audbuf);
  1993. vfree(saa->vidbuf);
  1994. saa->audbuf = saa->osdbuf = saa->vidbuf = NULL;
  1995. err:
  1996. return -ENOMEM;
  1997. }
  1998. static void stradis_release_saa(struct pci_dev *pdev)
  1999. {
  2000. u8 command;
  2001. struct saa7146 *saa = pci_get_drvdata(pdev);
  2002. /* turn off all capturing, DMA and IRQs */
  2003. saawrite(0xffff0000, SAA7146_MC1); /* reset chip */
  2004. saawrite(0, SAA7146_MC2);
  2005. saawrite(0, SAA7146_IER);
  2006. saawrite(0xffffffffUL, SAA7146_ISR);
  2007. /* disable PCI bus-mastering */
  2008. pci_read_config_byte(pdev, PCI_COMMAND, &command);
  2009. command &= ~PCI_COMMAND_MASTER;
  2010. pci_write_config_byte(pdev, PCI_COMMAND, command);
  2011. /* unmap and free memory */
  2012. saa->audhead = saa->audtail = saa->osdhead = 0;
  2013. saa->vidhead = saa->vidtail = saa->osdtail = 0;
  2014. vfree(saa->vidbuf);
  2015. vfree(saa->audbuf);
  2016. vfree(saa->osdbuf);
  2017. kfree(saa->dmavid2);
  2018. saa->audbuf = saa->vidbuf = saa->osdbuf = NULL;
  2019. saa->dmavid2 = NULL;
  2020. kfree(saa->dmadebi);
  2021. kfree(saa->dmavid1);
  2022. kfree(saa->dmavid3);
  2023. kfree(saa->dmaa1in);
  2024. kfree(saa->dmaa1out);
  2025. kfree(saa->dmaa2in);
  2026. kfree(saa->dmaa2out);
  2027. kfree(saa->dmaRPS1);
  2028. kfree(saa->dmaRPS2);
  2029. free_irq(saa->irq, saa);
  2030. if (saa->saa7146_mem)
  2031. iounmap(saa->saa7146_mem);
  2032. if (saa->video_dev.minor != -1)
  2033. video_unregister_device(&saa->video_dev);
  2034. }
  2035. static int __devinit stradis_probe(struct pci_dev *pdev,
  2036. const struct pci_device_id *ent)
  2037. {
  2038. int retval = -EINVAL;
  2039. if (saa_num >= SAA7146_MAX)
  2040. goto err;
  2041. if (!pdev->subsystem_vendor)
  2042. dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num);
  2043. else
  2044. dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num);
  2045. pci_set_drvdata(pdev, &saa7146s[saa_num]);
  2046. retval = configure_saa7146(pdev, saa_num);
  2047. if (retval) {
  2048. dev_err(&pdev->dev, "%d: error in configuring\n", saa_num);
  2049. goto err;
  2050. }
  2051. if (init_saa7146(pdev) < 0) {
  2052. dev_err(&pdev->dev, "%d: error in initialization\n", saa_num);
  2053. retval = -EIO;
  2054. goto errrel;
  2055. }
  2056. saa_num++;
  2057. return 0;
  2058. errrel:
  2059. stradis_release_saa(pdev);
  2060. err:
  2061. return retval;
  2062. }
  2063. static void __devexit stradis_remove(struct pci_dev *pdev)
  2064. {
  2065. stradis_release_saa(pdev);
  2066. }
  2067. static struct pci_device_id stradis_pci_tbl[] = {
  2068. { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) },
  2069. { 0 }
  2070. };
  2071. static struct pci_driver stradis_driver = {
  2072. .name = "stradis",
  2073. .id_table = stradis_pci_tbl,
  2074. .probe = stradis_probe,
  2075. .remove = __devexit_p(stradis_remove)
  2076. };
  2077. static int __init stradis_init(void)
  2078. {
  2079. int retval;
  2080. saa_num = 0;
  2081. retval = pci_register_driver(&stradis_driver);
  2082. if (retval)
  2083. printk(KERN_ERR "stradis: Unable to register pci driver.\n");
  2084. return retval;
  2085. }
  2086. static void __exit stradis_exit(void)
  2087. {
  2088. pci_unregister_driver(&stradis_driver);
  2089. printk(KERN_INFO "stradis: module cleanup complete\n");
  2090. }
  2091. module_init(stradis_init);
  2092. module_exit(stradis_exit);