saa7191.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655
  1. /*
  2. * saa7191.c - Philips SAA7191 video decoder driver
  3. *
  4. * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
  5. * Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/errno.h>
  13. #include <linux/fs.h>
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/major.h>
  17. #include <linux/module.h>
  18. #include <linux/mm.h>
  19. #include <linux/slab.h>
  20. #include <linux/videodev2.h>
  21. #include <linux/i2c.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-chip-ident.h>
  24. #include <media/v4l2-i2c-drv.h>
  25. #include "saa7191.h"
  26. #define SAA7191_MODULE_VERSION "0.0.5"
  27. MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
  28. MODULE_VERSION(SAA7191_MODULE_VERSION);
  29. MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
  30. MODULE_LICENSE("GPL");
  31. // #define SAA7191_DEBUG
  32. #ifdef SAA7191_DEBUG
  33. #define dprintk(x...) printk("SAA7191: " x);
  34. #else
  35. #define dprintk(x...)
  36. #endif
  37. #define SAA7191_SYNC_COUNT 30
  38. #define SAA7191_SYNC_DELAY 100 /* milliseconds */
  39. struct saa7191 {
  40. struct v4l2_subdev sd;
  41. /* the register values are stored here as the actual
  42. * I2C-registers are write-only */
  43. u8 reg[25];
  44. int input;
  45. v4l2_std_id norm;
  46. };
  47. static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
  48. {
  49. return container_of(sd, struct saa7191, sd);
  50. }
  51. static const u8 initseq[] = {
  52. 0, /* Subaddress */
  53. 0x50, /* (0x50) SAA7191_REG_IDEL */
  54. /* 50 Hz signal timing */
  55. 0x30, /* (0x30) SAA7191_REG_HSYB */
  56. 0x00, /* (0x00) SAA7191_REG_HSYS */
  57. 0xe8, /* (0xe8) SAA7191_REG_HCLB */
  58. 0xb6, /* (0xb6) SAA7191_REG_HCLS */
  59. 0xf4, /* (0xf4) SAA7191_REG_HPHI */
  60. /* control */
  61. SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
  62. 0x00, /* (0x00) SAA7191_REG_HUEC */
  63. 0xf8, /* (0xf8) SAA7191_REG_CKTQ */
  64. 0xf8, /* (0xf8) SAA7191_REG_CKTS */
  65. 0x90, /* (0x90) SAA7191_REG_PLSE */
  66. 0x90, /* (0x90) SAA7191_REG_SESE */
  67. 0x00, /* (0x00) SAA7191_REG_GAIN */
  68. SAA7191_STDC_NFEN | SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
  69. * - not SECAM,
  70. * slow time constant */
  71. SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
  72. | SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
  73. * - chroma from CVBS, GPSW1 & 2 off */
  74. SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
  75. | SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
  76. * - automatic field detection */
  77. 0x00, /* (0x00) SAA7191_REG_CTL4 */
  78. 0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
  79. 0x00, /* unused */
  80. 0x00, /* unused */
  81. /* 60 Hz signal timing */
  82. 0x34, /* (0x34) SAA7191_REG_HS6B */
  83. 0x0a, /* (0x0a) SAA7191_REG_HS6S */
  84. 0xf4, /* (0xf4) SAA7191_REG_HC6B */
  85. 0xce, /* (0xce) SAA7191_REG_HC6S */
  86. 0xf4, /* (0xf4) SAA7191_REG_HP6I */
  87. };
  88. /* SAA7191 register handling */
  89. static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
  90. {
  91. return to_saa7191(sd)->reg[reg];
  92. }
  93. static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
  94. {
  95. struct i2c_client *client = v4l2_get_subdevdata(sd);
  96. int ret;
  97. ret = i2c_master_recv(client, value, 1);
  98. if (ret < 0) {
  99. printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
  100. return ret;
  101. }
  102. return 0;
  103. }
  104. static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
  105. {
  106. struct i2c_client *client = v4l2_get_subdevdata(sd);
  107. to_saa7191(sd)->reg[reg] = value;
  108. return i2c_smbus_write_byte_data(client, reg, value);
  109. }
  110. /* the first byte of data must be the first subaddress number (register) */
  111. static int saa7191_write_block(struct v4l2_subdev *sd,
  112. u8 length, const u8 *data)
  113. {
  114. struct i2c_client *client = v4l2_get_subdevdata(sd);
  115. struct saa7191 *decoder = to_saa7191(sd);
  116. int i;
  117. int ret;
  118. for (i = 0; i < (length - 1); i++) {
  119. decoder->reg[data[0] + i] = data[i + 1];
  120. }
  121. ret = i2c_master_send(client, data, length);
  122. if (ret < 0) {
  123. printk(KERN_ERR "SAA7191: saa7191_write_block(): "
  124. "write failed\n");
  125. return ret;
  126. }
  127. return 0;
  128. }
  129. /* Helper functions */
  130. static int saa7191_s_routing(struct v4l2_subdev *sd,
  131. u32 input, u32 output, u32 config)
  132. {
  133. struct saa7191 *decoder = to_saa7191(sd);
  134. u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  135. u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
  136. int err;
  137. switch (input) {
  138. case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
  139. iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
  140. | SAA7191_IOCK_GPSW2);
  141. /* Chrominance trap active */
  142. luma &= ~SAA7191_LUMA_BYPS;
  143. break;
  144. case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
  145. iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
  146. /* Chrominance trap bypassed */
  147. luma |= SAA7191_LUMA_BYPS;
  148. break;
  149. default:
  150. return -EINVAL;
  151. }
  152. err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
  153. if (err)
  154. return -EIO;
  155. err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
  156. if (err)
  157. return -EIO;
  158. decoder->input = input;
  159. return 0;
  160. }
  161. static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
  162. {
  163. struct saa7191 *decoder = to_saa7191(sd);
  164. u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
  165. u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  166. u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
  167. int err;
  168. if (norm & V4L2_STD_PAL) {
  169. stdc &= ~SAA7191_STDC_SECS;
  170. ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
  171. chcv = SAA7191_CHCV_PAL;
  172. } else if (norm & V4L2_STD_NTSC) {
  173. stdc &= ~SAA7191_STDC_SECS;
  174. ctl3 &= ~SAA7191_CTL3_AUFD;
  175. ctl3 |= SAA7191_CTL3_FSEL;
  176. chcv = SAA7191_CHCV_NTSC;
  177. } else if (norm & V4L2_STD_SECAM) {
  178. stdc |= SAA7191_STDC_SECS;
  179. ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
  180. chcv = SAA7191_CHCV_PAL;
  181. } else {
  182. return -EINVAL;
  183. }
  184. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  185. if (err)
  186. return -EIO;
  187. err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
  188. if (err)
  189. return -EIO;
  190. err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
  191. if (err)
  192. return -EIO;
  193. decoder->norm = norm;
  194. dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
  195. stdc, chcv);
  196. dprintk("norm: %llx\n", norm);
  197. return 0;
  198. }
  199. static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
  200. {
  201. int i = 0;
  202. dprintk("Checking for signal...\n");
  203. for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
  204. if (saa7191_read_status(sd, status))
  205. return -EIO;
  206. if (((*status) & SAA7191_STATUS_HLCK) == 0) {
  207. dprintk("Signal found\n");
  208. return 0;
  209. }
  210. msleep(SAA7191_SYNC_DELAY);
  211. }
  212. dprintk("No signal\n");
  213. return -EBUSY;
  214. }
  215. static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
  216. {
  217. struct saa7191 *decoder = to_saa7191(sd);
  218. u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
  219. u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  220. u8 status;
  221. v4l2_std_id old_norm = decoder->norm;
  222. int err = 0;
  223. dprintk("SAA7191 extended signal auto-detection...\n");
  224. *norm = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
  225. stdc &= ~SAA7191_STDC_SECS;
  226. ctl3 &= ~(SAA7191_CTL3_FSEL);
  227. err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
  228. if (err) {
  229. err = -EIO;
  230. goto out;
  231. }
  232. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  233. if (err) {
  234. err = -EIO;
  235. goto out;
  236. }
  237. ctl3 |= SAA7191_CTL3_AUFD;
  238. err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
  239. if (err) {
  240. err = -EIO;
  241. goto out;
  242. }
  243. msleep(SAA7191_SYNC_DELAY);
  244. err = saa7191_wait_for_signal(sd, &status);
  245. if (err)
  246. goto out;
  247. if (status & SAA7191_STATUS_FIDT) {
  248. /* 60Hz signal -> NTSC */
  249. dprintk("60Hz signal: NTSC\n");
  250. *norm = V4L2_STD_NTSC;
  251. return 0;
  252. }
  253. /* 50Hz signal */
  254. dprintk("50Hz signal: Trying PAL...\n");
  255. /* try PAL first */
  256. err = saa7191_s_std(sd, V4L2_STD_PAL);
  257. if (err)
  258. goto out;
  259. msleep(SAA7191_SYNC_DELAY);
  260. err = saa7191_wait_for_signal(sd, &status);
  261. if (err)
  262. goto out;
  263. /* not 50Hz ? */
  264. if (status & SAA7191_STATUS_FIDT) {
  265. dprintk("No 50Hz signal\n");
  266. saa7191_s_std(sd, old_norm);
  267. return -EAGAIN;
  268. }
  269. if (status & SAA7191_STATUS_CODE) {
  270. dprintk("PAL\n");
  271. *norm = V4L2_STD_PAL;
  272. return saa7191_s_std(sd, old_norm);
  273. }
  274. dprintk("No color detected with PAL - Trying SECAM...\n");
  275. /* no color detected ? -> try SECAM */
  276. err = saa7191_s_std(sd, V4L2_STD_SECAM);
  277. if (err)
  278. goto out;
  279. msleep(SAA7191_SYNC_DELAY);
  280. err = saa7191_wait_for_signal(sd, &status);
  281. if (err)
  282. goto out;
  283. /* not 50Hz ? */
  284. if (status & SAA7191_STATUS_FIDT) {
  285. dprintk("No 50Hz signal\n");
  286. err = -EAGAIN;
  287. goto out;
  288. }
  289. if (status & SAA7191_STATUS_CODE) {
  290. /* Color detected -> SECAM */
  291. dprintk("SECAM\n");
  292. *norm = V4L2_STD_SECAM;
  293. return saa7191_s_std(sd, old_norm);
  294. }
  295. dprintk("No color detected with SECAM - Going back to PAL.\n");
  296. out:
  297. return saa7191_s_std(sd, old_norm);
  298. }
  299. static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
  300. {
  301. u8 status;
  302. dprintk("SAA7191 signal auto-detection...\n");
  303. dprintk("Reading status...\n");
  304. if (saa7191_read_status(sd, &status))
  305. return -EIO;
  306. dprintk("Checking for signal...\n");
  307. /* no signal ? */
  308. if (status & SAA7191_STATUS_HLCK) {
  309. dprintk("No signal\n");
  310. return -EBUSY;
  311. }
  312. dprintk("Signal found\n");
  313. if (status & SAA7191_STATUS_FIDT) {
  314. /* 60hz signal -> NTSC */
  315. dprintk("NTSC\n");
  316. return saa7191_s_std(sd, V4L2_STD_NTSC);
  317. } else {
  318. /* 50hz signal -> PAL */
  319. dprintk("PAL\n");
  320. return saa7191_s_std(sd, V4L2_STD_PAL);
  321. }
  322. }
  323. static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  324. {
  325. u8 reg;
  326. int ret = 0;
  327. switch (ctrl->id) {
  328. case SAA7191_CONTROL_BANDPASS:
  329. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  330. case SAA7191_CONTROL_CORING:
  331. reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  332. switch (ctrl->id) {
  333. case SAA7191_CONTROL_BANDPASS:
  334. ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
  335. >> SAA7191_LUMA_BPSS_SHIFT;
  336. break;
  337. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  338. ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
  339. >> SAA7191_LUMA_APER_SHIFT;
  340. break;
  341. case SAA7191_CONTROL_CORING:
  342. ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
  343. >> SAA7191_LUMA_CORI_SHIFT;
  344. break;
  345. }
  346. break;
  347. case SAA7191_CONTROL_FORCE_COLOUR:
  348. case SAA7191_CONTROL_CHROMA_GAIN:
  349. reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
  350. if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
  351. ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
  352. else
  353. ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
  354. >> SAA7191_GAIN_LFIS_SHIFT;
  355. break;
  356. case V4L2_CID_HUE:
  357. reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
  358. if (reg < 0x80)
  359. reg += 0x80;
  360. else
  361. reg -= 0x80;
  362. ctrl->value = (s32)reg;
  363. break;
  364. case SAA7191_CONTROL_VTRC:
  365. reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
  366. ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
  367. break;
  368. case SAA7191_CONTROL_LUMA_DELAY:
  369. reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  370. ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
  371. >> SAA7191_CTL3_YDEL_SHIFT;
  372. if (ctrl->value >= 4)
  373. ctrl->value -= 8;
  374. break;
  375. case SAA7191_CONTROL_VNR:
  376. reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
  377. ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
  378. >> SAA7191_CTL4_VNOI_SHIFT;
  379. break;
  380. default:
  381. ret = -EINVAL;
  382. }
  383. return ret;
  384. }
  385. static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  386. {
  387. u8 reg;
  388. int ret = 0;
  389. switch (ctrl->id) {
  390. case SAA7191_CONTROL_BANDPASS:
  391. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  392. case SAA7191_CONTROL_CORING:
  393. reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
  394. switch (ctrl->id) {
  395. case SAA7191_CONTROL_BANDPASS:
  396. reg &= ~SAA7191_LUMA_BPSS_MASK;
  397. reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
  398. & SAA7191_LUMA_BPSS_MASK;
  399. break;
  400. case SAA7191_CONTROL_BANDPASS_WEIGHT:
  401. reg &= ~SAA7191_LUMA_APER_MASK;
  402. reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
  403. & SAA7191_LUMA_APER_MASK;
  404. break;
  405. case SAA7191_CONTROL_CORING:
  406. reg &= ~SAA7191_LUMA_CORI_MASK;
  407. reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
  408. & SAA7191_LUMA_CORI_MASK;
  409. break;
  410. }
  411. ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
  412. break;
  413. case SAA7191_CONTROL_FORCE_COLOUR:
  414. case SAA7191_CONTROL_CHROMA_GAIN:
  415. reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
  416. if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
  417. if (ctrl->value)
  418. reg |= SAA7191_GAIN_COLO;
  419. else
  420. reg &= ~SAA7191_GAIN_COLO;
  421. } else {
  422. reg &= ~SAA7191_GAIN_LFIS_MASK;
  423. reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
  424. & SAA7191_GAIN_LFIS_MASK;
  425. }
  426. ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
  427. break;
  428. case V4L2_CID_HUE:
  429. reg = ctrl->value & 0xff;
  430. if (reg < 0x80)
  431. reg += 0x80;
  432. else
  433. reg -= 0x80;
  434. ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
  435. break;
  436. case SAA7191_CONTROL_VTRC:
  437. reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
  438. if (ctrl->value)
  439. reg |= SAA7191_STDC_VTRC;
  440. else
  441. reg &= ~SAA7191_STDC_VTRC;
  442. ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
  443. break;
  444. case SAA7191_CONTROL_LUMA_DELAY: {
  445. s32 value = ctrl->value;
  446. if (value < 0)
  447. value += 8;
  448. reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
  449. reg &= ~SAA7191_CTL3_YDEL_MASK;
  450. reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
  451. & SAA7191_CTL3_YDEL_MASK;
  452. ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
  453. break;
  454. }
  455. case SAA7191_CONTROL_VNR:
  456. reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
  457. reg &= ~SAA7191_CTL4_VNOI_MASK;
  458. reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
  459. & SAA7191_CTL4_VNOI_MASK;
  460. ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
  461. break;
  462. default:
  463. ret = -EINVAL;
  464. }
  465. return ret;
  466. }
  467. /* I2C-interface */
  468. static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
  469. {
  470. u8 status_reg;
  471. int res = V4L2_IN_ST_NO_SIGNAL;
  472. if (saa7191_read_status(sd, &status_reg))
  473. return -EIO;
  474. if ((status_reg & SAA7191_STATUS_HLCK) == 0)
  475. res = 0;
  476. if (!(status_reg & SAA7191_STATUS_CODE))
  477. res |= V4L2_IN_ST_NO_COLOR;
  478. *status = res;
  479. return 0;
  480. }
  481. static int saa7191_g_chip_ident(struct v4l2_subdev *sd,
  482. struct v4l2_dbg_chip_ident *chip)
  483. {
  484. struct i2c_client *client = v4l2_get_subdevdata(sd);
  485. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7191, 0);
  486. }
  487. /* ----------------------------------------------------------------------- */
  488. static const struct v4l2_subdev_core_ops saa7191_core_ops = {
  489. .g_chip_ident = saa7191_g_chip_ident,
  490. .g_ctrl = saa7191_g_ctrl,
  491. .s_ctrl = saa7191_s_ctrl,
  492. .s_std = saa7191_s_std,
  493. };
  494. static const struct v4l2_subdev_video_ops saa7191_video_ops = {
  495. .s_routing = saa7191_s_routing,
  496. .querystd = saa7191_querystd,
  497. .g_input_status = saa7191_g_input_status,
  498. };
  499. static const struct v4l2_subdev_ops saa7191_ops = {
  500. .core = &saa7191_core_ops,
  501. .video = &saa7191_video_ops,
  502. };
  503. static int saa7191_probe(struct i2c_client *client,
  504. const struct i2c_device_id *id)
  505. {
  506. int err = 0;
  507. struct saa7191 *decoder;
  508. struct v4l2_subdev *sd;
  509. v4l_info(client, "chip found @ 0x%x (%s)\n",
  510. client->addr << 1, client->adapter->name);
  511. decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
  512. if (!decoder)
  513. return -ENOMEM;
  514. sd = &decoder->sd;
  515. v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
  516. err = saa7191_write_block(sd, sizeof(initseq), initseq);
  517. if (err) {
  518. printk(KERN_ERR "SAA7191 initialization failed\n");
  519. kfree(decoder);
  520. return err;
  521. }
  522. printk(KERN_INFO "SAA7191 initialized\n");
  523. decoder->input = SAA7191_INPUT_COMPOSITE;
  524. decoder->norm = V4L2_STD_PAL;
  525. err = saa7191_autodetect_norm(sd);
  526. if (err && (err != -EBUSY))
  527. printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
  528. return 0;
  529. }
  530. static int saa7191_remove(struct i2c_client *client)
  531. {
  532. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  533. v4l2_device_unregister_subdev(sd);
  534. kfree(to_saa7191(sd));
  535. return 0;
  536. }
  537. static const struct i2c_device_id saa7191_id[] = {
  538. { "saa7191", 0 },
  539. { }
  540. };
  541. MODULE_DEVICE_TABLE(i2c, saa7191_id);
  542. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  543. .name = "saa7191",
  544. .probe = saa7191_probe,
  545. .remove = saa7191_remove,
  546. .id_table = saa7191_id,
  547. };