saa717x.c 36 KB

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  1. /*
  2. * saa717x - Philips SAA717xHL video decoder driver
  3. *
  4. * Based on the saa7115 driver
  5. *
  6. * Changes by Ohta Kyuma <alpha292@bremen.or.jp>
  7. * - Apply to SAA717x,NEC uPD64031,uPD64083. (1/31/2004)
  8. *
  9. * Changes by T.Adachi (tadachi@tadachi-net.com)
  10. * - support audio, video scaler etc, and checked the initialize sequence.
  11. *
  12. * Cleaned up by Hans Verkuil <hverkuil@xs4all.nl>
  13. *
  14. * Note: this is a reversed engineered driver based on captures from
  15. * the I2C bus under Windows. This chip is very similar to the saa7134,
  16. * though. Unfortunately, this driver is currently only working for NTSC.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation; either version 2 of the License, or
  21. * (at your option) any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program; if not, write to the Free Software
  30. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/kernel.h>
  34. #include <linux/sched.h>
  35. #include <linux/videodev2.h>
  36. #include <linux/i2c.h>
  37. #include <media/v4l2-device.h>
  38. #include <media/v4l2-i2c-drv.h>
  39. MODULE_DESCRIPTION("Philips SAA717x audio/video decoder driver");
  40. MODULE_AUTHOR("K. Ohta, T. Adachi, Hans Verkuil");
  41. MODULE_LICENSE("GPL");
  42. static int debug;
  43. module_param(debug, int, 0644);
  44. MODULE_PARM_DESC(debug, "Debug level (0-1)");
  45. /*
  46. * Generic i2c probe
  47. * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
  48. */
  49. struct saa717x_state {
  50. struct v4l2_subdev sd;
  51. v4l2_std_id std;
  52. int input;
  53. int enable;
  54. int radio;
  55. int bright;
  56. int contrast;
  57. int hue;
  58. int sat;
  59. int playback;
  60. int audio;
  61. int tuner_audio_mode;
  62. int audio_main_mute;
  63. int audio_main_vol_r;
  64. int audio_main_vol_l;
  65. u16 audio_main_bass;
  66. u16 audio_main_treble;
  67. u16 audio_main_volume;
  68. u16 audio_main_balance;
  69. int audio_input;
  70. };
  71. static inline struct saa717x_state *to_state(struct v4l2_subdev *sd)
  72. {
  73. return container_of(sd, struct saa717x_state, sd);
  74. }
  75. /* ----------------------------------------------------------------------- */
  76. /* for audio mode */
  77. #define TUNER_AUDIO_MONO 0 /* LL */
  78. #define TUNER_AUDIO_STEREO 1 /* LR */
  79. #define TUNER_AUDIO_LANG1 2 /* LL */
  80. #define TUNER_AUDIO_LANG2 3 /* RR */
  81. #define SAA717X_NTSC_WIDTH (704)
  82. #define SAA717X_NTSC_HEIGHT (480)
  83. /* ----------------------------------------------------------------------- */
  84. static int saa717x_write(struct v4l2_subdev *sd, u32 reg, u32 value)
  85. {
  86. struct i2c_client *client = v4l2_get_subdevdata(sd);
  87. struct i2c_adapter *adap = client->adapter;
  88. int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488;
  89. unsigned char mm1[6];
  90. struct i2c_msg msg;
  91. msg.flags = 0;
  92. msg.addr = client->addr;
  93. mm1[0] = (reg >> 8) & 0xff;
  94. mm1[1] = reg & 0xff;
  95. if (fw_addr) {
  96. mm1[4] = (value >> 16) & 0xff;
  97. mm1[3] = (value >> 8) & 0xff;
  98. mm1[2] = value & 0xff;
  99. } else {
  100. mm1[2] = value & 0xff;
  101. }
  102. msg.len = fw_addr ? 5 : 3; /* Long Registers have *only* three bytes! */
  103. msg.buf = mm1;
  104. v4l2_dbg(2, debug, sd, "wrote: reg 0x%03x=%08x\n", reg, value);
  105. return i2c_transfer(adap, &msg, 1) == 1;
  106. }
  107. static void saa717x_write_regs(struct v4l2_subdev *sd, u32 *data)
  108. {
  109. while (data[0] || data[1]) {
  110. saa717x_write(sd, data[0], data[1]);
  111. data += 2;
  112. }
  113. }
  114. static u32 saa717x_read(struct v4l2_subdev *sd, u32 reg)
  115. {
  116. struct i2c_client *client = v4l2_get_subdevdata(sd);
  117. struct i2c_adapter *adap = client->adapter;
  118. int fw_addr = (reg >= 0x404 && reg <= 0x4b8) || reg == 0x528;
  119. unsigned char mm1[2];
  120. unsigned char mm2[4] = { 0, 0, 0, 0 };
  121. struct i2c_msg msgs[2];
  122. u32 value;
  123. msgs[0].flags = 0;
  124. msgs[1].flags = I2C_M_RD;
  125. msgs[0].addr = msgs[1].addr = client->addr;
  126. mm1[0] = (reg >> 8) & 0xff;
  127. mm1[1] = reg & 0xff;
  128. msgs[0].len = 2;
  129. msgs[0].buf = mm1;
  130. msgs[1].len = fw_addr ? 3 : 1; /* Multibyte Registers contains *only* 3 bytes */
  131. msgs[1].buf = mm2;
  132. i2c_transfer(adap, msgs, 2);
  133. if (fw_addr)
  134. value = (mm2[2] & 0xff) | ((mm2[1] & 0xff) >> 8) | ((mm2[0] & 0xff) >> 16);
  135. else
  136. value = mm2[0] & 0xff;
  137. v4l2_dbg(2, debug, sd, "read: reg 0x%03x=0x%08x\n", reg, value);
  138. return value;
  139. }
  140. /* ----------------------------------------------------------------------- */
  141. static u32 reg_init_initialize[] =
  142. {
  143. /* from linux driver */
  144. 0x101, 0x008, /* Increment delay */
  145. 0x103, 0x000, /* Analog input control 2 */
  146. 0x104, 0x090, /* Analog input control 3 */
  147. 0x105, 0x090, /* Analog input control 4 */
  148. 0x106, 0x0eb, /* Horizontal sync start */
  149. 0x107, 0x0e0, /* Horizontal sync stop */
  150. 0x109, 0x055, /* Luminance control */
  151. 0x10f, 0x02a, /* Chroma gain control */
  152. 0x110, 0x000, /* Chroma control 2 */
  153. 0x114, 0x045, /* analog/ADC */
  154. 0x118, 0x040, /* RAW data gain */
  155. 0x119, 0x080, /* RAW data offset */
  156. 0x044, 0x000, /* VBI horizontal input window start (L) TASK A */
  157. 0x045, 0x000, /* VBI horizontal input window start (H) TASK A */
  158. 0x046, 0x0cf, /* VBI horizontal input window stop (L) TASK A */
  159. 0x047, 0x002, /* VBI horizontal input window stop (H) TASK A */
  160. 0x049, 0x000, /* VBI vertical input window start (H) TASK A */
  161. 0x04c, 0x0d0, /* VBI horizontal output length (L) TASK A */
  162. 0x04d, 0x002, /* VBI horizontal output length (H) TASK A */
  163. 0x064, 0x080, /* Lumina brightness TASK A */
  164. 0x065, 0x040, /* Luminance contrast TASK A */
  165. 0x066, 0x040, /* Chroma saturation TASK A */
  166. /* 067H: Reserved */
  167. 0x068, 0x000, /* VBI horizontal scaling increment (L) TASK A */
  168. 0x069, 0x004, /* VBI horizontal scaling increment (H) TASK A */
  169. 0x06a, 0x000, /* VBI phase offset TASK A */
  170. 0x06e, 0x000, /* Horizontal phase offset Luma TASK A */
  171. 0x06f, 0x000, /* Horizontal phase offset Chroma TASK A */
  172. 0x072, 0x000, /* Vertical filter mode TASK A */
  173. 0x084, 0x000, /* VBI horizontal input window start (L) TAKS B */
  174. 0x085, 0x000, /* VBI horizontal input window start (H) TAKS B */
  175. 0x086, 0x0cf, /* VBI horizontal input window stop (L) TAKS B */
  176. 0x087, 0x002, /* VBI horizontal input window stop (H) TAKS B */
  177. 0x089, 0x000, /* VBI vertical input window start (H) TAKS B */
  178. 0x08c, 0x0d0, /* VBI horizontal output length (L) TASK B */
  179. 0x08d, 0x002, /* VBI horizontal output length (H) TASK B */
  180. 0x0a4, 0x080, /* Lumina brightness TASK B */
  181. 0x0a5, 0x040, /* Luminance contrast TASK B */
  182. 0x0a6, 0x040, /* Chroma saturation TASK B */
  183. /* 0A7H reserved */
  184. 0x0a8, 0x000, /* VBI horizontal scaling increment (L) TASK B */
  185. 0x0a9, 0x004, /* VBI horizontal scaling increment (H) TASK B */
  186. 0x0aa, 0x000, /* VBI phase offset TASK B */
  187. 0x0ae, 0x000, /* Horizontal phase offset Luma TASK B */
  188. 0x0af, 0x000, /*Horizontal phase offset Chroma TASK B */
  189. 0x0b2, 0x000, /* Vertical filter mode TASK B */
  190. 0x00c, 0x000, /* Start point GREEN path */
  191. 0x00d, 0x000, /* Start point BLUE path */
  192. 0x00e, 0x000, /* Start point RED path */
  193. 0x010, 0x010, /* GREEN path gamma curve --- */
  194. 0x011, 0x020,
  195. 0x012, 0x030,
  196. 0x013, 0x040,
  197. 0x014, 0x050,
  198. 0x015, 0x060,
  199. 0x016, 0x070,
  200. 0x017, 0x080,
  201. 0x018, 0x090,
  202. 0x019, 0x0a0,
  203. 0x01a, 0x0b0,
  204. 0x01b, 0x0c0,
  205. 0x01c, 0x0d0,
  206. 0x01d, 0x0e0,
  207. 0x01e, 0x0f0,
  208. 0x01f, 0x0ff, /* --- GREEN path gamma curve */
  209. 0x020, 0x010, /* BLUE path gamma curve --- */
  210. 0x021, 0x020,
  211. 0x022, 0x030,
  212. 0x023, 0x040,
  213. 0x024, 0x050,
  214. 0x025, 0x060,
  215. 0x026, 0x070,
  216. 0x027, 0x080,
  217. 0x028, 0x090,
  218. 0x029, 0x0a0,
  219. 0x02a, 0x0b0,
  220. 0x02b, 0x0c0,
  221. 0x02c, 0x0d0,
  222. 0x02d, 0x0e0,
  223. 0x02e, 0x0f0,
  224. 0x02f, 0x0ff, /* --- BLUE path gamma curve */
  225. 0x030, 0x010, /* RED path gamma curve --- */
  226. 0x031, 0x020,
  227. 0x032, 0x030,
  228. 0x033, 0x040,
  229. 0x034, 0x050,
  230. 0x035, 0x060,
  231. 0x036, 0x070,
  232. 0x037, 0x080,
  233. 0x038, 0x090,
  234. 0x039, 0x0a0,
  235. 0x03a, 0x0b0,
  236. 0x03b, 0x0c0,
  237. 0x03c, 0x0d0,
  238. 0x03d, 0x0e0,
  239. 0x03e, 0x0f0,
  240. 0x03f, 0x0ff, /* --- RED path gamma curve */
  241. 0x109, 0x085, /* Luminance control */
  242. /**** from app start ****/
  243. 0x584, 0x000, /* AGC gain control */
  244. 0x585, 0x000, /* Program count */
  245. 0x586, 0x003, /* Status reset */
  246. 0x588, 0x0ff, /* Number of audio samples (L) */
  247. 0x589, 0x00f, /* Number of audio samples (M) */
  248. 0x58a, 0x000, /* Number of audio samples (H) */
  249. 0x58b, 0x000, /* Audio select */
  250. 0x58c, 0x010, /* Audio channel assign1 */
  251. 0x58d, 0x032, /* Audio channel assign2 */
  252. 0x58e, 0x054, /* Audio channel assign3 */
  253. 0x58f, 0x023, /* Audio format */
  254. 0x590, 0x000, /* SIF control */
  255. 0x595, 0x000, /* ?? */
  256. 0x596, 0x000, /* ?? */
  257. 0x597, 0x000, /* ?? */
  258. 0x464, 0x00, /* Digital input crossbar1 */
  259. 0x46c, 0xbbbb10, /* Digital output selection1-3 */
  260. 0x470, 0x101010, /* Digital output selection4-6 */
  261. 0x478, 0x00, /* Sound feature control */
  262. 0x474, 0x18, /* Softmute control */
  263. 0x454, 0x0425b9, /* Sound Easy programming(reset) */
  264. 0x454, 0x042539, /* Sound Easy programming(reset) */
  265. /**** common setting( of DVD play, including scaler commands) ****/
  266. 0x042, 0x003, /* Data path configuration for VBI (TASK A) */
  267. 0x082, 0x003, /* Data path configuration for VBI (TASK B) */
  268. 0x108, 0x0f8, /* Sync control */
  269. 0x2a9, 0x0fd, /* ??? */
  270. 0x102, 0x089, /* select video input "mode 9" */
  271. 0x111, 0x000, /* Mode/delay control */
  272. 0x10e, 0x00a, /* Chroma control 1 */
  273. 0x594, 0x002, /* SIF, analog I/O select */
  274. 0x454, 0x0425b9, /* Sound */
  275. 0x454, 0x042539,
  276. 0x111, 0x000,
  277. 0x10e, 0x00a,
  278. 0x464, 0x000,
  279. 0x300, 0x000,
  280. 0x301, 0x006,
  281. 0x302, 0x000,
  282. 0x303, 0x006,
  283. 0x308, 0x040,
  284. 0x309, 0x000,
  285. 0x30a, 0x000,
  286. 0x30b, 0x000,
  287. 0x000, 0x002,
  288. 0x001, 0x000,
  289. 0x002, 0x000,
  290. 0x003, 0x000,
  291. 0x004, 0x033,
  292. 0x040, 0x01d,
  293. 0x041, 0x001,
  294. 0x042, 0x004,
  295. 0x043, 0x000,
  296. 0x080, 0x01e,
  297. 0x081, 0x001,
  298. 0x082, 0x004,
  299. 0x083, 0x000,
  300. 0x190, 0x018,
  301. 0x115, 0x000,
  302. 0x116, 0x012,
  303. 0x117, 0x018,
  304. 0x04a, 0x011,
  305. 0x08a, 0x011,
  306. 0x04b, 0x000,
  307. 0x08b, 0x000,
  308. 0x048, 0x000,
  309. 0x088, 0x000,
  310. 0x04e, 0x012,
  311. 0x08e, 0x012,
  312. 0x058, 0x012,
  313. 0x098, 0x012,
  314. 0x059, 0x000,
  315. 0x099, 0x000,
  316. 0x05a, 0x003,
  317. 0x09a, 0x003,
  318. 0x05b, 0x001,
  319. 0x09b, 0x001,
  320. 0x054, 0x008,
  321. 0x094, 0x008,
  322. 0x055, 0x000,
  323. 0x095, 0x000,
  324. 0x056, 0x0c7,
  325. 0x096, 0x0c7,
  326. 0x057, 0x002,
  327. 0x097, 0x002,
  328. 0x0ff, 0x0ff,
  329. 0x060, 0x001,
  330. 0x0a0, 0x001,
  331. 0x061, 0x000,
  332. 0x0a1, 0x000,
  333. 0x062, 0x000,
  334. 0x0a2, 0x000,
  335. 0x063, 0x000,
  336. 0x0a3, 0x000,
  337. 0x070, 0x000,
  338. 0x0b0, 0x000,
  339. 0x071, 0x004,
  340. 0x0b1, 0x004,
  341. 0x06c, 0x0e9,
  342. 0x0ac, 0x0e9,
  343. 0x06d, 0x003,
  344. 0x0ad, 0x003,
  345. 0x05c, 0x0d0,
  346. 0x09c, 0x0d0,
  347. 0x05d, 0x002,
  348. 0x09d, 0x002,
  349. 0x05e, 0x0f2,
  350. 0x09e, 0x0f2,
  351. 0x05f, 0x000,
  352. 0x09f, 0x000,
  353. 0x074, 0x000,
  354. 0x0b4, 0x000,
  355. 0x075, 0x000,
  356. 0x0b5, 0x000,
  357. 0x076, 0x000,
  358. 0x0b6, 0x000,
  359. 0x077, 0x000,
  360. 0x0b7, 0x000,
  361. 0x195, 0x008,
  362. 0x0ff, 0x0ff,
  363. 0x108, 0x0f8,
  364. 0x111, 0x000,
  365. 0x10e, 0x00a,
  366. 0x2a9, 0x0fd,
  367. 0x464, 0x001,
  368. 0x454, 0x042135,
  369. 0x598, 0x0e7,
  370. 0x599, 0x07d,
  371. 0x59a, 0x018,
  372. 0x59c, 0x066,
  373. 0x59d, 0x090,
  374. 0x59e, 0x001,
  375. 0x584, 0x000,
  376. 0x585, 0x000,
  377. 0x586, 0x003,
  378. 0x588, 0x0ff,
  379. 0x589, 0x00f,
  380. 0x58a, 0x000,
  381. 0x58b, 0x000,
  382. 0x58c, 0x010,
  383. 0x58d, 0x032,
  384. 0x58e, 0x054,
  385. 0x58f, 0x023,
  386. 0x590, 0x000,
  387. 0x595, 0x000,
  388. 0x596, 0x000,
  389. 0x597, 0x000,
  390. 0x464, 0x000,
  391. 0x46c, 0xbbbb10,
  392. 0x470, 0x101010,
  393. 0x478, 0x000,
  394. 0x474, 0x018,
  395. 0x454, 0x042135,
  396. 0x598, 0x0e7,
  397. 0x599, 0x07d,
  398. 0x59a, 0x018,
  399. 0x59c, 0x066,
  400. 0x59d, 0x090,
  401. 0x59e, 0x001,
  402. 0x584, 0x000,
  403. 0x585, 0x000,
  404. 0x586, 0x003,
  405. 0x588, 0x0ff,
  406. 0x589, 0x00f,
  407. 0x58a, 0x000,
  408. 0x58b, 0x000,
  409. 0x58c, 0x010,
  410. 0x58d, 0x032,
  411. 0x58e, 0x054,
  412. 0x58f, 0x023,
  413. 0x590, 0x000,
  414. 0x595, 0x000,
  415. 0x596, 0x000,
  416. 0x597, 0x000,
  417. 0x464, 0x000,
  418. 0x46c, 0xbbbb10,
  419. 0x470, 0x101010,
  420. 0x478, 0x000,
  421. 0x474, 0x018,
  422. 0x454, 0x042135,
  423. 0x598, 0x0e7,
  424. 0x599, 0x07d,
  425. 0x59a, 0x018,
  426. 0x59c, 0x066,
  427. 0x59d, 0x090,
  428. 0x59e, 0x001,
  429. 0x584, 0x000,
  430. 0x585, 0x000,
  431. 0x586, 0x003,
  432. 0x588, 0x0ff,
  433. 0x589, 0x00f,
  434. 0x58a, 0x000,
  435. 0x58b, 0x000,
  436. 0x58c, 0x010,
  437. 0x58d, 0x032,
  438. 0x58e, 0x054,
  439. 0x58f, 0x023,
  440. 0x590, 0x000,
  441. 0x595, 0x000,
  442. 0x596, 0x000,
  443. 0x597, 0x000,
  444. 0x464, 0x000,
  445. 0x46c, 0xbbbb10,
  446. 0x470, 0x101010,
  447. 0x478, 0x000,
  448. 0x474, 0x018,
  449. 0x454, 0x042135,
  450. 0x193, 0x000,
  451. 0x300, 0x000,
  452. 0x301, 0x006,
  453. 0x302, 0x000,
  454. 0x303, 0x006,
  455. 0x308, 0x040,
  456. 0x309, 0x000,
  457. 0x30a, 0x000,
  458. 0x30b, 0x000,
  459. 0x000, 0x002,
  460. 0x001, 0x000,
  461. 0x002, 0x000,
  462. 0x003, 0x000,
  463. 0x004, 0x033,
  464. 0x040, 0x01d,
  465. 0x041, 0x001,
  466. 0x042, 0x004,
  467. 0x043, 0x000,
  468. 0x080, 0x01e,
  469. 0x081, 0x001,
  470. 0x082, 0x004,
  471. 0x083, 0x000,
  472. 0x190, 0x018,
  473. 0x115, 0x000,
  474. 0x116, 0x012,
  475. 0x117, 0x018,
  476. 0x04a, 0x011,
  477. 0x08a, 0x011,
  478. 0x04b, 0x000,
  479. 0x08b, 0x000,
  480. 0x048, 0x000,
  481. 0x088, 0x000,
  482. 0x04e, 0x012,
  483. 0x08e, 0x012,
  484. 0x058, 0x012,
  485. 0x098, 0x012,
  486. 0x059, 0x000,
  487. 0x099, 0x000,
  488. 0x05a, 0x003,
  489. 0x09a, 0x003,
  490. 0x05b, 0x001,
  491. 0x09b, 0x001,
  492. 0x054, 0x008,
  493. 0x094, 0x008,
  494. 0x055, 0x000,
  495. 0x095, 0x000,
  496. 0x056, 0x0c7,
  497. 0x096, 0x0c7,
  498. 0x057, 0x002,
  499. 0x097, 0x002,
  500. 0x060, 0x001,
  501. 0x0a0, 0x001,
  502. 0x061, 0x000,
  503. 0x0a1, 0x000,
  504. 0x062, 0x000,
  505. 0x0a2, 0x000,
  506. 0x063, 0x000,
  507. 0x0a3, 0x000,
  508. 0x070, 0x000,
  509. 0x0b0, 0x000,
  510. 0x071, 0x004,
  511. 0x0b1, 0x004,
  512. 0x06c, 0x0e9,
  513. 0x0ac, 0x0e9,
  514. 0x06d, 0x003,
  515. 0x0ad, 0x003,
  516. 0x05c, 0x0d0,
  517. 0x09c, 0x0d0,
  518. 0x05d, 0x002,
  519. 0x09d, 0x002,
  520. 0x05e, 0x0f2,
  521. 0x09e, 0x0f2,
  522. 0x05f, 0x000,
  523. 0x09f, 0x000,
  524. 0x074, 0x000,
  525. 0x0b4, 0x000,
  526. 0x075, 0x000,
  527. 0x0b5, 0x000,
  528. 0x076, 0x000,
  529. 0x0b6, 0x000,
  530. 0x077, 0x000,
  531. 0x0b7, 0x000,
  532. 0x195, 0x008,
  533. 0x598, 0x0e7,
  534. 0x599, 0x07d,
  535. 0x59a, 0x018,
  536. 0x59c, 0x066,
  537. 0x59d, 0x090,
  538. 0x59e, 0x001,
  539. 0x584, 0x000,
  540. 0x585, 0x000,
  541. 0x586, 0x003,
  542. 0x588, 0x0ff,
  543. 0x589, 0x00f,
  544. 0x58a, 0x000,
  545. 0x58b, 0x000,
  546. 0x58c, 0x010,
  547. 0x58d, 0x032,
  548. 0x58e, 0x054,
  549. 0x58f, 0x023,
  550. 0x590, 0x000,
  551. 0x595, 0x000,
  552. 0x596, 0x000,
  553. 0x597, 0x000,
  554. 0x464, 0x000,
  555. 0x46c, 0xbbbb10,
  556. 0x470, 0x101010,
  557. 0x478, 0x000,
  558. 0x474, 0x018,
  559. 0x454, 0x042135,
  560. 0x193, 0x0a6,
  561. 0x108, 0x0f8,
  562. 0x042, 0x003,
  563. 0x082, 0x003,
  564. 0x454, 0x0425b9,
  565. 0x454, 0x042539,
  566. 0x193, 0x000,
  567. 0x193, 0x0a6,
  568. 0x464, 0x000,
  569. 0, 0
  570. };
  571. /* Tuner */
  572. static u32 reg_init_tuner_input[] = {
  573. 0x108, 0x0f8, /* Sync control */
  574. 0x111, 0x000, /* Mode/delay control */
  575. 0x10e, 0x00a, /* Chroma control 1 */
  576. 0, 0
  577. };
  578. /* Composite */
  579. static u32 reg_init_composite_input[] = {
  580. 0x108, 0x0e8, /* Sync control */
  581. 0x111, 0x000, /* Mode/delay control */
  582. 0x10e, 0x04a, /* Chroma control 1 */
  583. 0, 0
  584. };
  585. /* S-Video */
  586. static u32 reg_init_svideo_input[] = {
  587. 0x108, 0x0e8, /* Sync control */
  588. 0x111, 0x000, /* Mode/delay control */
  589. 0x10e, 0x04a, /* Chroma control 1 */
  590. 0, 0
  591. };
  592. static u32 reg_set_audio_template[4][2] =
  593. {
  594. { /* for MONO
  595. tadachi 6/29 DMA audio output select?
  596. Register 0x46c
  597. 7-4: DMA2, 3-0: DMA1 ch. DMA4, DMA3 DMA2, DMA1
  598. 0: MAIN left, 1: MAIN right
  599. 2: AUX1 left, 3: AUX1 right
  600. 4: AUX2 left, 5: AUX2 right
  601. 6: DPL left, 7: DPL right
  602. 8: DPL center, 9: DPL surround
  603. A: monitor output, B: digital sense */
  604. 0xbbbb00,
  605. /* tadachi 6/29 DAC and I2S output select?
  606. Register 0x470
  607. 7-4:DAC right ch. 3-0:DAC left ch.
  608. I2S1 right,left I2S2 right,left */
  609. 0x00,
  610. },
  611. { /* for STEREO */
  612. 0xbbbb10, 0x101010,
  613. },
  614. { /* for LANG1 */
  615. 0xbbbb00, 0x00,
  616. },
  617. { /* for LANG2/SAP */
  618. 0xbbbb11, 0x111111,
  619. }
  620. };
  621. /* Get detected audio flags (from saa7134 driver) */
  622. static void get_inf_dev_status(struct v4l2_subdev *sd,
  623. int *dual_flag, int *stereo_flag)
  624. {
  625. u32 reg_data3;
  626. static char *stdres[0x20] = {
  627. [0x00] = "no standard detected",
  628. [0x01] = "B/G (in progress)",
  629. [0x02] = "D/K (in progress)",
  630. [0x03] = "M (in progress)",
  631. [0x04] = "B/G A2",
  632. [0x05] = "B/G NICAM",
  633. [0x06] = "D/K A2 (1)",
  634. [0x07] = "D/K A2 (2)",
  635. [0x08] = "D/K A2 (3)",
  636. [0x09] = "D/K NICAM",
  637. [0x0a] = "L NICAM",
  638. [0x0b] = "I NICAM",
  639. [0x0c] = "M Korea",
  640. [0x0d] = "M BTSC ",
  641. [0x0e] = "M EIAJ",
  642. [0x0f] = "FM radio / IF 10.7 / 50 deemp",
  643. [0x10] = "FM radio / IF 10.7 / 75 deemp",
  644. [0x11] = "FM radio / IF sel / 50 deemp",
  645. [0x12] = "FM radio / IF sel / 75 deemp",
  646. [0x13 ... 0x1e] = "unknown",
  647. [0x1f] = "??? [in progress]",
  648. };
  649. *dual_flag = *stereo_flag = 0;
  650. /* (demdec status: 0x528) */
  651. /* read current status */
  652. reg_data3 = saa717x_read(sd, 0x0528);
  653. v4l2_dbg(1, debug, sd, "tvaudio thread status: 0x%x [%s%s%s]\n",
  654. reg_data3, stdres[reg_data3 & 0x1f],
  655. (reg_data3 & 0x000020) ? ",stereo" : "",
  656. (reg_data3 & 0x000040) ? ",dual" : "");
  657. v4l2_dbg(1, debug, sd, "detailed status: "
  658. "%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s#%s\n",
  659. (reg_data3 & 0x000080) ? " A2/EIAJ pilot tone " : "",
  660. (reg_data3 & 0x000100) ? " A2/EIAJ dual " : "",
  661. (reg_data3 & 0x000200) ? " A2/EIAJ stereo " : "",
  662. (reg_data3 & 0x000400) ? " A2/EIAJ noise mute " : "",
  663. (reg_data3 & 0x000800) ? " BTSC/FM radio pilot " : "",
  664. (reg_data3 & 0x001000) ? " SAP carrier " : "",
  665. (reg_data3 & 0x002000) ? " BTSC stereo noise mute " : "",
  666. (reg_data3 & 0x004000) ? " SAP noise mute " : "",
  667. (reg_data3 & 0x008000) ? " VDSP " : "",
  668. (reg_data3 & 0x010000) ? " NICST " : "",
  669. (reg_data3 & 0x020000) ? " NICDU " : "",
  670. (reg_data3 & 0x040000) ? " NICAM muted " : "",
  671. (reg_data3 & 0x080000) ? " NICAM reserve sound " : "",
  672. (reg_data3 & 0x100000) ? " init done " : "");
  673. if (reg_data3 & 0x000220) {
  674. v4l2_dbg(1, debug, sd, "ST!!!\n");
  675. *stereo_flag = 1;
  676. }
  677. if (reg_data3 & 0x000140) {
  678. v4l2_dbg(1, debug, sd, "DUAL!!!\n");
  679. *dual_flag = 1;
  680. }
  681. }
  682. /* regs write to set audio mode */
  683. static void set_audio_mode(struct v4l2_subdev *sd, int audio_mode)
  684. {
  685. v4l2_dbg(1, debug, sd, "writing registers to set audio mode by set %d\n",
  686. audio_mode);
  687. saa717x_write(sd, 0x46c, reg_set_audio_template[audio_mode][0]);
  688. saa717x_write(sd, 0x470, reg_set_audio_template[audio_mode][1]);
  689. }
  690. /* write regs to video output level (bright,contrast,hue,sat) */
  691. static void set_video_output_level_regs(struct v4l2_subdev *sd,
  692. struct saa717x_state *decoder)
  693. {
  694. /* brightness ffh (bright) - 80h (ITU level) - 00h (dark) */
  695. saa717x_write(sd, 0x10a, decoder->bright);
  696. /* contrast 7fh (max: 1.984) - 44h (ITU) - 40h (1.0) -
  697. 0h (luminance off) 40: i2c dump
  698. c0h (-1.0 inverse chrominance)
  699. 80h (-2.0 inverse chrominance) */
  700. saa717x_write(sd, 0x10b, decoder->contrast);
  701. /* saturation? 7fh(max)-40h(ITU)-0h(color off)
  702. c0h (-1.0 inverse chrominance)
  703. 80h (-2.0 inverse chrominance) */
  704. saa717x_write(sd, 0x10c, decoder->sat);
  705. /* color hue (phase) control
  706. 7fh (+178.6) - 0h (0 normal) - 80h (-180.0) */
  707. saa717x_write(sd, 0x10d, decoder->hue);
  708. }
  709. /* write regs to set audio volume, bass and treble */
  710. static int set_audio_regs(struct v4l2_subdev *sd,
  711. struct saa717x_state *decoder)
  712. {
  713. u8 mute = 0xac; /* -84 dB */
  714. u32 val;
  715. unsigned int work_l, work_r;
  716. /* set SIF analog I/O select */
  717. saa717x_write(sd, 0x0594, decoder->audio_input);
  718. v4l2_dbg(1, debug, sd, "set audio input %d\n",
  719. decoder->audio_input);
  720. /* normalize ( 65535 to 0 -> 24 to -40 (not -84)) */
  721. work_l = (min(65536 - decoder->audio_main_balance, 32768) * decoder->audio_main_volume) / 32768;
  722. work_r = (min(decoder->audio_main_balance, (u16)32768) * decoder->audio_main_volume) / 32768;
  723. decoder->audio_main_vol_l = (long)work_l * (24 - (-40)) / 65535 - 40;
  724. decoder->audio_main_vol_r = (long)work_r * (24 - (-40)) / 65535 - 40;
  725. /* set main volume */
  726. /* main volume L[7-0],R[7-0],0x00 24=24dB,-83dB, -84(mute) */
  727. /* def:0dB->6dB(MPG600GR) */
  728. /* if mute is on, set mute */
  729. if (decoder->audio_main_mute) {
  730. val = mute | (mute << 8);
  731. } else {
  732. val = (u8)decoder->audio_main_vol_l |
  733. ((u8)decoder->audio_main_vol_r << 8);
  734. }
  735. saa717x_write(sd, 0x480, val);
  736. /* bass and treble; go to another function */
  737. /* set bass and treble */
  738. val = decoder->audio_main_bass | (decoder->audio_main_treble << 8);
  739. saa717x_write(sd, 0x488, val);
  740. return 0;
  741. }
  742. /********** scaling staff ***********/
  743. static void set_h_prescale(struct v4l2_subdev *sd,
  744. int task, int prescale)
  745. {
  746. static const struct {
  747. int xpsc;
  748. int xacl;
  749. int xc2_1;
  750. int xdcg;
  751. int vpfy;
  752. } vals[] = {
  753. /* XPSC XACL XC2_1 XDCG VPFY */
  754. { 1, 0, 0, 0, 0 },
  755. { 2, 2, 1, 2, 2 },
  756. { 3, 4, 1, 3, 2 },
  757. { 4, 8, 1, 4, 2 },
  758. { 5, 8, 1, 4, 2 },
  759. { 6, 8, 1, 4, 3 },
  760. { 7, 8, 1, 4, 3 },
  761. { 8, 15, 0, 4, 3 },
  762. { 9, 15, 0, 4, 3 },
  763. { 10, 16, 1, 5, 3 },
  764. };
  765. static const int count = ARRAY_SIZE(vals);
  766. int i, task_shift;
  767. task_shift = task * 0x40;
  768. for (i = 0; i < count; i++)
  769. if (vals[i].xpsc == prescale)
  770. break;
  771. if (i == count)
  772. return;
  773. /* horizonal prescaling */
  774. saa717x_write(sd, 0x60 + task_shift, vals[i].xpsc);
  775. /* accumulation length */
  776. saa717x_write(sd, 0x61 + task_shift, vals[i].xacl);
  777. /* level control */
  778. saa717x_write(sd, 0x62 + task_shift,
  779. (vals[i].xc2_1 << 3) | vals[i].xdcg);
  780. /*FIR prefilter control */
  781. saa717x_write(sd, 0x63 + task_shift,
  782. (vals[i].vpfy << 2) | vals[i].vpfy);
  783. }
  784. /********** scaling staff ***********/
  785. static void set_v_scale(struct v4l2_subdev *sd, int task, int yscale)
  786. {
  787. int task_shift;
  788. task_shift = task * 0x40;
  789. /* Vertical scaling ratio (LOW) */
  790. saa717x_write(sd, 0x70 + task_shift, yscale & 0xff);
  791. /* Vertical scaling ratio (HI) */
  792. saa717x_write(sd, 0x71 + task_shift, yscale >> 8);
  793. }
  794. static int saa717x_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  795. {
  796. struct saa717x_state *state = to_state(sd);
  797. switch (ctrl->id) {
  798. case V4L2_CID_BRIGHTNESS:
  799. if (ctrl->value < 0 || ctrl->value > 255) {
  800. v4l2_err(sd, "invalid brightness setting %d\n", ctrl->value);
  801. return -ERANGE;
  802. }
  803. state->bright = ctrl->value;
  804. v4l2_dbg(1, debug, sd, "bright:%d\n", state->bright);
  805. saa717x_write(sd, 0x10a, state->bright);
  806. break;
  807. case V4L2_CID_CONTRAST:
  808. if (ctrl->value < 0 || ctrl->value > 127) {
  809. v4l2_err(sd, "invalid contrast setting %d\n", ctrl->value);
  810. return -ERANGE;
  811. }
  812. state->contrast = ctrl->value;
  813. v4l2_dbg(1, debug, sd, "contrast:%d\n", state->contrast);
  814. saa717x_write(sd, 0x10b, state->contrast);
  815. break;
  816. case V4L2_CID_SATURATION:
  817. if (ctrl->value < 0 || ctrl->value > 127) {
  818. v4l2_err(sd, "invalid saturation setting %d\n", ctrl->value);
  819. return -ERANGE;
  820. }
  821. state->sat = ctrl->value;
  822. v4l2_dbg(1, debug, sd, "sat:%d\n", state->sat);
  823. saa717x_write(sd, 0x10c, state->sat);
  824. break;
  825. case V4L2_CID_HUE:
  826. if (ctrl->value < -128 || ctrl->value > 127) {
  827. v4l2_err(sd, "invalid hue setting %d\n", ctrl->value);
  828. return -ERANGE;
  829. }
  830. state->hue = ctrl->value;
  831. v4l2_dbg(1, debug, sd, "hue:%d\n", state->hue);
  832. saa717x_write(sd, 0x10d, state->hue);
  833. break;
  834. case V4L2_CID_AUDIO_MUTE:
  835. state->audio_main_mute = ctrl->value;
  836. set_audio_regs(sd, state);
  837. break;
  838. case V4L2_CID_AUDIO_VOLUME:
  839. state->audio_main_volume = ctrl->value;
  840. set_audio_regs(sd, state);
  841. break;
  842. case V4L2_CID_AUDIO_BALANCE:
  843. state->audio_main_balance = ctrl->value;
  844. set_audio_regs(sd, state);
  845. break;
  846. case V4L2_CID_AUDIO_TREBLE:
  847. state->audio_main_treble = ctrl->value;
  848. set_audio_regs(sd, state);
  849. break;
  850. case V4L2_CID_AUDIO_BASS:
  851. state->audio_main_bass = ctrl->value;
  852. set_audio_regs(sd, state);
  853. break;
  854. default:
  855. return -EINVAL;
  856. }
  857. return 0;
  858. }
  859. static int saa717x_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  860. {
  861. struct saa717x_state *state = to_state(sd);
  862. switch (ctrl->id) {
  863. case V4L2_CID_BRIGHTNESS:
  864. ctrl->value = state->bright;
  865. break;
  866. case V4L2_CID_CONTRAST:
  867. ctrl->value = state->contrast;
  868. break;
  869. case V4L2_CID_SATURATION:
  870. ctrl->value = state->sat;
  871. break;
  872. case V4L2_CID_HUE:
  873. ctrl->value = state->hue;
  874. break;
  875. case V4L2_CID_AUDIO_MUTE:
  876. ctrl->value = state->audio_main_mute;
  877. break;
  878. case V4L2_CID_AUDIO_VOLUME:
  879. ctrl->value = state->audio_main_volume;
  880. break;
  881. case V4L2_CID_AUDIO_BALANCE:
  882. ctrl->value = state->audio_main_balance;
  883. break;
  884. case V4L2_CID_AUDIO_TREBLE:
  885. ctrl->value = state->audio_main_treble;
  886. break;
  887. case V4L2_CID_AUDIO_BASS:
  888. ctrl->value = state->audio_main_bass;
  889. break;
  890. default:
  891. return -EINVAL;
  892. }
  893. return 0;
  894. }
  895. static struct v4l2_queryctrl saa717x_qctrl[] = {
  896. {
  897. .id = V4L2_CID_BRIGHTNESS,
  898. .type = V4L2_CTRL_TYPE_INTEGER,
  899. .name = "Brightness",
  900. .minimum = 0,
  901. .maximum = 255,
  902. .step = 1,
  903. .default_value = 128,
  904. .flags = 0,
  905. }, {
  906. .id = V4L2_CID_CONTRAST,
  907. .type = V4L2_CTRL_TYPE_INTEGER,
  908. .name = "Contrast",
  909. .minimum = 0,
  910. .maximum = 255,
  911. .step = 1,
  912. .default_value = 64,
  913. .flags = 0,
  914. }, {
  915. .id = V4L2_CID_SATURATION,
  916. .type = V4L2_CTRL_TYPE_INTEGER,
  917. .name = "Saturation",
  918. .minimum = 0,
  919. .maximum = 255,
  920. .step = 1,
  921. .default_value = 64,
  922. .flags = 0,
  923. }, {
  924. .id = V4L2_CID_HUE,
  925. .type = V4L2_CTRL_TYPE_INTEGER,
  926. .name = "Hue",
  927. .minimum = -128,
  928. .maximum = 127,
  929. .step = 1,
  930. .default_value = 0,
  931. .flags = 0,
  932. }, {
  933. .id = V4L2_CID_AUDIO_VOLUME,
  934. .type = V4L2_CTRL_TYPE_INTEGER,
  935. .name = "Volume",
  936. .minimum = 0,
  937. .maximum = 65535,
  938. .step = 65535 / 100,
  939. .default_value = 58880,
  940. .flags = 0,
  941. }, {
  942. .id = V4L2_CID_AUDIO_BALANCE,
  943. .type = V4L2_CTRL_TYPE_INTEGER,
  944. .name = "Balance",
  945. .minimum = 0,
  946. .maximum = 65535,
  947. .step = 65535 / 100,
  948. .default_value = 32768,
  949. .flags = 0,
  950. }, {
  951. .id = V4L2_CID_AUDIO_MUTE,
  952. .type = V4L2_CTRL_TYPE_BOOLEAN,
  953. .name = "Mute",
  954. .minimum = 0,
  955. .maximum = 1,
  956. .step = 1,
  957. .default_value = 1,
  958. .flags = 0,
  959. }, {
  960. .id = V4L2_CID_AUDIO_BASS,
  961. .type = V4L2_CTRL_TYPE_INTEGER,
  962. .name = "Bass",
  963. .minimum = 0,
  964. .maximum = 65535,
  965. .step = 65535 / 100,
  966. .default_value = 32768,
  967. }, {
  968. .id = V4L2_CID_AUDIO_TREBLE,
  969. .type = V4L2_CTRL_TYPE_INTEGER,
  970. .name = "Treble",
  971. .minimum = 0,
  972. .maximum = 65535,
  973. .step = 65535 / 100,
  974. .default_value = 32768,
  975. },
  976. };
  977. static int saa717x_s_video_routing(struct v4l2_subdev *sd,
  978. u32 input, u32 output, u32 config)
  979. {
  980. struct saa717x_state *decoder = to_state(sd);
  981. int is_tuner = input & 0x80; /* tuner input flag */
  982. input &= 0x7f;
  983. v4l2_dbg(1, debug, sd, "decoder set input (%d)\n", input);
  984. /* inputs from 0-9 are available*/
  985. /* saa717x have mode0-mode9 but mode5 is reserved. */
  986. if (input > 9 || input == 5)
  987. return -EINVAL;
  988. if (decoder->input != input) {
  989. int input_line = input;
  990. decoder->input = input_line;
  991. v4l2_dbg(1, debug, sd, "now setting %s input %d\n",
  992. input_line >= 6 ? "S-Video" : "Composite",
  993. input_line);
  994. /* select mode */
  995. saa717x_write(sd, 0x102,
  996. (saa717x_read(sd, 0x102) & 0xf0) |
  997. input_line);
  998. /* bypass chrominance trap for modes 6..9 */
  999. saa717x_write(sd, 0x109,
  1000. (saa717x_read(sd, 0x109) & 0x7f) |
  1001. (input_line < 6 ? 0x0 : 0x80));
  1002. /* change audio_mode */
  1003. if (is_tuner) {
  1004. /* tuner */
  1005. set_audio_mode(sd, decoder->tuner_audio_mode);
  1006. } else {
  1007. /* Force to STEREO mode if Composite or
  1008. * S-Video were chosen */
  1009. set_audio_mode(sd, TUNER_AUDIO_STEREO);
  1010. }
  1011. /* change initialize procedure (Composite/S-Video) */
  1012. if (is_tuner)
  1013. saa717x_write_regs(sd, reg_init_tuner_input);
  1014. else if (input_line >= 6)
  1015. saa717x_write_regs(sd, reg_init_svideo_input);
  1016. else
  1017. saa717x_write_regs(sd, reg_init_composite_input);
  1018. }
  1019. return 0;
  1020. }
  1021. static int saa717x_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  1022. {
  1023. int i;
  1024. for (i = 0; i < ARRAY_SIZE(saa717x_qctrl); i++)
  1025. if (qc->id && qc->id == saa717x_qctrl[i].id) {
  1026. memcpy(qc, &saa717x_qctrl[i], sizeof(*qc));
  1027. return 0;
  1028. }
  1029. return -EINVAL;
  1030. }
  1031. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1032. static int saa717x_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  1033. {
  1034. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1035. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  1036. return -EINVAL;
  1037. if (!capable(CAP_SYS_ADMIN))
  1038. return -EPERM;
  1039. reg->val = saa717x_read(sd, reg->reg);
  1040. reg->size = 1;
  1041. return 0;
  1042. }
  1043. static int saa717x_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
  1044. {
  1045. struct i2c_client *client = v4l2_get_subdevdata(sd);
  1046. u16 addr = reg->reg & 0xffff;
  1047. u8 val = reg->val & 0xff;
  1048. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  1049. return -EINVAL;
  1050. if (!capable(CAP_SYS_ADMIN))
  1051. return -EPERM;
  1052. saa717x_write(sd, addr, val);
  1053. return 0;
  1054. }
  1055. #endif
  1056. static int saa717x_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
  1057. {
  1058. struct v4l2_pix_format *pix;
  1059. int prescale, h_scale, v_scale;
  1060. pix = &fmt->fmt.pix;
  1061. v4l2_dbg(1, debug, sd, "decoder set size\n");
  1062. /* FIXME need better bounds checking here */
  1063. if (pix->width < 1 || pix->width > 1440)
  1064. return -EINVAL;
  1065. if (pix->height < 1 || pix->height > 960)
  1066. return -EINVAL;
  1067. /* scaling setting */
  1068. /* NTSC and interlace only */
  1069. prescale = SAA717X_NTSC_WIDTH / pix->width;
  1070. if (prescale == 0)
  1071. prescale = 1;
  1072. h_scale = 1024 * SAA717X_NTSC_WIDTH / prescale / pix->width;
  1073. /* interlace */
  1074. v_scale = 512 * 2 * SAA717X_NTSC_HEIGHT / pix->height;
  1075. /* Horizontal prescaling etc */
  1076. set_h_prescale(sd, 0, prescale);
  1077. set_h_prescale(sd, 1, prescale);
  1078. /* Horizontal scaling increment */
  1079. /* TASK A */
  1080. saa717x_write(sd, 0x6C, (u8)(h_scale & 0xFF));
  1081. saa717x_write(sd, 0x6D, (u8)((h_scale >> 8) & 0xFF));
  1082. /* TASK B */
  1083. saa717x_write(sd, 0xAC, (u8)(h_scale & 0xFF));
  1084. saa717x_write(sd, 0xAD, (u8)((h_scale >> 8) & 0xFF));
  1085. /* Vertical prescaling etc */
  1086. set_v_scale(sd, 0, v_scale);
  1087. set_v_scale(sd, 1, v_scale);
  1088. /* set video output size */
  1089. /* video number of pixels at output */
  1090. /* TASK A */
  1091. saa717x_write(sd, 0x5C, (u8)(pix->width & 0xFF));
  1092. saa717x_write(sd, 0x5D, (u8)((pix->width >> 8) & 0xFF));
  1093. /* TASK B */
  1094. saa717x_write(sd, 0x9C, (u8)(pix->width & 0xFF));
  1095. saa717x_write(sd, 0x9D, (u8)((pix->width >> 8) & 0xFF));
  1096. /* video number of lines at output */
  1097. /* TASK A */
  1098. saa717x_write(sd, 0x5E, (u8)(pix->height & 0xFF));
  1099. saa717x_write(sd, 0x5F, (u8)((pix->height >> 8) & 0xFF));
  1100. /* TASK B */
  1101. saa717x_write(sd, 0x9E, (u8)(pix->height & 0xFF));
  1102. saa717x_write(sd, 0x9F, (u8)((pix->height >> 8) & 0xFF));
  1103. return 0;
  1104. }
  1105. static int saa717x_s_radio(struct v4l2_subdev *sd)
  1106. {
  1107. struct saa717x_state *decoder = to_state(sd);
  1108. decoder->radio = 1;
  1109. return 0;
  1110. }
  1111. static int saa717x_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
  1112. {
  1113. struct saa717x_state *decoder = to_state(sd);
  1114. v4l2_dbg(1, debug, sd, "decoder set norm ");
  1115. v4l2_dbg(1, debug, sd, "(not yet implementd)\n");
  1116. decoder->radio = 0;
  1117. decoder->std = std;
  1118. return 0;
  1119. }
  1120. static int saa717x_s_audio_routing(struct v4l2_subdev *sd,
  1121. u32 input, u32 output, u32 config)
  1122. {
  1123. struct saa717x_state *decoder = to_state(sd);
  1124. if (input < 3) { /* FIXME! --tadachi */
  1125. decoder->audio_input = input;
  1126. v4l2_dbg(1, debug, sd,
  1127. "set decoder audio input to %d\n",
  1128. decoder->audio_input);
  1129. set_audio_regs(sd, decoder);
  1130. return 0;
  1131. }
  1132. return -ERANGE;
  1133. }
  1134. static int saa717x_s_stream(struct v4l2_subdev *sd, int enable)
  1135. {
  1136. struct saa717x_state *decoder = to_state(sd);
  1137. v4l2_dbg(1, debug, sd, "decoder %s output\n",
  1138. enable ? "enable" : "disable");
  1139. decoder->enable = enable;
  1140. saa717x_write(sd, 0x193, enable ? 0xa6 : 0x26);
  1141. return 0;
  1142. }
  1143. /* change audio mode */
  1144. static int saa717x_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  1145. {
  1146. struct saa717x_state *decoder = to_state(sd);
  1147. int audio_mode;
  1148. char *mes[4] = {
  1149. "MONO", "STEREO", "LANG1", "LANG2/SAP"
  1150. };
  1151. audio_mode = TUNER_AUDIO_STEREO;
  1152. switch (vt->audmode) {
  1153. case V4L2_TUNER_MODE_MONO:
  1154. audio_mode = TUNER_AUDIO_MONO;
  1155. break;
  1156. case V4L2_TUNER_MODE_STEREO:
  1157. audio_mode = TUNER_AUDIO_STEREO;
  1158. break;
  1159. case V4L2_TUNER_MODE_LANG2:
  1160. audio_mode = TUNER_AUDIO_LANG2;
  1161. break;
  1162. case V4L2_TUNER_MODE_LANG1:
  1163. audio_mode = TUNER_AUDIO_LANG1;
  1164. break;
  1165. }
  1166. v4l2_dbg(1, debug, sd, "change audio mode to %s\n",
  1167. mes[audio_mode]);
  1168. decoder->tuner_audio_mode = audio_mode;
  1169. /* The registers are not changed here. */
  1170. /* See DECODER_ENABLE_OUTPUT section. */
  1171. set_audio_mode(sd, decoder->tuner_audio_mode);
  1172. return 0;
  1173. }
  1174. static int saa717x_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
  1175. {
  1176. struct saa717x_state *decoder = to_state(sd);
  1177. int dual_f, stereo_f;
  1178. if (decoder->radio)
  1179. return 0;
  1180. get_inf_dev_status(sd, &dual_f, &stereo_f);
  1181. v4l2_dbg(1, debug, sd, "DETECT==st:%d dual:%d\n",
  1182. stereo_f, dual_f);
  1183. /* mono */
  1184. if ((dual_f == 0) && (stereo_f == 0)) {
  1185. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  1186. v4l2_dbg(1, debug, sd, "DETECT==MONO\n");
  1187. }
  1188. /* stereo */
  1189. if (stereo_f == 1) {
  1190. if (vt->audmode == V4L2_TUNER_MODE_STEREO ||
  1191. vt->audmode == V4L2_TUNER_MODE_LANG1) {
  1192. vt->rxsubchans = V4L2_TUNER_SUB_STEREO;
  1193. v4l2_dbg(1, debug, sd, "DETECT==ST(ST)\n");
  1194. } else {
  1195. vt->rxsubchans = V4L2_TUNER_SUB_MONO;
  1196. v4l2_dbg(1, debug, sd, "DETECT==ST(MONO)\n");
  1197. }
  1198. }
  1199. /* dual */
  1200. if (dual_f == 1) {
  1201. if (vt->audmode == V4L2_TUNER_MODE_LANG2) {
  1202. vt->rxsubchans = V4L2_TUNER_SUB_LANG2 | V4L2_TUNER_SUB_MONO;
  1203. v4l2_dbg(1, debug, sd, "DETECT==DUAL1\n");
  1204. } else {
  1205. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_MONO;
  1206. v4l2_dbg(1, debug, sd, "DETECT==DUAL2\n");
  1207. }
  1208. }
  1209. return 0;
  1210. }
  1211. /* ----------------------------------------------------------------------- */
  1212. static const struct v4l2_subdev_core_ops saa717x_core_ops = {
  1213. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1214. .g_register = saa717x_g_register,
  1215. .s_register = saa717x_s_register,
  1216. #endif
  1217. .queryctrl = saa717x_queryctrl,
  1218. .g_ctrl = saa717x_g_ctrl,
  1219. .s_ctrl = saa717x_s_ctrl,
  1220. .s_std = saa717x_s_std,
  1221. };
  1222. static const struct v4l2_subdev_tuner_ops saa717x_tuner_ops = {
  1223. .g_tuner = saa717x_g_tuner,
  1224. .s_tuner = saa717x_s_tuner,
  1225. .s_radio = saa717x_s_radio,
  1226. };
  1227. static const struct v4l2_subdev_video_ops saa717x_video_ops = {
  1228. .s_routing = saa717x_s_video_routing,
  1229. .s_fmt = saa717x_s_fmt,
  1230. .s_stream = saa717x_s_stream,
  1231. };
  1232. static const struct v4l2_subdev_audio_ops saa717x_audio_ops = {
  1233. .s_routing = saa717x_s_audio_routing,
  1234. };
  1235. static const struct v4l2_subdev_ops saa717x_ops = {
  1236. .core = &saa717x_core_ops,
  1237. .tuner = &saa717x_tuner_ops,
  1238. .audio = &saa717x_audio_ops,
  1239. .video = &saa717x_video_ops,
  1240. };
  1241. /* ----------------------------------------------------------------------- */
  1242. /* i2c implementation */
  1243. /* ----------------------------------------------------------------------- */
  1244. static int saa717x_probe(struct i2c_client *client,
  1245. const struct i2c_device_id *did)
  1246. {
  1247. struct saa717x_state *decoder;
  1248. struct v4l2_subdev *sd;
  1249. u8 id = 0;
  1250. char *p = "";
  1251. /* Check if the adapter supports the needed features */
  1252. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1253. return -EIO;
  1254. decoder = kzalloc(sizeof(struct saa717x_state), GFP_KERNEL);
  1255. if (decoder == NULL)
  1256. return -ENOMEM;
  1257. sd = &decoder->sd;
  1258. v4l2_i2c_subdev_init(sd, client, &saa717x_ops);
  1259. if (saa717x_write(sd, 0x5a4, 0xfe) &&
  1260. saa717x_write(sd, 0x5a5, 0x0f) &&
  1261. saa717x_write(sd, 0x5a6, 0x00) &&
  1262. saa717x_write(sd, 0x5a7, 0x01))
  1263. id = saa717x_read(sd, 0x5a0);
  1264. if (id != 0xc2 && id != 0x32 && id != 0xf2 && id != 0x6c) {
  1265. v4l2_dbg(1, debug, sd, "saa717x not found (id=%02x)\n", id);
  1266. kfree(decoder);
  1267. return -ENODEV;
  1268. }
  1269. if (id == 0xc2)
  1270. p = "saa7173";
  1271. else if (id == 0x32)
  1272. p = "saa7174A";
  1273. else if (id == 0x6c)
  1274. p = "saa7174HL";
  1275. else
  1276. p = "saa7171";
  1277. v4l2_info(sd, "%s found @ 0x%x (%s)\n", p,
  1278. client->addr << 1, client->adapter->name);
  1279. decoder->std = V4L2_STD_NTSC;
  1280. decoder->input = -1;
  1281. decoder->enable = 1;
  1282. /* tune these parameters */
  1283. decoder->bright = 0x80;
  1284. decoder->contrast = 0x44;
  1285. decoder->sat = 0x40;
  1286. decoder->hue = 0x00;
  1287. /* FIXME!! */
  1288. decoder->playback = 0; /* initially capture mode used */
  1289. decoder->audio = 1; /* DECODER_AUDIO_48_KHZ */
  1290. decoder->audio_input = 2; /* FIXME!! */
  1291. decoder->tuner_audio_mode = TUNER_AUDIO_STEREO;
  1292. /* set volume, bass and treble */
  1293. decoder->audio_main_vol_l = 6;
  1294. decoder->audio_main_vol_r = 6;
  1295. decoder->audio_main_bass = 0;
  1296. decoder->audio_main_treble = 0;
  1297. decoder->audio_main_mute = 0;
  1298. decoder->audio_main_balance = 32768;
  1299. /* normalize (24 to -40 (not -84) -> 65535 to 0) */
  1300. decoder->audio_main_volume =
  1301. (decoder->audio_main_vol_r + 41) * 65535 / (24 - (-40));
  1302. v4l2_dbg(1, debug, sd, "writing init values\n");
  1303. /* FIXME!! */
  1304. saa717x_write_regs(sd, reg_init_initialize);
  1305. set_video_output_level_regs(sd, decoder);
  1306. /* set bass,treble to 0db 20041101 K.Ohta */
  1307. decoder->audio_main_bass = 0;
  1308. decoder->audio_main_treble = 0;
  1309. set_audio_regs(sd, decoder);
  1310. set_current_state(TASK_INTERRUPTIBLE);
  1311. schedule_timeout(2*HZ);
  1312. return 0;
  1313. }
  1314. static int saa717x_remove(struct i2c_client *client)
  1315. {
  1316. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1317. v4l2_device_unregister_subdev(sd);
  1318. kfree(to_state(sd));
  1319. return 0;
  1320. }
  1321. /* ----------------------------------------------------------------------- */
  1322. static const struct i2c_device_id saa717x_id[] = {
  1323. { "saa717x", 0 },
  1324. { }
  1325. };
  1326. MODULE_DEVICE_TABLE(i2c, saa717x_id);
  1327. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  1328. .name = "saa717x",
  1329. .probe = saa717x_probe,
  1330. .remove = saa717x_remove,
  1331. .id_table = saa717x_id,
  1332. };