mt9v011.c 15 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/videodev2.h>
  9. #include <linux/delay.h>
  10. #include <asm/div64.h>
  11. #include <media/v4l2-device.h>
  12. #include "mt9v011.h"
  13. #include <media/v4l2-i2c-drv.h>
  14. #include <media/v4l2-chip-ident.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  17. MODULE_LICENSE("GPL");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. /* supported controls */
  22. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  23. {
  24. .id = V4L2_CID_GAIN,
  25. .type = V4L2_CTRL_TYPE_INTEGER,
  26. .name = "Gain",
  27. .minimum = 0,
  28. .maximum = (1 << 10) - 1,
  29. .step = 1,
  30. .default_value = 0x0020,
  31. .flags = 0,
  32. }, {
  33. .id = V4L2_CID_RED_BALANCE,
  34. .type = V4L2_CTRL_TYPE_INTEGER,
  35. .name = "Red Balance",
  36. .minimum = -1 << 9,
  37. .maximum = (1 << 9) - 1,
  38. .step = 1,
  39. .default_value = 0,
  40. .flags = 0,
  41. }, {
  42. .id = V4L2_CID_BLUE_BALANCE,
  43. .type = V4L2_CTRL_TYPE_INTEGER,
  44. .name = "Blue Balance",
  45. .minimum = -1 << 9,
  46. .maximum = (1 << 9) - 1,
  47. .step = 1,
  48. .default_value = 0,
  49. .flags = 0,
  50. }, {
  51. .id = V4L2_CID_HFLIP,
  52. .type = V4L2_CTRL_TYPE_BOOLEAN,
  53. .name = "Mirror",
  54. .minimum = 0,
  55. .maximum = 1,
  56. .step = 1,
  57. .default_value = 0,
  58. .flags = 0,
  59. }, {
  60. .id = V4L2_CID_VFLIP,
  61. .type = V4L2_CTRL_TYPE_BOOLEAN,
  62. .name = "Vflip",
  63. .minimum = 0,
  64. .maximum = 1,
  65. .step = 1,
  66. .default_value = 0,
  67. .flags = 0,
  68. }, {
  69. }
  70. };
  71. struct mt9v011 {
  72. struct v4l2_subdev sd;
  73. unsigned width, height;
  74. unsigned xtal;
  75. unsigned hflip:1;
  76. unsigned vflip:1;
  77. u16 global_gain, red_bal, blue_bal;
  78. };
  79. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  80. {
  81. return container_of(sd, struct mt9v011, sd);
  82. }
  83. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  84. {
  85. struct i2c_client *c = v4l2_get_subdevdata(sd);
  86. __be16 buffer;
  87. int rc, val;
  88. rc = i2c_master_send(c, &addr, 1);
  89. if (rc != 1)
  90. v4l2_dbg(0, debug, sd,
  91. "i2c i/o error: rc == %d (should be 1)\n", rc);
  92. msleep(10);
  93. rc = i2c_master_recv(c, (char *)&buffer, 2);
  94. if (rc != 2)
  95. v4l2_dbg(0, debug, sd,
  96. "i2c i/o error: rc == %d (should be 2)\n", rc);
  97. val = be16_to_cpu(buffer);
  98. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  99. return val;
  100. }
  101. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  102. u16 value)
  103. {
  104. struct i2c_client *c = v4l2_get_subdevdata(sd);
  105. unsigned char buffer[3];
  106. int rc;
  107. buffer[0] = addr;
  108. buffer[1] = value >> 8;
  109. buffer[2] = value & 0xff;
  110. v4l2_dbg(2, debug, sd,
  111. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  112. rc = i2c_master_send(c, buffer, 3);
  113. if (rc != 3)
  114. v4l2_dbg(0, debug, sd,
  115. "i2c i/o error: rc == %d (should be 3)\n", rc);
  116. }
  117. struct i2c_reg_value {
  118. unsigned char reg;
  119. u16 value;
  120. };
  121. /*
  122. * Values used at the original driver
  123. * Some values are marked as Reserved at the datasheet
  124. */
  125. static const struct i2c_reg_value mt9v011_init_default[] = {
  126. { R0D_MT9V011_RESET, 0x0001 },
  127. { R0D_MT9V011_RESET, 0x0000 },
  128. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  129. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  130. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  131. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  132. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  133. };
  134. static void set_balance(struct v4l2_subdev *sd)
  135. {
  136. struct mt9v011 *core = to_mt9v011(sd);
  137. u16 green1_gain, green2_gain, blue_gain, red_gain;
  138. green1_gain = core->global_gain;
  139. green2_gain = core->global_gain;
  140. blue_gain = core->global_gain +
  141. core->global_gain * core->blue_bal / (1 << 9);
  142. red_gain = core->global_gain +
  143. core->global_gain * core->blue_bal / (1 << 9);
  144. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
  145. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
  146. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  147. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  148. }
  149. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  150. {
  151. struct mt9v011 *core = to_mt9v011(sd);
  152. unsigned height, width, hblank, vblank, speed;
  153. unsigned row_time, t_time;
  154. u64 frames_per_ms;
  155. unsigned tmp;
  156. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  157. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  158. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  159. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  160. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  161. row_time = (width + 113 + hblank) * (speed + 2);
  162. t_time = row_time * (height + vblank + 1);
  163. frames_per_ms = core->xtal * 1000l;
  164. do_div(frames_per_ms, t_time);
  165. tmp = frames_per_ms;
  166. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  167. tmp / 1000, tmp % 1000, t_time);
  168. if (numerator && denominator) {
  169. *numerator = 1000;
  170. *denominator = (u32)frames_per_ms;
  171. }
  172. }
  173. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  174. {
  175. struct mt9v011 *core = to_mt9v011(sd);
  176. unsigned height, width, hblank, vblank;
  177. unsigned row_time, line_time;
  178. u64 t_time, speed;
  179. /* Avoid bogus calculus */
  180. if (!numerator || !denominator)
  181. return 0;
  182. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  183. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  184. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  185. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  186. row_time = width + 113 + hblank;
  187. line_time = height + vblank + 1;
  188. t_time = core->xtal * ((u64)numerator);
  189. /* round to the closest value */
  190. t_time += denominator / 2;
  191. do_div(t_time, denominator);
  192. speed = t_time;
  193. do_div(speed, row_time * line_time);
  194. /* Avoid having a negative value for speed */
  195. if (speed < 2)
  196. speed = 0;
  197. else
  198. speed -= 2;
  199. /* Avoid speed overflow */
  200. if (speed > 15)
  201. return 15;
  202. return (u16)speed;
  203. }
  204. static void set_res(struct v4l2_subdev *sd)
  205. {
  206. struct mt9v011 *core = to_mt9v011(sd);
  207. unsigned vstart, hstart;
  208. /*
  209. * The mt9v011 doesn't have scaling. So, in order to select the desired
  210. * resolution, we're cropping at the middle of the sensor.
  211. * hblank and vblank should be adjusted, in order to warrant that
  212. * we'll preserve the line timings for 30 fps, no matter what resolution
  213. * is selected.
  214. * NOTE: datasheet says that width (and height) should be filled with
  215. * width-1. However, this doesn't work, since one pixel per line will
  216. * be missing.
  217. */
  218. hstart = 14 + (640 - core->width) / 2;
  219. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  220. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  221. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  222. vstart = 8 + (480 - core->height) / 2;
  223. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  224. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  225. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  226. calc_fps(sd, NULL, NULL);
  227. };
  228. static void set_read_mode(struct v4l2_subdev *sd)
  229. {
  230. struct mt9v011 *core = to_mt9v011(sd);
  231. unsigned mode = 0x1000;
  232. if (core->hflip)
  233. mode |= 0x4000;
  234. if (core->vflip)
  235. mode |= 0x8000;
  236. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  237. }
  238. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  239. {
  240. int i;
  241. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  242. mt9v011_write(sd, mt9v011_init_default[i].reg,
  243. mt9v011_init_default[i].value);
  244. set_balance(sd);
  245. set_res(sd);
  246. set_read_mode(sd);
  247. return 0;
  248. };
  249. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  250. {
  251. struct mt9v011 *core = to_mt9v011(sd);
  252. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  253. switch (ctrl->id) {
  254. case V4L2_CID_GAIN:
  255. ctrl->value = core->global_gain;
  256. return 0;
  257. case V4L2_CID_RED_BALANCE:
  258. ctrl->value = core->red_bal;
  259. return 0;
  260. case V4L2_CID_BLUE_BALANCE:
  261. ctrl->value = core->blue_bal;
  262. return 0;
  263. case V4L2_CID_HFLIP:
  264. ctrl->value = core->hflip ? 1 : 0;
  265. return 0;
  266. case V4L2_CID_VFLIP:
  267. ctrl->value = core->vflip ? 1 : 0;
  268. return 0;
  269. }
  270. return -EINVAL;
  271. }
  272. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  273. {
  274. int i;
  275. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  276. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  277. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  278. memcpy(qc, &(mt9v011_qctrl[i]),
  279. sizeof(*qc));
  280. return 0;
  281. }
  282. return -EINVAL;
  283. }
  284. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  285. {
  286. struct mt9v011 *core = to_mt9v011(sd);
  287. u8 i, n;
  288. n = ARRAY_SIZE(mt9v011_qctrl);
  289. for (i = 0; i < n; i++) {
  290. if (ctrl->id != mt9v011_qctrl[i].id)
  291. continue;
  292. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  293. ctrl->value > mt9v011_qctrl[i].maximum)
  294. return -ERANGE;
  295. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  296. ctrl->id, ctrl->value);
  297. break;
  298. }
  299. switch (ctrl->id) {
  300. case V4L2_CID_GAIN:
  301. core->global_gain = ctrl->value;
  302. break;
  303. case V4L2_CID_RED_BALANCE:
  304. core->red_bal = ctrl->value;
  305. break;
  306. case V4L2_CID_BLUE_BALANCE:
  307. core->blue_bal = ctrl->value;
  308. break;
  309. case V4L2_CID_HFLIP:
  310. core->hflip = ctrl->value;
  311. set_read_mode(sd);
  312. return 0;
  313. case V4L2_CID_VFLIP:
  314. core->vflip = ctrl->value;
  315. set_read_mode(sd);
  316. return 0;
  317. default:
  318. return -EINVAL;
  319. }
  320. set_balance(sd);
  321. return 0;
  322. }
  323. static int mt9v011_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt)
  324. {
  325. if (fmt->index > 0)
  326. return -EINVAL;
  327. fmt->flags = 0;
  328. strcpy(fmt->description, "8 bpp Bayer GRGR..BGBG");
  329. fmt->pixelformat = V4L2_PIX_FMT_SGRBG8;
  330. return 0;
  331. }
  332. static int mt9v011_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
  333. {
  334. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  335. if (pix->pixelformat != V4L2_PIX_FMT_SGRBG8)
  336. return -EINVAL;
  337. v4l_bound_align_image(&pix->width, 48, 639, 1,
  338. &pix->height, 32, 480, 1, 0);
  339. return 0;
  340. }
  341. static int mt9v011_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  342. {
  343. struct v4l2_captureparm *cp = &parms->parm.capture;
  344. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  345. return -EINVAL;
  346. memset(cp, 0, sizeof(struct v4l2_captureparm));
  347. cp->capability = V4L2_CAP_TIMEPERFRAME;
  348. calc_fps(sd,
  349. &cp->timeperframe.numerator,
  350. &cp->timeperframe.denominator);
  351. return 0;
  352. }
  353. static int mt9v011_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
  354. {
  355. struct v4l2_captureparm *cp = &parms->parm.capture;
  356. struct v4l2_fract *tpf = &cp->timeperframe;
  357. u16 speed;
  358. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  359. return -EINVAL;
  360. if (cp->extendedmode != 0)
  361. return -EINVAL;
  362. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  363. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  364. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  365. /* Recalculate and update fps info */
  366. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  367. return 0;
  368. }
  369. static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
  370. {
  371. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  372. struct mt9v011 *core = to_mt9v011(sd);
  373. int rc;
  374. rc = mt9v011_try_fmt(sd, fmt);
  375. if (rc < 0)
  376. return -EINVAL;
  377. core->width = pix->width;
  378. core->height = pix->height;
  379. set_res(sd);
  380. return 0;
  381. }
  382. static int mt9v011_s_config(struct v4l2_subdev *sd, int dumb, void *data)
  383. {
  384. struct mt9v011 *core = to_mt9v011(sd);
  385. unsigned *xtal = data;
  386. v4l2_dbg(1, debug, sd, "s_config called\n");
  387. if (xtal) {
  388. core->xtal = *xtal;
  389. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  390. *xtal / 1000000, (*xtal / 1000) % 1000);
  391. }
  392. return 0;
  393. }
  394. #ifdef CONFIG_VIDEO_ADV_DEBUG
  395. static int mt9v011_g_register(struct v4l2_subdev *sd,
  396. struct v4l2_dbg_register *reg)
  397. {
  398. struct i2c_client *client = v4l2_get_subdevdata(sd);
  399. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  400. return -EINVAL;
  401. if (!capable(CAP_SYS_ADMIN))
  402. return -EPERM;
  403. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  404. reg->size = 2;
  405. return 0;
  406. }
  407. static int mt9v011_s_register(struct v4l2_subdev *sd,
  408. struct v4l2_dbg_register *reg)
  409. {
  410. struct i2c_client *client = v4l2_get_subdevdata(sd);
  411. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  412. return -EINVAL;
  413. if (!capable(CAP_SYS_ADMIN))
  414. return -EPERM;
  415. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  416. return 0;
  417. }
  418. #endif
  419. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  420. struct v4l2_dbg_chip_ident *chip)
  421. {
  422. u16 version;
  423. struct i2c_client *client = v4l2_get_subdevdata(sd);
  424. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  425. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  426. version);
  427. }
  428. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  429. .queryctrl = mt9v011_queryctrl,
  430. .g_ctrl = mt9v011_g_ctrl,
  431. .s_ctrl = mt9v011_s_ctrl,
  432. .reset = mt9v011_reset,
  433. .s_config = mt9v011_s_config,
  434. .g_chip_ident = mt9v011_g_chip_ident,
  435. #ifdef CONFIG_VIDEO_ADV_DEBUG
  436. .g_register = mt9v011_g_register,
  437. .s_register = mt9v011_s_register,
  438. #endif
  439. };
  440. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  441. .enum_fmt = mt9v011_enum_fmt,
  442. .try_fmt = mt9v011_try_fmt,
  443. .s_fmt = mt9v011_s_fmt,
  444. .g_parm = mt9v011_g_parm,
  445. .s_parm = mt9v011_s_parm,
  446. };
  447. static const struct v4l2_subdev_ops mt9v011_ops = {
  448. .core = &mt9v011_core_ops,
  449. .video = &mt9v011_video_ops,
  450. };
  451. /****************************************************************************
  452. I2C Client & Driver
  453. ****************************************************************************/
  454. static int mt9v011_probe(struct i2c_client *c,
  455. const struct i2c_device_id *id)
  456. {
  457. u16 version;
  458. struct mt9v011 *core;
  459. struct v4l2_subdev *sd;
  460. /* Check if the adapter supports the needed features */
  461. if (!i2c_check_functionality(c->adapter,
  462. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  463. return -EIO;
  464. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  465. if (!core)
  466. return -ENOMEM;
  467. sd = &core->sd;
  468. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  469. /* Check if the sensor is really a MT9V011 */
  470. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  471. if ((version != MT9V011_VERSION) &&
  472. (version != MT9V011_REV_B_VERSION)) {
  473. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  474. version);
  475. kfree(core);
  476. return -EINVAL;
  477. }
  478. core->global_gain = 0x0024;
  479. core->width = 640;
  480. core->height = 480;
  481. core->xtal = 27000000; /* Hz */
  482. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  483. c->addr << 1, c->adapter->name, version);
  484. return 0;
  485. }
  486. static int mt9v011_remove(struct i2c_client *c)
  487. {
  488. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  489. v4l2_dbg(1, debug, sd,
  490. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  491. c->addr << 1);
  492. v4l2_device_unregister_subdev(sd);
  493. kfree(to_mt9v011(sd));
  494. return 0;
  495. }
  496. /* ----------------------------------------------------------------------- */
  497. static const struct i2c_device_id mt9v011_id[] = {
  498. { "mt9v011", 0 },
  499. { }
  500. };
  501. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  502. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  503. .name = "mt9v011",
  504. .probe = mt9v011_probe,
  505. .remove = mt9v011_remove,
  506. .id_table = mt9v011_id,
  507. };